events.c 35 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <linux/pci.h>
  32. #include <asm/desc.h>
  33. #include <asm/ptrace.h>
  34. #include <asm/irq.h>
  35. #include <asm/idle.h>
  36. #include <asm/io_apic.h>
  37. #include <asm/sync_bitops.h>
  38. #include <asm/xen/pci.h>
  39. #include <asm/xen/hypercall.h>
  40. #include <asm/xen/hypervisor.h>
  41. #include <xen/xen.h>
  42. #include <xen/hvm.h>
  43. #include <xen/xen-ops.h>
  44. #include <xen/events.h>
  45. #include <xen/interface/xen.h>
  46. #include <xen/interface/event_channel.h>
  47. #include <xen/interface/hvm/hvm_op.h>
  48. #include <xen/interface/hvm/params.h>
  49. /*
  50. * This lock protects updates to the following mapping and reference-count
  51. * arrays. The lock does not need to be acquired to read the mapping tables.
  52. */
  53. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  54. static LIST_HEAD(xen_irq_list_head);
  55. /* IRQ <-> VIRQ mapping. */
  56. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  57. /* IRQ <-> IPI mapping */
  58. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  59. /* Interrupt types. */
  60. enum xen_irq_type {
  61. IRQT_UNBOUND = 0,
  62. IRQT_PIRQ,
  63. IRQT_VIRQ,
  64. IRQT_IPI,
  65. IRQT_EVTCHN
  66. };
  67. /*
  68. * Packed IRQ information:
  69. * type - enum xen_irq_type
  70. * event channel - irq->event channel mapping
  71. * cpu - cpu this event channel is bound to
  72. * index - type-specific information:
  73. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  74. * guest, or GSI (real passthrough IRQ) of the device.
  75. * VIRQ - virq number
  76. * IPI - IPI vector
  77. * EVTCHN -
  78. */
  79. struct irq_info
  80. {
  81. struct list_head list;
  82. enum xen_irq_type type; /* type */
  83. unsigned irq;
  84. unsigned short evtchn; /* event channel */
  85. unsigned short cpu; /* cpu bound */
  86. union {
  87. unsigned short virq;
  88. enum ipi_vector ipi;
  89. struct {
  90. unsigned short pirq;
  91. unsigned short gsi;
  92. unsigned char vector;
  93. unsigned char flags;
  94. } pirq;
  95. } u;
  96. };
  97. #define PIRQ_NEEDS_EOI (1 << 0)
  98. #define PIRQ_SHAREABLE (1 << 1)
  99. static struct irq_info *irq_info;
  100. static int *pirq_to_irq;
  101. static int *evtchn_to_irq;
  102. static DEFINE_PER_CPU(unsigned long [NR_EVENT_CHANNELS/BITS_PER_LONG],
  103. cpu_evtchn_mask);
  104. /* Xen will never allocate port zero for any purpose. */
  105. #define VALID_EVTCHN(chn) ((chn) != 0)
  106. static struct irq_chip xen_dynamic_chip;
  107. static struct irq_chip xen_percpu_chip;
  108. static struct irq_chip xen_pirq_chip;
  109. /* Get info for IRQ */
  110. static struct irq_info *info_for_irq(unsigned irq)
  111. {
  112. return &irq_info[irq];
  113. }
  114. /* Constructors for packed IRQ information. */
  115. static void xen_irq_info_common_init(struct irq_info *info,
  116. unsigned irq,
  117. enum xen_irq_type type,
  118. unsigned short evtchn,
  119. unsigned short cpu)
  120. {
  121. BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
  122. info->type = type;
  123. info->irq = irq;
  124. info->evtchn = evtchn;
  125. info->cpu = cpu;
  126. evtchn_to_irq[evtchn] = irq;
  127. }
  128. static void xen_irq_info_evtchn_init(unsigned irq,
  129. unsigned short evtchn)
  130. {
  131. struct irq_info *info = info_for_irq(irq);
  132. xen_irq_info_common_init(info, irq, IRQT_EVTCHN, evtchn, 0);
  133. }
  134. static void xen_irq_info_ipi_init(unsigned cpu,
  135. unsigned irq,
  136. unsigned short evtchn,
  137. enum ipi_vector ipi)
  138. {
  139. struct irq_info *info = info_for_irq(irq);
  140. xen_irq_info_common_init(info, irq, IRQT_IPI, evtchn, 0);
  141. info->u.ipi = ipi;
  142. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  143. }
  144. static void xen_irq_info_virq_init(unsigned cpu,
  145. unsigned irq,
  146. unsigned short evtchn,
  147. unsigned short virq)
  148. {
  149. struct irq_info *info = info_for_irq(irq);
  150. xen_irq_info_common_init(info, irq, IRQT_VIRQ, evtchn, 0);
  151. info->u.virq = virq;
  152. per_cpu(virq_to_irq, cpu)[virq] = irq;
  153. }
  154. static void xen_irq_info_pirq_init(unsigned irq,
  155. unsigned short evtchn,
  156. unsigned short pirq,
  157. unsigned short gsi,
  158. unsigned short vector,
  159. unsigned char flags)
  160. {
  161. struct irq_info *info = info_for_irq(irq);
  162. xen_irq_info_common_init(info, irq, IRQT_PIRQ, evtchn, 0);
  163. info->u.pirq.pirq = pirq;
  164. info->u.pirq.gsi = gsi;
  165. info->u.pirq.vector = vector;
  166. info->u.pirq.flags = flags;
  167. pirq_to_irq[pirq] = irq;
  168. }
  169. /*
  170. * Accessors for packed IRQ information.
  171. */
  172. static unsigned int evtchn_from_irq(unsigned irq)
  173. {
  174. if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
  175. return 0;
  176. return info_for_irq(irq)->evtchn;
  177. }
  178. unsigned irq_from_evtchn(unsigned int evtchn)
  179. {
  180. return evtchn_to_irq[evtchn];
  181. }
  182. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  183. static enum ipi_vector ipi_from_irq(unsigned irq)
  184. {
  185. struct irq_info *info = info_for_irq(irq);
  186. BUG_ON(info == NULL);
  187. BUG_ON(info->type != IRQT_IPI);
  188. return info->u.ipi;
  189. }
  190. static unsigned virq_from_irq(unsigned irq)
  191. {
  192. struct irq_info *info = info_for_irq(irq);
  193. BUG_ON(info == NULL);
  194. BUG_ON(info->type != IRQT_VIRQ);
  195. return info->u.virq;
  196. }
  197. static unsigned pirq_from_irq(unsigned irq)
  198. {
  199. struct irq_info *info = info_for_irq(irq);
  200. BUG_ON(info == NULL);
  201. BUG_ON(info->type != IRQT_PIRQ);
  202. return info->u.pirq.pirq;
  203. }
  204. static unsigned gsi_from_irq(unsigned irq)
  205. {
  206. struct irq_info *info = info_for_irq(irq);
  207. BUG_ON(info == NULL);
  208. BUG_ON(info->type != IRQT_PIRQ);
  209. return info->u.pirq.gsi;
  210. }
  211. static enum xen_irq_type type_from_irq(unsigned irq)
  212. {
  213. return info_for_irq(irq)->type;
  214. }
  215. static unsigned cpu_from_irq(unsigned irq)
  216. {
  217. return info_for_irq(irq)->cpu;
  218. }
  219. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  220. {
  221. int irq = evtchn_to_irq[evtchn];
  222. unsigned ret = 0;
  223. if (irq != -1)
  224. ret = cpu_from_irq(irq);
  225. return ret;
  226. }
  227. static bool pirq_needs_eoi(unsigned irq)
  228. {
  229. struct irq_info *info = info_for_irq(irq);
  230. BUG_ON(info->type != IRQT_PIRQ);
  231. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  232. }
  233. static inline unsigned long active_evtchns(unsigned int cpu,
  234. struct shared_info *sh,
  235. unsigned int idx)
  236. {
  237. return (sh->evtchn_pending[idx] &
  238. per_cpu(cpu_evtchn_mask, cpu)[idx] &
  239. ~sh->evtchn_mask[idx]);
  240. }
  241. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  242. {
  243. int irq = evtchn_to_irq[chn];
  244. BUG_ON(irq == -1);
  245. #ifdef CONFIG_SMP
  246. cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
  247. #endif
  248. clear_bit(chn, per_cpu(cpu_evtchn_mask, cpu_from_irq(irq)));
  249. set_bit(chn, per_cpu(cpu_evtchn_mask, cpu));
  250. irq_info[irq].cpu = cpu;
  251. }
  252. static void init_evtchn_cpu_bindings(void)
  253. {
  254. int i;
  255. #ifdef CONFIG_SMP
  256. struct irq_info *info;
  257. /* By default all event channels notify CPU#0. */
  258. list_for_each_entry(info, &xen_irq_list_head, list) {
  259. struct irq_desc *desc = irq_to_desc(info->irq);
  260. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  261. }
  262. #endif
  263. for_each_possible_cpu(i)
  264. memset(per_cpu(cpu_evtchn_mask, i),
  265. (i == 0) ? ~0 : 0, sizeof(*per_cpu(cpu_evtchn_mask, i)));
  266. }
  267. static inline void clear_evtchn(int port)
  268. {
  269. struct shared_info *s = HYPERVISOR_shared_info;
  270. sync_clear_bit(port, &s->evtchn_pending[0]);
  271. }
  272. static inline void set_evtchn(int port)
  273. {
  274. struct shared_info *s = HYPERVISOR_shared_info;
  275. sync_set_bit(port, &s->evtchn_pending[0]);
  276. }
  277. static inline int test_evtchn(int port)
  278. {
  279. struct shared_info *s = HYPERVISOR_shared_info;
  280. return sync_test_bit(port, &s->evtchn_pending[0]);
  281. }
  282. /**
  283. * notify_remote_via_irq - send event to remote end of event channel via irq
  284. * @irq: irq of event channel to send event to
  285. *
  286. * Unlike notify_remote_via_evtchn(), this is safe to use across
  287. * save/restore. Notifications on a broken connection are silently
  288. * dropped.
  289. */
  290. void notify_remote_via_irq(int irq)
  291. {
  292. int evtchn = evtchn_from_irq(irq);
  293. if (VALID_EVTCHN(evtchn))
  294. notify_remote_via_evtchn(evtchn);
  295. }
  296. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  297. static void mask_evtchn(int port)
  298. {
  299. struct shared_info *s = HYPERVISOR_shared_info;
  300. sync_set_bit(port, &s->evtchn_mask[0]);
  301. }
  302. static void unmask_evtchn(int port)
  303. {
  304. struct shared_info *s = HYPERVISOR_shared_info;
  305. unsigned int cpu = get_cpu();
  306. BUG_ON(!irqs_disabled());
  307. /* Slow path (hypercall) if this is a non-local port. */
  308. if (unlikely(cpu != cpu_from_evtchn(port))) {
  309. struct evtchn_unmask unmask = { .port = port };
  310. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  311. } else {
  312. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  313. sync_clear_bit(port, &s->evtchn_mask[0]);
  314. /*
  315. * The following is basically the equivalent of
  316. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  317. * the interrupt edge' if the channel is masked.
  318. */
  319. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  320. !sync_test_and_set_bit(port / BITS_PER_LONG,
  321. &vcpu_info->evtchn_pending_sel))
  322. vcpu_info->evtchn_upcall_pending = 1;
  323. }
  324. put_cpu();
  325. }
  326. static void xen_irq_init(unsigned irq)
  327. {
  328. struct irq_info *info;
  329. struct irq_desc *desc = irq_to_desc(irq);
  330. /* By default all event channels notify CPU#0. */
  331. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  332. info = &irq_info[irq];
  333. info->type = IRQT_UNBOUND;
  334. list_add_tail(&info->list, &xen_irq_list_head);
  335. }
  336. static int xen_allocate_irq_dynamic(void)
  337. {
  338. int first = 0;
  339. int irq;
  340. #ifdef CONFIG_X86_IO_APIC
  341. /*
  342. * For an HVM guest or domain 0 which see "real" (emulated or
  343. * actual repectively) GSIs we allocate dynamic IRQs
  344. * e.g. those corresponding to event channels or MSIs
  345. * etc. from the range above those "real" GSIs to avoid
  346. * collisions.
  347. */
  348. if (xen_initial_domain() || xen_hvm_domain())
  349. first = get_nr_irqs_gsi();
  350. #endif
  351. retry:
  352. irq = irq_alloc_desc_from(first, -1);
  353. if (irq == -ENOMEM && first > NR_IRQS_LEGACY) {
  354. printk(KERN_ERR "Out of dynamic IRQ space and eating into GSI space. You should increase nr_irqs\n");
  355. first = max(NR_IRQS_LEGACY, first - NR_IRQS_LEGACY);
  356. goto retry;
  357. }
  358. if (irq < 0)
  359. panic("No available IRQ to bind to: increase nr_irqs!\n");
  360. xen_irq_init(irq);
  361. return irq;
  362. }
  363. static int xen_allocate_irq_gsi(unsigned gsi)
  364. {
  365. int irq;
  366. /*
  367. * A PV guest has no concept of a GSI (since it has no ACPI
  368. * nor access to/knowledge of the physical APICs). Therefore
  369. * all IRQs are dynamically allocated from the entire IRQ
  370. * space.
  371. */
  372. if (xen_pv_domain() && !xen_initial_domain())
  373. return xen_allocate_irq_dynamic();
  374. /* Legacy IRQ descriptors are already allocated by the arch. */
  375. if (gsi < NR_IRQS_LEGACY)
  376. irq = gsi;
  377. else
  378. irq = irq_alloc_desc_at(gsi, -1);
  379. if (irq < 0)
  380. panic("Unable to allocate to IRQ%d (%d)\n", gsi, irq);
  381. xen_irq_init(irq);
  382. return irq;
  383. }
  384. static void xen_free_irq(unsigned irq)
  385. {
  386. struct irq_info *info = &irq_info[irq];
  387. info->type = IRQT_UNBOUND;
  388. list_del(&info->list);
  389. /* Legacy IRQ descriptors are managed by the arch. */
  390. if (irq < NR_IRQS_LEGACY)
  391. return;
  392. irq_free_desc(irq);
  393. }
  394. static void pirq_unmask_notify(int irq)
  395. {
  396. struct physdev_eoi eoi = { .irq = pirq_from_irq(irq) };
  397. if (unlikely(pirq_needs_eoi(irq))) {
  398. int rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  399. WARN_ON(rc);
  400. }
  401. }
  402. static void pirq_query_unmask(int irq)
  403. {
  404. struct physdev_irq_status_query irq_status;
  405. struct irq_info *info = info_for_irq(irq);
  406. BUG_ON(info->type != IRQT_PIRQ);
  407. irq_status.irq = pirq_from_irq(irq);
  408. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  409. irq_status.flags = 0;
  410. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  411. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  412. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  413. }
  414. static bool probing_irq(int irq)
  415. {
  416. struct irq_desc *desc = irq_to_desc(irq);
  417. return desc && desc->action == NULL;
  418. }
  419. static unsigned int __startup_pirq(unsigned int irq)
  420. {
  421. struct evtchn_bind_pirq bind_pirq;
  422. struct irq_info *info = info_for_irq(irq);
  423. int evtchn = evtchn_from_irq(irq);
  424. int rc;
  425. BUG_ON(info->type != IRQT_PIRQ);
  426. if (VALID_EVTCHN(evtchn))
  427. goto out;
  428. bind_pirq.pirq = pirq_from_irq(irq);
  429. /* NB. We are happy to share unless we are probing. */
  430. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  431. BIND_PIRQ__WILL_SHARE : 0;
  432. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  433. if (rc != 0) {
  434. if (!probing_irq(irq))
  435. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  436. irq);
  437. return 0;
  438. }
  439. evtchn = bind_pirq.port;
  440. pirq_query_unmask(irq);
  441. evtchn_to_irq[evtchn] = irq;
  442. bind_evtchn_to_cpu(evtchn, 0);
  443. info->evtchn = evtchn;
  444. out:
  445. unmask_evtchn(evtchn);
  446. pirq_unmask_notify(irq);
  447. return 0;
  448. }
  449. static unsigned int startup_pirq(struct irq_data *data)
  450. {
  451. return __startup_pirq(data->irq);
  452. }
  453. static void shutdown_pirq(struct irq_data *data)
  454. {
  455. struct evtchn_close close;
  456. unsigned int irq = data->irq;
  457. struct irq_info *info = info_for_irq(irq);
  458. int evtchn = evtchn_from_irq(irq);
  459. BUG_ON(info->type != IRQT_PIRQ);
  460. if (!VALID_EVTCHN(evtchn))
  461. return;
  462. mask_evtchn(evtchn);
  463. close.port = evtchn;
  464. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  465. BUG();
  466. bind_evtchn_to_cpu(evtchn, 0);
  467. evtchn_to_irq[evtchn] = -1;
  468. info->evtchn = 0;
  469. }
  470. static void enable_pirq(struct irq_data *data)
  471. {
  472. startup_pirq(data);
  473. }
  474. static void disable_pirq(struct irq_data *data)
  475. {
  476. }
  477. static void ack_pirq(struct irq_data *data)
  478. {
  479. int evtchn = evtchn_from_irq(data->irq);
  480. move_native_irq(data->irq);
  481. if (VALID_EVTCHN(evtchn)) {
  482. mask_evtchn(evtchn);
  483. clear_evtchn(evtchn);
  484. }
  485. }
  486. static int find_irq_by_gsi(unsigned gsi)
  487. {
  488. struct irq_info *info;
  489. list_for_each_entry(info, &xen_irq_list_head, list) {
  490. if (info->type != IRQT_PIRQ)
  491. continue;
  492. if (info->u.pirq.gsi == gsi)
  493. return info->irq;
  494. }
  495. return -1;
  496. }
  497. int xen_allocate_pirq_gsi(unsigned gsi)
  498. {
  499. return gsi;
  500. }
  501. /*
  502. * Do not make any assumptions regarding the relationship between the
  503. * IRQ number returned here and the Xen pirq argument.
  504. *
  505. * Note: We don't assign an event channel until the irq actually started
  506. * up. Return an existing irq if we've already got one for the gsi.
  507. */
  508. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  509. unsigned pirq, int shareable, char *name)
  510. {
  511. int irq = -1;
  512. struct physdev_irq irq_op;
  513. spin_lock(&irq_mapping_update_lock);
  514. if ((pirq > nr_irqs) || (gsi > nr_irqs)) {
  515. printk(KERN_WARNING "xen_map_pirq_gsi: %s %s is incorrect!\n",
  516. pirq > nr_irqs ? "pirq" :"",
  517. gsi > nr_irqs ? "gsi" : "");
  518. goto out;
  519. }
  520. irq = find_irq_by_gsi(gsi);
  521. if (irq != -1) {
  522. printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
  523. irq, gsi);
  524. goto out; /* XXX need refcount? */
  525. }
  526. irq = xen_allocate_irq_gsi(gsi);
  527. set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
  528. handle_level_irq, name);
  529. irq_op.irq = irq;
  530. irq_op.vector = 0;
  531. /* Only the privileged domain can do this. For non-priv, the pcifront
  532. * driver provides a PCI bus that does the call to do exactly
  533. * this in the priv domain. */
  534. if (xen_initial_domain() &&
  535. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  536. xen_free_irq(irq);
  537. irq = -ENOSPC;
  538. goto out;
  539. }
  540. xen_irq_info_pirq_init(irq, 0, pirq, gsi, irq_op.vector,
  541. shareable ? PIRQ_SHAREABLE : 0);
  542. out:
  543. spin_unlock(&irq_mapping_update_lock);
  544. return irq;
  545. }
  546. #ifdef CONFIG_PCI_MSI
  547. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  548. {
  549. int rc;
  550. struct physdev_get_free_pirq op_get_free_pirq;
  551. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  552. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  553. WARN_ONCE(rc == -ENOSYS,
  554. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  555. return rc ? -1 : op_get_free_pirq.pirq;
  556. }
  557. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  558. int pirq, int vector, const char *name)
  559. {
  560. int irq, ret;
  561. spin_lock(&irq_mapping_update_lock);
  562. irq = xen_allocate_irq_dynamic();
  563. if (irq == -1)
  564. goto out;
  565. set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
  566. handle_level_irq, name);
  567. xen_irq_info_pirq_init(irq, 0, pirq, 0, vector, 0);
  568. ret = set_irq_msi(irq, msidesc);
  569. if (ret < 0)
  570. goto error_irq;
  571. out:
  572. spin_unlock(&irq_mapping_update_lock);
  573. return irq;
  574. error_irq:
  575. spin_unlock(&irq_mapping_update_lock);
  576. xen_free_irq(irq);
  577. return -1;
  578. }
  579. #endif
  580. int xen_destroy_irq(int irq)
  581. {
  582. struct irq_desc *desc;
  583. struct physdev_unmap_pirq unmap_irq;
  584. struct irq_info *info = info_for_irq(irq);
  585. int rc = -ENOENT;
  586. spin_lock(&irq_mapping_update_lock);
  587. desc = irq_to_desc(irq);
  588. if (!desc)
  589. goto out;
  590. if (xen_initial_domain()) {
  591. unmap_irq.pirq = info->u.pirq.pirq;
  592. unmap_irq.domid = DOMID_SELF;
  593. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  594. if (rc) {
  595. printk(KERN_WARNING "unmap irq failed %d\n", rc);
  596. goto out;
  597. }
  598. }
  599. pirq_to_irq[info->u.pirq.pirq] = -1;
  600. xen_free_irq(irq);
  601. out:
  602. spin_unlock(&irq_mapping_update_lock);
  603. return rc;
  604. }
  605. int xen_irq_from_pirq(unsigned pirq)
  606. {
  607. return pirq_to_irq[pirq];
  608. }
  609. int bind_evtchn_to_irq(unsigned int evtchn)
  610. {
  611. int irq;
  612. spin_lock(&irq_mapping_update_lock);
  613. irq = evtchn_to_irq[evtchn];
  614. if (irq == -1) {
  615. irq = xen_allocate_irq_dynamic();
  616. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  617. handle_fasteoi_irq, "event");
  618. xen_irq_info_evtchn_init(irq, evtchn);
  619. }
  620. spin_unlock(&irq_mapping_update_lock);
  621. return irq;
  622. }
  623. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  624. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  625. {
  626. struct evtchn_bind_ipi bind_ipi;
  627. int evtchn, irq;
  628. spin_lock(&irq_mapping_update_lock);
  629. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  630. if (irq == -1) {
  631. irq = xen_allocate_irq_dynamic();
  632. if (irq < 0)
  633. goto out;
  634. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  635. handle_percpu_irq, "ipi");
  636. bind_ipi.vcpu = cpu;
  637. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  638. &bind_ipi) != 0)
  639. BUG();
  640. evtchn = bind_ipi.port;
  641. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  642. bind_evtchn_to_cpu(evtchn, cpu);
  643. }
  644. out:
  645. spin_unlock(&irq_mapping_update_lock);
  646. return irq;
  647. }
  648. int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  649. {
  650. struct evtchn_bind_virq bind_virq;
  651. int evtchn, irq;
  652. spin_lock(&irq_mapping_update_lock);
  653. irq = per_cpu(virq_to_irq, cpu)[virq];
  654. if (irq == -1) {
  655. irq = xen_allocate_irq_dynamic();
  656. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  657. handle_percpu_irq, "virq");
  658. bind_virq.virq = virq;
  659. bind_virq.vcpu = cpu;
  660. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  661. &bind_virq) != 0)
  662. BUG();
  663. evtchn = bind_virq.port;
  664. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  665. bind_evtchn_to_cpu(evtchn, cpu);
  666. }
  667. spin_unlock(&irq_mapping_update_lock);
  668. return irq;
  669. }
  670. static void unbind_from_irq(unsigned int irq)
  671. {
  672. struct evtchn_close close;
  673. int evtchn = evtchn_from_irq(irq);
  674. spin_lock(&irq_mapping_update_lock);
  675. if (VALID_EVTCHN(evtchn)) {
  676. close.port = evtchn;
  677. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  678. BUG();
  679. switch (type_from_irq(irq)) {
  680. case IRQT_VIRQ:
  681. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  682. [virq_from_irq(irq)] = -1;
  683. break;
  684. case IRQT_IPI:
  685. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  686. [ipi_from_irq(irq)] = -1;
  687. break;
  688. default:
  689. break;
  690. }
  691. /* Closed ports are implicitly re-bound to VCPU0. */
  692. bind_evtchn_to_cpu(evtchn, 0);
  693. evtchn_to_irq[evtchn] = -1;
  694. }
  695. BUG_ON(irq_info[irq].type == IRQT_UNBOUND);
  696. xen_free_irq(irq);
  697. spin_unlock(&irq_mapping_update_lock);
  698. }
  699. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  700. irq_handler_t handler,
  701. unsigned long irqflags,
  702. const char *devname, void *dev_id)
  703. {
  704. unsigned int irq;
  705. int retval;
  706. irq = bind_evtchn_to_irq(evtchn);
  707. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  708. if (retval != 0) {
  709. unbind_from_irq(irq);
  710. return retval;
  711. }
  712. return irq;
  713. }
  714. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  715. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  716. irq_handler_t handler,
  717. unsigned long irqflags, const char *devname, void *dev_id)
  718. {
  719. unsigned int irq;
  720. int retval;
  721. irq = bind_virq_to_irq(virq, cpu);
  722. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  723. if (retval != 0) {
  724. unbind_from_irq(irq);
  725. return retval;
  726. }
  727. return irq;
  728. }
  729. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  730. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  731. unsigned int cpu,
  732. irq_handler_t handler,
  733. unsigned long irqflags,
  734. const char *devname,
  735. void *dev_id)
  736. {
  737. int irq, retval;
  738. irq = bind_ipi_to_irq(ipi, cpu);
  739. if (irq < 0)
  740. return irq;
  741. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME;
  742. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  743. if (retval != 0) {
  744. unbind_from_irq(irq);
  745. return retval;
  746. }
  747. return irq;
  748. }
  749. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  750. {
  751. free_irq(irq, dev_id);
  752. unbind_from_irq(irq);
  753. }
  754. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  755. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  756. {
  757. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  758. BUG_ON(irq < 0);
  759. notify_remote_via_irq(irq);
  760. }
  761. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  762. {
  763. struct shared_info *sh = HYPERVISOR_shared_info;
  764. int cpu = smp_processor_id();
  765. unsigned long *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
  766. int i;
  767. unsigned long flags;
  768. static DEFINE_SPINLOCK(debug_lock);
  769. struct vcpu_info *v;
  770. spin_lock_irqsave(&debug_lock, flags);
  771. printk("\nvcpu %d\n ", cpu);
  772. for_each_online_cpu(i) {
  773. int pending;
  774. v = per_cpu(xen_vcpu, i);
  775. pending = (get_irq_regs() && i == cpu)
  776. ? xen_irqs_disabled(get_irq_regs())
  777. : v->evtchn_upcall_mask;
  778. printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
  779. pending, v->evtchn_upcall_pending,
  780. (int)(sizeof(v->evtchn_pending_sel)*2),
  781. v->evtchn_pending_sel);
  782. }
  783. v = per_cpu(xen_vcpu, cpu);
  784. printk("\npending:\n ");
  785. for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  786. printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
  787. sh->evtchn_pending[i],
  788. i % 8 == 0 ? "\n " : " ");
  789. printk("\nglobal mask:\n ");
  790. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  791. printk("%0*lx%s",
  792. (int)(sizeof(sh->evtchn_mask[0])*2),
  793. sh->evtchn_mask[i],
  794. i % 8 == 0 ? "\n " : " ");
  795. printk("\nglobally unmasked:\n ");
  796. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  797. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  798. sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  799. i % 8 == 0 ? "\n " : " ");
  800. printk("\nlocal cpu%d mask:\n ", cpu);
  801. for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
  802. printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
  803. cpu_evtchn[i],
  804. i % 8 == 0 ? "\n " : " ");
  805. printk("\nlocally unmasked:\n ");
  806. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
  807. unsigned long pending = sh->evtchn_pending[i]
  808. & ~sh->evtchn_mask[i]
  809. & cpu_evtchn[i];
  810. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  811. pending, i % 8 == 0 ? "\n " : " ");
  812. }
  813. printk("\npending list:\n");
  814. for (i = 0; i < NR_EVENT_CHANNELS; i++) {
  815. if (sync_test_bit(i, sh->evtchn_pending)) {
  816. int word_idx = i / BITS_PER_LONG;
  817. printk(" %d: event %d -> irq %d%s%s%s\n",
  818. cpu_from_evtchn(i), i,
  819. evtchn_to_irq[i],
  820. sync_test_bit(word_idx, &v->evtchn_pending_sel)
  821. ? "" : " l2-clear",
  822. !sync_test_bit(i, sh->evtchn_mask)
  823. ? "" : " globally-masked",
  824. sync_test_bit(i, cpu_evtchn)
  825. ? "" : " locally-masked");
  826. }
  827. }
  828. spin_unlock_irqrestore(&debug_lock, flags);
  829. return IRQ_HANDLED;
  830. }
  831. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  832. /*
  833. * Search the CPUs pending events bitmasks. For each one found, map
  834. * the event number to an irq, and feed it into do_IRQ() for
  835. * handling.
  836. *
  837. * Xen uses a two-level bitmap to speed searching. The first level is
  838. * a bitset of words which contain pending event bits. The second
  839. * level is a bitset of pending events themselves.
  840. */
  841. static void __xen_evtchn_do_upcall(void)
  842. {
  843. int cpu = get_cpu();
  844. struct shared_info *s = HYPERVISOR_shared_info;
  845. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  846. unsigned count;
  847. do {
  848. unsigned long pending_words;
  849. vcpu_info->evtchn_upcall_pending = 0;
  850. if (__this_cpu_inc_return(xed_nesting_count) - 1)
  851. goto out;
  852. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  853. /* Clear master flag /before/ clearing selector flag. */
  854. wmb();
  855. #endif
  856. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  857. while (pending_words != 0) {
  858. unsigned long pending_bits;
  859. int word_idx = __ffs(pending_words);
  860. pending_words &= ~(1UL << word_idx);
  861. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  862. int bit_idx = __ffs(pending_bits);
  863. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  864. int irq = evtchn_to_irq[port];
  865. struct irq_desc *desc;
  866. mask_evtchn(port);
  867. clear_evtchn(port);
  868. if (irq != -1) {
  869. desc = irq_to_desc(irq);
  870. if (desc)
  871. generic_handle_irq_desc(irq, desc);
  872. }
  873. }
  874. }
  875. BUG_ON(!irqs_disabled());
  876. count = __this_cpu_read(xed_nesting_count);
  877. __this_cpu_write(xed_nesting_count, 0);
  878. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  879. out:
  880. put_cpu();
  881. }
  882. void xen_evtchn_do_upcall(struct pt_regs *regs)
  883. {
  884. struct pt_regs *old_regs = set_irq_regs(regs);
  885. exit_idle();
  886. irq_enter();
  887. __xen_evtchn_do_upcall();
  888. irq_exit();
  889. set_irq_regs(old_regs);
  890. }
  891. void xen_hvm_evtchn_do_upcall(void)
  892. {
  893. __xen_evtchn_do_upcall();
  894. }
  895. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  896. /* Rebind a new event channel to an existing irq. */
  897. void rebind_evtchn_irq(int evtchn, int irq)
  898. {
  899. struct irq_info *info = info_for_irq(irq);
  900. /* Make sure the irq is masked, since the new event channel
  901. will also be masked. */
  902. disable_irq(irq);
  903. spin_lock(&irq_mapping_update_lock);
  904. /* After resume the irq<->evtchn mappings are all cleared out */
  905. BUG_ON(evtchn_to_irq[evtchn] != -1);
  906. /* Expect irq to have been bound before,
  907. so there should be a proper type */
  908. BUG_ON(info->type == IRQT_UNBOUND);
  909. xen_irq_info_evtchn_init(irq, evtchn);
  910. spin_unlock(&irq_mapping_update_lock);
  911. /* new event channels are always bound to cpu 0 */
  912. irq_set_affinity(irq, cpumask_of(0));
  913. /* Unmask the event channel. */
  914. enable_irq(irq);
  915. }
  916. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  917. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  918. {
  919. struct evtchn_bind_vcpu bind_vcpu;
  920. int evtchn = evtchn_from_irq(irq);
  921. if (!VALID_EVTCHN(evtchn))
  922. return -1;
  923. /*
  924. * Events delivered via platform PCI interrupts are always
  925. * routed to vcpu 0 and hence cannot be rebound.
  926. */
  927. if (xen_hvm_domain() && !xen_have_vector_callback)
  928. return -1;
  929. /* Send future instances of this interrupt to other vcpu. */
  930. bind_vcpu.port = evtchn;
  931. bind_vcpu.vcpu = tcpu;
  932. /*
  933. * If this fails, it usually just indicates that we're dealing with a
  934. * virq or IPI channel, which don't actually need to be rebound. Ignore
  935. * it, but don't do the xenlinux-level rebind in that case.
  936. */
  937. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  938. bind_evtchn_to_cpu(evtchn, tcpu);
  939. return 0;
  940. }
  941. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  942. bool force)
  943. {
  944. unsigned tcpu = cpumask_first(dest);
  945. return rebind_irq_to_cpu(data->irq, tcpu);
  946. }
  947. int resend_irq_on_evtchn(unsigned int irq)
  948. {
  949. int masked, evtchn = evtchn_from_irq(irq);
  950. struct shared_info *s = HYPERVISOR_shared_info;
  951. if (!VALID_EVTCHN(evtchn))
  952. return 1;
  953. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  954. sync_set_bit(evtchn, s->evtchn_pending);
  955. if (!masked)
  956. unmask_evtchn(evtchn);
  957. return 1;
  958. }
  959. static void enable_dynirq(struct irq_data *data)
  960. {
  961. int evtchn = evtchn_from_irq(data->irq);
  962. if (VALID_EVTCHN(evtchn))
  963. unmask_evtchn(evtchn);
  964. }
  965. static void disable_dynirq(struct irq_data *data)
  966. {
  967. int evtchn = evtchn_from_irq(data->irq);
  968. if (VALID_EVTCHN(evtchn))
  969. mask_evtchn(evtchn);
  970. }
  971. static void ack_dynirq(struct irq_data *data)
  972. {
  973. int evtchn = evtchn_from_irq(data->irq);
  974. move_masked_irq(data->irq);
  975. if (VALID_EVTCHN(evtchn))
  976. unmask_evtchn(evtchn);
  977. }
  978. static int retrigger_dynirq(struct irq_data *data)
  979. {
  980. int evtchn = evtchn_from_irq(data->irq);
  981. struct shared_info *sh = HYPERVISOR_shared_info;
  982. int ret = 0;
  983. if (VALID_EVTCHN(evtchn)) {
  984. int masked;
  985. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  986. sync_set_bit(evtchn, sh->evtchn_pending);
  987. if (!masked)
  988. unmask_evtchn(evtchn);
  989. ret = 1;
  990. }
  991. return ret;
  992. }
  993. static void restore_pirqs(void)
  994. {
  995. int pirq, rc, irq, gsi;
  996. struct physdev_map_pirq map_irq;
  997. for (pirq = 0; pirq < nr_irqs; pirq++) {
  998. irq = pirq_to_irq[pirq];
  999. if (irq == -1)
  1000. continue;
  1001. /* save/restore of PT devices doesn't work, so at this point the
  1002. * only devices present are GSI based emulated devices */
  1003. gsi = gsi_from_irq(irq);
  1004. if (!gsi)
  1005. continue;
  1006. map_irq.domid = DOMID_SELF;
  1007. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1008. map_irq.index = gsi;
  1009. map_irq.pirq = pirq;
  1010. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1011. if (rc) {
  1012. printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1013. gsi, irq, pirq, rc);
  1014. xen_free_irq(irq);
  1015. pirq_to_irq[pirq] = -1;
  1016. continue;
  1017. }
  1018. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1019. __startup_pirq(irq);
  1020. }
  1021. }
  1022. static void restore_cpu_virqs(unsigned int cpu)
  1023. {
  1024. struct evtchn_bind_virq bind_virq;
  1025. int virq, irq, evtchn;
  1026. for (virq = 0; virq < NR_VIRQS; virq++) {
  1027. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1028. continue;
  1029. BUG_ON(virq_from_irq(irq) != virq);
  1030. /* Get a new binding from Xen. */
  1031. bind_virq.virq = virq;
  1032. bind_virq.vcpu = cpu;
  1033. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1034. &bind_virq) != 0)
  1035. BUG();
  1036. evtchn = bind_virq.port;
  1037. /* Record the new mapping. */
  1038. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  1039. bind_evtchn_to_cpu(evtchn, cpu);
  1040. }
  1041. }
  1042. static void restore_cpu_ipis(unsigned int cpu)
  1043. {
  1044. struct evtchn_bind_ipi bind_ipi;
  1045. int ipi, irq, evtchn;
  1046. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1047. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1048. continue;
  1049. BUG_ON(ipi_from_irq(irq) != ipi);
  1050. /* Get a new binding from Xen. */
  1051. bind_ipi.vcpu = cpu;
  1052. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1053. &bind_ipi) != 0)
  1054. BUG();
  1055. evtchn = bind_ipi.port;
  1056. /* Record the new mapping. */
  1057. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  1058. bind_evtchn_to_cpu(evtchn, cpu);
  1059. }
  1060. }
  1061. /* Clear an irq's pending state, in preparation for polling on it */
  1062. void xen_clear_irq_pending(int irq)
  1063. {
  1064. int evtchn = evtchn_from_irq(irq);
  1065. if (VALID_EVTCHN(evtchn))
  1066. clear_evtchn(evtchn);
  1067. }
  1068. EXPORT_SYMBOL(xen_clear_irq_pending);
  1069. void xen_set_irq_pending(int irq)
  1070. {
  1071. int evtchn = evtchn_from_irq(irq);
  1072. if (VALID_EVTCHN(evtchn))
  1073. set_evtchn(evtchn);
  1074. }
  1075. bool xen_test_irq_pending(int irq)
  1076. {
  1077. int evtchn = evtchn_from_irq(irq);
  1078. bool ret = false;
  1079. if (VALID_EVTCHN(evtchn))
  1080. ret = test_evtchn(evtchn);
  1081. return ret;
  1082. }
  1083. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1084. * the irq will be disabled so it won't deliver an interrupt. */
  1085. void xen_poll_irq_timeout(int irq, u64 timeout)
  1086. {
  1087. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1088. if (VALID_EVTCHN(evtchn)) {
  1089. struct sched_poll poll;
  1090. poll.nr_ports = 1;
  1091. poll.timeout = timeout;
  1092. set_xen_guest_handle(poll.ports, &evtchn);
  1093. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1094. BUG();
  1095. }
  1096. }
  1097. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1098. /* Poll waiting for an irq to become pending. In the usual case, the
  1099. * irq will be disabled so it won't deliver an interrupt. */
  1100. void xen_poll_irq(int irq)
  1101. {
  1102. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1103. }
  1104. void xen_irq_resume(void)
  1105. {
  1106. unsigned int cpu, evtchn;
  1107. struct irq_info *info;
  1108. init_evtchn_cpu_bindings();
  1109. /* New event-channel space is not 'live' yet. */
  1110. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1111. mask_evtchn(evtchn);
  1112. /* No IRQ <-> event-channel mappings. */
  1113. list_for_each_entry(info, &xen_irq_list_head, list)
  1114. info->evtchn = 0; /* zap event-channel binding */
  1115. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1116. evtchn_to_irq[evtchn] = -1;
  1117. for_each_possible_cpu(cpu) {
  1118. restore_cpu_virqs(cpu);
  1119. restore_cpu_ipis(cpu);
  1120. }
  1121. restore_pirqs();
  1122. }
  1123. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1124. .name = "xen-dyn",
  1125. .irq_disable = disable_dynirq,
  1126. .irq_mask = disable_dynirq,
  1127. .irq_unmask = enable_dynirq,
  1128. .irq_eoi = ack_dynirq,
  1129. .irq_set_affinity = set_affinity_irq,
  1130. .irq_retrigger = retrigger_dynirq,
  1131. };
  1132. static struct irq_chip xen_pirq_chip __read_mostly = {
  1133. .name = "xen-pirq",
  1134. .irq_startup = startup_pirq,
  1135. .irq_shutdown = shutdown_pirq,
  1136. .irq_enable = enable_pirq,
  1137. .irq_unmask = enable_pirq,
  1138. .irq_disable = disable_pirq,
  1139. .irq_mask = disable_pirq,
  1140. .irq_ack = ack_pirq,
  1141. .irq_set_affinity = set_affinity_irq,
  1142. .irq_retrigger = retrigger_dynirq,
  1143. };
  1144. static struct irq_chip xen_percpu_chip __read_mostly = {
  1145. .name = "xen-percpu",
  1146. .irq_disable = disable_dynirq,
  1147. .irq_mask = disable_dynirq,
  1148. .irq_unmask = enable_dynirq,
  1149. .irq_ack = ack_dynirq,
  1150. };
  1151. int xen_set_callback_via(uint64_t via)
  1152. {
  1153. struct xen_hvm_param a;
  1154. a.domid = DOMID_SELF;
  1155. a.index = HVM_PARAM_CALLBACK_IRQ;
  1156. a.value = via;
  1157. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1158. }
  1159. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1160. #ifdef CONFIG_XEN_PVHVM
  1161. /* Vector callbacks are better than PCI interrupts to receive event
  1162. * channel notifications because we can receive vector callbacks on any
  1163. * vcpu and we don't need PCI support or APIC interactions. */
  1164. void xen_callback_vector(void)
  1165. {
  1166. int rc;
  1167. uint64_t callback_via;
  1168. if (xen_have_vector_callback) {
  1169. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1170. rc = xen_set_callback_via(callback_via);
  1171. if (rc) {
  1172. printk(KERN_ERR "Request for Xen HVM callback vector"
  1173. " failed.\n");
  1174. xen_have_vector_callback = 0;
  1175. return;
  1176. }
  1177. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1178. "enabled\n");
  1179. /* in the restore case the vector has already been allocated */
  1180. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1181. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1182. }
  1183. }
  1184. #else
  1185. void xen_callback_vector(void) {}
  1186. #endif
  1187. void __init xen_init_IRQ(void)
  1188. {
  1189. int i;
  1190. irq_info = kcalloc(nr_irqs, sizeof(*irq_info), GFP_KERNEL);
  1191. /* We are using nr_irqs as the maximum number of pirq available but
  1192. * that number is actually chosen by Xen and we don't know exactly
  1193. * what it is. Be careful choosing high pirq numbers. */
  1194. pirq_to_irq = kcalloc(nr_irqs, sizeof(*pirq_to_irq), GFP_KERNEL);
  1195. for (i = 0; i < nr_irqs; i++)
  1196. pirq_to_irq[i] = -1;
  1197. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1198. GFP_KERNEL);
  1199. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1200. evtchn_to_irq[i] = -1;
  1201. init_evtchn_cpu_bindings();
  1202. /* No event channels are 'live' right now. */
  1203. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1204. mask_evtchn(i);
  1205. if (xen_hvm_domain()) {
  1206. xen_callback_vector();
  1207. native_init_IRQ();
  1208. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1209. * __acpi_register_gsi can point at the right function */
  1210. pci_xen_hvm_init();
  1211. } else {
  1212. irq_ctx_init(smp_processor_id());
  1213. if (xen_initial_domain())
  1214. xen_setup_pirqs();
  1215. }
  1216. }