tps65910-regulator.c 31 KB

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  1. /*
  2. * tps65910.c -- TI tps65910
  3. *
  4. * Copyright 2010 Texas Instruments Inc.
  5. *
  6. * Author: Graeme Gregory <gg@slimlogic.co.uk>
  7. * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/err.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/slab.h>
  23. #include <linux/gpio.h>
  24. #include <linux/mfd/tps65910.h>
  25. #define TPS65910_SUPPLY_STATE_ENABLED 0x1
  26. #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
  27. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
  28. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
  29. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  30. /* supported VIO voltages in milivolts */
  31. static const u16 VIO_VSEL_table[] = {
  32. 1500, 1800, 2500, 3300,
  33. };
  34. /* VSEL tables for TPS65910 specific LDOs and dcdc's */
  35. /* supported VDD3 voltages in milivolts */
  36. static const u16 VDD3_VSEL_table[] = {
  37. 5000,
  38. };
  39. /* supported VDIG1 voltages in milivolts */
  40. static const u16 VDIG1_VSEL_table[] = {
  41. 1200, 1500, 1800, 2700,
  42. };
  43. /* supported VDIG2 voltages in milivolts */
  44. static const u16 VDIG2_VSEL_table[] = {
  45. 1000, 1100, 1200, 1800,
  46. };
  47. /* supported VPLL voltages in milivolts */
  48. static const u16 VPLL_VSEL_table[] = {
  49. 1000, 1100, 1800, 2500,
  50. };
  51. /* supported VDAC voltages in milivolts */
  52. static const u16 VDAC_VSEL_table[] = {
  53. 1800, 2600, 2800, 2850,
  54. };
  55. /* supported VAUX1 voltages in milivolts */
  56. static const u16 VAUX1_VSEL_table[] = {
  57. 1800, 2500, 2800, 2850,
  58. };
  59. /* supported VAUX2 voltages in milivolts */
  60. static const u16 VAUX2_VSEL_table[] = {
  61. 1800, 2800, 2900, 3300,
  62. };
  63. /* supported VAUX33 voltages in milivolts */
  64. static const u16 VAUX33_VSEL_table[] = {
  65. 1800, 2000, 2800, 3300,
  66. };
  67. /* supported VMMC voltages in milivolts */
  68. static const u16 VMMC_VSEL_table[] = {
  69. 1800, 2800, 3000, 3300,
  70. };
  71. struct tps_info {
  72. const char *name;
  73. unsigned min_uV;
  74. unsigned max_uV;
  75. u8 n_voltages;
  76. const u16 *voltage_table;
  77. int enable_time_us;
  78. };
  79. static struct tps_info tps65910_regs[] = {
  80. {
  81. .name = "VRTC",
  82. .enable_time_us = 2200,
  83. },
  84. {
  85. .name = "VIO",
  86. .min_uV = 1500000,
  87. .max_uV = 3300000,
  88. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  89. .voltage_table = VIO_VSEL_table,
  90. .enable_time_us = 350,
  91. },
  92. {
  93. .name = "VDD1",
  94. .min_uV = 600000,
  95. .max_uV = 4500000,
  96. .enable_time_us = 350,
  97. },
  98. {
  99. .name = "VDD2",
  100. .min_uV = 600000,
  101. .max_uV = 4500000,
  102. .enable_time_us = 350,
  103. },
  104. {
  105. .name = "VDD3",
  106. .min_uV = 5000000,
  107. .max_uV = 5000000,
  108. .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
  109. .voltage_table = VDD3_VSEL_table,
  110. .enable_time_us = 200,
  111. },
  112. {
  113. .name = "VDIG1",
  114. .min_uV = 1200000,
  115. .max_uV = 2700000,
  116. .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
  117. .voltage_table = VDIG1_VSEL_table,
  118. .enable_time_us = 100,
  119. },
  120. {
  121. .name = "VDIG2",
  122. .min_uV = 1000000,
  123. .max_uV = 1800000,
  124. .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
  125. .voltage_table = VDIG2_VSEL_table,
  126. .enable_time_us = 100,
  127. },
  128. {
  129. .name = "VPLL",
  130. .min_uV = 1000000,
  131. .max_uV = 2500000,
  132. .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
  133. .voltage_table = VPLL_VSEL_table,
  134. .enable_time_us = 100,
  135. },
  136. {
  137. .name = "VDAC",
  138. .min_uV = 1800000,
  139. .max_uV = 2850000,
  140. .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
  141. .voltage_table = VDAC_VSEL_table,
  142. .enable_time_us = 100,
  143. },
  144. {
  145. .name = "VAUX1",
  146. .min_uV = 1800000,
  147. .max_uV = 2850000,
  148. .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
  149. .voltage_table = VAUX1_VSEL_table,
  150. .enable_time_us = 100,
  151. },
  152. {
  153. .name = "VAUX2",
  154. .min_uV = 1800000,
  155. .max_uV = 3300000,
  156. .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
  157. .voltage_table = VAUX2_VSEL_table,
  158. .enable_time_us = 100,
  159. },
  160. {
  161. .name = "VAUX33",
  162. .min_uV = 1800000,
  163. .max_uV = 3300000,
  164. .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
  165. .voltage_table = VAUX33_VSEL_table,
  166. .enable_time_us = 100,
  167. },
  168. {
  169. .name = "VMMC",
  170. .min_uV = 1800000,
  171. .max_uV = 3300000,
  172. .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
  173. .voltage_table = VMMC_VSEL_table,
  174. .enable_time_us = 100,
  175. },
  176. };
  177. static struct tps_info tps65911_regs[] = {
  178. {
  179. .name = "VRTC",
  180. .enable_time_us = 2200,
  181. },
  182. {
  183. .name = "VIO",
  184. .min_uV = 1500000,
  185. .max_uV = 3300000,
  186. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  187. .voltage_table = VIO_VSEL_table,
  188. .enable_time_us = 350,
  189. },
  190. {
  191. .name = "VDD1",
  192. .min_uV = 600000,
  193. .max_uV = 4500000,
  194. .n_voltages = 73,
  195. .enable_time_us = 350,
  196. },
  197. {
  198. .name = "VDD2",
  199. .min_uV = 600000,
  200. .max_uV = 4500000,
  201. .n_voltages = 73,
  202. .enable_time_us = 350,
  203. },
  204. {
  205. .name = "VDDCTRL",
  206. .min_uV = 600000,
  207. .max_uV = 1400000,
  208. .n_voltages = 65,
  209. .enable_time_us = 900,
  210. },
  211. {
  212. .name = "LDO1",
  213. .min_uV = 1000000,
  214. .max_uV = 3300000,
  215. .n_voltages = 47,
  216. .enable_time_us = 420,
  217. },
  218. {
  219. .name = "LDO2",
  220. .min_uV = 1000000,
  221. .max_uV = 3300000,
  222. .n_voltages = 47,
  223. .enable_time_us = 420,
  224. },
  225. {
  226. .name = "LDO3",
  227. .min_uV = 1000000,
  228. .max_uV = 3300000,
  229. .n_voltages = 24,
  230. .enable_time_us = 230,
  231. },
  232. {
  233. .name = "LDO4",
  234. .min_uV = 1000000,
  235. .max_uV = 3300000,
  236. .n_voltages = 47,
  237. .enable_time_us = 230,
  238. },
  239. {
  240. .name = "LDO5",
  241. .min_uV = 1000000,
  242. .max_uV = 3300000,
  243. .n_voltages = 24,
  244. .enable_time_us = 230,
  245. },
  246. {
  247. .name = "LDO6",
  248. .min_uV = 1000000,
  249. .max_uV = 3300000,
  250. .n_voltages = 24,
  251. .enable_time_us = 230,
  252. },
  253. {
  254. .name = "LDO7",
  255. .min_uV = 1000000,
  256. .max_uV = 3300000,
  257. .n_voltages = 24,
  258. .enable_time_us = 230,
  259. },
  260. {
  261. .name = "LDO8",
  262. .min_uV = 1000000,
  263. .max_uV = 3300000,
  264. .n_voltages = 24,
  265. .enable_time_us = 230,
  266. },
  267. };
  268. #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
  269. static unsigned int tps65910_ext_sleep_control[] = {
  270. 0,
  271. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  272. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  273. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  274. EXT_CONTROL_REG_BITS(VDD3, 1, 3),
  275. EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
  276. EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
  277. EXT_CONTROL_REG_BITS(VPLL, 0, 6),
  278. EXT_CONTROL_REG_BITS(VDAC, 0, 7),
  279. EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
  280. EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
  281. EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
  282. EXT_CONTROL_REG_BITS(VMMC, 0, 0),
  283. };
  284. static unsigned int tps65911_ext_sleep_control[] = {
  285. 0,
  286. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  287. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  288. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  289. EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
  290. EXT_CONTROL_REG_BITS(LDO1, 0, 1),
  291. EXT_CONTROL_REG_BITS(LDO2, 0, 2),
  292. EXT_CONTROL_REG_BITS(LDO3, 0, 7),
  293. EXT_CONTROL_REG_BITS(LDO4, 0, 6),
  294. EXT_CONTROL_REG_BITS(LDO5, 0, 3),
  295. EXT_CONTROL_REG_BITS(LDO6, 0, 0),
  296. EXT_CONTROL_REG_BITS(LDO7, 0, 5),
  297. EXT_CONTROL_REG_BITS(LDO8, 0, 4),
  298. };
  299. struct tps65910_reg {
  300. struct regulator_desc *desc;
  301. struct tps65910 *mfd;
  302. struct regulator_dev **rdev;
  303. struct tps_info **info;
  304. struct mutex mutex;
  305. int num_regulators;
  306. int mode;
  307. int (*get_ctrl_reg)(int);
  308. unsigned int *ext_sleep_control;
  309. unsigned int board_ext_control[TPS65910_NUM_REGS];
  310. };
  311. static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
  312. {
  313. u8 val;
  314. int err;
  315. err = pmic->mfd->read(pmic->mfd, reg, 1, &val);
  316. if (err)
  317. return err;
  318. return val;
  319. }
  320. static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val)
  321. {
  322. return pmic->mfd->write(pmic->mfd, reg, 1, &val);
  323. }
  324. static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
  325. u8 set_mask, u8 clear_mask)
  326. {
  327. int err, data;
  328. mutex_lock(&pmic->mutex);
  329. data = tps65910_read(pmic, reg);
  330. if (data < 0) {
  331. dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
  332. err = data;
  333. goto out;
  334. }
  335. data &= ~clear_mask;
  336. data |= set_mask;
  337. err = tps65910_write(pmic, reg, data);
  338. if (err)
  339. dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
  340. out:
  341. mutex_unlock(&pmic->mutex);
  342. return err;
  343. }
  344. static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg)
  345. {
  346. int data;
  347. mutex_lock(&pmic->mutex);
  348. data = tps65910_read(pmic, reg);
  349. if (data < 0)
  350. dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
  351. mutex_unlock(&pmic->mutex);
  352. return data;
  353. }
  354. static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val)
  355. {
  356. int err;
  357. mutex_lock(&pmic->mutex);
  358. err = tps65910_write(pmic, reg, val);
  359. if (err < 0)
  360. dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
  361. mutex_unlock(&pmic->mutex);
  362. return err;
  363. }
  364. static int tps65910_get_ctrl_register(int id)
  365. {
  366. switch (id) {
  367. case TPS65910_REG_VRTC:
  368. return TPS65910_VRTC;
  369. case TPS65910_REG_VIO:
  370. return TPS65910_VIO;
  371. case TPS65910_REG_VDD1:
  372. return TPS65910_VDD1;
  373. case TPS65910_REG_VDD2:
  374. return TPS65910_VDD2;
  375. case TPS65910_REG_VDD3:
  376. return TPS65910_VDD3;
  377. case TPS65910_REG_VDIG1:
  378. return TPS65910_VDIG1;
  379. case TPS65910_REG_VDIG2:
  380. return TPS65910_VDIG2;
  381. case TPS65910_REG_VPLL:
  382. return TPS65910_VPLL;
  383. case TPS65910_REG_VDAC:
  384. return TPS65910_VDAC;
  385. case TPS65910_REG_VAUX1:
  386. return TPS65910_VAUX1;
  387. case TPS65910_REG_VAUX2:
  388. return TPS65910_VAUX2;
  389. case TPS65910_REG_VAUX33:
  390. return TPS65910_VAUX33;
  391. case TPS65910_REG_VMMC:
  392. return TPS65910_VMMC;
  393. default:
  394. return -EINVAL;
  395. }
  396. }
  397. static int tps65911_get_ctrl_register(int id)
  398. {
  399. switch (id) {
  400. case TPS65910_REG_VRTC:
  401. return TPS65910_VRTC;
  402. case TPS65910_REG_VIO:
  403. return TPS65910_VIO;
  404. case TPS65910_REG_VDD1:
  405. return TPS65910_VDD1;
  406. case TPS65910_REG_VDD2:
  407. return TPS65910_VDD2;
  408. case TPS65911_REG_VDDCTRL:
  409. return TPS65911_VDDCTRL;
  410. case TPS65911_REG_LDO1:
  411. return TPS65911_LDO1;
  412. case TPS65911_REG_LDO2:
  413. return TPS65911_LDO2;
  414. case TPS65911_REG_LDO3:
  415. return TPS65911_LDO3;
  416. case TPS65911_REG_LDO4:
  417. return TPS65911_LDO4;
  418. case TPS65911_REG_LDO5:
  419. return TPS65911_LDO5;
  420. case TPS65911_REG_LDO6:
  421. return TPS65911_LDO6;
  422. case TPS65911_REG_LDO7:
  423. return TPS65911_LDO7;
  424. case TPS65911_REG_LDO8:
  425. return TPS65911_LDO8;
  426. default:
  427. return -EINVAL;
  428. }
  429. }
  430. static int tps65910_is_enabled(struct regulator_dev *dev)
  431. {
  432. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  433. int reg, value, id = rdev_get_id(dev);
  434. reg = pmic->get_ctrl_reg(id);
  435. if (reg < 0)
  436. return reg;
  437. value = tps65910_reg_read(pmic, reg);
  438. if (value < 0)
  439. return value;
  440. return value & TPS65910_SUPPLY_STATE_ENABLED;
  441. }
  442. static int tps65910_enable(struct regulator_dev *dev)
  443. {
  444. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  445. struct tps65910 *mfd = pmic->mfd;
  446. int reg, id = rdev_get_id(dev);
  447. reg = pmic->get_ctrl_reg(id);
  448. if (reg < 0)
  449. return reg;
  450. return tps65910_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
  451. }
  452. static int tps65910_disable(struct regulator_dev *dev)
  453. {
  454. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  455. struct tps65910 *mfd = pmic->mfd;
  456. int reg, id = rdev_get_id(dev);
  457. reg = pmic->get_ctrl_reg(id);
  458. if (reg < 0)
  459. return reg;
  460. return tps65910_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
  461. }
  462. static int tps65910_enable_time(struct regulator_dev *dev)
  463. {
  464. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  465. int id = rdev_get_id(dev);
  466. return pmic->info[id]->enable_time_us;
  467. }
  468. static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
  469. {
  470. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  471. struct tps65910 *mfd = pmic->mfd;
  472. int reg, value, id = rdev_get_id(dev);
  473. reg = pmic->get_ctrl_reg(id);
  474. if (reg < 0)
  475. return reg;
  476. switch (mode) {
  477. case REGULATOR_MODE_NORMAL:
  478. return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT,
  479. LDO_ST_MODE_BIT);
  480. case REGULATOR_MODE_IDLE:
  481. value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
  482. return tps65910_set_bits(mfd, reg, value);
  483. case REGULATOR_MODE_STANDBY:
  484. return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT);
  485. }
  486. return -EINVAL;
  487. }
  488. static unsigned int tps65910_get_mode(struct regulator_dev *dev)
  489. {
  490. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  491. int reg, value, id = rdev_get_id(dev);
  492. reg = pmic->get_ctrl_reg(id);
  493. if (reg < 0)
  494. return reg;
  495. value = tps65910_reg_read(pmic, reg);
  496. if (value < 0)
  497. return value;
  498. if (!(value & LDO_ST_ON_BIT))
  499. return REGULATOR_MODE_STANDBY;
  500. else if (value & LDO_ST_MODE_BIT)
  501. return REGULATOR_MODE_IDLE;
  502. else
  503. return REGULATOR_MODE_NORMAL;
  504. }
  505. static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
  506. {
  507. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  508. int id = rdev_get_id(dev);
  509. int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
  510. switch (id) {
  511. case TPS65910_REG_VDD1:
  512. opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP);
  513. mult = tps65910_reg_read(pmic, TPS65910_VDD1);
  514. mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
  515. srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR);
  516. sr = opvsel & VDD1_OP_CMD_MASK;
  517. opvsel &= VDD1_OP_SEL_MASK;
  518. srvsel &= VDD1_SR_SEL_MASK;
  519. vselmax = 75;
  520. break;
  521. case TPS65910_REG_VDD2:
  522. opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP);
  523. mult = tps65910_reg_read(pmic, TPS65910_VDD2);
  524. mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
  525. srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR);
  526. sr = opvsel & VDD2_OP_CMD_MASK;
  527. opvsel &= VDD2_OP_SEL_MASK;
  528. srvsel &= VDD2_SR_SEL_MASK;
  529. vselmax = 75;
  530. break;
  531. case TPS65911_REG_VDDCTRL:
  532. opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP);
  533. srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR);
  534. sr = opvsel & VDDCTRL_OP_CMD_MASK;
  535. opvsel &= VDDCTRL_OP_SEL_MASK;
  536. srvsel &= VDDCTRL_SR_SEL_MASK;
  537. vselmax = 64;
  538. break;
  539. }
  540. /* multiplier 0 == 1 but 2,3 normal */
  541. if (!mult)
  542. mult=1;
  543. if (sr) {
  544. /* normalise to valid range */
  545. if (srvsel < 3)
  546. srvsel = 3;
  547. if (srvsel > vselmax)
  548. srvsel = vselmax;
  549. return srvsel - 3;
  550. } else {
  551. /* normalise to valid range*/
  552. if (opvsel < 3)
  553. opvsel = 3;
  554. if (opvsel > vselmax)
  555. opvsel = vselmax;
  556. return opvsel - 3;
  557. }
  558. return -EINVAL;
  559. }
  560. static int tps65910_get_voltage(struct regulator_dev *dev)
  561. {
  562. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  563. int reg, value, id = rdev_get_id(dev), voltage = 0;
  564. reg = pmic->get_ctrl_reg(id);
  565. if (reg < 0)
  566. return reg;
  567. value = tps65910_reg_read(pmic, reg);
  568. if (value < 0)
  569. return value;
  570. switch (id) {
  571. case TPS65910_REG_VIO:
  572. case TPS65910_REG_VDIG1:
  573. case TPS65910_REG_VDIG2:
  574. case TPS65910_REG_VPLL:
  575. case TPS65910_REG_VDAC:
  576. case TPS65910_REG_VAUX1:
  577. case TPS65910_REG_VAUX2:
  578. case TPS65910_REG_VAUX33:
  579. case TPS65910_REG_VMMC:
  580. value &= LDO_SEL_MASK;
  581. value >>= LDO_SEL_SHIFT;
  582. break;
  583. default:
  584. return -EINVAL;
  585. }
  586. voltage = pmic->info[id]->voltage_table[value] * 1000;
  587. return voltage;
  588. }
  589. static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
  590. {
  591. return 5 * 1000 * 1000;
  592. }
  593. static int tps65911_get_voltage(struct regulator_dev *dev)
  594. {
  595. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  596. int step_mv, id = rdev_get_id(dev);
  597. u8 value, reg;
  598. reg = pmic->get_ctrl_reg(id);
  599. value = tps65910_reg_read(pmic, reg);
  600. switch (id) {
  601. case TPS65911_REG_LDO1:
  602. case TPS65911_REG_LDO2:
  603. case TPS65911_REG_LDO4:
  604. value &= LDO1_SEL_MASK;
  605. value >>= LDO_SEL_SHIFT;
  606. /* The first 5 values of the selector correspond to 1V */
  607. if (value < 5)
  608. value = 0;
  609. else
  610. value -= 4;
  611. step_mv = 50;
  612. break;
  613. case TPS65911_REG_LDO3:
  614. case TPS65911_REG_LDO5:
  615. case TPS65911_REG_LDO6:
  616. case TPS65911_REG_LDO7:
  617. case TPS65911_REG_LDO8:
  618. value &= LDO3_SEL_MASK;
  619. value >>= LDO_SEL_SHIFT;
  620. /* The first 3 values of the selector correspond to 1V */
  621. if (value < 3)
  622. value = 0;
  623. else
  624. value -= 2;
  625. step_mv = 100;
  626. break;
  627. case TPS65910_REG_VIO:
  628. value &= LDO_SEL_MASK;
  629. value >>= LDO_SEL_SHIFT;
  630. return pmic->info[id]->voltage_table[value] * 1000;
  631. default:
  632. return -EINVAL;
  633. }
  634. return (LDO_MIN_VOLT + value * step_mv) * 1000;
  635. }
  636. static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
  637. unsigned selector)
  638. {
  639. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  640. int id = rdev_get_id(dev), vsel;
  641. int dcdc_mult = 0;
  642. switch (id) {
  643. case TPS65910_REG_VDD1:
  644. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  645. if (dcdc_mult == 1)
  646. dcdc_mult--;
  647. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  648. tps65910_modify_bits(pmic, TPS65910_VDD1,
  649. (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
  650. VDD1_VGAIN_SEL_MASK);
  651. tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel);
  652. break;
  653. case TPS65910_REG_VDD2:
  654. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  655. if (dcdc_mult == 1)
  656. dcdc_mult--;
  657. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  658. tps65910_modify_bits(pmic, TPS65910_VDD2,
  659. (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
  660. VDD1_VGAIN_SEL_MASK);
  661. tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel);
  662. break;
  663. case TPS65911_REG_VDDCTRL:
  664. vsel = selector + 3;
  665. tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel);
  666. }
  667. return 0;
  668. }
  669. static int tps65910_set_voltage_sel(struct regulator_dev *dev,
  670. unsigned selector)
  671. {
  672. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  673. int reg, id = rdev_get_id(dev);
  674. reg = pmic->get_ctrl_reg(id);
  675. if (reg < 0)
  676. return reg;
  677. switch (id) {
  678. case TPS65910_REG_VIO:
  679. case TPS65910_REG_VDIG1:
  680. case TPS65910_REG_VDIG2:
  681. case TPS65910_REG_VPLL:
  682. case TPS65910_REG_VDAC:
  683. case TPS65910_REG_VAUX1:
  684. case TPS65910_REG_VAUX2:
  685. case TPS65910_REG_VAUX33:
  686. case TPS65910_REG_VMMC:
  687. return tps65910_modify_bits(pmic, reg,
  688. (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
  689. }
  690. return -EINVAL;
  691. }
  692. static int tps65911_set_voltage_sel(struct regulator_dev *dev,
  693. unsigned selector)
  694. {
  695. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  696. int reg, id = rdev_get_id(dev);
  697. reg = pmic->get_ctrl_reg(id);
  698. if (reg < 0)
  699. return reg;
  700. switch (id) {
  701. case TPS65911_REG_LDO1:
  702. case TPS65911_REG_LDO2:
  703. case TPS65911_REG_LDO4:
  704. return tps65910_modify_bits(pmic, reg,
  705. (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK);
  706. case TPS65911_REG_LDO3:
  707. case TPS65911_REG_LDO5:
  708. case TPS65911_REG_LDO6:
  709. case TPS65911_REG_LDO7:
  710. case TPS65911_REG_LDO8:
  711. return tps65910_modify_bits(pmic, reg,
  712. (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK);
  713. case TPS65910_REG_VIO:
  714. return tps65910_modify_bits(pmic, reg,
  715. (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
  716. }
  717. return -EINVAL;
  718. }
  719. static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
  720. unsigned selector)
  721. {
  722. int volt, mult = 1, id = rdev_get_id(dev);
  723. switch (id) {
  724. case TPS65910_REG_VDD1:
  725. case TPS65910_REG_VDD2:
  726. mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  727. volt = VDD1_2_MIN_VOLT +
  728. (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
  729. break;
  730. case TPS65911_REG_VDDCTRL:
  731. volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
  732. break;
  733. default:
  734. BUG();
  735. return -EINVAL;
  736. }
  737. return volt * 100 * mult;
  738. }
  739. static int tps65910_list_voltage(struct regulator_dev *dev,
  740. unsigned selector)
  741. {
  742. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  743. int id = rdev_get_id(dev), voltage;
  744. if (id < TPS65910_REG_VIO || id > TPS65910_REG_VMMC)
  745. return -EINVAL;
  746. if (selector >= pmic->info[id]->n_voltages)
  747. return -EINVAL;
  748. else
  749. voltage = pmic->info[id]->voltage_table[selector] * 1000;
  750. return voltage;
  751. }
  752. static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
  753. {
  754. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  755. int step_mv = 0, id = rdev_get_id(dev);
  756. switch(id) {
  757. case TPS65911_REG_LDO1:
  758. case TPS65911_REG_LDO2:
  759. case TPS65911_REG_LDO4:
  760. /* The first 5 values of the selector correspond to 1V */
  761. if (selector < 5)
  762. selector = 0;
  763. else
  764. selector -= 4;
  765. step_mv = 50;
  766. break;
  767. case TPS65911_REG_LDO3:
  768. case TPS65911_REG_LDO5:
  769. case TPS65911_REG_LDO6:
  770. case TPS65911_REG_LDO7:
  771. case TPS65911_REG_LDO8:
  772. /* The first 3 values of the selector correspond to 1V */
  773. if (selector < 3)
  774. selector = 0;
  775. else
  776. selector -= 2;
  777. step_mv = 100;
  778. break;
  779. case TPS65910_REG_VIO:
  780. return pmic->info[id]->voltage_table[selector] * 1000;
  781. default:
  782. return -EINVAL;
  783. }
  784. return (LDO_MIN_VOLT + selector * step_mv) * 1000;
  785. }
  786. static int tps65910_set_voltage_dcdc_time_sel(struct regulator_dev *dev,
  787. unsigned int old_selector, unsigned int new_selector)
  788. {
  789. int id = rdev_get_id(dev);
  790. int old_volt, new_volt;
  791. old_volt = tps65910_list_voltage_dcdc(dev, old_selector);
  792. if (old_volt < 0)
  793. return old_volt;
  794. new_volt = tps65910_list_voltage_dcdc(dev, new_selector);
  795. if (new_volt < 0)
  796. return new_volt;
  797. /* VDD1 and VDD2 are 12.5mV/us, VDDCTRL is 100mV/20us */
  798. switch (id) {
  799. case TPS65910_REG_VDD1:
  800. case TPS65910_REG_VDD2:
  801. return DIV_ROUND_UP(abs(old_volt - new_volt), 12500);
  802. case TPS65911_REG_VDDCTRL:
  803. return DIV_ROUND_UP(abs(old_volt - new_volt), 5000);
  804. }
  805. return -EINVAL;
  806. }
  807. /* Regulator ops (except VRTC) */
  808. static struct regulator_ops tps65910_ops_dcdc = {
  809. .is_enabled = tps65910_is_enabled,
  810. .enable = tps65910_enable,
  811. .disable = tps65910_disable,
  812. .enable_time = tps65910_enable_time,
  813. .set_mode = tps65910_set_mode,
  814. .get_mode = tps65910_get_mode,
  815. .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
  816. .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
  817. .set_voltage_time_sel = tps65910_set_voltage_dcdc_time_sel,
  818. .list_voltage = tps65910_list_voltage_dcdc,
  819. };
  820. static struct regulator_ops tps65910_ops_vdd3 = {
  821. .is_enabled = tps65910_is_enabled,
  822. .enable = tps65910_enable,
  823. .disable = tps65910_disable,
  824. .enable_time = tps65910_enable_time,
  825. .set_mode = tps65910_set_mode,
  826. .get_mode = tps65910_get_mode,
  827. .get_voltage = tps65910_get_voltage_vdd3,
  828. .list_voltage = tps65910_list_voltage,
  829. };
  830. static struct regulator_ops tps65910_ops = {
  831. .is_enabled = tps65910_is_enabled,
  832. .enable = tps65910_enable,
  833. .disable = tps65910_disable,
  834. .enable_time = tps65910_enable_time,
  835. .set_mode = tps65910_set_mode,
  836. .get_mode = tps65910_get_mode,
  837. .get_voltage = tps65910_get_voltage,
  838. .set_voltage_sel = tps65910_set_voltage_sel,
  839. .list_voltage = tps65910_list_voltage,
  840. };
  841. static struct regulator_ops tps65911_ops = {
  842. .is_enabled = tps65910_is_enabled,
  843. .enable = tps65910_enable,
  844. .disable = tps65910_disable,
  845. .enable_time = tps65910_enable_time,
  846. .set_mode = tps65910_set_mode,
  847. .get_mode = tps65910_get_mode,
  848. .get_voltage = tps65911_get_voltage,
  849. .set_voltage_sel = tps65911_set_voltage_sel,
  850. .list_voltage = tps65911_list_voltage,
  851. };
  852. static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
  853. int id, int ext_sleep_config)
  854. {
  855. struct tps65910 *mfd = pmic->mfd;
  856. u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
  857. u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
  858. int ret;
  859. /*
  860. * Regulator can not be control from multiple external input EN1, EN2
  861. * and EN3 together.
  862. */
  863. if (ext_sleep_config & EXT_SLEEP_CONTROL) {
  864. int en_count;
  865. en_count = ((ext_sleep_config &
  866. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
  867. en_count += ((ext_sleep_config &
  868. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
  869. en_count += ((ext_sleep_config &
  870. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
  871. en_count += ((ext_sleep_config &
  872. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
  873. if (en_count > 1) {
  874. dev_err(mfd->dev,
  875. "External sleep control flag is not proper\n");
  876. return -EINVAL;
  877. }
  878. }
  879. pmic->board_ext_control[id] = ext_sleep_config;
  880. /* External EN1 control */
  881. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
  882. ret = tps65910_set_bits(mfd,
  883. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  884. else
  885. ret = tps65910_clear_bits(mfd,
  886. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  887. if (ret < 0) {
  888. dev_err(mfd->dev,
  889. "Error in configuring external control EN1\n");
  890. return ret;
  891. }
  892. /* External EN2 control */
  893. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
  894. ret = tps65910_set_bits(mfd,
  895. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  896. else
  897. ret = tps65910_clear_bits(mfd,
  898. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  899. if (ret < 0) {
  900. dev_err(mfd->dev,
  901. "Error in configuring external control EN2\n");
  902. return ret;
  903. }
  904. /* External EN3 control for TPS65910 LDO only */
  905. if ((tps65910_chip_id(mfd) == TPS65910) &&
  906. (id >= TPS65910_REG_VDIG1)) {
  907. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
  908. ret = tps65910_set_bits(mfd,
  909. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  910. else
  911. ret = tps65910_clear_bits(mfd,
  912. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  913. if (ret < 0) {
  914. dev_err(mfd->dev,
  915. "Error in configuring external control EN3\n");
  916. return ret;
  917. }
  918. }
  919. /* Return if no external control is selected */
  920. if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
  921. /* Clear all sleep controls */
  922. ret = tps65910_clear_bits(mfd,
  923. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  924. if (!ret)
  925. ret = tps65910_clear_bits(mfd,
  926. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  927. if (ret < 0)
  928. dev_err(mfd->dev,
  929. "Error in configuring SLEEP register\n");
  930. return ret;
  931. }
  932. /*
  933. * For regulator that has separate operational and sleep register make
  934. * sure that operational is used and clear sleep register to turn
  935. * regulator off when external control is inactive
  936. */
  937. if ((id == TPS65910_REG_VDD1) ||
  938. (id == TPS65910_REG_VDD2) ||
  939. ((id == TPS65911_REG_VDDCTRL) &&
  940. (tps65910_chip_id(mfd) == TPS65911))) {
  941. int op_reg_add = pmic->get_ctrl_reg(id) + 1;
  942. int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
  943. int opvsel = tps65910_reg_read(pmic, op_reg_add);
  944. int srvsel = tps65910_reg_read(pmic, sr_reg_add);
  945. if (opvsel & VDD1_OP_CMD_MASK) {
  946. u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
  947. ret = tps65910_reg_write(pmic, op_reg_add, reg_val);
  948. if (ret < 0) {
  949. dev_err(mfd->dev,
  950. "Error in configuring op register\n");
  951. return ret;
  952. }
  953. }
  954. ret = tps65910_reg_write(pmic, sr_reg_add, 0);
  955. if (ret < 0) {
  956. dev_err(mfd->dev, "Error in settting sr register\n");
  957. return ret;
  958. }
  959. }
  960. ret = tps65910_clear_bits(mfd,
  961. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  962. if (!ret) {
  963. if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  964. ret = tps65910_set_bits(mfd,
  965. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  966. else
  967. ret = tps65910_clear_bits(mfd,
  968. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  969. }
  970. if (ret < 0)
  971. dev_err(mfd->dev,
  972. "Error in configuring SLEEP register\n");
  973. return ret;
  974. }
  975. static __devinit int tps65910_probe(struct platform_device *pdev)
  976. {
  977. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  978. struct regulator_config config = { };
  979. struct tps_info *info;
  980. struct regulator_init_data *reg_data;
  981. struct regulator_dev *rdev;
  982. struct tps65910_reg *pmic;
  983. struct tps65910_board *pmic_plat_data;
  984. int i, err;
  985. pmic_plat_data = dev_get_platdata(tps65910->dev);
  986. if (!pmic_plat_data)
  987. return -EINVAL;
  988. pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
  989. if (!pmic)
  990. return -ENOMEM;
  991. mutex_init(&pmic->mutex);
  992. pmic->mfd = tps65910;
  993. platform_set_drvdata(pdev, pmic);
  994. /* Give control of all register to control port */
  995. tps65910_set_bits(pmic->mfd, TPS65910_DEVCTRL,
  996. DEVCTRL_SR_CTL_I2C_SEL_MASK);
  997. switch(tps65910_chip_id(tps65910)) {
  998. case TPS65910:
  999. pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
  1000. pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
  1001. pmic->ext_sleep_control = tps65910_ext_sleep_control;
  1002. info = tps65910_regs;
  1003. break;
  1004. case TPS65911:
  1005. pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
  1006. pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
  1007. pmic->ext_sleep_control = tps65911_ext_sleep_control;
  1008. info = tps65911_regs;
  1009. break;
  1010. default:
  1011. pr_err("Invalid tps chip version\n");
  1012. return -ENODEV;
  1013. }
  1014. pmic->desc = kcalloc(pmic->num_regulators,
  1015. sizeof(struct regulator_desc), GFP_KERNEL);
  1016. if (!pmic->desc) {
  1017. err = -ENOMEM;
  1018. goto err_out;
  1019. }
  1020. pmic->info = kcalloc(pmic->num_regulators,
  1021. sizeof(struct tps_info *), GFP_KERNEL);
  1022. if (!pmic->info) {
  1023. err = -ENOMEM;
  1024. goto err_free_desc;
  1025. }
  1026. pmic->rdev = kcalloc(pmic->num_regulators,
  1027. sizeof(struct regulator_dev *), GFP_KERNEL);
  1028. if (!pmic->rdev) {
  1029. err = -ENOMEM;
  1030. goto err_free_info;
  1031. }
  1032. for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
  1033. i++, info++) {
  1034. reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
  1035. /* Regulator API handles empty constraints but not NULL
  1036. * constraints */
  1037. if (!reg_data)
  1038. continue;
  1039. /* Register the regulators */
  1040. pmic->info[i] = info;
  1041. pmic->desc[i].name = info->name;
  1042. pmic->desc[i].id = i;
  1043. pmic->desc[i].n_voltages = info->n_voltages;
  1044. if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
  1045. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1046. pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
  1047. VDD1_2_NUM_VOLT_COARSE;
  1048. } else if (i == TPS65910_REG_VDD3) {
  1049. if (tps65910_chip_id(tps65910) == TPS65910)
  1050. pmic->desc[i].ops = &tps65910_ops_vdd3;
  1051. else
  1052. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1053. } else {
  1054. if (tps65910_chip_id(tps65910) == TPS65910)
  1055. pmic->desc[i].ops = &tps65910_ops;
  1056. else
  1057. pmic->desc[i].ops = &tps65911_ops;
  1058. }
  1059. err = tps65910_set_ext_sleep_config(pmic, i,
  1060. pmic_plat_data->regulator_ext_sleep_control[i]);
  1061. /*
  1062. * Failing on regulator for configuring externally control
  1063. * is not a serious issue, just throw warning.
  1064. */
  1065. if (err < 0)
  1066. dev_warn(tps65910->dev,
  1067. "Failed to initialise ext control config\n");
  1068. pmic->desc[i].type = REGULATOR_VOLTAGE;
  1069. pmic->desc[i].owner = THIS_MODULE;
  1070. config.dev = tps65910->dev;
  1071. config.init_data = reg_data;
  1072. config.driver_data = pmic;
  1073. rdev = regulator_register(&pmic->desc[i], &config);
  1074. if (IS_ERR(rdev)) {
  1075. dev_err(tps65910->dev,
  1076. "failed to register %s regulator\n",
  1077. pdev->name);
  1078. err = PTR_ERR(rdev);
  1079. goto err_unregister_regulator;
  1080. }
  1081. /* Save regulator for cleanup */
  1082. pmic->rdev[i] = rdev;
  1083. }
  1084. return 0;
  1085. err_unregister_regulator:
  1086. while (--i >= 0)
  1087. regulator_unregister(pmic->rdev[i]);
  1088. kfree(pmic->rdev);
  1089. err_free_info:
  1090. kfree(pmic->info);
  1091. err_free_desc:
  1092. kfree(pmic->desc);
  1093. err_out:
  1094. return err;
  1095. }
  1096. static int __devexit tps65910_remove(struct platform_device *pdev)
  1097. {
  1098. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1099. int i;
  1100. for (i = 0; i < pmic->num_regulators; i++)
  1101. regulator_unregister(pmic->rdev[i]);
  1102. kfree(pmic->rdev);
  1103. kfree(pmic->info);
  1104. kfree(pmic->desc);
  1105. return 0;
  1106. }
  1107. static void tps65910_shutdown(struct platform_device *pdev)
  1108. {
  1109. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1110. int i;
  1111. /*
  1112. * Before bootloader jumps to kernel, it makes sure that required
  1113. * external control signals are in desired state so that given rails
  1114. * can be configure accordingly.
  1115. * If rails are configured to be controlled from external control
  1116. * then before shutting down/rebooting the system, the external
  1117. * control configuration need to be remove from the rails so that
  1118. * its output will be available as per register programming even
  1119. * if external controls are removed. This is require when the POR
  1120. * value of the control signals are not in active state and before
  1121. * bootloader initializes it, the system requires the rail output
  1122. * to be active for booting.
  1123. */
  1124. for (i = 0; i < pmic->num_regulators; i++) {
  1125. int err;
  1126. if (!pmic->rdev[i])
  1127. continue;
  1128. err = tps65910_set_ext_sleep_config(pmic, i, 0);
  1129. if (err < 0)
  1130. dev_err(&pdev->dev,
  1131. "Error in clearing external control\n");
  1132. }
  1133. }
  1134. static struct platform_driver tps65910_driver = {
  1135. .driver = {
  1136. .name = "tps65910-pmic",
  1137. .owner = THIS_MODULE,
  1138. },
  1139. .probe = tps65910_probe,
  1140. .remove = __devexit_p(tps65910_remove),
  1141. .shutdown = tps65910_shutdown,
  1142. };
  1143. static int __init tps65910_init(void)
  1144. {
  1145. return platform_driver_register(&tps65910_driver);
  1146. }
  1147. subsys_initcall(tps65910_init);
  1148. static void __exit tps65910_cleanup(void)
  1149. {
  1150. platform_driver_unregister(&tps65910_driver);
  1151. }
  1152. module_exit(tps65910_cleanup);
  1153. MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
  1154. MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
  1155. MODULE_LICENSE("GPL v2");
  1156. MODULE_ALIAS("platform:tps65910-pmic");