smartreflex.c 29 KB

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  1. /*
  2. * OMAP SmartReflex Voltage Control
  3. *
  4. * Author: Thara Gopinath <thara@ti.com>
  5. *
  6. * Copyright (C) 2012 Texas Instruments, Inc.
  7. * Thara Gopinath <thara@ti.com>
  8. *
  9. * Copyright (C) 2008 Nokia Corporation
  10. * Kalle Jokiniemi
  11. *
  12. * Copyright (C) 2007 Texas Instruments, Inc.
  13. * Lesly A M <x0080970@ti.com>
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/clk.h>
  22. #include <linux/io.h>
  23. #include <linux/debugfs.h>
  24. #include <linux/delay.h>
  25. #include <linux/slab.h>
  26. #include <linux/pm_runtime.h>
  27. #include <linux/power/smartreflex.h>
  28. #define DRIVER_NAME "smartreflex"
  29. #define SMARTREFLEX_NAME_LEN 16
  30. #define NVALUE_NAME_LEN 40
  31. #define SR_DISABLE_TIMEOUT 200
  32. /* sr_list contains all the instances of smartreflex module */
  33. static LIST_HEAD(sr_list);
  34. static struct omap_sr_class_data *sr_class;
  35. static struct omap_sr_pmic_data *sr_pmic_data;
  36. static struct dentry *sr_dbg_dir;
  37. static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
  38. {
  39. __raw_writel(value, (sr->base + offset));
  40. }
  41. static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
  42. u32 value)
  43. {
  44. u32 reg_val;
  45. /*
  46. * Smartreflex error config register is special as it contains
  47. * certain status bits which if written a 1 into means a clear
  48. * of those bits. So in order to make sure no accidental write of
  49. * 1 happens to those status bits, do a clear of them in the read
  50. * value. This mean this API doesn't rewrite values in these bits
  51. * if they are currently set, but does allow the caller to write
  52. * those bits.
  53. */
  54. if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
  55. mask |= ERRCONFIG_STATUS_V1_MASK;
  56. else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
  57. mask |= ERRCONFIG_VPBOUNDINTST_V2;
  58. reg_val = __raw_readl(sr->base + offset);
  59. reg_val &= ~mask;
  60. value &= mask;
  61. reg_val |= value;
  62. __raw_writel(reg_val, (sr->base + offset));
  63. }
  64. static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
  65. {
  66. return __raw_readl(sr->base + offset);
  67. }
  68. static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
  69. {
  70. struct omap_sr *sr_info;
  71. if (!voltdm) {
  72. pr_err("%s: Null voltage domain passed!\n", __func__);
  73. return ERR_PTR(-EINVAL);
  74. }
  75. list_for_each_entry(sr_info, &sr_list, node) {
  76. if (voltdm == sr_info->voltdm)
  77. return sr_info;
  78. }
  79. return ERR_PTR(-ENODATA);
  80. }
  81. static irqreturn_t sr_interrupt(int irq, void *data)
  82. {
  83. struct omap_sr *sr_info = data;
  84. u32 status = 0;
  85. switch (sr_info->ip_type) {
  86. case SR_TYPE_V1:
  87. /* Read the status bits */
  88. status = sr_read_reg(sr_info, ERRCONFIG_V1);
  89. /* Clear them by writing back */
  90. sr_write_reg(sr_info, ERRCONFIG_V1, status);
  91. break;
  92. case SR_TYPE_V2:
  93. /* Read the status bits */
  94. status = sr_read_reg(sr_info, IRQSTATUS);
  95. /* Clear them by writing back */
  96. sr_write_reg(sr_info, IRQSTATUS, status);
  97. break;
  98. default:
  99. dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n",
  100. sr_info->ip_type);
  101. return IRQ_NONE;
  102. }
  103. if (sr_class->notify)
  104. sr_class->notify(sr_info, status);
  105. return IRQ_HANDLED;
  106. }
  107. static void sr_set_clk_length(struct omap_sr *sr)
  108. {
  109. struct clk *fck;
  110. u32 fclk_speed;
  111. fck = clk_get(&sr->pdev->dev, "fck");
  112. if (IS_ERR(fck)) {
  113. dev_err(&sr->pdev->dev, "%s: unable to get fck for device %s\n",
  114. __func__, dev_name(&sr->pdev->dev));
  115. return;
  116. }
  117. fclk_speed = clk_get_rate(fck);
  118. clk_put(fck);
  119. switch (fclk_speed) {
  120. case 12000000:
  121. sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
  122. break;
  123. case 13000000:
  124. sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
  125. break;
  126. case 19200000:
  127. sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
  128. break;
  129. case 26000000:
  130. sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
  131. break;
  132. case 38400000:
  133. sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
  134. break;
  135. default:
  136. dev_err(&sr->pdev->dev, "%s: Invalid fclk rate: %d\n",
  137. __func__, fclk_speed);
  138. break;
  139. }
  140. }
  141. static void sr_start_vddautocomp(struct omap_sr *sr)
  142. {
  143. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  144. dev_warn(&sr->pdev->dev,
  145. "%s: smartreflex class driver not registered\n",
  146. __func__);
  147. return;
  148. }
  149. if (!sr_class->enable(sr))
  150. sr->autocomp_active = true;
  151. }
  152. static void sr_stop_vddautocomp(struct omap_sr *sr)
  153. {
  154. if (!sr_class || !(sr_class->disable)) {
  155. dev_warn(&sr->pdev->dev,
  156. "%s: smartreflex class driver not registered\n",
  157. __func__);
  158. return;
  159. }
  160. if (sr->autocomp_active) {
  161. sr_class->disable(sr, 1);
  162. sr->autocomp_active = false;
  163. }
  164. }
  165. /*
  166. * This function handles the intializations which have to be done
  167. * only when both sr device and class driver regiter has
  168. * completed. This will be attempted to be called from both sr class
  169. * driver register and sr device intializtion API's. Only one call
  170. * will ultimately succeed.
  171. *
  172. * Currently this function registers interrupt handler for a particular SR
  173. * if smartreflex class driver is already registered and has
  174. * requested for interrupts and the SR interrupt line in present.
  175. */
  176. static int sr_late_init(struct omap_sr *sr_info)
  177. {
  178. struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
  179. struct resource *mem;
  180. int ret = 0;
  181. if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
  182. ret = request_irq(sr_info->irq, sr_interrupt,
  183. 0, sr_info->name, sr_info);
  184. if (ret)
  185. goto error;
  186. disable_irq(sr_info->irq);
  187. }
  188. if (pdata && pdata->enable_on_init)
  189. sr_start_vddautocomp(sr_info);
  190. return ret;
  191. error:
  192. iounmap(sr_info->base);
  193. mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0);
  194. release_mem_region(mem->start, resource_size(mem));
  195. list_del(&sr_info->node);
  196. dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
  197. "interrupt handler. Smartreflex will"
  198. "not function as desired\n", __func__);
  199. kfree(sr_info);
  200. return ret;
  201. }
  202. static void sr_v1_disable(struct omap_sr *sr)
  203. {
  204. int timeout = 0;
  205. int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
  206. ERRCONFIG_MCUBOUNDINTST;
  207. /* Enable MCUDisableAcknowledge interrupt */
  208. sr_modify_reg(sr, ERRCONFIG_V1,
  209. ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
  210. /* SRCONFIG - disable SR */
  211. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  212. /* Disable all other SR interrupts and clear the status as needed */
  213. if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
  214. errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
  215. sr_modify_reg(sr, ERRCONFIG_V1,
  216. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  217. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
  218. errconf_val);
  219. /*
  220. * Wait for SR to be disabled.
  221. * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
  222. */
  223. sr_test_cond_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
  224. ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
  225. timeout);
  226. if (timeout >= SR_DISABLE_TIMEOUT)
  227. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  228. __func__);
  229. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  230. sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
  231. ERRCONFIG_MCUDISACKINTST);
  232. }
  233. static void sr_v2_disable(struct omap_sr *sr)
  234. {
  235. int timeout = 0;
  236. /* Enable MCUDisableAcknowledge interrupt */
  237. sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
  238. /* SRCONFIG - disable SR */
  239. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  240. /*
  241. * Disable all other SR interrupts and clear the status
  242. * write to status register ONLY on need basis - only if status
  243. * is set.
  244. */
  245. if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
  246. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  247. ERRCONFIG_VPBOUNDINTST_V2);
  248. else
  249. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  250. 0x0);
  251. sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
  252. IRQENABLE_MCUVALIDINT |
  253. IRQENABLE_MCUBOUNDSINT));
  254. sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
  255. IRQSTATUS_MCVALIDINT |
  256. IRQSTATUS_MCBOUNDSINT));
  257. /*
  258. * Wait for SR to be disabled.
  259. * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
  260. */
  261. sr_test_cond_timeout((sr_read_reg(sr, IRQSTATUS) &
  262. IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
  263. timeout);
  264. if (timeout >= SR_DISABLE_TIMEOUT)
  265. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  266. __func__);
  267. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  268. sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
  269. sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
  270. }
  271. static struct omap_sr_nvalue_table *sr_retrieve_nvalue_row(
  272. struct omap_sr *sr, u32 efuse_offs)
  273. {
  274. int i;
  275. if (!sr->nvalue_table) {
  276. dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
  277. __func__);
  278. return NULL;
  279. }
  280. for (i = 0; i < sr->nvalue_count; i++) {
  281. if (sr->nvalue_table[i].efuse_offs == efuse_offs)
  282. return &sr->nvalue_table[i];
  283. }
  284. return NULL;
  285. }
  286. /* Public Functions */
  287. /**
  288. * sr_configure_errgen() - Configures the SmartReflex to perform AVS using the
  289. * error generator module.
  290. * @sr: SR module to be configured.
  291. *
  292. * This API is to be called from the smartreflex class driver to
  293. * configure the error generator module inside the smartreflex module.
  294. * SR settings if using the ERROR module inside Smartreflex.
  295. * SR CLASS 3 by default uses only the ERROR module where as
  296. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  297. * module. Returns 0 on success and error value in case of failure.
  298. */
  299. int sr_configure_errgen(struct omap_sr *sr)
  300. {
  301. u32 sr_config, sr_errconfig, errconfig_offs;
  302. u32 vpboundint_en, vpboundint_st;
  303. u32 senp_en = 0, senn_en = 0;
  304. u8 senp_shift, senn_shift;
  305. if (!sr) {
  306. pr_warn("%s: NULL omap_sr from %pF\n", __func__,
  307. (void *)_RET_IP_);
  308. return -EINVAL;
  309. }
  310. if (!sr->clk_length)
  311. sr_set_clk_length(sr);
  312. senp_en = sr->senp_mod;
  313. senn_en = sr->senn_mod;
  314. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  315. SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
  316. switch (sr->ip_type) {
  317. case SR_TYPE_V1:
  318. sr_config |= SRCONFIG_DELAYCTRL;
  319. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  320. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  321. errconfig_offs = ERRCONFIG_V1;
  322. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  323. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  324. break;
  325. case SR_TYPE_V2:
  326. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  327. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  328. errconfig_offs = ERRCONFIG_V2;
  329. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  330. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  331. break;
  332. default:
  333. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  334. "module without specifying the ip\n", __func__);
  335. return -EINVAL;
  336. }
  337. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  338. sr_write_reg(sr, SRCONFIG, sr_config);
  339. sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
  340. (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
  341. (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
  342. sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
  343. SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
  344. sr_errconfig);
  345. /* Enabling the interrupts if the ERROR module is used */
  346. sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
  347. vpboundint_en);
  348. return 0;
  349. }
  350. /**
  351. * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
  352. * @sr: SR module to be configured.
  353. *
  354. * This API is to be called from the smartreflex class driver to
  355. * disable the error generator module inside the smartreflex module.
  356. *
  357. * Returns 0 on success and error value in case of failure.
  358. */
  359. int sr_disable_errgen(struct omap_sr *sr)
  360. {
  361. u32 errconfig_offs;
  362. u32 vpboundint_en, vpboundint_st;
  363. if (!sr) {
  364. pr_warn("%s: NULL omap_sr from %pF\n", __func__,
  365. (void *)_RET_IP_);
  366. return -EINVAL;
  367. }
  368. switch (sr->ip_type) {
  369. case SR_TYPE_V1:
  370. errconfig_offs = ERRCONFIG_V1;
  371. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  372. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  373. break;
  374. case SR_TYPE_V2:
  375. errconfig_offs = ERRCONFIG_V2;
  376. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  377. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  378. break;
  379. default:
  380. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  381. "module without specifying the ip\n", __func__);
  382. return -EINVAL;
  383. }
  384. /* Disable the Sensor and errorgen */
  385. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
  386. /*
  387. * Disable the interrupts of ERROR module
  388. * NOTE: modify is a read, modify,write - an implicit OCP barrier
  389. * which is required is present here - sequencing is critical
  390. * at this point (after errgen is disabled, vpboundint disable)
  391. */
  392. sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
  393. return 0;
  394. }
  395. /**
  396. * sr_configure_minmax() - Configures the SmartReflex to perform AVS using the
  397. * minmaxavg module.
  398. * @sr: SR module to be configured.
  399. *
  400. * This API is to be called from the smartreflex class driver to
  401. * configure the minmaxavg module inside the smartreflex module.
  402. * SR settings if using the ERROR module inside Smartreflex.
  403. * SR CLASS 3 by default uses only the ERROR module where as
  404. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  405. * module. Returns 0 on success and error value in case of failure.
  406. */
  407. int sr_configure_minmax(struct omap_sr *sr)
  408. {
  409. u32 sr_config, sr_avgwt;
  410. u32 senp_en = 0, senn_en = 0;
  411. u8 senp_shift, senn_shift;
  412. if (!sr) {
  413. pr_warn("%s: NULL omap_sr from %pF\n", __func__,
  414. (void *)_RET_IP_);
  415. return -EINVAL;
  416. }
  417. if (!sr->clk_length)
  418. sr_set_clk_length(sr);
  419. senp_en = sr->senp_mod;
  420. senn_en = sr->senn_mod;
  421. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  422. SRCONFIG_SENENABLE |
  423. (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
  424. switch (sr->ip_type) {
  425. case SR_TYPE_V1:
  426. sr_config |= SRCONFIG_DELAYCTRL;
  427. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  428. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  429. break;
  430. case SR_TYPE_V2:
  431. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  432. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  433. break;
  434. default:
  435. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  436. "module without specifying the ip\n", __func__);
  437. return -EINVAL;
  438. }
  439. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  440. sr_write_reg(sr, SRCONFIG, sr_config);
  441. sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
  442. (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
  443. sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
  444. /*
  445. * Enabling the interrupts if MINMAXAVG module is used.
  446. * TODO: check if all the interrupts are mandatory
  447. */
  448. switch (sr->ip_type) {
  449. case SR_TYPE_V1:
  450. sr_modify_reg(sr, ERRCONFIG_V1,
  451. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  452. ERRCONFIG_MCUBOUNDINTEN),
  453. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
  454. ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
  455. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
  456. break;
  457. case SR_TYPE_V2:
  458. sr_write_reg(sr, IRQSTATUS,
  459. IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
  460. IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
  461. sr_write_reg(sr, IRQENABLE_SET,
  462. IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
  463. IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
  464. break;
  465. default:
  466. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  467. "module without specifying the ip\n", __func__);
  468. return -EINVAL;
  469. }
  470. return 0;
  471. }
  472. /**
  473. * sr_enable() - Enables the smartreflex module.
  474. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  475. * @volt: The voltage at which the Voltage domain associated with
  476. * the smartreflex module is operating at.
  477. * This is required only to program the correct Ntarget value.
  478. *
  479. * This API is to be called from the smartreflex class driver to
  480. * enable a smartreflex module. Returns 0 on success. Returns error
  481. * value if the voltage passed is wrong or if ntarget value is wrong.
  482. */
  483. int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
  484. {
  485. struct omap_volt_data *volt_data;
  486. struct omap_sr *sr = _sr_lookup(voltdm);
  487. struct omap_sr_nvalue_table *nvalue_row;
  488. int ret;
  489. if (IS_ERR(sr)) {
  490. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  491. return PTR_ERR(sr);
  492. }
  493. volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
  494. if (IS_ERR(volt_data)) {
  495. dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
  496. "for nominal voltage %ld\n", __func__, volt);
  497. return PTR_ERR(volt_data);
  498. }
  499. nvalue_row = sr_retrieve_nvalue_row(sr, volt_data->sr_efuse_offs);
  500. if (!nvalue_row) {
  501. dev_warn(&sr->pdev->dev, "%s: failure getting SR data for this voltage %ld\n",
  502. __func__, volt);
  503. return -ENODATA;
  504. }
  505. /* errminlimit is opp dependent and hence linked to voltage */
  506. sr->err_minlimit = nvalue_row->errminlimit;
  507. pm_runtime_get_sync(&sr->pdev->dev);
  508. /* Check if SR is already enabled. If yes do nothing */
  509. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
  510. return 0;
  511. /* Configure SR */
  512. ret = sr_class->configure(sr);
  513. if (ret)
  514. return ret;
  515. sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue);
  516. /* SRCONFIG - enable SR */
  517. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
  518. return 0;
  519. }
  520. /**
  521. * sr_disable() - Disables the smartreflex module.
  522. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  523. *
  524. * This API is to be called from the smartreflex class driver to
  525. * disable a smartreflex module.
  526. */
  527. void sr_disable(struct voltagedomain *voltdm)
  528. {
  529. struct omap_sr *sr = _sr_lookup(voltdm);
  530. if (IS_ERR(sr)) {
  531. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  532. return;
  533. }
  534. /* Check if SR clocks are already disabled. If yes do nothing */
  535. if (pm_runtime_suspended(&sr->pdev->dev))
  536. return;
  537. /*
  538. * Disable SR if only it is indeed enabled. Else just
  539. * disable the clocks.
  540. */
  541. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
  542. switch (sr->ip_type) {
  543. case SR_TYPE_V1:
  544. sr_v1_disable(sr);
  545. break;
  546. case SR_TYPE_V2:
  547. sr_v2_disable(sr);
  548. break;
  549. default:
  550. dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
  551. sr->ip_type);
  552. }
  553. }
  554. pm_runtime_put_sync_suspend(&sr->pdev->dev);
  555. }
  556. /**
  557. * sr_register_class() - API to register a smartreflex class parameters.
  558. * @class_data: The structure containing various sr class specific data.
  559. *
  560. * This API is to be called by the smartreflex class driver to register itself
  561. * with the smartreflex driver during init. Returns 0 on success else the
  562. * error value.
  563. */
  564. int sr_register_class(struct omap_sr_class_data *class_data)
  565. {
  566. struct omap_sr *sr_info;
  567. if (!class_data) {
  568. pr_warning("%s:, Smartreflex class data passed is NULL\n",
  569. __func__);
  570. return -EINVAL;
  571. }
  572. if (sr_class) {
  573. pr_warning("%s: Smartreflex class driver already registered\n",
  574. __func__);
  575. return -EBUSY;
  576. }
  577. sr_class = class_data;
  578. /*
  579. * Call into late init to do intializations that require
  580. * both sr driver and sr class driver to be initiallized.
  581. */
  582. list_for_each_entry(sr_info, &sr_list, node)
  583. sr_late_init(sr_info);
  584. return 0;
  585. }
  586. /**
  587. * omap_sr_enable() - API to enable SR clocks and to call into the
  588. * registered smartreflex class enable API.
  589. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  590. *
  591. * This API is to be called from the kernel in order to enable
  592. * a particular smartreflex module. This API will do the initial
  593. * configurations to turn on the smartreflex module and in turn call
  594. * into the registered smartreflex class enable API.
  595. */
  596. void omap_sr_enable(struct voltagedomain *voltdm)
  597. {
  598. struct omap_sr *sr = _sr_lookup(voltdm);
  599. if (IS_ERR(sr)) {
  600. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  601. return;
  602. }
  603. if (!sr->autocomp_active)
  604. return;
  605. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  606. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  607. "registered\n", __func__);
  608. return;
  609. }
  610. sr_class->enable(sr);
  611. }
  612. /**
  613. * omap_sr_disable() - API to disable SR without resetting the voltage
  614. * processor voltage
  615. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  616. *
  617. * This API is to be called from the kernel in order to disable
  618. * a particular smartreflex module. This API will in turn call
  619. * into the registered smartreflex class disable API. This API will tell
  620. * the smartreflex class disable not to reset the VP voltage after
  621. * disabling smartreflex.
  622. */
  623. void omap_sr_disable(struct voltagedomain *voltdm)
  624. {
  625. struct omap_sr *sr = _sr_lookup(voltdm);
  626. if (IS_ERR(sr)) {
  627. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  628. return;
  629. }
  630. if (!sr->autocomp_active)
  631. return;
  632. if (!sr_class || !(sr_class->disable)) {
  633. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  634. "registered\n", __func__);
  635. return;
  636. }
  637. sr_class->disable(sr, 0);
  638. }
  639. /**
  640. * omap_sr_disable_reset_volt() - API to disable SR and reset the
  641. * voltage processor voltage
  642. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  643. *
  644. * This API is to be called from the kernel in order to disable
  645. * a particular smartreflex module. This API will in turn call
  646. * into the registered smartreflex class disable API. This API will tell
  647. * the smartreflex class disable to reset the VP voltage after
  648. * disabling smartreflex.
  649. */
  650. void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
  651. {
  652. struct omap_sr *sr = _sr_lookup(voltdm);
  653. if (IS_ERR(sr)) {
  654. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  655. return;
  656. }
  657. if (!sr->autocomp_active)
  658. return;
  659. if (!sr_class || !(sr_class->disable)) {
  660. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  661. "registered\n", __func__);
  662. return;
  663. }
  664. sr_class->disable(sr, 1);
  665. }
  666. /**
  667. * omap_sr_register_pmic() - API to register pmic specific info.
  668. * @pmic_data: The structure containing pmic specific data.
  669. *
  670. * This API is to be called from the PMIC specific code to register with
  671. * smartreflex driver pmic specific info. Currently the only info required
  672. * is the smartreflex init on the PMIC side.
  673. */
  674. void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
  675. {
  676. if (!pmic_data) {
  677. pr_warning("%s: Trying to register NULL PMIC data structure"
  678. "with smartreflex\n", __func__);
  679. return;
  680. }
  681. sr_pmic_data = pmic_data;
  682. }
  683. /* PM Debug FS entries to enable and disable smartreflex. */
  684. static int omap_sr_autocomp_show(void *data, u64 *val)
  685. {
  686. struct omap_sr *sr_info = data;
  687. if (!sr_info) {
  688. pr_warning("%s: omap_sr struct not found\n", __func__);
  689. return -EINVAL;
  690. }
  691. *val = sr_info->autocomp_active;
  692. return 0;
  693. }
  694. static int omap_sr_autocomp_store(void *data, u64 val)
  695. {
  696. struct omap_sr *sr_info = data;
  697. if (!sr_info) {
  698. pr_warning("%s: omap_sr struct not found\n", __func__);
  699. return -EINVAL;
  700. }
  701. /* Sanity check */
  702. if (val > 1) {
  703. pr_warning("%s: Invalid argument %lld\n", __func__, val);
  704. return -EINVAL;
  705. }
  706. /* control enable/disable only if there is a delta in value */
  707. if (sr_info->autocomp_active != val) {
  708. if (!val)
  709. sr_stop_vddautocomp(sr_info);
  710. else
  711. sr_start_vddautocomp(sr_info);
  712. }
  713. return 0;
  714. }
  715. DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
  716. omap_sr_autocomp_store, "%llu\n");
  717. static int __init omap_sr_probe(struct platform_device *pdev)
  718. {
  719. struct omap_sr *sr_info;
  720. struct omap_sr_data *pdata = pdev->dev.platform_data;
  721. struct resource *mem, *irq;
  722. struct dentry *nvalue_dir;
  723. int i, ret = 0;
  724. sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
  725. if (!sr_info) {
  726. dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
  727. __func__);
  728. return -ENOMEM;
  729. }
  730. platform_set_drvdata(pdev, sr_info);
  731. if (!pdata) {
  732. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  733. ret = -EINVAL;
  734. goto err_free_devinfo;
  735. }
  736. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  737. if (!mem) {
  738. dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
  739. ret = -ENODEV;
  740. goto err_free_devinfo;
  741. }
  742. mem = request_mem_region(mem->start, resource_size(mem),
  743. dev_name(&pdev->dev));
  744. if (!mem) {
  745. dev_err(&pdev->dev, "%s: no mem region\n", __func__);
  746. ret = -EBUSY;
  747. goto err_free_devinfo;
  748. }
  749. irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  750. pm_runtime_enable(&pdev->dev);
  751. pm_runtime_irq_safe(&pdev->dev);
  752. sr_info->name = kasprintf(GFP_KERNEL, "%s", pdata->name);
  753. if (!sr_info->name) {
  754. dev_err(&pdev->dev, "%s: Unable to alloc SR instance name\n",
  755. __func__);
  756. ret = -ENOMEM;
  757. goto err_release_region;
  758. }
  759. sr_info->pdev = pdev;
  760. sr_info->srid = pdev->id;
  761. sr_info->voltdm = pdata->voltdm;
  762. sr_info->nvalue_table = pdata->nvalue_table;
  763. sr_info->nvalue_count = pdata->nvalue_count;
  764. sr_info->senn_mod = pdata->senn_mod;
  765. sr_info->senp_mod = pdata->senp_mod;
  766. sr_info->err_weight = pdata->err_weight;
  767. sr_info->err_maxlimit = pdata->err_maxlimit;
  768. sr_info->accum_data = pdata->accum_data;
  769. sr_info->senn_avgweight = pdata->senn_avgweight;
  770. sr_info->senp_avgweight = pdata->senp_avgweight;
  771. sr_info->autocomp_active = false;
  772. sr_info->ip_type = pdata->ip_type;
  773. sr_info->base = ioremap(mem->start, resource_size(mem));
  774. if (!sr_info->base) {
  775. dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
  776. ret = -ENOMEM;
  777. goto err_free_name;
  778. }
  779. if (irq)
  780. sr_info->irq = irq->start;
  781. sr_set_clk_length(sr_info);
  782. list_add(&sr_info->node, &sr_list);
  783. /*
  784. * Call into late init to do intializations that require
  785. * both sr driver and sr class driver to be initiallized.
  786. */
  787. if (sr_class) {
  788. ret = sr_late_init(sr_info);
  789. if (ret) {
  790. pr_warning("%s: Error in SR late init\n", __func__);
  791. goto err_iounmap;
  792. }
  793. }
  794. dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
  795. if (!sr_dbg_dir) {
  796. sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
  797. if (IS_ERR_OR_NULL(sr_dbg_dir)) {
  798. ret = PTR_ERR(sr_dbg_dir);
  799. pr_err("%s:sr debugfs dir creation failed(%d)\n",
  800. __func__, ret);
  801. goto err_iounmap;
  802. }
  803. }
  804. sr_info->dbg_dir = debugfs_create_dir(sr_info->name, sr_dbg_dir);
  805. if (IS_ERR_OR_NULL(sr_info->dbg_dir)) {
  806. dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
  807. __func__);
  808. ret = PTR_ERR(sr_info->dbg_dir);
  809. goto err_debugfs;
  810. }
  811. (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR,
  812. sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops);
  813. (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
  814. &sr_info->err_weight);
  815. (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
  816. &sr_info->err_maxlimit);
  817. nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
  818. if (IS_ERR_OR_NULL(nvalue_dir)) {
  819. dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
  820. "for n-values\n", __func__);
  821. ret = PTR_ERR(nvalue_dir);
  822. goto err_debugfs;
  823. }
  824. if (sr_info->nvalue_count == 0 || !sr_info->nvalue_table) {
  825. dev_warn(&pdev->dev, "%s: %s: No Voltage table for the corresponding vdd. Cannot create debugfs entries for n-values\n",
  826. __func__, sr_info->name);
  827. ret = -ENODATA;
  828. goto err_debugfs;
  829. }
  830. for (i = 0; i < sr_info->nvalue_count; i++) {
  831. char name[NVALUE_NAME_LEN + 1];
  832. snprintf(name, sizeof(name), "volt_%lu",
  833. sr_info->nvalue_table[i].volt_nominal);
  834. (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  835. &(sr_info->nvalue_table[i].nvalue));
  836. snprintf(name, sizeof(name), "errminlimit_%lu",
  837. sr_info->nvalue_table[i].volt_nominal);
  838. (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  839. &(sr_info->nvalue_table[i].errminlimit));
  840. }
  841. return ret;
  842. err_debugfs:
  843. debugfs_remove_recursive(sr_info->dbg_dir);
  844. err_iounmap:
  845. list_del(&sr_info->node);
  846. iounmap(sr_info->base);
  847. err_free_name:
  848. kfree(sr_info->name);
  849. err_release_region:
  850. release_mem_region(mem->start, resource_size(mem));
  851. err_free_devinfo:
  852. kfree(sr_info);
  853. return ret;
  854. }
  855. static int omap_sr_remove(struct platform_device *pdev)
  856. {
  857. struct omap_sr_data *pdata = pdev->dev.platform_data;
  858. struct omap_sr *sr_info;
  859. struct resource *mem;
  860. if (!pdata) {
  861. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  862. return -EINVAL;
  863. }
  864. sr_info = _sr_lookup(pdata->voltdm);
  865. if (IS_ERR(sr_info)) {
  866. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  867. __func__);
  868. return PTR_ERR(sr_info);
  869. }
  870. if (sr_info->autocomp_active)
  871. sr_stop_vddautocomp(sr_info);
  872. if (sr_info->dbg_dir)
  873. debugfs_remove_recursive(sr_info->dbg_dir);
  874. pm_runtime_disable(&pdev->dev);
  875. list_del(&sr_info->node);
  876. iounmap(sr_info->base);
  877. kfree(sr_info->name);
  878. kfree(sr_info);
  879. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  880. release_mem_region(mem->start, resource_size(mem));
  881. return 0;
  882. }
  883. static void omap_sr_shutdown(struct platform_device *pdev)
  884. {
  885. struct omap_sr_data *pdata = pdev->dev.platform_data;
  886. struct omap_sr *sr_info;
  887. if (!pdata) {
  888. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  889. return;
  890. }
  891. sr_info = _sr_lookup(pdata->voltdm);
  892. if (IS_ERR(sr_info)) {
  893. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  894. __func__);
  895. return;
  896. }
  897. if (sr_info->autocomp_active)
  898. sr_stop_vddautocomp(sr_info);
  899. return;
  900. }
  901. static struct platform_driver smartreflex_driver = {
  902. .remove = omap_sr_remove,
  903. .shutdown = omap_sr_shutdown,
  904. .driver = {
  905. .name = DRIVER_NAME,
  906. },
  907. };
  908. static int __init sr_init(void)
  909. {
  910. int ret = 0;
  911. /*
  912. * sr_init is a late init. If by then a pmic specific API is not
  913. * registered either there is no need for anything to be done on
  914. * the PMIC side or somebody has forgotten to register a PMIC
  915. * handler. Warn for the second condition.
  916. */
  917. if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
  918. sr_pmic_data->sr_pmic_init();
  919. else
  920. pr_warning("%s: No PMIC hook to init smartreflex\n", __func__);
  921. ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe);
  922. if (ret) {
  923. pr_err("%s: platform driver register failed for SR\n",
  924. __func__);
  925. return ret;
  926. }
  927. return 0;
  928. }
  929. late_initcall(sr_init);
  930. static void __exit sr_exit(void)
  931. {
  932. platform_driver_unregister(&smartreflex_driver);
  933. }
  934. module_exit(sr_exit);
  935. MODULE_DESCRIPTION("OMAP Smartreflex Driver");
  936. MODULE_LICENSE("GPL");
  937. MODULE_ALIAS("platform:" DRIVER_NAME);
  938. MODULE_AUTHOR("Texas Instruments Inc");