bnx2x_stats.c 43 KB

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  1. /* bnx2x_stats.c: Broadcom Everest network driver.
  2. *
  3. * Copyright (c) 2007-2010 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  10. * Written by: Eliezer Tamir
  11. * Based on code from Michael Chan's bnx2 driver
  12. * UDP CSUM errata workaround by Arik Gendelman
  13. * Slowpath and fastpath rework by Vladislav Zolotarov
  14. * Statistics and Link management by Yitchak Gertner
  15. *
  16. */
  17. #include "bnx2x_cmn.h"
  18. #include "bnx2x_stats.h"
  19. /* Statistics */
  20. /****************************************************************************
  21. * Macros
  22. ****************************************************************************/
  23. /* sum[hi:lo] += add[hi:lo] */
  24. #define ADD_64(s_hi, a_hi, s_lo, a_lo) \
  25. do { \
  26. s_lo += a_lo; \
  27. s_hi += a_hi + ((s_lo < a_lo) ? 1 : 0); \
  28. } while (0)
  29. /* difference = minuend - subtrahend */
  30. #define DIFF_64(d_hi, m_hi, s_hi, d_lo, m_lo, s_lo) \
  31. do { \
  32. if (m_lo < s_lo) { \
  33. /* underflow */ \
  34. d_hi = m_hi - s_hi; \
  35. if (d_hi > 0) { \
  36. /* we can 'loan' 1 */ \
  37. d_hi--; \
  38. d_lo = m_lo + (UINT_MAX - s_lo) + 1; \
  39. } else { \
  40. /* m_hi <= s_hi */ \
  41. d_hi = 0; \
  42. d_lo = 0; \
  43. } \
  44. } else { \
  45. /* m_lo >= s_lo */ \
  46. if (m_hi < s_hi) { \
  47. d_hi = 0; \
  48. d_lo = 0; \
  49. } else { \
  50. /* m_hi >= s_hi */ \
  51. d_hi = m_hi - s_hi; \
  52. d_lo = m_lo - s_lo; \
  53. } \
  54. } \
  55. } while (0)
  56. #define UPDATE_STAT64(s, t) \
  57. do { \
  58. DIFF_64(diff.hi, new->s##_hi, pstats->mac_stx[0].t##_hi, \
  59. diff.lo, new->s##_lo, pstats->mac_stx[0].t##_lo); \
  60. pstats->mac_stx[0].t##_hi = new->s##_hi; \
  61. pstats->mac_stx[0].t##_lo = new->s##_lo; \
  62. ADD_64(pstats->mac_stx[1].t##_hi, diff.hi, \
  63. pstats->mac_stx[1].t##_lo, diff.lo); \
  64. } while (0)
  65. #define UPDATE_STAT64_NIG(s, t) \
  66. do { \
  67. DIFF_64(diff.hi, new->s##_hi, old->s##_hi, \
  68. diff.lo, new->s##_lo, old->s##_lo); \
  69. ADD_64(estats->t##_hi, diff.hi, \
  70. estats->t##_lo, diff.lo); \
  71. } while (0)
  72. /* sum[hi:lo] += add */
  73. #define ADD_EXTEND_64(s_hi, s_lo, a) \
  74. do { \
  75. s_lo += a; \
  76. s_hi += (s_lo < a) ? 1 : 0; \
  77. } while (0)
  78. #define UPDATE_EXTEND_STAT(s) \
  79. do { \
  80. ADD_EXTEND_64(pstats->mac_stx[1].s##_hi, \
  81. pstats->mac_stx[1].s##_lo, \
  82. new->s); \
  83. } while (0)
  84. #define UPDATE_EXTEND_TSTAT(s, t) \
  85. do { \
  86. diff = le32_to_cpu(tclient->s) - le32_to_cpu(old_tclient->s); \
  87. old_tclient->s = tclient->s; \
  88. ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
  89. } while (0)
  90. #define UPDATE_EXTEND_USTAT(s, t) \
  91. do { \
  92. diff = le32_to_cpu(uclient->s) - le32_to_cpu(old_uclient->s); \
  93. old_uclient->s = uclient->s; \
  94. ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
  95. } while (0)
  96. #define UPDATE_EXTEND_XSTAT(s, t) \
  97. do { \
  98. diff = le32_to_cpu(xclient->s) - le32_to_cpu(old_xclient->s); \
  99. old_xclient->s = xclient->s; \
  100. ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
  101. } while (0)
  102. /* minuend -= subtrahend */
  103. #define SUB_64(m_hi, s_hi, m_lo, s_lo) \
  104. do { \
  105. DIFF_64(m_hi, m_hi, s_hi, m_lo, m_lo, s_lo); \
  106. } while (0)
  107. /* minuend[hi:lo] -= subtrahend */
  108. #define SUB_EXTEND_64(m_hi, m_lo, s) \
  109. do { \
  110. SUB_64(m_hi, 0, m_lo, s); \
  111. } while (0)
  112. #define SUB_EXTEND_USTAT(s, t) \
  113. do { \
  114. diff = le32_to_cpu(uclient->s) - le32_to_cpu(old_uclient->s); \
  115. SUB_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
  116. } while (0)
  117. /*
  118. * General service functions
  119. */
  120. static inline long bnx2x_hilo(u32 *hiref)
  121. {
  122. u32 lo = *(hiref + 1);
  123. #if (BITS_PER_LONG == 64)
  124. u32 hi = *hiref;
  125. return HILO_U64(hi, lo);
  126. #else
  127. return lo;
  128. #endif
  129. }
  130. /*
  131. * Init service functions
  132. */
  133. static void bnx2x_storm_stats_post(struct bnx2x *bp)
  134. {
  135. if (!bp->stats_pending) {
  136. struct eth_query_ramrod_data ramrod_data = {0};
  137. int i, rc;
  138. ramrod_data.drv_counter = bp->stats_counter++;
  139. ramrod_data.collect_port = bp->port.pmf ? 1 : 0;
  140. for_each_queue(bp, i)
  141. ramrod_data.ctr_id_vector |= (1 << bp->fp[i].cl_id);
  142. rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_STAT_QUERY, 0,
  143. ((u32 *)&ramrod_data)[1],
  144. ((u32 *)&ramrod_data)[0], 0);
  145. if (rc == 0) {
  146. /* stats ramrod has it's own slot on the spq */
  147. bp->spq_left++;
  148. bp->stats_pending = 1;
  149. }
  150. }
  151. }
  152. static void bnx2x_hw_stats_post(struct bnx2x *bp)
  153. {
  154. struct dmae_command *dmae = &bp->stats_dmae;
  155. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  156. *stats_comp = DMAE_COMP_VAL;
  157. if (CHIP_REV_IS_SLOW(bp))
  158. return;
  159. /* loader */
  160. if (bp->executer_idx) {
  161. int loader_idx = PMF_DMAE_C(bp);
  162. memset(dmae, 0, sizeof(struct dmae_command));
  163. dmae->opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
  164. DMAE_CMD_C_DST_GRC | DMAE_CMD_C_ENABLE |
  165. DMAE_CMD_DST_RESET |
  166. #ifdef __BIG_ENDIAN
  167. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  168. #else
  169. DMAE_CMD_ENDIANITY_DW_SWAP |
  170. #endif
  171. (BP_PORT(bp) ? DMAE_CMD_PORT_1 :
  172. DMAE_CMD_PORT_0) |
  173. (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
  174. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
  175. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
  176. dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
  177. sizeof(struct dmae_command) *
  178. (loader_idx + 1)) >> 2;
  179. dmae->dst_addr_hi = 0;
  180. dmae->len = sizeof(struct dmae_command) >> 2;
  181. if (CHIP_IS_E1(bp))
  182. dmae->len--;
  183. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
  184. dmae->comp_addr_hi = 0;
  185. dmae->comp_val = 1;
  186. *stats_comp = 0;
  187. bnx2x_post_dmae(bp, dmae, loader_idx);
  188. } else if (bp->func_stx) {
  189. *stats_comp = 0;
  190. bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));
  191. }
  192. }
  193. static int bnx2x_stats_comp(struct bnx2x *bp)
  194. {
  195. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  196. int cnt = 10;
  197. might_sleep();
  198. while (*stats_comp != DMAE_COMP_VAL) {
  199. if (!cnt) {
  200. BNX2X_ERR("timeout waiting for stats finished\n");
  201. break;
  202. }
  203. cnt--;
  204. msleep(1);
  205. }
  206. return 1;
  207. }
  208. /*
  209. * Statistics service functions
  210. */
  211. static void bnx2x_stats_pmf_update(struct bnx2x *bp)
  212. {
  213. struct dmae_command *dmae;
  214. u32 opcode;
  215. int loader_idx = PMF_DMAE_C(bp);
  216. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  217. /* sanity */
  218. if (!IS_E1HMF(bp) || !bp->port.pmf || !bp->port.port_stx) {
  219. BNX2X_ERR("BUG!\n");
  220. return;
  221. }
  222. bp->executer_idx = 0;
  223. opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI |
  224. DMAE_CMD_C_ENABLE |
  225. DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
  226. #ifdef __BIG_ENDIAN
  227. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  228. #else
  229. DMAE_CMD_ENDIANITY_DW_SWAP |
  230. #endif
  231. (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
  232. (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
  233. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  234. dmae->opcode = (opcode | DMAE_CMD_C_DST_GRC);
  235. dmae->src_addr_lo = bp->port.port_stx >> 2;
  236. dmae->src_addr_hi = 0;
  237. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  238. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  239. dmae->len = DMAE_LEN32_RD_MAX;
  240. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  241. dmae->comp_addr_hi = 0;
  242. dmae->comp_val = 1;
  243. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  244. dmae->opcode = (opcode | DMAE_CMD_C_DST_PCI);
  245. dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
  246. dmae->src_addr_hi = 0;
  247. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
  248. DMAE_LEN32_RD_MAX * 4);
  249. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
  250. DMAE_LEN32_RD_MAX * 4);
  251. dmae->len = (sizeof(struct host_port_stats) >> 2) - DMAE_LEN32_RD_MAX;
  252. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  253. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  254. dmae->comp_val = DMAE_COMP_VAL;
  255. *stats_comp = 0;
  256. bnx2x_hw_stats_post(bp);
  257. bnx2x_stats_comp(bp);
  258. }
  259. static void bnx2x_port_stats_init(struct bnx2x *bp)
  260. {
  261. struct dmae_command *dmae;
  262. int port = BP_PORT(bp);
  263. int vn = BP_E1HVN(bp);
  264. u32 opcode;
  265. int loader_idx = PMF_DMAE_C(bp);
  266. u32 mac_addr;
  267. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  268. /* sanity */
  269. if (!bp->link_vars.link_up || !bp->port.pmf) {
  270. BNX2X_ERR("BUG!\n");
  271. return;
  272. }
  273. bp->executer_idx = 0;
  274. /* MCP */
  275. opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
  276. DMAE_CMD_C_DST_GRC | DMAE_CMD_C_ENABLE |
  277. DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
  278. #ifdef __BIG_ENDIAN
  279. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  280. #else
  281. DMAE_CMD_ENDIANITY_DW_SWAP |
  282. #endif
  283. (port ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
  284. (vn << DMAE_CMD_E1HVN_SHIFT));
  285. if (bp->port.port_stx) {
  286. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  287. dmae->opcode = opcode;
  288. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  289. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  290. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  291. dmae->dst_addr_hi = 0;
  292. dmae->len = sizeof(struct host_port_stats) >> 2;
  293. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  294. dmae->comp_addr_hi = 0;
  295. dmae->comp_val = 1;
  296. }
  297. if (bp->func_stx) {
  298. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  299. dmae->opcode = opcode;
  300. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  301. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  302. dmae->dst_addr_lo = bp->func_stx >> 2;
  303. dmae->dst_addr_hi = 0;
  304. dmae->len = sizeof(struct host_func_stats) >> 2;
  305. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  306. dmae->comp_addr_hi = 0;
  307. dmae->comp_val = 1;
  308. }
  309. /* MAC */
  310. opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI |
  311. DMAE_CMD_C_DST_GRC | DMAE_CMD_C_ENABLE |
  312. DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
  313. #ifdef __BIG_ENDIAN
  314. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  315. #else
  316. DMAE_CMD_ENDIANITY_DW_SWAP |
  317. #endif
  318. (port ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
  319. (vn << DMAE_CMD_E1HVN_SHIFT));
  320. if (bp->link_vars.mac_type == MAC_TYPE_BMAC) {
  321. mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
  322. NIG_REG_INGRESS_BMAC0_MEM);
  323. /* BIGMAC_REGISTER_TX_STAT_GTPKT ..
  324. BIGMAC_REGISTER_TX_STAT_GTBYT */
  325. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  326. dmae->opcode = opcode;
  327. dmae->src_addr_lo = (mac_addr +
  328. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  329. dmae->src_addr_hi = 0;
  330. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  331. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  332. dmae->len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
  333. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  334. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  335. dmae->comp_addr_hi = 0;
  336. dmae->comp_val = 1;
  337. /* BIGMAC_REGISTER_RX_STAT_GR64 ..
  338. BIGMAC_REGISTER_RX_STAT_GRIPJ */
  339. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  340. dmae->opcode = opcode;
  341. dmae->src_addr_lo = (mac_addr +
  342. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  343. dmae->src_addr_hi = 0;
  344. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  345. offsetof(struct bmac_stats, rx_stat_gr64_lo));
  346. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  347. offsetof(struct bmac_stats, rx_stat_gr64_lo));
  348. dmae->len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
  349. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  350. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  351. dmae->comp_addr_hi = 0;
  352. dmae->comp_val = 1;
  353. } else if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
  354. mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
  355. /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
  356. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  357. dmae->opcode = opcode;
  358. dmae->src_addr_lo = (mac_addr +
  359. EMAC_REG_EMAC_RX_STAT_AC) >> 2;
  360. dmae->src_addr_hi = 0;
  361. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  362. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  363. dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
  364. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  365. dmae->comp_addr_hi = 0;
  366. dmae->comp_val = 1;
  367. /* EMAC_REG_EMAC_RX_STAT_AC_28 */
  368. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  369. dmae->opcode = opcode;
  370. dmae->src_addr_lo = (mac_addr +
  371. EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
  372. dmae->src_addr_hi = 0;
  373. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  374. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  375. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  376. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  377. dmae->len = 1;
  378. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  379. dmae->comp_addr_hi = 0;
  380. dmae->comp_val = 1;
  381. /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
  382. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  383. dmae->opcode = opcode;
  384. dmae->src_addr_lo = (mac_addr +
  385. EMAC_REG_EMAC_TX_STAT_AC) >> 2;
  386. dmae->src_addr_hi = 0;
  387. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  388. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  389. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  390. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  391. dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
  392. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  393. dmae->comp_addr_hi = 0;
  394. dmae->comp_val = 1;
  395. }
  396. /* NIG */
  397. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  398. dmae->opcode = opcode;
  399. dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
  400. NIG_REG_STAT0_BRB_DISCARD) >> 2;
  401. dmae->src_addr_hi = 0;
  402. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
  403. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
  404. dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
  405. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  406. dmae->comp_addr_hi = 0;
  407. dmae->comp_val = 1;
  408. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  409. dmae->opcode = opcode;
  410. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
  411. NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
  412. dmae->src_addr_hi = 0;
  413. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  414. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  415. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  416. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  417. dmae->len = (2*sizeof(u32)) >> 2;
  418. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  419. dmae->comp_addr_hi = 0;
  420. dmae->comp_val = 1;
  421. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  422. dmae->opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI |
  423. DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE |
  424. DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
  425. #ifdef __BIG_ENDIAN
  426. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  427. #else
  428. DMAE_CMD_ENDIANITY_DW_SWAP |
  429. #endif
  430. (port ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
  431. (vn << DMAE_CMD_E1HVN_SHIFT));
  432. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
  433. NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
  434. dmae->src_addr_hi = 0;
  435. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  436. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  437. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  438. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  439. dmae->len = (2*sizeof(u32)) >> 2;
  440. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  441. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  442. dmae->comp_val = DMAE_COMP_VAL;
  443. *stats_comp = 0;
  444. }
  445. static void bnx2x_func_stats_init(struct bnx2x *bp)
  446. {
  447. struct dmae_command *dmae = &bp->stats_dmae;
  448. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  449. /* sanity */
  450. if (!bp->func_stx) {
  451. BNX2X_ERR("BUG!\n");
  452. return;
  453. }
  454. bp->executer_idx = 0;
  455. memset(dmae, 0, sizeof(struct dmae_command));
  456. dmae->opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
  457. DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE |
  458. DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
  459. #ifdef __BIG_ENDIAN
  460. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  461. #else
  462. DMAE_CMD_ENDIANITY_DW_SWAP |
  463. #endif
  464. (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
  465. (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
  466. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  467. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  468. dmae->dst_addr_lo = bp->func_stx >> 2;
  469. dmae->dst_addr_hi = 0;
  470. dmae->len = sizeof(struct host_func_stats) >> 2;
  471. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  472. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  473. dmae->comp_val = DMAE_COMP_VAL;
  474. *stats_comp = 0;
  475. }
  476. static void bnx2x_stats_start(struct bnx2x *bp)
  477. {
  478. if (bp->port.pmf)
  479. bnx2x_port_stats_init(bp);
  480. else if (bp->func_stx)
  481. bnx2x_func_stats_init(bp);
  482. bnx2x_hw_stats_post(bp);
  483. bnx2x_storm_stats_post(bp);
  484. }
  485. static void bnx2x_stats_pmf_start(struct bnx2x *bp)
  486. {
  487. bnx2x_stats_comp(bp);
  488. bnx2x_stats_pmf_update(bp);
  489. bnx2x_stats_start(bp);
  490. }
  491. static void bnx2x_stats_restart(struct bnx2x *bp)
  492. {
  493. bnx2x_stats_comp(bp);
  494. bnx2x_stats_start(bp);
  495. }
  496. static void bnx2x_bmac_stats_update(struct bnx2x *bp)
  497. {
  498. struct bmac_stats *new = bnx2x_sp(bp, mac_stats.bmac_stats);
  499. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  500. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  501. struct {
  502. u32 lo;
  503. u32 hi;
  504. } diff;
  505. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  506. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  507. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  508. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  509. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  510. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  511. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  512. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  513. UPDATE_STAT64(rx_stat_grxpf, rx_stat_bmac_xpf);
  514. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  515. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  516. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  517. UPDATE_STAT64(tx_stat_gt127,
  518. tx_stat_etherstatspkts65octetsto127octets);
  519. UPDATE_STAT64(tx_stat_gt255,
  520. tx_stat_etherstatspkts128octetsto255octets);
  521. UPDATE_STAT64(tx_stat_gt511,
  522. tx_stat_etherstatspkts256octetsto511octets);
  523. UPDATE_STAT64(tx_stat_gt1023,
  524. tx_stat_etherstatspkts512octetsto1023octets);
  525. UPDATE_STAT64(tx_stat_gt1518,
  526. tx_stat_etherstatspkts1024octetsto1522octets);
  527. UPDATE_STAT64(tx_stat_gt2047, tx_stat_bmac_2047);
  528. UPDATE_STAT64(tx_stat_gt4095, tx_stat_bmac_4095);
  529. UPDATE_STAT64(tx_stat_gt9216, tx_stat_bmac_9216);
  530. UPDATE_STAT64(tx_stat_gt16383, tx_stat_bmac_16383);
  531. UPDATE_STAT64(tx_stat_gterr,
  532. tx_stat_dot3statsinternalmactransmiterrors);
  533. UPDATE_STAT64(tx_stat_gtufl, tx_stat_bmac_ufl);
  534. estats->pause_frames_received_hi =
  535. pstats->mac_stx[1].rx_stat_bmac_xpf_hi;
  536. estats->pause_frames_received_lo =
  537. pstats->mac_stx[1].rx_stat_bmac_xpf_lo;
  538. estats->pause_frames_sent_hi =
  539. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  540. estats->pause_frames_sent_lo =
  541. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  542. }
  543. static void bnx2x_emac_stats_update(struct bnx2x *bp)
  544. {
  545. struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
  546. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  547. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  548. UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
  549. UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
  550. UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
  551. UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
  552. UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
  553. UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
  554. UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
  555. UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
  556. UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
  557. UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
  558. UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
  559. UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
  560. UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
  561. UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
  562. UPDATE_EXTEND_STAT(tx_stat_outxonsent);
  563. UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
  564. UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
  565. UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
  566. UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
  567. UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
  568. UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
  569. UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
  570. UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
  571. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
  572. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
  573. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
  574. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
  575. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
  576. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
  577. UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
  578. UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
  579. estats->pause_frames_received_hi =
  580. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
  581. estats->pause_frames_received_lo =
  582. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
  583. ADD_64(estats->pause_frames_received_hi,
  584. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
  585. estats->pause_frames_received_lo,
  586. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
  587. estats->pause_frames_sent_hi =
  588. pstats->mac_stx[1].tx_stat_outxonsent_hi;
  589. estats->pause_frames_sent_lo =
  590. pstats->mac_stx[1].tx_stat_outxonsent_lo;
  591. ADD_64(estats->pause_frames_sent_hi,
  592. pstats->mac_stx[1].tx_stat_outxoffsent_hi,
  593. estats->pause_frames_sent_lo,
  594. pstats->mac_stx[1].tx_stat_outxoffsent_lo);
  595. }
  596. static int bnx2x_hw_stats_update(struct bnx2x *bp)
  597. {
  598. struct nig_stats *new = bnx2x_sp(bp, nig_stats);
  599. struct nig_stats *old = &(bp->port.old_nig_stats);
  600. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  601. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  602. struct {
  603. u32 lo;
  604. u32 hi;
  605. } diff;
  606. if (bp->link_vars.mac_type == MAC_TYPE_BMAC)
  607. bnx2x_bmac_stats_update(bp);
  608. else if (bp->link_vars.mac_type == MAC_TYPE_EMAC)
  609. bnx2x_emac_stats_update(bp);
  610. else { /* unreached */
  611. BNX2X_ERR("stats updated by DMAE but no MAC active\n");
  612. return -1;
  613. }
  614. ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
  615. new->brb_discard - old->brb_discard);
  616. ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
  617. new->brb_truncate - old->brb_truncate);
  618. UPDATE_STAT64_NIG(egress_mac_pkt0,
  619. etherstatspkts1024octetsto1522octets);
  620. UPDATE_STAT64_NIG(egress_mac_pkt1, etherstatspktsover1522octets);
  621. memcpy(old, new, sizeof(struct nig_stats));
  622. memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
  623. sizeof(struct mac_stx));
  624. estats->brb_drop_hi = pstats->brb_drop_hi;
  625. estats->brb_drop_lo = pstats->brb_drop_lo;
  626. pstats->host_port_stats_start = ++pstats->host_port_stats_end;
  627. if (!BP_NOMCP(bp)) {
  628. u32 nig_timer_max =
  629. SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
  630. if (nig_timer_max != estats->nig_timer_max) {
  631. estats->nig_timer_max = nig_timer_max;
  632. BNX2X_ERR("NIG timer max (%u)\n",
  633. estats->nig_timer_max);
  634. }
  635. }
  636. return 0;
  637. }
  638. static int bnx2x_storm_stats_update(struct bnx2x *bp)
  639. {
  640. struct eth_stats_query *stats = bnx2x_sp(bp, fw_stats);
  641. struct tstorm_per_port_stats *tport =
  642. &stats->tstorm_common.port_statistics;
  643. struct host_func_stats *fstats = bnx2x_sp(bp, func_stats);
  644. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  645. int i;
  646. memcpy(&(fstats->total_bytes_received_hi),
  647. &(bnx2x_sp(bp, func_stats_base)->total_bytes_received_hi),
  648. sizeof(struct host_func_stats) - 2*sizeof(u32));
  649. estats->error_bytes_received_hi = 0;
  650. estats->error_bytes_received_lo = 0;
  651. estats->etherstatsoverrsizepkts_hi = 0;
  652. estats->etherstatsoverrsizepkts_lo = 0;
  653. estats->no_buff_discard_hi = 0;
  654. estats->no_buff_discard_lo = 0;
  655. for_each_queue(bp, i) {
  656. struct bnx2x_fastpath *fp = &bp->fp[i];
  657. int cl_id = fp->cl_id;
  658. struct tstorm_per_client_stats *tclient =
  659. &stats->tstorm_common.client_statistics[cl_id];
  660. struct tstorm_per_client_stats *old_tclient = &fp->old_tclient;
  661. struct ustorm_per_client_stats *uclient =
  662. &stats->ustorm_common.client_statistics[cl_id];
  663. struct ustorm_per_client_stats *old_uclient = &fp->old_uclient;
  664. struct xstorm_per_client_stats *xclient =
  665. &stats->xstorm_common.client_statistics[cl_id];
  666. struct xstorm_per_client_stats *old_xclient = &fp->old_xclient;
  667. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  668. u32 diff;
  669. /* are storm stats valid? */
  670. if ((u16)(le16_to_cpu(xclient->stats_counter) + 1) !=
  671. bp->stats_counter) {
  672. DP(BNX2X_MSG_STATS, "[%d] stats not updated by xstorm"
  673. " xstorm counter (0x%x) != stats_counter (0x%x)\n",
  674. i, xclient->stats_counter, bp->stats_counter);
  675. return -1;
  676. }
  677. if ((u16)(le16_to_cpu(tclient->stats_counter) + 1) !=
  678. bp->stats_counter) {
  679. DP(BNX2X_MSG_STATS, "[%d] stats not updated by tstorm"
  680. " tstorm counter (0x%x) != stats_counter (0x%x)\n",
  681. i, tclient->stats_counter, bp->stats_counter);
  682. return -2;
  683. }
  684. if ((u16)(le16_to_cpu(uclient->stats_counter) + 1) !=
  685. bp->stats_counter) {
  686. DP(BNX2X_MSG_STATS, "[%d] stats not updated by ustorm"
  687. " ustorm counter (0x%x) != stats_counter (0x%x)\n",
  688. i, uclient->stats_counter, bp->stats_counter);
  689. return -4;
  690. }
  691. qstats->total_bytes_received_hi =
  692. le32_to_cpu(tclient->rcv_broadcast_bytes.hi);
  693. qstats->total_bytes_received_lo =
  694. le32_to_cpu(tclient->rcv_broadcast_bytes.lo);
  695. ADD_64(qstats->total_bytes_received_hi,
  696. le32_to_cpu(tclient->rcv_multicast_bytes.hi),
  697. qstats->total_bytes_received_lo,
  698. le32_to_cpu(tclient->rcv_multicast_bytes.lo));
  699. ADD_64(qstats->total_bytes_received_hi,
  700. le32_to_cpu(tclient->rcv_unicast_bytes.hi),
  701. qstats->total_bytes_received_lo,
  702. le32_to_cpu(tclient->rcv_unicast_bytes.lo));
  703. SUB_64(qstats->total_bytes_received_hi,
  704. le32_to_cpu(uclient->bcast_no_buff_bytes.hi),
  705. qstats->total_bytes_received_lo,
  706. le32_to_cpu(uclient->bcast_no_buff_bytes.lo));
  707. SUB_64(qstats->total_bytes_received_hi,
  708. le32_to_cpu(uclient->mcast_no_buff_bytes.hi),
  709. qstats->total_bytes_received_lo,
  710. le32_to_cpu(uclient->mcast_no_buff_bytes.lo));
  711. SUB_64(qstats->total_bytes_received_hi,
  712. le32_to_cpu(uclient->ucast_no_buff_bytes.hi),
  713. qstats->total_bytes_received_lo,
  714. le32_to_cpu(uclient->ucast_no_buff_bytes.lo));
  715. qstats->valid_bytes_received_hi =
  716. qstats->total_bytes_received_hi;
  717. qstats->valid_bytes_received_lo =
  718. qstats->total_bytes_received_lo;
  719. qstats->error_bytes_received_hi =
  720. le32_to_cpu(tclient->rcv_error_bytes.hi);
  721. qstats->error_bytes_received_lo =
  722. le32_to_cpu(tclient->rcv_error_bytes.lo);
  723. ADD_64(qstats->total_bytes_received_hi,
  724. qstats->error_bytes_received_hi,
  725. qstats->total_bytes_received_lo,
  726. qstats->error_bytes_received_lo);
  727. UPDATE_EXTEND_TSTAT(rcv_unicast_pkts,
  728. total_unicast_packets_received);
  729. UPDATE_EXTEND_TSTAT(rcv_multicast_pkts,
  730. total_multicast_packets_received);
  731. UPDATE_EXTEND_TSTAT(rcv_broadcast_pkts,
  732. total_broadcast_packets_received);
  733. UPDATE_EXTEND_TSTAT(packets_too_big_discard,
  734. etherstatsoverrsizepkts);
  735. UPDATE_EXTEND_TSTAT(no_buff_discard, no_buff_discard);
  736. SUB_EXTEND_USTAT(ucast_no_buff_pkts,
  737. total_unicast_packets_received);
  738. SUB_EXTEND_USTAT(mcast_no_buff_pkts,
  739. total_multicast_packets_received);
  740. SUB_EXTEND_USTAT(bcast_no_buff_pkts,
  741. total_broadcast_packets_received);
  742. UPDATE_EXTEND_USTAT(ucast_no_buff_pkts, no_buff_discard);
  743. UPDATE_EXTEND_USTAT(mcast_no_buff_pkts, no_buff_discard);
  744. UPDATE_EXTEND_USTAT(bcast_no_buff_pkts, no_buff_discard);
  745. qstats->total_bytes_transmitted_hi =
  746. le32_to_cpu(xclient->unicast_bytes_sent.hi);
  747. qstats->total_bytes_transmitted_lo =
  748. le32_to_cpu(xclient->unicast_bytes_sent.lo);
  749. ADD_64(qstats->total_bytes_transmitted_hi,
  750. le32_to_cpu(xclient->multicast_bytes_sent.hi),
  751. qstats->total_bytes_transmitted_lo,
  752. le32_to_cpu(xclient->multicast_bytes_sent.lo));
  753. ADD_64(qstats->total_bytes_transmitted_hi,
  754. le32_to_cpu(xclient->broadcast_bytes_sent.hi),
  755. qstats->total_bytes_transmitted_lo,
  756. le32_to_cpu(xclient->broadcast_bytes_sent.lo));
  757. UPDATE_EXTEND_XSTAT(unicast_pkts_sent,
  758. total_unicast_packets_transmitted);
  759. UPDATE_EXTEND_XSTAT(multicast_pkts_sent,
  760. total_multicast_packets_transmitted);
  761. UPDATE_EXTEND_XSTAT(broadcast_pkts_sent,
  762. total_broadcast_packets_transmitted);
  763. old_tclient->checksum_discard = tclient->checksum_discard;
  764. old_tclient->ttl0_discard = tclient->ttl0_discard;
  765. ADD_64(fstats->total_bytes_received_hi,
  766. qstats->total_bytes_received_hi,
  767. fstats->total_bytes_received_lo,
  768. qstats->total_bytes_received_lo);
  769. ADD_64(fstats->total_bytes_transmitted_hi,
  770. qstats->total_bytes_transmitted_hi,
  771. fstats->total_bytes_transmitted_lo,
  772. qstats->total_bytes_transmitted_lo);
  773. ADD_64(fstats->total_unicast_packets_received_hi,
  774. qstats->total_unicast_packets_received_hi,
  775. fstats->total_unicast_packets_received_lo,
  776. qstats->total_unicast_packets_received_lo);
  777. ADD_64(fstats->total_multicast_packets_received_hi,
  778. qstats->total_multicast_packets_received_hi,
  779. fstats->total_multicast_packets_received_lo,
  780. qstats->total_multicast_packets_received_lo);
  781. ADD_64(fstats->total_broadcast_packets_received_hi,
  782. qstats->total_broadcast_packets_received_hi,
  783. fstats->total_broadcast_packets_received_lo,
  784. qstats->total_broadcast_packets_received_lo);
  785. ADD_64(fstats->total_unicast_packets_transmitted_hi,
  786. qstats->total_unicast_packets_transmitted_hi,
  787. fstats->total_unicast_packets_transmitted_lo,
  788. qstats->total_unicast_packets_transmitted_lo);
  789. ADD_64(fstats->total_multicast_packets_transmitted_hi,
  790. qstats->total_multicast_packets_transmitted_hi,
  791. fstats->total_multicast_packets_transmitted_lo,
  792. qstats->total_multicast_packets_transmitted_lo);
  793. ADD_64(fstats->total_broadcast_packets_transmitted_hi,
  794. qstats->total_broadcast_packets_transmitted_hi,
  795. fstats->total_broadcast_packets_transmitted_lo,
  796. qstats->total_broadcast_packets_transmitted_lo);
  797. ADD_64(fstats->valid_bytes_received_hi,
  798. qstats->valid_bytes_received_hi,
  799. fstats->valid_bytes_received_lo,
  800. qstats->valid_bytes_received_lo);
  801. ADD_64(estats->error_bytes_received_hi,
  802. qstats->error_bytes_received_hi,
  803. estats->error_bytes_received_lo,
  804. qstats->error_bytes_received_lo);
  805. ADD_64(estats->etherstatsoverrsizepkts_hi,
  806. qstats->etherstatsoverrsizepkts_hi,
  807. estats->etherstatsoverrsizepkts_lo,
  808. qstats->etherstatsoverrsizepkts_lo);
  809. ADD_64(estats->no_buff_discard_hi, qstats->no_buff_discard_hi,
  810. estats->no_buff_discard_lo, qstats->no_buff_discard_lo);
  811. }
  812. ADD_64(fstats->total_bytes_received_hi,
  813. estats->rx_stat_ifhcinbadoctets_hi,
  814. fstats->total_bytes_received_lo,
  815. estats->rx_stat_ifhcinbadoctets_lo);
  816. memcpy(estats, &(fstats->total_bytes_received_hi),
  817. sizeof(struct host_func_stats) - 2*sizeof(u32));
  818. ADD_64(estats->etherstatsoverrsizepkts_hi,
  819. estats->rx_stat_dot3statsframestoolong_hi,
  820. estats->etherstatsoverrsizepkts_lo,
  821. estats->rx_stat_dot3statsframestoolong_lo);
  822. ADD_64(estats->error_bytes_received_hi,
  823. estats->rx_stat_ifhcinbadoctets_hi,
  824. estats->error_bytes_received_lo,
  825. estats->rx_stat_ifhcinbadoctets_lo);
  826. if (bp->port.pmf) {
  827. estats->mac_filter_discard =
  828. le32_to_cpu(tport->mac_filter_discard);
  829. estats->xxoverflow_discard =
  830. le32_to_cpu(tport->xxoverflow_discard);
  831. estats->brb_truncate_discard =
  832. le32_to_cpu(tport->brb_truncate_discard);
  833. estats->mac_discard = le32_to_cpu(tport->mac_discard);
  834. }
  835. fstats->host_func_stats_start = ++fstats->host_func_stats_end;
  836. bp->stats_pending = 0;
  837. return 0;
  838. }
  839. static void bnx2x_net_stats_update(struct bnx2x *bp)
  840. {
  841. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  842. struct net_device_stats *nstats = &bp->dev->stats;
  843. int i;
  844. nstats->rx_packets =
  845. bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
  846. bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
  847. bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
  848. nstats->tx_packets =
  849. bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
  850. bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
  851. bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
  852. nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
  853. nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
  854. nstats->rx_dropped = estats->mac_discard;
  855. for_each_queue(bp, i)
  856. nstats->rx_dropped +=
  857. le32_to_cpu(bp->fp[i].old_tclient.checksum_discard);
  858. nstats->tx_dropped = 0;
  859. nstats->multicast =
  860. bnx2x_hilo(&estats->total_multicast_packets_received_hi);
  861. nstats->collisions =
  862. bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
  863. nstats->rx_length_errors =
  864. bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
  865. bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
  866. nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
  867. bnx2x_hilo(&estats->brb_truncate_hi);
  868. nstats->rx_crc_errors =
  869. bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
  870. nstats->rx_frame_errors =
  871. bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
  872. nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
  873. nstats->rx_missed_errors = estats->xxoverflow_discard;
  874. nstats->rx_errors = nstats->rx_length_errors +
  875. nstats->rx_over_errors +
  876. nstats->rx_crc_errors +
  877. nstats->rx_frame_errors +
  878. nstats->rx_fifo_errors +
  879. nstats->rx_missed_errors;
  880. nstats->tx_aborted_errors =
  881. bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
  882. bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
  883. nstats->tx_carrier_errors =
  884. bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
  885. nstats->tx_fifo_errors = 0;
  886. nstats->tx_heartbeat_errors = 0;
  887. nstats->tx_window_errors = 0;
  888. nstats->tx_errors = nstats->tx_aborted_errors +
  889. nstats->tx_carrier_errors +
  890. bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
  891. }
  892. static void bnx2x_drv_stats_update(struct bnx2x *bp)
  893. {
  894. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  895. int i;
  896. estats->driver_xoff = 0;
  897. estats->rx_err_discard_pkt = 0;
  898. estats->rx_skb_alloc_failed = 0;
  899. estats->hw_csum_err = 0;
  900. for_each_queue(bp, i) {
  901. struct bnx2x_eth_q_stats *qstats = &bp->fp[i].eth_q_stats;
  902. estats->driver_xoff += qstats->driver_xoff;
  903. estats->rx_err_discard_pkt += qstats->rx_err_discard_pkt;
  904. estats->rx_skb_alloc_failed += qstats->rx_skb_alloc_failed;
  905. estats->hw_csum_err += qstats->hw_csum_err;
  906. }
  907. }
  908. static void bnx2x_stats_update(struct bnx2x *bp)
  909. {
  910. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  911. if (*stats_comp != DMAE_COMP_VAL)
  912. return;
  913. if (bp->port.pmf)
  914. bnx2x_hw_stats_update(bp);
  915. if (bnx2x_storm_stats_update(bp) && (bp->stats_pending++ == 3)) {
  916. BNX2X_ERR("storm stats were not updated for 3 times\n");
  917. bnx2x_panic();
  918. return;
  919. }
  920. bnx2x_net_stats_update(bp);
  921. bnx2x_drv_stats_update(bp);
  922. if (netif_msg_timer(bp)) {
  923. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  924. int i;
  925. printk(KERN_DEBUG "%s: brb drops %u brb truncate %u\n",
  926. bp->dev->name,
  927. estats->brb_drop_lo, estats->brb_truncate_lo);
  928. for_each_queue(bp, i) {
  929. struct bnx2x_fastpath *fp = &bp->fp[i];
  930. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  931. printk(KERN_DEBUG "%s: rx usage(%4u) *rx_cons_sb(%u)"
  932. " rx pkt(%lu) rx calls(%lu %lu)\n",
  933. fp->name, (le16_to_cpu(*fp->rx_cons_sb) -
  934. fp->rx_comp_cons),
  935. le16_to_cpu(*fp->rx_cons_sb),
  936. bnx2x_hilo(&qstats->
  937. total_unicast_packets_received_hi),
  938. fp->rx_calls, fp->rx_pkt);
  939. }
  940. for_each_queue(bp, i) {
  941. struct bnx2x_fastpath *fp = &bp->fp[i];
  942. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  943. struct netdev_queue *txq =
  944. netdev_get_tx_queue(bp->dev, i);
  945. printk(KERN_DEBUG "%s: tx avail(%4u) *tx_cons_sb(%u)"
  946. " tx pkt(%lu) tx calls (%lu)"
  947. " %s (Xoff events %u)\n",
  948. fp->name, bnx2x_tx_avail(fp),
  949. le16_to_cpu(*fp->tx_cons_sb),
  950. bnx2x_hilo(&qstats->
  951. total_unicast_packets_transmitted_hi),
  952. fp->tx_pkt,
  953. (netif_tx_queue_stopped(txq) ? "Xoff" : "Xon"),
  954. qstats->driver_xoff);
  955. }
  956. }
  957. bnx2x_hw_stats_post(bp);
  958. bnx2x_storm_stats_post(bp);
  959. }
  960. static void bnx2x_port_stats_stop(struct bnx2x *bp)
  961. {
  962. struct dmae_command *dmae;
  963. u32 opcode;
  964. int loader_idx = PMF_DMAE_C(bp);
  965. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  966. bp->executer_idx = 0;
  967. opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
  968. DMAE_CMD_C_ENABLE |
  969. DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
  970. #ifdef __BIG_ENDIAN
  971. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  972. #else
  973. DMAE_CMD_ENDIANITY_DW_SWAP |
  974. #endif
  975. (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
  976. (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
  977. if (bp->port.port_stx) {
  978. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  979. if (bp->func_stx)
  980. dmae->opcode = (opcode | DMAE_CMD_C_DST_GRC);
  981. else
  982. dmae->opcode = (opcode | DMAE_CMD_C_DST_PCI);
  983. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  984. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  985. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  986. dmae->dst_addr_hi = 0;
  987. dmae->len = sizeof(struct host_port_stats) >> 2;
  988. if (bp->func_stx) {
  989. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  990. dmae->comp_addr_hi = 0;
  991. dmae->comp_val = 1;
  992. } else {
  993. dmae->comp_addr_lo =
  994. U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  995. dmae->comp_addr_hi =
  996. U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  997. dmae->comp_val = DMAE_COMP_VAL;
  998. *stats_comp = 0;
  999. }
  1000. }
  1001. if (bp->func_stx) {
  1002. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1003. dmae->opcode = (opcode | DMAE_CMD_C_DST_PCI);
  1004. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  1005. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  1006. dmae->dst_addr_lo = bp->func_stx >> 2;
  1007. dmae->dst_addr_hi = 0;
  1008. dmae->len = sizeof(struct host_func_stats) >> 2;
  1009. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1010. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1011. dmae->comp_val = DMAE_COMP_VAL;
  1012. *stats_comp = 0;
  1013. }
  1014. }
  1015. static void bnx2x_stats_stop(struct bnx2x *bp)
  1016. {
  1017. int update = 0;
  1018. bnx2x_stats_comp(bp);
  1019. if (bp->port.pmf)
  1020. update = (bnx2x_hw_stats_update(bp) == 0);
  1021. update |= (bnx2x_storm_stats_update(bp) == 0);
  1022. if (update) {
  1023. bnx2x_net_stats_update(bp);
  1024. if (bp->port.pmf)
  1025. bnx2x_port_stats_stop(bp);
  1026. bnx2x_hw_stats_post(bp);
  1027. bnx2x_stats_comp(bp);
  1028. }
  1029. }
  1030. static void bnx2x_stats_do_nothing(struct bnx2x *bp)
  1031. {
  1032. }
  1033. static const struct {
  1034. void (*action)(struct bnx2x *bp);
  1035. enum bnx2x_stats_state next_state;
  1036. } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
  1037. /* state event */
  1038. {
  1039. /* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
  1040. /* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED},
  1041. /* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
  1042. /* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
  1043. },
  1044. {
  1045. /* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED},
  1046. /* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED},
  1047. /* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED},
  1048. /* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED}
  1049. }
  1050. };
  1051. void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
  1052. {
  1053. enum bnx2x_stats_state state = bp->stats_state;
  1054. if (unlikely(bp->panic))
  1055. return;
  1056. bnx2x_stats_stm[state][event].action(bp);
  1057. bp->stats_state = bnx2x_stats_stm[state][event].next_state;
  1058. /* Make sure the state has been "changed" */
  1059. smp_wmb();
  1060. if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
  1061. DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
  1062. state, event, bp->stats_state);
  1063. }
  1064. static void bnx2x_port_stats_base_init(struct bnx2x *bp)
  1065. {
  1066. struct dmae_command *dmae;
  1067. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1068. /* sanity */
  1069. if (!bp->port.pmf || !bp->port.port_stx) {
  1070. BNX2X_ERR("BUG!\n");
  1071. return;
  1072. }
  1073. bp->executer_idx = 0;
  1074. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1075. dmae->opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC |
  1076. DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE |
  1077. DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
  1078. #ifdef __BIG_ENDIAN
  1079. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  1080. #else
  1081. DMAE_CMD_ENDIANITY_DW_SWAP |
  1082. #endif
  1083. (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
  1084. (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
  1085. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1086. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1087. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1088. dmae->dst_addr_hi = 0;
  1089. dmae->len = sizeof(struct host_port_stats) >> 2;
  1090. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1091. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1092. dmae->comp_val = DMAE_COMP_VAL;
  1093. *stats_comp = 0;
  1094. bnx2x_hw_stats_post(bp);
  1095. bnx2x_stats_comp(bp);
  1096. }
  1097. static void bnx2x_func_stats_base_init(struct bnx2x *bp)
  1098. {
  1099. int vn, vn_max = IS_E1HMF(bp) ? E1HVN_MAX : E1VN_MAX;
  1100. int port = BP_PORT(bp);
  1101. int func;
  1102. u32 func_stx;
  1103. /* sanity */
  1104. if (!bp->port.pmf || !bp->func_stx) {
  1105. BNX2X_ERR("BUG!\n");
  1106. return;
  1107. }
  1108. /* save our func_stx */
  1109. func_stx = bp->func_stx;
  1110. for (vn = VN_0; vn < vn_max; vn++) {
  1111. func = 2*vn + port;
  1112. bp->func_stx = SHMEM_RD(bp, func_mb[func].fw_mb_param);
  1113. bnx2x_func_stats_init(bp);
  1114. bnx2x_hw_stats_post(bp);
  1115. bnx2x_stats_comp(bp);
  1116. }
  1117. /* restore our func_stx */
  1118. bp->func_stx = func_stx;
  1119. }
  1120. static void bnx2x_func_stats_base_update(struct bnx2x *bp)
  1121. {
  1122. struct dmae_command *dmae = &bp->stats_dmae;
  1123. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1124. /* sanity */
  1125. if (!bp->func_stx) {
  1126. BNX2X_ERR("BUG!\n");
  1127. return;
  1128. }
  1129. bp->executer_idx = 0;
  1130. memset(dmae, 0, sizeof(struct dmae_command));
  1131. dmae->opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI |
  1132. DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE |
  1133. DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET |
  1134. #ifdef __BIG_ENDIAN
  1135. DMAE_CMD_ENDIANITY_B_DW_SWAP |
  1136. #else
  1137. DMAE_CMD_ENDIANITY_DW_SWAP |
  1138. #endif
  1139. (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0) |
  1140. (BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT));
  1141. dmae->src_addr_lo = bp->func_stx >> 2;
  1142. dmae->src_addr_hi = 0;
  1143. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats_base));
  1144. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats_base));
  1145. dmae->len = sizeof(struct host_func_stats) >> 2;
  1146. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1147. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1148. dmae->comp_val = DMAE_COMP_VAL;
  1149. *stats_comp = 0;
  1150. bnx2x_hw_stats_post(bp);
  1151. bnx2x_stats_comp(bp);
  1152. }
  1153. void bnx2x_stats_init(struct bnx2x *bp)
  1154. {
  1155. int port = BP_PORT(bp);
  1156. int func = BP_FUNC(bp);
  1157. int i;
  1158. bp->stats_pending = 0;
  1159. bp->executer_idx = 0;
  1160. bp->stats_counter = 0;
  1161. /* port and func stats for management */
  1162. if (!BP_NOMCP(bp)) {
  1163. bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
  1164. bp->func_stx = SHMEM_RD(bp, func_mb[func].fw_mb_param);
  1165. } else {
  1166. bp->port.port_stx = 0;
  1167. bp->func_stx = 0;
  1168. }
  1169. DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n",
  1170. bp->port.port_stx, bp->func_stx);
  1171. /* port stats */
  1172. memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
  1173. bp->port.old_nig_stats.brb_discard =
  1174. REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
  1175. bp->port.old_nig_stats.brb_truncate =
  1176. REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
  1177. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
  1178. &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
  1179. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
  1180. &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2);
  1181. /* function stats */
  1182. for_each_queue(bp, i) {
  1183. struct bnx2x_fastpath *fp = &bp->fp[i];
  1184. memset(&fp->old_tclient, 0,
  1185. sizeof(struct tstorm_per_client_stats));
  1186. memset(&fp->old_uclient, 0,
  1187. sizeof(struct ustorm_per_client_stats));
  1188. memset(&fp->old_xclient, 0,
  1189. sizeof(struct xstorm_per_client_stats));
  1190. memset(&fp->eth_q_stats, 0, sizeof(struct bnx2x_eth_q_stats));
  1191. }
  1192. memset(&bp->dev->stats, 0, sizeof(struct net_device_stats));
  1193. memset(&bp->eth_stats, 0, sizeof(struct bnx2x_eth_stats));
  1194. bp->stats_state = STATS_STATE_DISABLED;
  1195. if (bp->port.pmf) {
  1196. if (bp->port.port_stx)
  1197. bnx2x_port_stats_base_init(bp);
  1198. if (bp->func_stx)
  1199. bnx2x_func_stats_base_init(bp);
  1200. } else if (bp->func_stx)
  1201. bnx2x_func_stats_base_update(bp);
  1202. }