devices.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538
  1. /*
  2. * linux/arch/arm/mach-omap2/devices.c
  3. *
  4. * OMAP2 platform device setup/initialization
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/io.h>
  16. #include <linux/clk.h>
  17. #include <mach/hardware.h>
  18. #include <asm/mach-types.h>
  19. #include <asm/mach/map.h>
  20. #include <mach/control.h>
  21. #include <mach/tc.h>
  22. #include <mach/board.h>
  23. #include <mach/mux.h>
  24. #include <mach/gpio.h>
  25. #include <mach/eac.h>
  26. #include <mach/mmc.h>
  27. #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
  28. #define MBOX_REG_SIZE 0x120
  29. static struct resource omap2_mbox_resources[] = {
  30. {
  31. .start = OMAP24XX_MAILBOX_BASE,
  32. .end = OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
  33. .flags = IORESOURCE_MEM,
  34. },
  35. {
  36. .start = INT_24XX_MAIL_U0_MPU,
  37. .flags = IORESOURCE_IRQ,
  38. },
  39. {
  40. .start = INT_24XX_MAIL_U3_MPU,
  41. .flags = IORESOURCE_IRQ,
  42. },
  43. };
  44. static struct resource omap3_mbox_resources[] = {
  45. {
  46. .start = OMAP34XX_MAILBOX_BASE,
  47. .end = OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
  48. .flags = IORESOURCE_MEM,
  49. },
  50. {
  51. .start = INT_24XX_MAIL_U0_MPU,
  52. .flags = IORESOURCE_IRQ,
  53. },
  54. };
  55. static struct platform_device mbox_device = {
  56. .name = "mailbox",
  57. .id = -1,
  58. };
  59. static inline void omap_init_mbox(void)
  60. {
  61. if (cpu_is_omap2420()) {
  62. mbox_device.num_resources = ARRAY_SIZE(omap2_mbox_resources);
  63. mbox_device.resource = omap2_mbox_resources;
  64. } else if (cpu_is_omap3430()) {
  65. mbox_device.num_resources = ARRAY_SIZE(omap3_mbox_resources);
  66. mbox_device.resource = omap3_mbox_resources;
  67. } else {
  68. pr_err("%s: platform not supported\n", __func__);
  69. return;
  70. }
  71. platform_device_register(&mbox_device);
  72. }
  73. #else
  74. static inline void omap_init_mbox(void) { }
  75. #endif /* CONFIG_OMAP_MBOX_FWK */
  76. #if defined(CONFIG_OMAP_STI)
  77. #if defined(CONFIG_ARCH_OMAP2)
  78. #define OMAP2_STI_BASE 0x48068000
  79. #define OMAP2_STI_CHANNEL_BASE 0x54000000
  80. #define OMAP2_STI_IRQ 4
  81. static struct resource sti_resources[] = {
  82. {
  83. .start = OMAP2_STI_BASE,
  84. .end = OMAP2_STI_BASE + 0x7ff,
  85. .flags = IORESOURCE_MEM,
  86. },
  87. {
  88. .start = OMAP2_STI_CHANNEL_BASE,
  89. .end = OMAP2_STI_CHANNEL_BASE + SZ_64K - 1,
  90. .flags = IORESOURCE_MEM,
  91. },
  92. {
  93. .start = OMAP2_STI_IRQ,
  94. .flags = IORESOURCE_IRQ,
  95. }
  96. };
  97. #elif defined(CONFIG_ARCH_OMAP3)
  98. #define OMAP3_SDTI_BASE 0x54500000
  99. #define OMAP3_SDTI_CHANNEL_BASE 0x54600000
  100. static struct resource sti_resources[] = {
  101. {
  102. .start = OMAP3_SDTI_BASE,
  103. .end = OMAP3_SDTI_BASE + 0xFFF,
  104. .flags = IORESOURCE_MEM,
  105. },
  106. {
  107. .start = OMAP3_SDTI_CHANNEL_BASE,
  108. .end = OMAP3_SDTI_CHANNEL_BASE + SZ_1M - 1,
  109. .flags = IORESOURCE_MEM,
  110. }
  111. };
  112. #endif
  113. static struct platform_device sti_device = {
  114. .name = "sti",
  115. .id = -1,
  116. .num_resources = ARRAY_SIZE(sti_resources),
  117. .resource = sti_resources,
  118. };
  119. static inline void omap_init_sti(void)
  120. {
  121. platform_device_register(&sti_device);
  122. }
  123. #else
  124. static inline void omap_init_sti(void) {}
  125. #endif
  126. #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
  127. #include <mach/mcspi.h>
  128. #define OMAP2_MCSPI1_BASE 0x48098000
  129. #define OMAP2_MCSPI2_BASE 0x4809a000
  130. #define OMAP2_MCSPI3_BASE 0x480b8000
  131. #define OMAP2_MCSPI4_BASE 0x480ba000
  132. static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
  133. .num_cs = 4,
  134. };
  135. static struct resource omap2_mcspi1_resources[] = {
  136. {
  137. .start = OMAP2_MCSPI1_BASE,
  138. .end = OMAP2_MCSPI1_BASE + 0xff,
  139. .flags = IORESOURCE_MEM,
  140. },
  141. };
  142. static struct platform_device omap2_mcspi1 = {
  143. .name = "omap2_mcspi",
  144. .id = 1,
  145. .num_resources = ARRAY_SIZE(omap2_mcspi1_resources),
  146. .resource = omap2_mcspi1_resources,
  147. .dev = {
  148. .platform_data = &omap2_mcspi1_config,
  149. },
  150. };
  151. static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
  152. .num_cs = 2,
  153. };
  154. static struct resource omap2_mcspi2_resources[] = {
  155. {
  156. .start = OMAP2_MCSPI2_BASE,
  157. .end = OMAP2_MCSPI2_BASE + 0xff,
  158. .flags = IORESOURCE_MEM,
  159. },
  160. };
  161. static struct platform_device omap2_mcspi2 = {
  162. .name = "omap2_mcspi",
  163. .id = 2,
  164. .num_resources = ARRAY_SIZE(omap2_mcspi2_resources),
  165. .resource = omap2_mcspi2_resources,
  166. .dev = {
  167. .platform_data = &omap2_mcspi2_config,
  168. },
  169. };
  170. #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
  171. static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
  172. .num_cs = 2,
  173. };
  174. static struct resource omap2_mcspi3_resources[] = {
  175. {
  176. .start = OMAP2_MCSPI3_BASE,
  177. .end = OMAP2_MCSPI3_BASE + 0xff,
  178. .flags = IORESOURCE_MEM,
  179. },
  180. };
  181. static struct platform_device omap2_mcspi3 = {
  182. .name = "omap2_mcspi",
  183. .id = 3,
  184. .num_resources = ARRAY_SIZE(omap2_mcspi3_resources),
  185. .resource = omap2_mcspi3_resources,
  186. .dev = {
  187. .platform_data = &omap2_mcspi3_config,
  188. },
  189. };
  190. #endif
  191. #ifdef CONFIG_ARCH_OMAP3
  192. static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
  193. .num_cs = 1,
  194. };
  195. static struct resource omap2_mcspi4_resources[] = {
  196. {
  197. .start = OMAP2_MCSPI4_BASE,
  198. .end = OMAP2_MCSPI4_BASE + 0xff,
  199. .flags = IORESOURCE_MEM,
  200. },
  201. };
  202. static struct platform_device omap2_mcspi4 = {
  203. .name = "omap2_mcspi",
  204. .id = 4,
  205. .num_resources = ARRAY_SIZE(omap2_mcspi4_resources),
  206. .resource = omap2_mcspi4_resources,
  207. .dev = {
  208. .platform_data = &omap2_mcspi4_config,
  209. },
  210. };
  211. #endif
  212. static void omap_init_mcspi(void)
  213. {
  214. platform_device_register(&omap2_mcspi1);
  215. platform_device_register(&omap2_mcspi2);
  216. #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
  217. platform_device_register(&omap2_mcspi3);
  218. #endif
  219. #ifdef CONFIG_ARCH_OMAP3
  220. platform_device_register(&omap2_mcspi4);
  221. #endif
  222. }
  223. #else
  224. static inline void omap_init_mcspi(void) {}
  225. #endif
  226. #ifdef CONFIG_SND_OMAP24XX_EAC
  227. #define OMAP2_EAC_BASE 0x48090000
  228. static struct resource omap2_eac_resources[] = {
  229. {
  230. .start = OMAP2_EAC_BASE,
  231. .end = OMAP2_EAC_BASE + 0x109,
  232. .flags = IORESOURCE_MEM,
  233. },
  234. };
  235. static struct platform_device omap2_eac_device = {
  236. .name = "omap24xx-eac",
  237. .id = -1,
  238. .num_resources = ARRAY_SIZE(omap2_eac_resources),
  239. .resource = omap2_eac_resources,
  240. .dev = {
  241. .platform_data = NULL,
  242. },
  243. };
  244. void omap_init_eac(struct eac_platform_data *pdata)
  245. {
  246. omap2_eac_device.dev.platform_data = pdata;
  247. platform_device_register(&omap2_eac_device);
  248. }
  249. #else
  250. void omap_init_eac(struct eac_platform_data *pdata) {}
  251. #endif
  252. #ifdef CONFIG_OMAP_SHA1_MD5
  253. static struct resource sha1_md5_resources[] = {
  254. {
  255. .start = OMAP24XX_SEC_SHA1MD5_BASE,
  256. .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
  257. .flags = IORESOURCE_MEM,
  258. },
  259. {
  260. .start = INT_24XX_SHA1MD5,
  261. .flags = IORESOURCE_IRQ,
  262. }
  263. };
  264. static struct platform_device sha1_md5_device = {
  265. .name = "OMAP SHA1/MD5",
  266. .id = -1,
  267. .num_resources = ARRAY_SIZE(sha1_md5_resources),
  268. .resource = sha1_md5_resources,
  269. };
  270. static void omap_init_sha1_md5(void)
  271. {
  272. platform_device_register(&sha1_md5_device);
  273. }
  274. #else
  275. static inline void omap_init_sha1_md5(void) { }
  276. #endif
  277. /*-------------------------------------------------------------------------*/
  278. #ifdef CONFIG_ARCH_OMAP3
  279. #define MMCHS_SYSCONFIG 0x0010
  280. #define MMCHS_SYSCONFIG_SWRESET (1 << 1)
  281. #define MMCHS_SYSSTATUS 0x0014
  282. #define MMCHS_SYSSTATUS_RESETDONE (1 << 0)
  283. static struct platform_device dummy_pdev = {
  284. .dev = {
  285. .bus = &platform_bus_type,
  286. },
  287. };
  288. /**
  289. * omap_hsmmc_reset() - Full reset of each HS-MMC controller
  290. *
  291. * Ensure that each MMC controller is fully reset. Controllers
  292. * left in an unknown state (by bootloader) may prevent retention
  293. * or OFF-mode. This is especially important in cases where the
  294. * MMC driver is not enabled, _or_ built as a module.
  295. *
  296. * In order for reset to work, interface, functional and debounce
  297. * clocks must be enabled. The debounce clock comes from func_32k_clk
  298. * and is not under SW control, so we only enable i- and f-clocks.
  299. **/
  300. static void __init omap_hsmmc_reset(void)
  301. {
  302. u32 i, nr_controllers = cpu_is_omap34xx() ? OMAP34XX_NR_MMC :
  303. OMAP24XX_NR_MMC;
  304. for (i = 0; i < nr_controllers; i++) {
  305. u32 v, base = 0;
  306. struct clk *iclk, *fclk;
  307. struct device *dev = &dummy_pdev.dev;
  308. switch (i) {
  309. case 0:
  310. base = OMAP2_MMC1_BASE;
  311. break;
  312. case 1:
  313. base = OMAP2_MMC2_BASE;
  314. break;
  315. case 2:
  316. base = OMAP3_MMC3_BASE;
  317. break;
  318. }
  319. dummy_pdev.id = i;
  320. iclk = clk_get(dev, "mmchs_ick");
  321. if (iclk && clk_enable(iclk))
  322. iclk = NULL;
  323. fclk = clk_get(dev, "mmchs_fck");
  324. if (fclk && clk_enable(fclk))
  325. fclk = NULL;
  326. if (!iclk || !fclk) {
  327. printk(KERN_WARNING
  328. "%s: Unable to enable clocks for MMC%d, "
  329. "cannot reset.\n", __func__, i);
  330. break;
  331. }
  332. omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
  333. v = omap_readl(base + MMCHS_SYSSTATUS);
  334. while (!(omap_readl(base + MMCHS_SYSSTATUS) &
  335. MMCHS_SYSSTATUS_RESETDONE))
  336. cpu_relax();
  337. if (fclk) {
  338. clk_disable(fclk);
  339. clk_put(fclk);
  340. }
  341. if (iclk) {
  342. clk_disable(iclk);
  343. clk_put(iclk);
  344. }
  345. }
  346. }
  347. #else
  348. static inline void omap_hsmmc_reset(void) {}
  349. #endif
  350. #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
  351. defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
  352. static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
  353. int controller_nr)
  354. {
  355. if (cpu_is_omap2420() && controller_nr == 0) {
  356. omap_cfg_reg(H18_24XX_MMC_CMD);
  357. omap_cfg_reg(H15_24XX_MMC_CLKI);
  358. omap_cfg_reg(G19_24XX_MMC_CLKO);
  359. omap_cfg_reg(F20_24XX_MMC_DAT0);
  360. omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
  361. omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
  362. if (mmc_controller->slots[0].wires == 4) {
  363. omap_cfg_reg(H14_24XX_MMC_DAT1);
  364. omap_cfg_reg(E19_24XX_MMC_DAT2);
  365. omap_cfg_reg(D19_24XX_MMC_DAT3);
  366. omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
  367. omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
  368. omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
  369. }
  370. /*
  371. * Use internal loop-back in MMC/SDIO Module Input Clock
  372. * selection
  373. */
  374. if (mmc_controller->slots[0].internal_clock) {
  375. u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  376. v |= (1 << 24);
  377. omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
  378. }
  379. }
  380. }
  381. void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
  382. int nr_controllers)
  383. {
  384. int i;
  385. char *name;
  386. for (i = 0; i < nr_controllers; i++) {
  387. unsigned long base, size;
  388. unsigned int irq = 0;
  389. if (!mmc_data[i])
  390. continue;
  391. omap2_mmc_mux(mmc_data[i], i);
  392. switch (i) {
  393. case 0:
  394. base = OMAP2_MMC1_BASE;
  395. irq = INT_24XX_MMC_IRQ;
  396. break;
  397. case 1:
  398. base = OMAP2_MMC2_BASE;
  399. irq = INT_24XX_MMC2_IRQ;
  400. break;
  401. case 2:
  402. if (!cpu_is_omap34xx())
  403. return;
  404. base = OMAP3_MMC3_BASE;
  405. irq = INT_34XX_MMC3_IRQ;
  406. break;
  407. default:
  408. continue;
  409. }
  410. if (cpu_is_omap2420()) {
  411. size = OMAP2420_MMC_SIZE;
  412. name = "mmci-omap";
  413. } else {
  414. size = HSMMC_SIZE;
  415. name = "mmci-omap-hs";
  416. }
  417. omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
  418. };
  419. }
  420. #endif
  421. /*-------------------------------------------------------------------------*/
  422. #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
  423. #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
  424. #define OMAP_HDQ_BASE 0x480B2000
  425. #endif
  426. static struct resource omap_hdq_resources[] = {
  427. {
  428. .start = OMAP_HDQ_BASE,
  429. .end = OMAP_HDQ_BASE + 0x1C,
  430. .flags = IORESOURCE_MEM,
  431. },
  432. {
  433. .start = INT_24XX_HDQ_IRQ,
  434. .flags = IORESOURCE_IRQ,
  435. },
  436. };
  437. static struct platform_device omap_hdq_dev = {
  438. .name = "omap_hdq",
  439. .id = 0,
  440. .dev = {
  441. .platform_data = NULL,
  442. },
  443. .num_resources = ARRAY_SIZE(omap_hdq_resources),
  444. .resource = omap_hdq_resources,
  445. };
  446. static inline void omap_hdq_init(void)
  447. {
  448. (void) platform_device_register(&omap_hdq_dev);
  449. }
  450. #else
  451. static inline void omap_hdq_init(void) {}
  452. #endif
  453. /*-------------------------------------------------------------------------*/
  454. static int __init omap2_init_devices(void)
  455. {
  456. /* please keep these calls, and their implementations above,
  457. * in alphabetical order so they're easier to sort through.
  458. */
  459. omap_hsmmc_reset();
  460. omap_init_mbox();
  461. omap_init_mcspi();
  462. omap_hdq_init();
  463. omap_init_sti();
  464. omap_init_sha1_md5();
  465. return 0;
  466. }
  467. arch_initcall(omap2_init_devices);