setup-r8a7740.c 5.5 KB

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  1. /*
  2. * R8A7740 processor support
  3. *
  4. * Copyright (C) 2011 Renesas Solutions Corp.
  5. * Copyright (C) 2011 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/serial_sci.h>
  24. #include <linux/sh_timer.h>
  25. #include <mach/r8a7740.h>
  26. #include <asm/mach-types.h>
  27. #include <asm/mach/arch.h>
  28. /* SCIFA0 */
  29. static struct plat_sci_port scif0_platform_data = {
  30. .mapbase = 0xe6c40000,
  31. .flags = UPF_BOOT_AUTOCONF,
  32. .scscr = SCSCR_RE | SCSCR_TE,
  33. .scbrr_algo_id = SCBRR_ALGO_4,
  34. .type = PORT_SCIFA,
  35. .irqs = SCIx_IRQ_MUXED(gic_spi(100)),
  36. };
  37. static struct platform_device scif0_device = {
  38. .name = "sh-sci",
  39. .id = 0,
  40. .dev = {
  41. .platform_data = &scif0_platform_data,
  42. },
  43. };
  44. /* SCIFA1 */
  45. static struct plat_sci_port scif1_platform_data = {
  46. .mapbase = 0xe6c50000,
  47. .flags = UPF_BOOT_AUTOCONF,
  48. .scscr = SCSCR_RE | SCSCR_TE,
  49. .scbrr_algo_id = SCBRR_ALGO_4,
  50. .type = PORT_SCIFA,
  51. .irqs = SCIx_IRQ_MUXED(gic_spi(101)),
  52. };
  53. static struct platform_device scif1_device = {
  54. .name = "sh-sci",
  55. .id = 1,
  56. .dev = {
  57. .platform_data = &scif1_platform_data,
  58. },
  59. };
  60. /* SCIFA2 */
  61. static struct plat_sci_port scif2_platform_data = {
  62. .mapbase = 0xe6c60000,
  63. .flags = UPF_BOOT_AUTOCONF,
  64. .scscr = SCSCR_RE | SCSCR_TE,
  65. .scbrr_algo_id = SCBRR_ALGO_4,
  66. .type = PORT_SCIFA,
  67. .irqs = SCIx_IRQ_MUXED(gic_spi(102)),
  68. };
  69. static struct platform_device scif2_device = {
  70. .name = "sh-sci",
  71. .id = 2,
  72. .dev = {
  73. .platform_data = &scif2_platform_data,
  74. },
  75. };
  76. /* SCIFA3 */
  77. static struct plat_sci_port scif3_platform_data = {
  78. .mapbase = 0xe6c70000,
  79. .flags = UPF_BOOT_AUTOCONF,
  80. .scscr = SCSCR_RE | SCSCR_TE,
  81. .scbrr_algo_id = SCBRR_ALGO_4,
  82. .type = PORT_SCIFA,
  83. .irqs = SCIx_IRQ_MUXED(gic_spi(103)),
  84. };
  85. static struct platform_device scif3_device = {
  86. .name = "sh-sci",
  87. .id = 3,
  88. .dev = {
  89. .platform_data = &scif3_platform_data,
  90. },
  91. };
  92. /* SCIFA4 */
  93. static struct plat_sci_port scif4_platform_data = {
  94. .mapbase = 0xe6c80000,
  95. .flags = UPF_BOOT_AUTOCONF,
  96. .scscr = SCSCR_RE | SCSCR_TE,
  97. .scbrr_algo_id = SCBRR_ALGO_4,
  98. .type = PORT_SCIFA,
  99. .irqs = SCIx_IRQ_MUXED(gic_spi(104)),
  100. };
  101. static struct platform_device scif4_device = {
  102. .name = "sh-sci",
  103. .id = 4,
  104. .dev = {
  105. .platform_data = &scif4_platform_data,
  106. },
  107. };
  108. /* SCIFA5 */
  109. static struct plat_sci_port scif5_platform_data = {
  110. .mapbase = 0xe6cb0000,
  111. .flags = UPF_BOOT_AUTOCONF,
  112. .scscr = SCSCR_RE | SCSCR_TE,
  113. .scbrr_algo_id = SCBRR_ALGO_4,
  114. .type = PORT_SCIFA,
  115. .irqs = SCIx_IRQ_MUXED(gic_spi(105)),
  116. };
  117. static struct platform_device scif5_device = {
  118. .name = "sh-sci",
  119. .id = 5,
  120. .dev = {
  121. .platform_data = &scif5_platform_data,
  122. },
  123. };
  124. /* SCIFA6 */
  125. static struct plat_sci_port scif6_platform_data = {
  126. .mapbase = 0xe6cc0000,
  127. .flags = UPF_BOOT_AUTOCONF,
  128. .scscr = SCSCR_RE | SCSCR_TE,
  129. .scbrr_algo_id = SCBRR_ALGO_4,
  130. .type = PORT_SCIFA,
  131. .irqs = SCIx_IRQ_MUXED(gic_spi(106)),
  132. };
  133. static struct platform_device scif6_device = {
  134. .name = "sh-sci",
  135. .id = 6,
  136. .dev = {
  137. .platform_data = &scif6_platform_data,
  138. },
  139. };
  140. /* SCIFA7 */
  141. static struct plat_sci_port scif7_platform_data = {
  142. .mapbase = 0xe6cd0000,
  143. .flags = UPF_BOOT_AUTOCONF,
  144. .scscr = SCSCR_RE | SCSCR_TE,
  145. .scbrr_algo_id = SCBRR_ALGO_4,
  146. .type = PORT_SCIFA,
  147. .irqs = SCIx_IRQ_MUXED(gic_spi(107)),
  148. };
  149. static struct platform_device scif7_device = {
  150. .name = "sh-sci",
  151. .id = 7,
  152. .dev = {
  153. .platform_data = &scif7_platform_data,
  154. },
  155. };
  156. /* SCIFB */
  157. static struct plat_sci_port scifb_platform_data = {
  158. .mapbase = 0xe6c30000,
  159. .flags = UPF_BOOT_AUTOCONF,
  160. .scscr = SCSCR_RE | SCSCR_TE,
  161. .scbrr_algo_id = SCBRR_ALGO_4,
  162. .type = PORT_SCIFB,
  163. .irqs = SCIx_IRQ_MUXED(gic_spi(108)),
  164. };
  165. static struct platform_device scifb_device = {
  166. .name = "sh-sci",
  167. .id = 8,
  168. .dev = {
  169. .platform_data = &scifb_platform_data,
  170. },
  171. };
  172. /* CMT */
  173. static struct sh_timer_config cmt10_platform_data = {
  174. .name = "CMT10",
  175. .channel_offset = 0x10,
  176. .timer_bit = 0,
  177. .clockevent_rating = 125,
  178. .clocksource_rating = 125,
  179. };
  180. static struct resource cmt10_resources[] = {
  181. [0] = {
  182. .name = "CMT10",
  183. .start = 0xe6138010,
  184. .end = 0xe613801b,
  185. .flags = IORESOURCE_MEM,
  186. },
  187. [1] = {
  188. .start = gic_spi(58),
  189. .flags = IORESOURCE_IRQ,
  190. },
  191. };
  192. static struct platform_device cmt10_device = {
  193. .name = "sh_cmt",
  194. .id = 10,
  195. .dev = {
  196. .platform_data = &cmt10_platform_data,
  197. },
  198. .resource = cmt10_resources,
  199. .num_resources = ARRAY_SIZE(cmt10_resources),
  200. };
  201. static struct platform_device *r8a7740_early_devices[] __initdata = {
  202. &scif0_device,
  203. &scif1_device,
  204. &scif2_device,
  205. &scif3_device,
  206. &scif4_device,
  207. &scif5_device,
  208. &scif6_device,
  209. &scif7_device,
  210. &scifb_device,
  211. &cmt10_device,
  212. };
  213. void __init r8a7740_add_standard_devices(void)
  214. {
  215. platform_add_devices(r8a7740_early_devices,
  216. ARRAY_SIZE(r8a7740_early_devices));
  217. }
  218. void __init r8a7740_add_early_devices(void)
  219. {
  220. early_platform_add_devices(r8a7740_early_devices,
  221. ARRAY_SIZE(r8a7740_early_devices));
  222. }