mt9m111.c 28 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012
  1. /*
  2. * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina
  3. *
  4. * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/videodev2.h>
  11. #include <linux/slab.h>
  12. #include <linux/i2c.h>
  13. #include <linux/log2.h>
  14. #include <linux/gpio.h>
  15. #include <linux/delay.h>
  16. #include <linux/v4l2-mediabus.h>
  17. #include <linux/module.h>
  18. #include <media/soc_camera.h>
  19. #include <media/v4l2-common.h>
  20. #include <media/v4l2-ctrls.h>
  21. /*
  22. * MT9M111, MT9M112 and MT9M131:
  23. * i2c address is 0x48 or 0x5d (depending on SADDR pin)
  24. * The platform has to define struct i2c_board_info objects and link to them
  25. * from struct soc_camera_host_desc
  26. */
  27. /*
  28. * Sensor core register addresses (0x000..0x0ff)
  29. */
  30. #define MT9M111_CHIP_VERSION 0x000
  31. #define MT9M111_ROW_START 0x001
  32. #define MT9M111_COLUMN_START 0x002
  33. #define MT9M111_WINDOW_HEIGHT 0x003
  34. #define MT9M111_WINDOW_WIDTH 0x004
  35. #define MT9M111_HORIZONTAL_BLANKING_B 0x005
  36. #define MT9M111_VERTICAL_BLANKING_B 0x006
  37. #define MT9M111_HORIZONTAL_BLANKING_A 0x007
  38. #define MT9M111_VERTICAL_BLANKING_A 0x008
  39. #define MT9M111_SHUTTER_WIDTH 0x009
  40. #define MT9M111_ROW_SPEED 0x00a
  41. #define MT9M111_EXTRA_DELAY 0x00b
  42. #define MT9M111_SHUTTER_DELAY 0x00c
  43. #define MT9M111_RESET 0x00d
  44. #define MT9M111_READ_MODE_B 0x020
  45. #define MT9M111_READ_MODE_A 0x021
  46. #define MT9M111_FLASH_CONTROL 0x023
  47. #define MT9M111_GREEN1_GAIN 0x02b
  48. #define MT9M111_BLUE_GAIN 0x02c
  49. #define MT9M111_RED_GAIN 0x02d
  50. #define MT9M111_GREEN2_GAIN 0x02e
  51. #define MT9M111_GLOBAL_GAIN 0x02f
  52. #define MT9M111_CONTEXT_CONTROL 0x0c8
  53. #define MT9M111_PAGE_MAP 0x0f0
  54. #define MT9M111_BYTE_WISE_ADDR 0x0f1
  55. #define MT9M111_RESET_SYNC_CHANGES (1 << 15)
  56. #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9)
  57. #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8)
  58. #define MT9M111_RESET_RESET_SOC (1 << 5)
  59. #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4)
  60. #define MT9M111_RESET_CHIP_ENABLE (1 << 3)
  61. #define MT9M111_RESET_ANALOG_STANDBY (1 << 2)
  62. #define MT9M111_RESET_RESTART_FRAME (1 << 1)
  63. #define MT9M111_RESET_RESET_MODE (1 << 0)
  64. #define MT9M111_RM_FULL_POWER_RD (0 << 10)
  65. #define MT9M111_RM_LOW_POWER_RD (1 << 10)
  66. #define MT9M111_RM_COL_SKIP_4X (1 << 5)
  67. #define MT9M111_RM_ROW_SKIP_4X (1 << 4)
  68. #define MT9M111_RM_COL_SKIP_2X (1 << 3)
  69. #define MT9M111_RM_ROW_SKIP_2X (1 << 2)
  70. #define MT9M111_RMB_MIRROR_COLS (1 << 1)
  71. #define MT9M111_RMB_MIRROR_ROWS (1 << 0)
  72. #define MT9M111_CTXT_CTRL_RESTART (1 << 15)
  73. #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12)
  74. #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10)
  75. #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9)
  76. #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8)
  77. #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7)
  78. #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3)
  79. #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2)
  80. #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1)
  81. #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0)
  82. /*
  83. * Colorpipe register addresses (0x100..0x1ff)
  84. */
  85. #define MT9M111_OPER_MODE_CTRL 0x106
  86. #define MT9M111_OUTPUT_FORMAT_CTRL 0x108
  87. #define MT9M111_REDUCER_XZOOM_B 0x1a0
  88. #define MT9M111_REDUCER_XSIZE_B 0x1a1
  89. #define MT9M111_REDUCER_YZOOM_B 0x1a3
  90. #define MT9M111_REDUCER_YSIZE_B 0x1a4
  91. #define MT9M111_REDUCER_XZOOM_A 0x1a6
  92. #define MT9M111_REDUCER_XSIZE_A 0x1a7
  93. #define MT9M111_REDUCER_YZOOM_A 0x1a9
  94. #define MT9M111_REDUCER_YSIZE_A 0x1aa
  95. #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a
  96. #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b
  97. #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14)
  98. #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1)
  99. #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9)
  100. #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8)
  101. #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14)
  102. #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10)
  103. #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9)
  104. #define MT9M111_OUTFMT_RGB (1 << 8)
  105. #define MT9M111_OUTFMT_RGB565 (0 << 6)
  106. #define MT9M111_OUTFMT_RGB555 (1 << 6)
  107. #define MT9M111_OUTFMT_RGB444x (2 << 6)
  108. #define MT9M111_OUTFMT_RGBx444 (3 << 6)
  109. #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4)
  110. #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4)
  111. #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4)
  112. #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4)
  113. #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3)
  114. #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2)
  115. #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1)
  116. #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0)
  117. /*
  118. * Camera control register addresses (0x200..0x2ff not implemented)
  119. */
  120. #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg)
  121. #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val))
  122. #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val))
  123. #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val))
  124. #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \
  125. (val), (mask))
  126. #define MT9M111_MIN_DARK_ROWS 8
  127. #define MT9M111_MIN_DARK_COLS 26
  128. #define MT9M111_MAX_HEIGHT 1024
  129. #define MT9M111_MAX_WIDTH 1280
  130. struct mt9m111_context {
  131. u16 read_mode;
  132. u16 blanking_h;
  133. u16 blanking_v;
  134. u16 reducer_xzoom;
  135. u16 reducer_yzoom;
  136. u16 reducer_xsize;
  137. u16 reducer_ysize;
  138. u16 output_fmt_ctrl2;
  139. u16 control;
  140. };
  141. static struct mt9m111_context context_a = {
  142. .read_mode = MT9M111_READ_MODE_A,
  143. .blanking_h = MT9M111_HORIZONTAL_BLANKING_A,
  144. .blanking_v = MT9M111_VERTICAL_BLANKING_A,
  145. .reducer_xzoom = MT9M111_REDUCER_XZOOM_A,
  146. .reducer_yzoom = MT9M111_REDUCER_YZOOM_A,
  147. .reducer_xsize = MT9M111_REDUCER_XSIZE_A,
  148. .reducer_ysize = MT9M111_REDUCER_YSIZE_A,
  149. .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_A,
  150. .control = MT9M111_CTXT_CTRL_RESTART,
  151. };
  152. static struct mt9m111_context context_b = {
  153. .read_mode = MT9M111_READ_MODE_B,
  154. .blanking_h = MT9M111_HORIZONTAL_BLANKING_B,
  155. .blanking_v = MT9M111_VERTICAL_BLANKING_B,
  156. .reducer_xzoom = MT9M111_REDUCER_XZOOM_B,
  157. .reducer_yzoom = MT9M111_REDUCER_YZOOM_B,
  158. .reducer_xsize = MT9M111_REDUCER_XSIZE_B,
  159. .reducer_ysize = MT9M111_REDUCER_YSIZE_B,
  160. .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_B,
  161. .control = MT9M111_CTXT_CTRL_RESTART |
  162. MT9M111_CTXT_CTRL_DEFECTCOR_B | MT9M111_CTXT_CTRL_RESIZE_B |
  163. MT9M111_CTXT_CTRL_CTRL2_B | MT9M111_CTXT_CTRL_GAMMA_B |
  164. MT9M111_CTXT_CTRL_READ_MODE_B | MT9M111_CTXT_CTRL_VBLANK_SEL_B |
  165. MT9M111_CTXT_CTRL_HBLANK_SEL_B,
  166. };
  167. /* MT9M111 has only one fixed colorspace per pixelcode */
  168. struct mt9m111_datafmt {
  169. enum v4l2_mbus_pixelcode code;
  170. enum v4l2_colorspace colorspace;
  171. };
  172. static const struct mt9m111_datafmt mt9m111_colour_fmts[] = {
  173. {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
  174. {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
  175. {V4L2_MBUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG},
  176. {V4L2_MBUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_JPEG},
  177. {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
  178. {V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
  179. {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
  180. {V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
  181. {V4L2_MBUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB},
  182. {V4L2_MBUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB},
  183. {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
  184. {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
  185. };
  186. struct mt9m111 {
  187. struct v4l2_subdev subdev;
  188. struct v4l2_ctrl_handler hdl;
  189. struct v4l2_ctrl *gain;
  190. struct mt9m111_context *ctx;
  191. struct v4l2_rect rect; /* cropping rectangle */
  192. int width; /* output */
  193. int height; /* sizes */
  194. struct mutex power_lock; /* lock to protect power_count */
  195. int power_count;
  196. const struct mt9m111_datafmt *fmt;
  197. int lastpage; /* PageMap cache value */
  198. };
  199. /* Find a data format by a pixel code */
  200. static const struct mt9m111_datafmt *mt9m111_find_datafmt(struct mt9m111 *mt9m111,
  201. enum v4l2_mbus_pixelcode code)
  202. {
  203. int i;
  204. for (i = 0; i < ARRAY_SIZE(mt9m111_colour_fmts); i++)
  205. if (mt9m111_colour_fmts[i].code == code)
  206. return mt9m111_colour_fmts + i;
  207. return mt9m111->fmt;
  208. }
  209. static struct mt9m111 *to_mt9m111(const struct i2c_client *client)
  210. {
  211. return container_of(i2c_get_clientdata(client), struct mt9m111, subdev);
  212. }
  213. static int reg_page_map_set(struct i2c_client *client, const u16 reg)
  214. {
  215. int ret;
  216. u16 page;
  217. struct mt9m111 *mt9m111 = to_mt9m111(client);
  218. page = (reg >> 8);
  219. if (page == mt9m111->lastpage)
  220. return 0;
  221. if (page > 2)
  222. return -EINVAL;
  223. ret = i2c_smbus_write_word_swapped(client, MT9M111_PAGE_MAP, page);
  224. if (!ret)
  225. mt9m111->lastpage = page;
  226. return ret;
  227. }
  228. static int mt9m111_reg_read(struct i2c_client *client, const u16 reg)
  229. {
  230. int ret;
  231. ret = reg_page_map_set(client, reg);
  232. if (!ret)
  233. ret = i2c_smbus_read_word_swapped(client, reg & 0xff);
  234. dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret);
  235. return ret;
  236. }
  237. static int mt9m111_reg_write(struct i2c_client *client, const u16 reg,
  238. const u16 data)
  239. {
  240. int ret;
  241. ret = reg_page_map_set(client, reg);
  242. if (!ret)
  243. ret = i2c_smbus_write_word_swapped(client, reg & 0xff, data);
  244. dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret);
  245. return ret;
  246. }
  247. static int mt9m111_reg_set(struct i2c_client *client, const u16 reg,
  248. const u16 data)
  249. {
  250. int ret;
  251. ret = mt9m111_reg_read(client, reg);
  252. if (ret >= 0)
  253. ret = mt9m111_reg_write(client, reg, ret | data);
  254. return ret;
  255. }
  256. static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg,
  257. const u16 data)
  258. {
  259. int ret;
  260. ret = mt9m111_reg_read(client, reg);
  261. if (ret >= 0)
  262. ret = mt9m111_reg_write(client, reg, ret & ~data);
  263. return ret;
  264. }
  265. static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg,
  266. const u16 data, const u16 mask)
  267. {
  268. int ret;
  269. ret = mt9m111_reg_read(client, reg);
  270. if (ret >= 0)
  271. ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data);
  272. return ret;
  273. }
  274. static int mt9m111_set_context(struct mt9m111 *mt9m111,
  275. struct mt9m111_context *ctx)
  276. {
  277. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  278. return reg_write(CONTEXT_CONTROL, ctx->control);
  279. }
  280. static int mt9m111_setup_rect_ctx(struct mt9m111 *mt9m111,
  281. struct mt9m111_context *ctx, struct v4l2_rect *rect,
  282. unsigned int width, unsigned int height)
  283. {
  284. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  285. int ret = mt9m111_reg_write(client, ctx->reducer_xzoom, rect->width);
  286. if (!ret)
  287. ret = mt9m111_reg_write(client, ctx->reducer_yzoom, rect->height);
  288. if (!ret)
  289. ret = mt9m111_reg_write(client, ctx->reducer_xsize, width);
  290. if (!ret)
  291. ret = mt9m111_reg_write(client, ctx->reducer_ysize, height);
  292. return ret;
  293. }
  294. static int mt9m111_setup_geometry(struct mt9m111 *mt9m111, struct v4l2_rect *rect,
  295. int width, int height, enum v4l2_mbus_pixelcode code)
  296. {
  297. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  298. int ret;
  299. ret = reg_write(COLUMN_START, rect->left);
  300. if (!ret)
  301. ret = reg_write(ROW_START, rect->top);
  302. if (!ret)
  303. ret = reg_write(WINDOW_WIDTH, rect->width);
  304. if (!ret)
  305. ret = reg_write(WINDOW_HEIGHT, rect->height);
  306. if (code != V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
  307. /* IFP in use, down-scaling possible */
  308. if (!ret)
  309. ret = mt9m111_setup_rect_ctx(mt9m111, &context_b,
  310. rect, width, height);
  311. if (!ret)
  312. ret = mt9m111_setup_rect_ctx(mt9m111, &context_a,
  313. rect, width, height);
  314. }
  315. dev_dbg(&client->dev, "%s(%x): %ux%u@%u:%u -> %ux%u = %d\n",
  316. __func__, code, rect->width, rect->height, rect->left, rect->top,
  317. width, height, ret);
  318. return ret;
  319. }
  320. static int mt9m111_enable(struct mt9m111 *mt9m111)
  321. {
  322. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  323. return reg_write(RESET, MT9M111_RESET_CHIP_ENABLE);
  324. }
  325. static int mt9m111_reset(struct mt9m111 *mt9m111)
  326. {
  327. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  328. int ret;
  329. ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
  330. if (!ret)
  331. ret = reg_set(RESET, MT9M111_RESET_RESET_SOC);
  332. if (!ret)
  333. ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE
  334. | MT9M111_RESET_RESET_SOC);
  335. return ret;
  336. }
  337. static int mt9m111_s_crop(struct v4l2_subdev *sd, const struct v4l2_crop *a)
  338. {
  339. struct v4l2_rect rect = a->c;
  340. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  341. int width, height;
  342. int ret;
  343. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  344. return -EINVAL;
  345. if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
  346. mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
  347. /* Bayer format - even size lengths */
  348. rect.width = ALIGN(rect.width, 2);
  349. rect.height = ALIGN(rect.height, 2);
  350. /* Let the user play with the starting pixel */
  351. }
  352. /* FIXME: the datasheet doesn't specify minimum sizes */
  353. soc_camera_limit_side(&rect.left, &rect.width,
  354. MT9M111_MIN_DARK_COLS, 2, MT9M111_MAX_WIDTH);
  355. soc_camera_limit_side(&rect.top, &rect.height,
  356. MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT);
  357. width = min(mt9m111->width, rect.width);
  358. height = min(mt9m111->height, rect.height);
  359. ret = mt9m111_setup_geometry(mt9m111, &rect, width, height, mt9m111->fmt->code);
  360. if (!ret) {
  361. mt9m111->rect = rect;
  362. mt9m111->width = width;
  363. mt9m111->height = height;
  364. }
  365. return ret;
  366. }
  367. static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
  368. {
  369. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  370. a->c = mt9m111->rect;
  371. a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  372. return 0;
  373. }
  374. static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
  375. {
  376. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  377. return -EINVAL;
  378. a->bounds.left = MT9M111_MIN_DARK_COLS;
  379. a->bounds.top = MT9M111_MIN_DARK_ROWS;
  380. a->bounds.width = MT9M111_MAX_WIDTH;
  381. a->bounds.height = MT9M111_MAX_HEIGHT;
  382. a->defrect = a->bounds;
  383. a->pixelaspect.numerator = 1;
  384. a->pixelaspect.denominator = 1;
  385. return 0;
  386. }
  387. static int mt9m111_g_fmt(struct v4l2_subdev *sd,
  388. struct v4l2_mbus_framefmt *mf)
  389. {
  390. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  391. mf->width = mt9m111->width;
  392. mf->height = mt9m111->height;
  393. mf->code = mt9m111->fmt->code;
  394. mf->colorspace = mt9m111->fmt->colorspace;
  395. mf->field = V4L2_FIELD_NONE;
  396. return 0;
  397. }
  398. static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111,
  399. enum v4l2_mbus_pixelcode code)
  400. {
  401. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  402. u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
  403. MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB |
  404. MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 |
  405. MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 |
  406. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  407. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  408. int ret;
  409. switch (code) {
  410. case V4L2_MBUS_FMT_SBGGR8_1X8:
  411. data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
  412. MT9M111_OUTFMT_RGB;
  413. break;
  414. case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
  415. data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB;
  416. break;
  417. case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
  418. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 |
  419. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  420. break;
  421. case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
  422. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555;
  423. break;
  424. case V4L2_MBUS_FMT_RGB565_2X8_LE:
  425. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  426. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  427. break;
  428. case V4L2_MBUS_FMT_RGB565_2X8_BE:
  429. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565;
  430. break;
  431. case V4L2_MBUS_FMT_BGR565_2X8_BE:
  432. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  433. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  434. break;
  435. case V4L2_MBUS_FMT_BGR565_2X8_LE:
  436. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  437. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  438. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  439. break;
  440. case V4L2_MBUS_FMT_UYVY8_2X8:
  441. data_outfmt2 = 0;
  442. break;
  443. case V4L2_MBUS_FMT_VYUY8_2X8:
  444. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  445. break;
  446. case V4L2_MBUS_FMT_YUYV8_2X8:
  447. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  448. break;
  449. case V4L2_MBUS_FMT_YVYU8_2X8:
  450. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  451. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  452. break;
  453. default:
  454. dev_err(&client->dev, "Pixel format not handled: %x\n", code);
  455. return -EINVAL;
  456. }
  457. ret = mt9m111_reg_mask(client, context_a.output_fmt_ctrl2,
  458. data_outfmt2, mask_outfmt2);
  459. if (!ret)
  460. ret = mt9m111_reg_mask(client, context_b.output_fmt_ctrl2,
  461. data_outfmt2, mask_outfmt2);
  462. return ret;
  463. }
  464. static int mt9m111_try_fmt(struct v4l2_subdev *sd,
  465. struct v4l2_mbus_framefmt *mf)
  466. {
  467. struct i2c_client *client = v4l2_get_subdevdata(sd);
  468. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  469. const struct mt9m111_datafmt *fmt;
  470. struct v4l2_rect *rect = &mt9m111->rect;
  471. bool bayer;
  472. fmt = mt9m111_find_datafmt(mt9m111, mf->code);
  473. bayer = fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
  474. fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE;
  475. /*
  476. * With Bayer format enforce even side lengths, but let the user play
  477. * with the starting pixel
  478. */
  479. if (bayer) {
  480. rect->width = ALIGN(rect->width, 2);
  481. rect->height = ALIGN(rect->height, 2);
  482. }
  483. if (fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
  484. /* IFP bypass mode, no scaling */
  485. mf->width = rect->width;
  486. mf->height = rect->height;
  487. } else {
  488. /* No upscaling */
  489. if (mf->width > rect->width)
  490. mf->width = rect->width;
  491. if (mf->height > rect->height)
  492. mf->height = rect->height;
  493. }
  494. dev_dbg(&client->dev, "%s(): %ux%u, code=%x\n", __func__,
  495. mf->width, mf->height, fmt->code);
  496. mf->code = fmt->code;
  497. mf->colorspace = fmt->colorspace;
  498. return 0;
  499. }
  500. static int mt9m111_s_fmt(struct v4l2_subdev *sd,
  501. struct v4l2_mbus_framefmt *mf)
  502. {
  503. const struct mt9m111_datafmt *fmt;
  504. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  505. struct v4l2_rect *rect = &mt9m111->rect;
  506. int ret;
  507. mt9m111_try_fmt(sd, mf);
  508. fmt = mt9m111_find_datafmt(mt9m111, mf->code);
  509. /* try_fmt() guarantees fmt != NULL && fmt->code == mf->code */
  510. ret = mt9m111_setup_geometry(mt9m111, rect, mf->width, mf->height, mf->code);
  511. if (!ret)
  512. ret = mt9m111_set_pixfmt(mt9m111, mf->code);
  513. if (!ret) {
  514. mt9m111->width = mf->width;
  515. mt9m111->height = mf->height;
  516. mt9m111->fmt = fmt;
  517. }
  518. return ret;
  519. }
  520. #ifdef CONFIG_VIDEO_ADV_DEBUG
  521. static int mt9m111_g_register(struct v4l2_subdev *sd,
  522. struct v4l2_dbg_register *reg)
  523. {
  524. struct i2c_client *client = v4l2_get_subdevdata(sd);
  525. int val;
  526. if (reg->reg > 0x2ff)
  527. return -EINVAL;
  528. val = mt9m111_reg_read(client, reg->reg);
  529. reg->size = 2;
  530. reg->val = (u64)val;
  531. if (reg->val > 0xffff)
  532. return -EIO;
  533. return 0;
  534. }
  535. static int mt9m111_s_register(struct v4l2_subdev *sd,
  536. const struct v4l2_dbg_register *reg)
  537. {
  538. struct i2c_client *client = v4l2_get_subdevdata(sd);
  539. if (reg->reg > 0x2ff)
  540. return -EINVAL;
  541. if (mt9m111_reg_write(client, reg->reg, reg->val) < 0)
  542. return -EIO;
  543. return 0;
  544. }
  545. #endif
  546. static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask)
  547. {
  548. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  549. int ret;
  550. if (flip)
  551. ret = mt9m111_reg_set(client, mt9m111->ctx->read_mode, mask);
  552. else
  553. ret = mt9m111_reg_clear(client, mt9m111->ctx->read_mode, mask);
  554. return ret;
  555. }
  556. static int mt9m111_get_global_gain(struct mt9m111 *mt9m111)
  557. {
  558. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  559. int data;
  560. data = reg_read(GLOBAL_GAIN);
  561. if (data >= 0)
  562. return (data & 0x2f) * (1 << ((data >> 10) & 1)) *
  563. (1 << ((data >> 9) & 1));
  564. return data;
  565. }
  566. static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain)
  567. {
  568. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  569. u16 val;
  570. if (gain > 63 * 2 * 2)
  571. return -EINVAL;
  572. if ((gain >= 64 * 2) && (gain < 63 * 2 * 2))
  573. val = (1 << 10) | (1 << 9) | (gain / 4);
  574. else if ((gain >= 64) && (gain < 64 * 2))
  575. val = (1 << 9) | (gain / 2);
  576. else
  577. val = gain;
  578. return reg_write(GLOBAL_GAIN, val);
  579. }
  580. static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int val)
  581. {
  582. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  583. if (val == V4L2_EXPOSURE_AUTO)
  584. return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
  585. return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
  586. }
  587. static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on)
  588. {
  589. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  590. if (on)
  591. return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
  592. return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
  593. }
  594. static int mt9m111_s_ctrl(struct v4l2_ctrl *ctrl)
  595. {
  596. struct mt9m111 *mt9m111 = container_of(ctrl->handler,
  597. struct mt9m111, hdl);
  598. switch (ctrl->id) {
  599. case V4L2_CID_VFLIP:
  600. return mt9m111_set_flip(mt9m111, ctrl->val,
  601. MT9M111_RMB_MIRROR_ROWS);
  602. case V4L2_CID_HFLIP:
  603. return mt9m111_set_flip(mt9m111, ctrl->val,
  604. MT9M111_RMB_MIRROR_COLS);
  605. case V4L2_CID_GAIN:
  606. return mt9m111_set_global_gain(mt9m111, ctrl->val);
  607. case V4L2_CID_EXPOSURE_AUTO:
  608. return mt9m111_set_autoexposure(mt9m111, ctrl->val);
  609. case V4L2_CID_AUTO_WHITE_BALANCE:
  610. return mt9m111_set_autowhitebalance(mt9m111, ctrl->val);
  611. }
  612. return -EINVAL;
  613. }
  614. static int mt9m111_suspend(struct mt9m111 *mt9m111)
  615. {
  616. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  617. int ret;
  618. v4l2_ctrl_s_ctrl(mt9m111->gain, mt9m111_get_global_gain(mt9m111));
  619. ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
  620. if (!ret)
  621. ret = reg_set(RESET, MT9M111_RESET_RESET_SOC |
  622. MT9M111_RESET_OUTPUT_DISABLE |
  623. MT9M111_RESET_ANALOG_STANDBY);
  624. if (!ret)
  625. ret = reg_clear(RESET, MT9M111_RESET_CHIP_ENABLE);
  626. return ret;
  627. }
  628. static void mt9m111_restore_state(struct mt9m111 *mt9m111)
  629. {
  630. mt9m111_set_context(mt9m111, mt9m111->ctx);
  631. mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code);
  632. mt9m111_setup_geometry(mt9m111, &mt9m111->rect,
  633. mt9m111->width, mt9m111->height, mt9m111->fmt->code);
  634. v4l2_ctrl_handler_setup(&mt9m111->hdl);
  635. }
  636. static int mt9m111_resume(struct mt9m111 *mt9m111)
  637. {
  638. int ret = mt9m111_enable(mt9m111);
  639. if (!ret)
  640. ret = mt9m111_reset(mt9m111);
  641. if (!ret)
  642. mt9m111_restore_state(mt9m111);
  643. return ret;
  644. }
  645. static int mt9m111_init(struct mt9m111 *mt9m111)
  646. {
  647. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  648. int ret;
  649. ret = mt9m111_enable(mt9m111);
  650. if (!ret)
  651. ret = mt9m111_reset(mt9m111);
  652. if (!ret)
  653. ret = mt9m111_set_context(mt9m111, mt9m111->ctx);
  654. if (ret)
  655. dev_err(&client->dev, "mt9m111 init failed: %d\n", ret);
  656. return ret;
  657. }
  658. static int mt9m111_power_on(struct mt9m111 *mt9m111)
  659. {
  660. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  661. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  662. int ret;
  663. ret = soc_camera_power_on(&client->dev, ssdd);
  664. if (ret < 0)
  665. return ret;
  666. ret = mt9m111_resume(mt9m111);
  667. if (ret < 0) {
  668. dev_err(&client->dev, "Failed to resume the sensor: %d\n", ret);
  669. soc_camera_power_off(&client->dev, ssdd);
  670. }
  671. return ret;
  672. }
  673. static void mt9m111_power_off(struct mt9m111 *mt9m111)
  674. {
  675. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  676. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  677. mt9m111_suspend(mt9m111);
  678. soc_camera_power_off(&client->dev, ssdd);
  679. }
  680. static int mt9m111_s_power(struct v4l2_subdev *sd, int on)
  681. {
  682. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  683. int ret = 0;
  684. mutex_lock(&mt9m111->power_lock);
  685. /*
  686. * If the power count is modified from 0 to != 0 or from != 0 to 0,
  687. * update the power state.
  688. */
  689. if (mt9m111->power_count == !on) {
  690. if (on)
  691. ret = mt9m111_power_on(mt9m111);
  692. else
  693. mt9m111_power_off(mt9m111);
  694. }
  695. if (!ret) {
  696. /* Update the power count. */
  697. mt9m111->power_count += on ? 1 : -1;
  698. WARN_ON(mt9m111->power_count < 0);
  699. }
  700. mutex_unlock(&mt9m111->power_lock);
  701. return ret;
  702. }
  703. static const struct v4l2_ctrl_ops mt9m111_ctrl_ops = {
  704. .s_ctrl = mt9m111_s_ctrl,
  705. };
  706. static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = {
  707. .s_power = mt9m111_s_power,
  708. #ifdef CONFIG_VIDEO_ADV_DEBUG
  709. .g_register = mt9m111_g_register,
  710. .s_register = mt9m111_s_register,
  711. #endif
  712. };
  713. static int mt9m111_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
  714. enum v4l2_mbus_pixelcode *code)
  715. {
  716. if (index >= ARRAY_SIZE(mt9m111_colour_fmts))
  717. return -EINVAL;
  718. *code = mt9m111_colour_fmts[index].code;
  719. return 0;
  720. }
  721. static int mt9m111_g_mbus_config(struct v4l2_subdev *sd,
  722. struct v4l2_mbus_config *cfg)
  723. {
  724. struct i2c_client *client = v4l2_get_subdevdata(sd);
  725. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  726. cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
  727. V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH |
  728. V4L2_MBUS_DATA_ACTIVE_HIGH;
  729. cfg->type = V4L2_MBUS_PARALLEL;
  730. cfg->flags = soc_camera_apply_board_flags(ssdd, cfg);
  731. return 0;
  732. }
  733. static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = {
  734. .s_mbus_fmt = mt9m111_s_fmt,
  735. .g_mbus_fmt = mt9m111_g_fmt,
  736. .try_mbus_fmt = mt9m111_try_fmt,
  737. .s_crop = mt9m111_s_crop,
  738. .g_crop = mt9m111_g_crop,
  739. .cropcap = mt9m111_cropcap,
  740. .enum_mbus_fmt = mt9m111_enum_fmt,
  741. .g_mbus_config = mt9m111_g_mbus_config,
  742. };
  743. static struct v4l2_subdev_ops mt9m111_subdev_ops = {
  744. .core = &mt9m111_subdev_core_ops,
  745. .video = &mt9m111_subdev_video_ops,
  746. };
  747. /*
  748. * Interface active, can use i2c. If it fails, it can indeed mean, that
  749. * this wasn't our capture interface, so, we wait for the right one
  750. */
  751. static int mt9m111_video_probe(struct i2c_client *client)
  752. {
  753. struct mt9m111 *mt9m111 = to_mt9m111(client);
  754. s32 data;
  755. int ret;
  756. ret = mt9m111_s_power(&mt9m111->subdev, 1);
  757. if (ret < 0)
  758. return ret;
  759. data = reg_read(CHIP_VERSION);
  760. switch (data) {
  761. case 0x143a: /* MT9M111 or MT9M131 */
  762. dev_info(&client->dev,
  763. "Detected a MT9M111/MT9M131 chip ID %x\n", data);
  764. break;
  765. case 0x148c: /* MT9M112 */
  766. dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data);
  767. break;
  768. default:
  769. dev_err(&client->dev,
  770. "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n",
  771. data);
  772. ret = -ENODEV;
  773. goto done;
  774. }
  775. ret = mt9m111_init(mt9m111);
  776. if (ret)
  777. goto done;
  778. ret = v4l2_ctrl_handler_setup(&mt9m111->hdl);
  779. done:
  780. mt9m111_s_power(&mt9m111->subdev, 0);
  781. return ret;
  782. }
  783. static int mt9m111_probe(struct i2c_client *client,
  784. const struct i2c_device_id *did)
  785. {
  786. struct mt9m111 *mt9m111;
  787. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  788. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  789. int ret;
  790. if (!ssdd) {
  791. dev_err(&client->dev, "mt9m111: driver needs platform data\n");
  792. return -EINVAL;
  793. }
  794. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
  795. dev_warn(&adapter->dev,
  796. "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
  797. return -EIO;
  798. }
  799. mt9m111 = devm_kzalloc(&client->dev, sizeof(struct mt9m111), GFP_KERNEL);
  800. if (!mt9m111)
  801. return -ENOMEM;
  802. /* Default HIGHPOWER context */
  803. mt9m111->ctx = &context_b;
  804. v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops);
  805. v4l2_ctrl_handler_init(&mt9m111->hdl, 5);
  806. v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  807. V4L2_CID_VFLIP, 0, 1, 1, 0);
  808. v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  809. V4L2_CID_HFLIP, 0, 1, 1, 0);
  810. v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  811. V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
  812. mt9m111->gain = v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  813. V4L2_CID_GAIN, 0, 63 * 2 * 2, 1, 32);
  814. v4l2_ctrl_new_std_menu(&mt9m111->hdl,
  815. &mt9m111_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0,
  816. V4L2_EXPOSURE_AUTO);
  817. mt9m111->subdev.ctrl_handler = &mt9m111->hdl;
  818. if (mt9m111->hdl.error)
  819. return mt9m111->hdl.error;
  820. /* Second stage probe - when a capture adapter is there */
  821. mt9m111->rect.left = MT9M111_MIN_DARK_COLS;
  822. mt9m111->rect.top = MT9M111_MIN_DARK_ROWS;
  823. mt9m111->rect.width = MT9M111_MAX_WIDTH;
  824. mt9m111->rect.height = MT9M111_MAX_HEIGHT;
  825. mt9m111->fmt = &mt9m111_colour_fmts[0];
  826. mt9m111->lastpage = -1;
  827. mutex_init(&mt9m111->power_lock);
  828. ret = mt9m111_video_probe(client);
  829. if (ret)
  830. v4l2_ctrl_handler_free(&mt9m111->hdl);
  831. return ret;
  832. }
  833. static int mt9m111_remove(struct i2c_client *client)
  834. {
  835. struct mt9m111 *mt9m111 = to_mt9m111(client);
  836. v4l2_device_unregister_subdev(&mt9m111->subdev);
  837. v4l2_ctrl_handler_free(&mt9m111->hdl);
  838. return 0;
  839. }
  840. static const struct i2c_device_id mt9m111_id[] = {
  841. { "mt9m111", 0 },
  842. { }
  843. };
  844. MODULE_DEVICE_TABLE(i2c, mt9m111_id);
  845. static struct i2c_driver mt9m111_i2c_driver = {
  846. .driver = {
  847. .name = "mt9m111",
  848. },
  849. .probe = mt9m111_probe,
  850. .remove = mt9m111_remove,
  851. .id_table = mt9m111_id,
  852. };
  853. module_i2c_driver(mt9m111_i2c_driver);
  854. MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver");
  855. MODULE_AUTHOR("Robert Jarzmik");
  856. MODULE_LICENSE("GPL");