at91sam9263.dtsi 5.2 KB

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  1. /*
  2. * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
  3. *
  4. * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  5. *
  6. * Licensed under GPLv2 only.
  7. */
  8. /include/ "skeleton.dtsi"
  9. / {
  10. model = "Atmel AT91SAM9263 family SoC";
  11. compatible = "atmel,at91sam9263";
  12. interrupt-parent = <&aic>;
  13. aliases {
  14. serial0 = &dbgu;
  15. serial1 = &usart0;
  16. serial2 = &usart1;
  17. serial3 = &usart2;
  18. gpio0 = &pioA;
  19. gpio1 = &pioB;
  20. gpio2 = &pioC;
  21. gpio3 = &pioD;
  22. gpio4 = &pioE;
  23. tcb0 = &tcb0;
  24. i2c0 = &i2c0;
  25. ssc0 = &ssc0;
  26. ssc1 = &ssc1;
  27. };
  28. cpus {
  29. cpu@0 {
  30. compatible = "arm,arm926ejs";
  31. };
  32. };
  33. memory {
  34. reg = <0x20000000 0x08000000>;
  35. };
  36. ahb {
  37. compatible = "simple-bus";
  38. #address-cells = <1>;
  39. #size-cells = <1>;
  40. ranges;
  41. apb {
  42. compatible = "simple-bus";
  43. #address-cells = <1>;
  44. #size-cells = <1>;
  45. ranges;
  46. aic: interrupt-controller@fffff000 {
  47. #interrupt-cells = <3>;
  48. compatible = "atmel,at91rm9200-aic";
  49. interrupt-controller;
  50. reg = <0xfffff000 0x200>;
  51. atmel,external-irqs = <30 31>;
  52. };
  53. pmc: pmc@fffffc00 {
  54. compatible = "atmel,at91rm9200-pmc";
  55. reg = <0xfffffc00 0x100>;
  56. };
  57. ramc: ramc@ffffe200 {
  58. compatible = "atmel,at91sam9260-sdramc";
  59. reg = <0xffffe200 0x200
  60. 0xffffe800 0x200>;
  61. };
  62. pit: timer@fffffd30 {
  63. compatible = "atmel,at91sam9260-pit";
  64. reg = <0xfffffd30 0xf>;
  65. interrupts = <1 4 7>;
  66. };
  67. tcb0: timer@fff7c000 {
  68. compatible = "atmel,at91rm9200-tcb";
  69. reg = <0xfff7c000 0x100>;
  70. interrupts = <19 4 0>;
  71. };
  72. rstc@fffffd00 {
  73. compatible = "atmel,at91sam9260-rstc";
  74. reg = <0xfffffd00 0x10>;
  75. };
  76. shdwc@fffffd10 {
  77. compatible = "atmel,at91sam9260-shdwc";
  78. reg = <0xfffffd10 0x10>;
  79. };
  80. pioA: gpio@fffff200 {
  81. compatible = "atmel,at91rm9200-gpio";
  82. reg = <0xfffff200 0x100>;
  83. interrupts = <2 4 1>;
  84. #gpio-cells = <2>;
  85. gpio-controller;
  86. interrupt-controller;
  87. #interrupt-cells = <2>;
  88. };
  89. pioB: gpio@fffff400 {
  90. compatible = "atmel,at91rm9200-gpio";
  91. reg = <0xfffff400 0x100>;
  92. interrupts = <3 4 1>;
  93. #gpio-cells = <2>;
  94. gpio-controller;
  95. interrupt-controller;
  96. #interrupt-cells = <2>;
  97. };
  98. pioC: gpio@fffff600 {
  99. compatible = "atmel,at91rm9200-gpio";
  100. reg = <0xfffff600 0x100>;
  101. interrupts = <4 4 1>;
  102. #gpio-cells = <2>;
  103. gpio-controller;
  104. interrupt-controller;
  105. #interrupt-cells = <2>;
  106. };
  107. pioD: gpio@fffff800 {
  108. compatible = "atmel,at91rm9200-gpio";
  109. reg = <0xfffff800 0x100>;
  110. interrupts = <4 4 1>;
  111. #gpio-cells = <2>;
  112. gpio-controller;
  113. interrupt-controller;
  114. #interrupt-cells = <2>;
  115. };
  116. pioE: gpio@fffffa00 {
  117. compatible = "atmel,at91rm9200-gpio";
  118. reg = <0xfffffa00 0x100>;
  119. interrupts = <4 4 1>;
  120. #gpio-cells = <2>;
  121. gpio-controller;
  122. interrupt-controller;
  123. #interrupt-cells = <2>;
  124. };
  125. dbgu: serial@ffffee00 {
  126. compatible = "atmel,at91sam9260-usart";
  127. reg = <0xffffee00 0x200>;
  128. interrupts = <1 4 7>;
  129. status = "disabled";
  130. };
  131. usart0: serial@fff8c000 {
  132. compatible = "atmel,at91sam9260-usart";
  133. reg = <0xfff8c000 0x200>;
  134. interrupts = <7 4 5>;
  135. atmel,use-dma-rx;
  136. atmel,use-dma-tx;
  137. status = "disabled";
  138. };
  139. usart1: serial@fff90000 {
  140. compatible = "atmel,at91sam9260-usart";
  141. reg = <0xfff90000 0x200>;
  142. interrupts = <8 4 5>;
  143. atmel,use-dma-rx;
  144. atmel,use-dma-tx;
  145. status = "disabled";
  146. };
  147. usart2: serial@fff94000 {
  148. compatible = "atmel,at91sam9260-usart";
  149. reg = <0xfff94000 0x200>;
  150. interrupts = <9 4 5>;
  151. atmel,use-dma-rx;
  152. atmel,use-dma-tx;
  153. status = "disabled";
  154. };
  155. ssc0: ssc@fff98000 {
  156. compatible = "atmel,at91rm9200-ssc";
  157. reg = <0xfff98000 0x4000>;
  158. interrupts = <16 4 5>;
  159. status = "disabled";
  160. };
  161. ssc1: ssc@fff9c000 {
  162. compatible = "atmel,at91rm9200-ssc";
  163. reg = <0xfff9c000 0x4000>;
  164. interrupts = <17 4 5>;
  165. status = "disabled";
  166. };
  167. macb0: ethernet@fffbc000 {
  168. compatible = "cdns,at32ap7000-macb", "cdns,macb";
  169. reg = <0xfffbc000 0x100>;
  170. interrupts = <21 4 3>;
  171. status = "disabled";
  172. };
  173. usb1: gadget@fff78000 {
  174. compatible = "atmel,at91rm9200-udc";
  175. reg = <0xfff78000 0x4000>;
  176. interrupts = <24 4 2>;
  177. status = "disabled";
  178. };
  179. i2c0: i2c@fff88000 {
  180. compatible = "atmel,at91sam9263-i2c";
  181. reg = <0xfff88000 0x100>;
  182. interrupts = <13 4 6>;
  183. #address-cells = <1>;
  184. #size-cells = <0>;
  185. status = "disabled";
  186. };
  187. };
  188. nand0: nand@40000000 {
  189. compatible = "atmel,at91rm9200-nand";
  190. #address-cells = <1>;
  191. #size-cells = <1>;
  192. reg = <0x40000000 0x10000000
  193. 0xffffe000 0x200
  194. >;
  195. atmel,nand-addr-offset = <21>;
  196. atmel,nand-cmd-offset = <22>;
  197. gpios = <&pioA 22 0
  198. &pioD 15 0
  199. 0
  200. >;
  201. status = "disabled";
  202. };
  203. usb0: ohci@00a00000 {
  204. compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  205. reg = <0x00a00000 0x100000>;
  206. interrupts = <29 4 2>;
  207. status = "disabled";
  208. };
  209. };
  210. i2c@0 {
  211. compatible = "i2c-gpio";
  212. gpios = <&pioB 4 0 /* sda */
  213. &pioB 5 0 /* scl */
  214. >;
  215. i2c-gpio,sda-open-drain;
  216. i2c-gpio,scl-open-drain;
  217. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  218. #address-cells = <1>;
  219. #size-cells = <0>;
  220. status = "disabled";
  221. };
  222. };