iwl-4965.c 137 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24. *
  25. *****************************************************************************/
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/version.h>
  29. #include <linux/init.h>
  30. #include <linux/pci.h>
  31. #include <linux/dma-mapping.h>
  32. #include <linux/delay.h>
  33. #include <linux/skbuff.h>
  34. #include <linux/netdevice.h>
  35. #include <linux/wireless.h>
  36. #include <net/mac80211.h>
  37. #include <linux/etherdevice.h>
  38. #include <asm/unaligned.h>
  39. #include "iwl-eeprom.h"
  40. #include "iwl-core.h"
  41. #include "iwl-4965.h"
  42. #include "iwl-helpers.h"
  43. static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv);
  44. #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
  45. [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
  46. IWL_RATE_SISO_##s##M_PLCP, \
  47. IWL_RATE_MIMO_##s##M_PLCP, \
  48. IWL_RATE_##r##M_IEEE, \
  49. IWL_RATE_##ip##M_INDEX, \
  50. IWL_RATE_##in##M_INDEX, \
  51. IWL_RATE_##rp##M_INDEX, \
  52. IWL_RATE_##rn##M_INDEX, \
  53. IWL_RATE_##pp##M_INDEX, \
  54. IWL_RATE_##np##M_INDEX }
  55. /*
  56. * Parameter order:
  57. * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  58. *
  59. * If there isn't a valid next or previous rate then INV is used which
  60. * maps to IWL_RATE_INVALID
  61. *
  62. */
  63. const struct iwl4965_rate_info iwl4965_rates[IWL_RATE_COUNT] = {
  64. IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
  65. IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
  66. IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
  67. IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
  68. IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
  69. IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
  70. IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
  71. IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
  72. IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
  73. IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
  74. IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
  75. IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  76. IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  77. };
  78. #ifdef CONFIG_IWL4965_HT
  79. static const u16 default_tid_to_tx_fifo[] = {
  80. IWL_TX_FIFO_AC1,
  81. IWL_TX_FIFO_AC0,
  82. IWL_TX_FIFO_AC0,
  83. IWL_TX_FIFO_AC1,
  84. IWL_TX_FIFO_AC2,
  85. IWL_TX_FIFO_AC2,
  86. IWL_TX_FIFO_AC3,
  87. IWL_TX_FIFO_AC3,
  88. IWL_TX_FIFO_NONE,
  89. IWL_TX_FIFO_NONE,
  90. IWL_TX_FIFO_NONE,
  91. IWL_TX_FIFO_NONE,
  92. IWL_TX_FIFO_NONE,
  93. IWL_TX_FIFO_NONE,
  94. IWL_TX_FIFO_NONE,
  95. IWL_TX_FIFO_NONE,
  96. IWL_TX_FIFO_AC3
  97. };
  98. #endif /*CONFIG_IWL4965_HT */
  99. static int is_fat_channel(__le32 rxon_flags)
  100. {
  101. return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
  102. (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
  103. }
  104. static u8 is_single_stream(struct iwl4965_priv *priv)
  105. {
  106. #ifdef CONFIG_IWL4965_HT
  107. if (!priv->current_ht_config.is_ht ||
  108. (priv->current_ht_config.supp_mcs_set[1] == 0) ||
  109. (priv->ps_mode == IWL_MIMO_PS_STATIC))
  110. return 1;
  111. #else
  112. return 1;
  113. #endif /*CONFIG_IWL4965_HT */
  114. return 0;
  115. }
  116. int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags)
  117. {
  118. int idx = 0;
  119. /* 4965 HT rate format */
  120. if (rate_n_flags & RATE_MCS_HT_MSK) {
  121. idx = (rate_n_flags & 0xff);
  122. if (idx >= IWL_RATE_MIMO_6M_PLCP)
  123. idx = idx - IWL_RATE_MIMO_6M_PLCP;
  124. idx += IWL_FIRST_OFDM_RATE;
  125. /* skip 9M not supported in ht*/
  126. if (idx >= IWL_RATE_9M_INDEX)
  127. idx += 1;
  128. if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
  129. return idx;
  130. /* 4965 legacy rate format, search for match in table */
  131. } else {
  132. for (idx = 0; idx < ARRAY_SIZE(iwl4965_rates); idx++)
  133. if (iwl4965_rates[idx].plcp == (rate_n_flags & 0xFF))
  134. return idx;
  135. }
  136. return -1;
  137. }
  138. /**
  139. * translate ucode response to mac80211 tx status control values
  140. */
  141. void iwl4965_hwrate_to_tx_control(struct iwl4965_priv *priv, u32 rate_n_flags,
  142. struct ieee80211_tx_control *control)
  143. {
  144. int rate_index;
  145. control->antenna_sel_tx =
  146. ((rate_n_flags & RATE_MCS_ANT_AB_MSK) >> RATE_MCS_ANT_A_POS);
  147. if (rate_n_flags & RATE_MCS_HT_MSK)
  148. control->flags |= IEEE80211_TXCTL_OFDM_HT;
  149. if (rate_n_flags & RATE_MCS_GF_MSK)
  150. control->flags |= IEEE80211_TXCTL_GREEN_FIELD;
  151. if (rate_n_flags & RATE_MCS_FAT_MSK)
  152. control->flags |= IEEE80211_TXCTL_40_MHZ_WIDTH;
  153. if (rate_n_flags & RATE_MCS_DUP_MSK)
  154. control->flags |= IEEE80211_TXCTL_DUP_DATA;
  155. if (rate_n_flags & RATE_MCS_SGI_MSK)
  156. control->flags |= IEEE80211_TXCTL_SHORT_GI;
  157. /* since iwl4965_hwrate_to_plcp_idx is band indifferent, we always use
  158. * IEEE80211_BAND_2GHZ band as it contains all the rates */
  159. rate_index = iwl4965_hwrate_to_plcp_idx(rate_n_flags);
  160. if (rate_index == -1)
  161. control->tx_rate = NULL;
  162. else
  163. control->tx_rate =
  164. &priv->bands[IEEE80211_BAND_2GHZ].bitrates[rate_index];
  165. }
  166. /*
  167. * Determine how many receiver/antenna chains to use.
  168. * More provides better reception via diversity. Fewer saves power.
  169. * MIMO (dual stream) requires at least 2, but works better with 3.
  170. * This does not determine *which* chains to use, just how many.
  171. */
  172. static int iwl4965_get_rx_chain_counter(struct iwl4965_priv *priv,
  173. u8 *idle_state, u8 *rx_state)
  174. {
  175. u8 is_single = is_single_stream(priv);
  176. u8 is_cam = test_bit(STATUS_POWER_PMI, &priv->status) ? 0 : 1;
  177. /* # of Rx chains to use when expecting MIMO. */
  178. if (is_single || (!is_cam && (priv->ps_mode == IWL_MIMO_PS_STATIC)))
  179. *rx_state = 2;
  180. else
  181. *rx_state = 3;
  182. /* # Rx chains when idling and maybe trying to save power */
  183. switch (priv->ps_mode) {
  184. case IWL_MIMO_PS_STATIC:
  185. case IWL_MIMO_PS_DYNAMIC:
  186. *idle_state = (is_cam) ? 2 : 1;
  187. break;
  188. case IWL_MIMO_PS_NONE:
  189. *idle_state = (is_cam) ? *rx_state : 1;
  190. break;
  191. default:
  192. *idle_state = 1;
  193. break;
  194. }
  195. return 0;
  196. }
  197. int iwl4965_hw_rxq_stop(struct iwl4965_priv *priv)
  198. {
  199. int rc;
  200. unsigned long flags;
  201. spin_lock_irqsave(&priv->lock, flags);
  202. rc = iwl4965_grab_nic_access(priv);
  203. if (rc) {
  204. spin_unlock_irqrestore(&priv->lock, flags);
  205. return rc;
  206. }
  207. /* stop Rx DMA */
  208. iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
  209. rc = iwl4965_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
  210. (1 << 24), 1000);
  211. if (rc < 0)
  212. IWL_ERROR("Can't stop Rx DMA.\n");
  213. iwl4965_release_nic_access(priv);
  214. spin_unlock_irqrestore(&priv->lock, flags);
  215. return 0;
  216. }
  217. u8 iwl4965_hw_find_station(struct iwl4965_priv *priv, const u8 *addr)
  218. {
  219. int i;
  220. int start = 0;
  221. int ret = IWL_INVALID_STATION;
  222. unsigned long flags;
  223. DECLARE_MAC_BUF(mac);
  224. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) ||
  225. (priv->iw_mode == IEEE80211_IF_TYPE_AP))
  226. start = IWL_STA_ID;
  227. if (is_broadcast_ether_addr(addr))
  228. return priv->hw_setting.bcast_sta_id;
  229. spin_lock_irqsave(&priv->sta_lock, flags);
  230. for (i = start; i < priv->hw_setting.max_stations; i++)
  231. if ((priv->stations[i].used) &&
  232. (!compare_ether_addr
  233. (priv->stations[i].sta.sta.addr, addr))) {
  234. ret = i;
  235. goto out;
  236. }
  237. IWL_DEBUG_ASSOC_LIMIT("can not find STA %s total %d\n",
  238. print_mac(mac, addr), priv->num_stations);
  239. out:
  240. spin_unlock_irqrestore(&priv->sta_lock, flags);
  241. return ret;
  242. }
  243. static int iwl4965_nic_set_pwr_src(struct iwl4965_priv *priv, int pwr_max)
  244. {
  245. int ret;
  246. unsigned long flags;
  247. spin_lock_irqsave(&priv->lock, flags);
  248. ret = iwl4965_grab_nic_access(priv);
  249. if (ret) {
  250. spin_unlock_irqrestore(&priv->lock, flags);
  251. return ret;
  252. }
  253. if (!pwr_max) {
  254. u32 val;
  255. ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
  256. &val);
  257. if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
  258. iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
  259. APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
  260. ~APMG_PS_CTRL_MSK_PWR_SRC);
  261. } else
  262. iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
  263. APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
  264. ~APMG_PS_CTRL_MSK_PWR_SRC);
  265. iwl4965_release_nic_access(priv);
  266. spin_unlock_irqrestore(&priv->lock, flags);
  267. return ret;
  268. }
  269. static int iwl4965_rx_init(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  270. {
  271. int rc;
  272. unsigned long flags;
  273. unsigned int rb_size;
  274. spin_lock_irqsave(&priv->lock, flags);
  275. rc = iwl4965_grab_nic_access(priv);
  276. if (rc) {
  277. spin_unlock_irqrestore(&priv->lock, flags);
  278. return rc;
  279. }
  280. if (iwl4965_param_amsdu_size_8K)
  281. rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
  282. else
  283. rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
  284. /* Stop Rx DMA */
  285. iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
  286. /* Reset driver's Rx queue write index */
  287. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
  288. /* Tell device where to find RBD circular buffer in DRAM */
  289. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
  290. rxq->dma_addr >> 8);
  291. /* Tell device where in DRAM to update its Rx status */
  292. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
  293. (priv->hw_setting.shared_phys +
  294. offsetof(struct iwl4965_shared, val0)) >> 4);
  295. /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
  296. iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
  297. FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
  298. FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
  299. rb_size |
  300. /*0x10 << 4 | */
  301. (RX_QUEUE_SIZE_LOG <<
  302. FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
  303. /*
  304. * iwl4965_write32(priv,CSR_INT_COAL_REG,0);
  305. */
  306. iwl4965_release_nic_access(priv);
  307. spin_unlock_irqrestore(&priv->lock, flags);
  308. return 0;
  309. }
  310. /* Tell 4965 where to find the "keep warm" buffer */
  311. static int iwl4965_kw_init(struct iwl4965_priv *priv)
  312. {
  313. unsigned long flags;
  314. int rc;
  315. spin_lock_irqsave(&priv->lock, flags);
  316. rc = iwl4965_grab_nic_access(priv);
  317. if (rc)
  318. goto out;
  319. iwl4965_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG,
  320. priv->kw.dma_addr >> 4);
  321. iwl4965_release_nic_access(priv);
  322. out:
  323. spin_unlock_irqrestore(&priv->lock, flags);
  324. return rc;
  325. }
  326. static int iwl4965_kw_alloc(struct iwl4965_priv *priv)
  327. {
  328. struct pci_dev *dev = priv->pci_dev;
  329. struct iwl4965_kw *kw = &priv->kw;
  330. kw->size = IWL4965_KW_SIZE; /* TBW need set somewhere else */
  331. kw->v_addr = pci_alloc_consistent(dev, kw->size, &kw->dma_addr);
  332. if (!kw->v_addr)
  333. return -ENOMEM;
  334. return 0;
  335. }
  336. #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
  337. ? # x " " : "")
  338. /**
  339. * iwl4965_set_fat_chan_info - Copy fat channel info into driver's priv.
  340. *
  341. * Does not set up a command, or touch hardware.
  342. */
  343. int iwl4965_set_fat_chan_info(struct iwl4965_priv *priv,
  344. enum ieee80211_band band, u16 channel,
  345. const struct iwl4965_eeprom_channel *eeprom_ch,
  346. u8 fat_extension_channel)
  347. {
  348. struct iwl4965_channel_info *ch_info;
  349. ch_info = (struct iwl4965_channel_info *)
  350. iwl4965_get_channel_info(priv, band, channel);
  351. if (!is_channel_valid(ch_info))
  352. return -1;
  353. IWL_DEBUG_INFO("FAT Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  354. " %ddBm): Ad-Hoc %ssupported\n",
  355. ch_info->channel,
  356. is_channel_a_band(ch_info) ?
  357. "5.2" : "2.4",
  358. CHECK_AND_PRINT(IBSS),
  359. CHECK_AND_PRINT(ACTIVE),
  360. CHECK_AND_PRINT(RADAR),
  361. CHECK_AND_PRINT(WIDE),
  362. CHECK_AND_PRINT(NARROW),
  363. CHECK_AND_PRINT(DFS),
  364. eeprom_ch->flags,
  365. eeprom_ch->max_power_avg,
  366. ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
  367. && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
  368. "" : "not ");
  369. ch_info->fat_eeprom = *eeprom_ch;
  370. ch_info->fat_max_power_avg = eeprom_ch->max_power_avg;
  371. ch_info->fat_curr_txpow = eeprom_ch->max_power_avg;
  372. ch_info->fat_min_power = 0;
  373. ch_info->fat_scan_power = eeprom_ch->max_power_avg;
  374. ch_info->fat_flags = eeprom_ch->flags;
  375. ch_info->fat_extension_channel = fat_extension_channel;
  376. return 0;
  377. }
  378. /**
  379. * iwl4965_kw_free - Free the "keep warm" buffer
  380. */
  381. static void iwl4965_kw_free(struct iwl4965_priv *priv)
  382. {
  383. struct pci_dev *dev = priv->pci_dev;
  384. struct iwl4965_kw *kw = &priv->kw;
  385. if (kw->v_addr) {
  386. pci_free_consistent(dev, kw->size, kw->v_addr, kw->dma_addr);
  387. memset(kw, 0, sizeof(*kw));
  388. }
  389. }
  390. /**
  391. * iwl4965_txq_ctx_reset - Reset TX queue context
  392. * Destroys all DMA structures and initialise them again
  393. *
  394. * @param priv
  395. * @return error code
  396. */
  397. static int iwl4965_txq_ctx_reset(struct iwl4965_priv *priv)
  398. {
  399. int rc = 0;
  400. int txq_id, slots_num;
  401. unsigned long flags;
  402. iwl4965_kw_free(priv);
  403. /* Free all tx/cmd queues and keep-warm buffer */
  404. iwl4965_hw_txq_ctx_free(priv);
  405. /* Alloc keep-warm buffer */
  406. rc = iwl4965_kw_alloc(priv);
  407. if (rc) {
  408. IWL_ERROR("Keep Warm allocation failed");
  409. goto error_kw;
  410. }
  411. spin_lock_irqsave(&priv->lock, flags);
  412. rc = iwl4965_grab_nic_access(priv);
  413. if (unlikely(rc)) {
  414. IWL_ERROR("TX reset failed");
  415. spin_unlock_irqrestore(&priv->lock, flags);
  416. goto error_reset;
  417. }
  418. /* Turn off all Tx DMA channels */
  419. iwl4965_write_prph(priv, KDR_SCD_TXFACT, 0);
  420. iwl4965_release_nic_access(priv);
  421. spin_unlock_irqrestore(&priv->lock, flags);
  422. /* Tell 4965 where to find the keep-warm buffer */
  423. rc = iwl4965_kw_init(priv);
  424. if (rc) {
  425. IWL_ERROR("kw_init failed\n");
  426. goto error_reset;
  427. }
  428. /* Alloc and init all (default 16) Tx queues,
  429. * including the command queue (#4) */
  430. for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
  431. slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
  432. TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
  433. rc = iwl4965_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
  434. txq_id);
  435. if (rc) {
  436. IWL_ERROR("Tx %d queue init failed\n", txq_id);
  437. goto error;
  438. }
  439. }
  440. return rc;
  441. error:
  442. iwl4965_hw_txq_ctx_free(priv);
  443. error_reset:
  444. iwl4965_kw_free(priv);
  445. error_kw:
  446. return rc;
  447. }
  448. int iwl4965_hw_nic_init(struct iwl4965_priv *priv)
  449. {
  450. int rc;
  451. unsigned long flags;
  452. struct iwl4965_rx_queue *rxq = &priv->rxq;
  453. u8 rev_id;
  454. u32 val;
  455. u8 val_link;
  456. iwl4965_power_init_handle(priv);
  457. /* nic_init */
  458. spin_lock_irqsave(&priv->lock, flags);
  459. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  460. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  461. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  462. rc = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  463. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  464. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  465. if (rc < 0) {
  466. spin_unlock_irqrestore(&priv->lock, flags);
  467. IWL_DEBUG_INFO("Failed to init the card\n");
  468. return rc;
  469. }
  470. rc = iwl4965_grab_nic_access(priv);
  471. if (rc) {
  472. spin_unlock_irqrestore(&priv->lock, flags);
  473. return rc;
  474. }
  475. iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
  476. iwl4965_write_prph(priv, APMG_CLK_CTRL_REG,
  477. APMG_CLK_VAL_DMA_CLK_RQT |
  478. APMG_CLK_VAL_BSM_CLK_RQT);
  479. iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
  480. udelay(20);
  481. iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  482. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  483. iwl4965_release_nic_access(priv);
  484. iwl4965_write32(priv, CSR_INT_COALESCING, 512 / 32);
  485. spin_unlock_irqrestore(&priv->lock, flags);
  486. /* Determine HW type */
  487. rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
  488. if (rc)
  489. return rc;
  490. IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
  491. iwl4965_nic_set_pwr_src(priv, 1);
  492. spin_lock_irqsave(&priv->lock, flags);
  493. if ((rev_id & 0x80) == 0x80 && (rev_id & 0x7f) < 8) {
  494. pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
  495. /* Enable No Snoop field */
  496. pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
  497. val & ~(1 << 11));
  498. }
  499. spin_unlock_irqrestore(&priv->lock, flags);
  500. if (priv->eeprom.calib_version < EEPROM_TX_POWER_VERSION_NEW) {
  501. IWL_ERROR("Older EEPROM detected! Aborting.\n");
  502. return -EINVAL;
  503. }
  504. pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
  505. /* disable L1 entry -- workaround for pre-B1 */
  506. pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);
  507. spin_lock_irqsave(&priv->lock, flags);
  508. /* set CSR_HW_CONFIG_REG for uCode use */
  509. iwl4965_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  510. CSR49_HW_IF_CONFIG_REG_BIT_4965_R |
  511. CSR49_HW_IF_CONFIG_REG_BIT_RADIO_SI |
  512. CSR49_HW_IF_CONFIG_REG_BIT_MAC_SI);
  513. rc = iwl4965_grab_nic_access(priv);
  514. if (rc < 0) {
  515. spin_unlock_irqrestore(&priv->lock, flags);
  516. IWL_DEBUG_INFO("Failed to init the card\n");
  517. return rc;
  518. }
  519. iwl4965_read_prph(priv, APMG_PS_CTRL_REG);
  520. iwl4965_set_bits_prph(priv, APMG_PS_CTRL_REG,
  521. APMG_PS_CTRL_VAL_RESET_REQ);
  522. udelay(5);
  523. iwl4965_clear_bits_prph(priv, APMG_PS_CTRL_REG,
  524. APMG_PS_CTRL_VAL_RESET_REQ);
  525. iwl4965_release_nic_access(priv);
  526. spin_unlock_irqrestore(&priv->lock, flags);
  527. iwl4965_hw_card_show_info(priv);
  528. /* end nic_init */
  529. /* Allocate the RX queue, or reset if it is already allocated */
  530. if (!rxq->bd) {
  531. rc = iwl4965_rx_queue_alloc(priv);
  532. if (rc) {
  533. IWL_ERROR("Unable to initialize Rx queue\n");
  534. return -ENOMEM;
  535. }
  536. } else
  537. iwl4965_rx_queue_reset(priv, rxq);
  538. iwl4965_rx_replenish(priv);
  539. iwl4965_rx_init(priv, rxq);
  540. spin_lock_irqsave(&priv->lock, flags);
  541. rxq->need_update = 1;
  542. iwl4965_rx_queue_update_write_ptr(priv, rxq);
  543. spin_unlock_irqrestore(&priv->lock, flags);
  544. /* Allocate and init all Tx and Command queues */
  545. rc = iwl4965_txq_ctx_reset(priv);
  546. if (rc)
  547. return rc;
  548. if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
  549. IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
  550. if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
  551. IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
  552. set_bit(STATUS_INIT, &priv->status);
  553. return 0;
  554. }
  555. int iwl4965_hw_nic_stop_master(struct iwl4965_priv *priv)
  556. {
  557. int rc = 0;
  558. u32 reg_val;
  559. unsigned long flags;
  560. spin_lock_irqsave(&priv->lock, flags);
  561. /* set stop master bit */
  562. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  563. reg_val = iwl4965_read32(priv, CSR_GP_CNTRL);
  564. if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
  565. (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
  566. IWL_DEBUG_INFO("Card in power save, master is already "
  567. "stopped\n");
  568. else {
  569. rc = iwl4965_poll_bit(priv, CSR_RESET,
  570. CSR_RESET_REG_FLAG_MASTER_DISABLED,
  571. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  572. if (rc < 0) {
  573. spin_unlock_irqrestore(&priv->lock, flags);
  574. return rc;
  575. }
  576. }
  577. spin_unlock_irqrestore(&priv->lock, flags);
  578. IWL_DEBUG_INFO("stop master\n");
  579. return rc;
  580. }
  581. /**
  582. * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
  583. */
  584. void iwl4965_hw_txq_ctx_stop(struct iwl4965_priv *priv)
  585. {
  586. int txq_id;
  587. unsigned long flags;
  588. /* Stop each Tx DMA channel, and wait for it to be idle */
  589. for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
  590. spin_lock_irqsave(&priv->lock, flags);
  591. if (iwl4965_grab_nic_access(priv)) {
  592. spin_unlock_irqrestore(&priv->lock, flags);
  593. continue;
  594. }
  595. iwl4965_write_direct32(priv,
  596. IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
  597. 0x0);
  598. iwl4965_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG,
  599. IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
  600. (txq_id), 200);
  601. iwl4965_release_nic_access(priv);
  602. spin_unlock_irqrestore(&priv->lock, flags);
  603. }
  604. /* Deallocate memory for all Tx queues */
  605. iwl4965_hw_txq_ctx_free(priv);
  606. }
  607. int iwl4965_hw_nic_reset(struct iwl4965_priv *priv)
  608. {
  609. int rc = 0;
  610. unsigned long flags;
  611. iwl4965_hw_nic_stop_master(priv);
  612. spin_lock_irqsave(&priv->lock, flags);
  613. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  614. udelay(10);
  615. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  616. rc = iwl4965_poll_bit(priv, CSR_RESET,
  617. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  618. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
  619. udelay(10);
  620. rc = iwl4965_grab_nic_access(priv);
  621. if (!rc) {
  622. iwl4965_write_prph(priv, APMG_CLK_EN_REG,
  623. APMG_CLK_VAL_DMA_CLK_RQT |
  624. APMG_CLK_VAL_BSM_CLK_RQT);
  625. udelay(10);
  626. iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  627. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  628. iwl4965_release_nic_access(priv);
  629. }
  630. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  631. wake_up_interruptible(&priv->wait_command_queue);
  632. spin_unlock_irqrestore(&priv->lock, flags);
  633. return rc;
  634. }
  635. #define REG_RECALIB_PERIOD (60)
  636. /**
  637. * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
  638. *
  639. * This callback is provided in order to queue the statistics_work
  640. * in work_queue context (v. softirq)
  641. *
  642. * This timer function is continually reset to execute within
  643. * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
  644. * was received. We need to ensure we receive the statistics in order
  645. * to update the temperature used for calibrating the TXPOWER. However,
  646. * we can't send the statistics command from softirq context (which
  647. * is the context which timers run at) so we have to queue off the
  648. * statistics_work to actually send the command to the hardware.
  649. */
  650. static void iwl4965_bg_statistics_periodic(unsigned long data)
  651. {
  652. struct iwl4965_priv *priv = (struct iwl4965_priv *)data;
  653. queue_work(priv->workqueue, &priv->statistics_work);
  654. }
  655. /**
  656. * iwl4965_bg_statistics_work - Send the statistics request to the hardware.
  657. *
  658. * This is queued by iwl4965_bg_statistics_periodic.
  659. */
  660. static void iwl4965_bg_statistics_work(struct work_struct *work)
  661. {
  662. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
  663. statistics_work);
  664. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  665. return;
  666. mutex_lock(&priv->mutex);
  667. iwl4965_send_statistics_request(priv);
  668. mutex_unlock(&priv->mutex);
  669. }
  670. #define CT_LIMIT_CONST 259
  671. #define TM_CT_KILL_THRESHOLD 110
  672. void iwl4965_rf_kill_ct_config(struct iwl4965_priv *priv)
  673. {
  674. struct iwl4965_ct_kill_config cmd;
  675. u32 R1, R2, R3;
  676. u32 temp_th;
  677. u32 crit_temperature;
  678. unsigned long flags;
  679. int rc = 0;
  680. spin_lock_irqsave(&priv->lock, flags);
  681. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  682. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  683. spin_unlock_irqrestore(&priv->lock, flags);
  684. if (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK) {
  685. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
  686. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
  687. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
  688. } else {
  689. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
  690. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
  691. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
  692. }
  693. temp_th = CELSIUS_TO_KELVIN(TM_CT_KILL_THRESHOLD);
  694. crit_temperature = ((temp_th * (R3-R1))/CT_LIMIT_CONST) + R2;
  695. cmd.critical_temperature_R = cpu_to_le32(crit_temperature);
  696. rc = iwl4965_send_cmd_pdu(priv,
  697. REPLY_CT_KILL_CONFIG_CMD, sizeof(cmd), &cmd);
  698. if (rc)
  699. IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
  700. else
  701. IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded\n");
  702. }
  703. #ifdef CONFIG_IWL4965_SENSITIVITY
  704. /* "false alarms" are signals that our DSP tries to lock onto,
  705. * but then determines that they are either noise, or transmissions
  706. * from a distant wireless network (also "noise", really) that get
  707. * "stepped on" by stronger transmissions within our own network.
  708. * This algorithm attempts to set a sensitivity level that is high
  709. * enough to receive all of our own network traffic, but not so
  710. * high that our DSP gets too busy trying to lock onto non-network
  711. * activity/noise. */
  712. static int iwl4965_sens_energy_cck(struct iwl4965_priv *priv,
  713. u32 norm_fa,
  714. u32 rx_enable_time,
  715. struct statistics_general_data *rx_info)
  716. {
  717. u32 max_nrg_cck = 0;
  718. int i = 0;
  719. u8 max_silence_rssi = 0;
  720. u32 silence_ref = 0;
  721. u8 silence_rssi_a = 0;
  722. u8 silence_rssi_b = 0;
  723. u8 silence_rssi_c = 0;
  724. u32 val;
  725. /* "false_alarms" values below are cross-multiplications to assess the
  726. * numbers of false alarms within the measured period of actual Rx
  727. * (Rx is off when we're txing), vs the min/max expected false alarms
  728. * (some should be expected if rx is sensitive enough) in a
  729. * hypothetical listening period of 200 time units (TU), 204.8 msec:
  730. *
  731. * MIN_FA/fixed-time < false_alarms/actual-rx-time < MAX_FA/beacon-time
  732. *
  733. * */
  734. u32 false_alarms = norm_fa * 200 * 1024;
  735. u32 max_false_alarms = MAX_FA_CCK * rx_enable_time;
  736. u32 min_false_alarms = MIN_FA_CCK * rx_enable_time;
  737. struct iwl4965_sensitivity_data *data = NULL;
  738. data = &(priv->sensitivity_data);
  739. data->nrg_auto_corr_silence_diff = 0;
  740. /* Find max silence rssi among all 3 receivers.
  741. * This is background noise, which may include transmissions from other
  742. * networks, measured during silence before our network's beacon */
  743. silence_rssi_a = (u8)((rx_info->beacon_silence_rssi_a &
  744. ALL_BAND_FILTER) >> 8);
  745. silence_rssi_b = (u8)((rx_info->beacon_silence_rssi_b &
  746. ALL_BAND_FILTER) >> 8);
  747. silence_rssi_c = (u8)((rx_info->beacon_silence_rssi_c &
  748. ALL_BAND_FILTER) >> 8);
  749. val = max(silence_rssi_b, silence_rssi_c);
  750. max_silence_rssi = max(silence_rssi_a, (u8) val);
  751. /* Store silence rssi in 20-beacon history table */
  752. data->nrg_silence_rssi[data->nrg_silence_idx] = max_silence_rssi;
  753. data->nrg_silence_idx++;
  754. if (data->nrg_silence_idx >= NRG_NUM_PREV_STAT_L)
  755. data->nrg_silence_idx = 0;
  756. /* Find max silence rssi across 20 beacon history */
  757. for (i = 0; i < NRG_NUM_PREV_STAT_L; i++) {
  758. val = data->nrg_silence_rssi[i];
  759. silence_ref = max(silence_ref, val);
  760. }
  761. IWL_DEBUG_CALIB("silence a %u, b %u, c %u, 20-bcn max %u\n",
  762. silence_rssi_a, silence_rssi_b, silence_rssi_c,
  763. silence_ref);
  764. /* Find max rx energy (min value!) among all 3 receivers,
  765. * measured during beacon frame.
  766. * Save it in 10-beacon history table. */
  767. i = data->nrg_energy_idx;
  768. val = min(rx_info->beacon_energy_b, rx_info->beacon_energy_c);
  769. data->nrg_value[i] = min(rx_info->beacon_energy_a, val);
  770. data->nrg_energy_idx++;
  771. if (data->nrg_energy_idx >= 10)
  772. data->nrg_energy_idx = 0;
  773. /* Find min rx energy (max value) across 10 beacon history.
  774. * This is the minimum signal level that we want to receive well.
  775. * Add backoff (margin so we don't miss slightly lower energy frames).
  776. * This establishes an upper bound (min value) for energy threshold. */
  777. max_nrg_cck = data->nrg_value[0];
  778. for (i = 1; i < 10; i++)
  779. max_nrg_cck = (u32) max(max_nrg_cck, (data->nrg_value[i]));
  780. max_nrg_cck += 6;
  781. IWL_DEBUG_CALIB("rx energy a %u, b %u, c %u, 10-bcn max/min %u\n",
  782. rx_info->beacon_energy_a, rx_info->beacon_energy_b,
  783. rx_info->beacon_energy_c, max_nrg_cck - 6);
  784. /* Count number of consecutive beacons with fewer-than-desired
  785. * false alarms. */
  786. if (false_alarms < min_false_alarms)
  787. data->num_in_cck_no_fa++;
  788. else
  789. data->num_in_cck_no_fa = 0;
  790. IWL_DEBUG_CALIB("consecutive bcns with few false alarms = %u\n",
  791. data->num_in_cck_no_fa);
  792. /* If we got too many false alarms this time, reduce sensitivity */
  793. if (false_alarms > max_false_alarms) {
  794. IWL_DEBUG_CALIB("norm FA %u > max FA %u\n",
  795. false_alarms, max_false_alarms);
  796. IWL_DEBUG_CALIB("... reducing sensitivity\n");
  797. data->nrg_curr_state = IWL_FA_TOO_MANY;
  798. if (data->auto_corr_cck > AUTO_CORR_MAX_TH_CCK) {
  799. /* Store for "fewer than desired" on later beacon */
  800. data->nrg_silence_ref = silence_ref;
  801. /* increase energy threshold (reduce nrg value)
  802. * to decrease sensitivity */
  803. if (data->nrg_th_cck > (NRG_MAX_CCK + NRG_STEP_CCK))
  804. data->nrg_th_cck = data->nrg_th_cck
  805. - NRG_STEP_CCK;
  806. }
  807. /* increase auto_corr values to decrease sensitivity */
  808. if (data->auto_corr_cck < AUTO_CORR_MAX_TH_CCK)
  809. data->auto_corr_cck = AUTO_CORR_MAX_TH_CCK + 1;
  810. else {
  811. val = data->auto_corr_cck + AUTO_CORR_STEP_CCK;
  812. data->auto_corr_cck = min((u32)AUTO_CORR_MAX_CCK, val);
  813. }
  814. val = data->auto_corr_cck_mrc + AUTO_CORR_STEP_CCK;
  815. data->auto_corr_cck_mrc = min((u32)AUTO_CORR_MAX_CCK_MRC, val);
  816. /* Else if we got fewer than desired, increase sensitivity */
  817. } else if (false_alarms < min_false_alarms) {
  818. data->nrg_curr_state = IWL_FA_TOO_FEW;
  819. /* Compare silence level with silence level for most recent
  820. * healthy number or too many false alarms */
  821. data->nrg_auto_corr_silence_diff = (s32)data->nrg_silence_ref -
  822. (s32)silence_ref;
  823. IWL_DEBUG_CALIB("norm FA %u < min FA %u, silence diff %d\n",
  824. false_alarms, min_false_alarms,
  825. data->nrg_auto_corr_silence_diff);
  826. /* Increase value to increase sensitivity, but only if:
  827. * 1a) previous beacon did *not* have *too many* false alarms
  828. * 1b) AND there's a significant difference in Rx levels
  829. * from a previous beacon with too many, or healthy # FAs
  830. * OR 2) We've seen a lot of beacons (100) with too few
  831. * false alarms */
  832. if ((data->nrg_prev_state != IWL_FA_TOO_MANY) &&
  833. ((data->nrg_auto_corr_silence_diff > NRG_DIFF) ||
  834. (data->num_in_cck_no_fa > MAX_NUMBER_CCK_NO_FA))) {
  835. IWL_DEBUG_CALIB("... increasing sensitivity\n");
  836. /* Increase nrg value to increase sensitivity */
  837. val = data->nrg_th_cck + NRG_STEP_CCK;
  838. data->nrg_th_cck = min((u32)NRG_MIN_CCK, val);
  839. /* Decrease auto_corr values to increase sensitivity */
  840. val = data->auto_corr_cck - AUTO_CORR_STEP_CCK;
  841. data->auto_corr_cck = max((u32)AUTO_CORR_MIN_CCK, val);
  842. val = data->auto_corr_cck_mrc - AUTO_CORR_STEP_CCK;
  843. data->auto_corr_cck_mrc =
  844. max((u32)AUTO_CORR_MIN_CCK_MRC, val);
  845. } else
  846. IWL_DEBUG_CALIB("... but not changing sensitivity\n");
  847. /* Else we got a healthy number of false alarms, keep status quo */
  848. } else {
  849. IWL_DEBUG_CALIB(" FA in safe zone\n");
  850. data->nrg_curr_state = IWL_FA_GOOD_RANGE;
  851. /* Store for use in "fewer than desired" with later beacon */
  852. data->nrg_silence_ref = silence_ref;
  853. /* If previous beacon had too many false alarms,
  854. * give it some extra margin by reducing sensitivity again
  855. * (but don't go below measured energy of desired Rx) */
  856. if (IWL_FA_TOO_MANY == data->nrg_prev_state) {
  857. IWL_DEBUG_CALIB("... increasing margin\n");
  858. data->nrg_th_cck -= NRG_MARGIN;
  859. }
  860. }
  861. /* Make sure the energy threshold does not go above the measured
  862. * energy of the desired Rx signals (reduced by backoff margin),
  863. * or else we might start missing Rx frames.
  864. * Lower value is higher energy, so we use max()!
  865. */
  866. data->nrg_th_cck = max(max_nrg_cck, data->nrg_th_cck);
  867. IWL_DEBUG_CALIB("new nrg_th_cck %u\n", data->nrg_th_cck);
  868. data->nrg_prev_state = data->nrg_curr_state;
  869. return 0;
  870. }
  871. static int iwl4965_sens_auto_corr_ofdm(struct iwl4965_priv *priv,
  872. u32 norm_fa,
  873. u32 rx_enable_time)
  874. {
  875. u32 val;
  876. u32 false_alarms = norm_fa * 200 * 1024;
  877. u32 max_false_alarms = MAX_FA_OFDM * rx_enable_time;
  878. u32 min_false_alarms = MIN_FA_OFDM * rx_enable_time;
  879. struct iwl4965_sensitivity_data *data = NULL;
  880. data = &(priv->sensitivity_data);
  881. /* If we got too many false alarms this time, reduce sensitivity */
  882. if (false_alarms > max_false_alarms) {
  883. IWL_DEBUG_CALIB("norm FA %u > max FA %u)\n",
  884. false_alarms, max_false_alarms);
  885. val = data->auto_corr_ofdm + AUTO_CORR_STEP_OFDM;
  886. data->auto_corr_ofdm =
  887. min((u32)AUTO_CORR_MAX_OFDM, val);
  888. val = data->auto_corr_ofdm_mrc + AUTO_CORR_STEP_OFDM;
  889. data->auto_corr_ofdm_mrc =
  890. min((u32)AUTO_CORR_MAX_OFDM_MRC, val);
  891. val = data->auto_corr_ofdm_x1 + AUTO_CORR_STEP_OFDM;
  892. data->auto_corr_ofdm_x1 =
  893. min((u32)AUTO_CORR_MAX_OFDM_X1, val);
  894. val = data->auto_corr_ofdm_mrc_x1 + AUTO_CORR_STEP_OFDM;
  895. data->auto_corr_ofdm_mrc_x1 =
  896. min((u32)AUTO_CORR_MAX_OFDM_MRC_X1, val);
  897. }
  898. /* Else if we got fewer than desired, increase sensitivity */
  899. else if (false_alarms < min_false_alarms) {
  900. IWL_DEBUG_CALIB("norm FA %u < min FA %u\n",
  901. false_alarms, min_false_alarms);
  902. val = data->auto_corr_ofdm - AUTO_CORR_STEP_OFDM;
  903. data->auto_corr_ofdm =
  904. max((u32)AUTO_CORR_MIN_OFDM, val);
  905. val = data->auto_corr_ofdm_mrc - AUTO_CORR_STEP_OFDM;
  906. data->auto_corr_ofdm_mrc =
  907. max((u32)AUTO_CORR_MIN_OFDM_MRC, val);
  908. val = data->auto_corr_ofdm_x1 - AUTO_CORR_STEP_OFDM;
  909. data->auto_corr_ofdm_x1 =
  910. max((u32)AUTO_CORR_MIN_OFDM_X1, val);
  911. val = data->auto_corr_ofdm_mrc_x1 - AUTO_CORR_STEP_OFDM;
  912. data->auto_corr_ofdm_mrc_x1 =
  913. max((u32)AUTO_CORR_MIN_OFDM_MRC_X1, val);
  914. }
  915. else
  916. IWL_DEBUG_CALIB("min FA %u < norm FA %u < max FA %u OK\n",
  917. min_false_alarms, false_alarms, max_false_alarms);
  918. return 0;
  919. }
  920. static int iwl4965_sensitivity_callback(struct iwl4965_priv *priv,
  921. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  922. {
  923. /* We didn't cache the SKB; let the caller free it */
  924. return 1;
  925. }
  926. /* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */
  927. static int iwl4965_sensitivity_write(struct iwl4965_priv *priv, u8 flags)
  928. {
  929. int rc = 0;
  930. struct iwl4965_sensitivity_cmd cmd ;
  931. struct iwl4965_sensitivity_data *data = NULL;
  932. struct iwl4965_host_cmd cmd_out = {
  933. .id = SENSITIVITY_CMD,
  934. .len = sizeof(struct iwl4965_sensitivity_cmd),
  935. .meta.flags = flags,
  936. .data = &cmd,
  937. };
  938. data = &(priv->sensitivity_data);
  939. memset(&cmd, 0, sizeof(cmd));
  940. cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX] =
  941. cpu_to_le16((u16)data->auto_corr_ofdm);
  942. cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX] =
  943. cpu_to_le16((u16)data->auto_corr_ofdm_mrc);
  944. cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX] =
  945. cpu_to_le16((u16)data->auto_corr_ofdm_x1);
  946. cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX] =
  947. cpu_to_le16((u16)data->auto_corr_ofdm_mrc_x1);
  948. cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX] =
  949. cpu_to_le16((u16)data->auto_corr_cck);
  950. cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX] =
  951. cpu_to_le16((u16)data->auto_corr_cck_mrc);
  952. cmd.table[HD_MIN_ENERGY_CCK_DET_INDEX] =
  953. cpu_to_le16((u16)data->nrg_th_cck);
  954. cmd.table[HD_MIN_ENERGY_OFDM_DET_INDEX] =
  955. cpu_to_le16((u16)data->nrg_th_ofdm);
  956. cmd.table[HD_BARKER_CORR_TH_ADD_MIN_INDEX] =
  957. __constant_cpu_to_le16(190);
  958. cmd.table[HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX] =
  959. __constant_cpu_to_le16(390);
  960. cmd.table[HD_OFDM_ENERGY_TH_IN_INDEX] =
  961. __constant_cpu_to_le16(62);
  962. IWL_DEBUG_CALIB("ofdm: ac %u mrc %u x1 %u mrc_x1 %u thresh %u\n",
  963. data->auto_corr_ofdm, data->auto_corr_ofdm_mrc,
  964. data->auto_corr_ofdm_x1, data->auto_corr_ofdm_mrc_x1,
  965. data->nrg_th_ofdm);
  966. IWL_DEBUG_CALIB("cck: ac %u mrc %u thresh %u\n",
  967. data->auto_corr_cck, data->auto_corr_cck_mrc,
  968. data->nrg_th_cck);
  969. /* Update uCode's "work" table, and copy it to DSP */
  970. cmd.control = SENSITIVITY_CMD_CONTROL_WORK_TABLE;
  971. if (flags & CMD_ASYNC)
  972. cmd_out.meta.u.callback = iwl4965_sensitivity_callback;
  973. /* Don't send command to uCode if nothing has changed */
  974. if (!memcmp(&cmd.table[0], &(priv->sensitivity_tbl[0]),
  975. sizeof(u16)*HD_TABLE_SIZE)) {
  976. IWL_DEBUG_CALIB("No change in SENSITIVITY_CMD\n");
  977. return 0;
  978. }
  979. /* Copy table for comparison next time */
  980. memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]),
  981. sizeof(u16)*HD_TABLE_SIZE);
  982. rc = iwl4965_send_cmd(priv, &cmd_out);
  983. if (!rc) {
  984. IWL_DEBUG_CALIB("SENSITIVITY_CMD succeeded\n");
  985. return rc;
  986. }
  987. return 0;
  988. }
  989. void iwl4965_init_sensitivity(struct iwl4965_priv *priv, u8 flags, u8 force)
  990. {
  991. int rc = 0;
  992. int i;
  993. struct iwl4965_sensitivity_data *data = NULL;
  994. IWL_DEBUG_CALIB("Start iwl4965_init_sensitivity\n");
  995. if (force)
  996. memset(&(priv->sensitivity_tbl[0]), 0,
  997. sizeof(u16)*HD_TABLE_SIZE);
  998. /* Clear driver's sensitivity algo data */
  999. data = &(priv->sensitivity_data);
  1000. memset(data, 0, sizeof(struct iwl4965_sensitivity_data));
  1001. data->num_in_cck_no_fa = 0;
  1002. data->nrg_curr_state = IWL_FA_TOO_MANY;
  1003. data->nrg_prev_state = IWL_FA_TOO_MANY;
  1004. data->nrg_silence_ref = 0;
  1005. data->nrg_silence_idx = 0;
  1006. data->nrg_energy_idx = 0;
  1007. for (i = 0; i < 10; i++)
  1008. data->nrg_value[i] = 0;
  1009. for (i = 0; i < NRG_NUM_PREV_STAT_L; i++)
  1010. data->nrg_silence_rssi[i] = 0;
  1011. data->auto_corr_ofdm = 90;
  1012. data->auto_corr_ofdm_mrc = 170;
  1013. data->auto_corr_ofdm_x1 = 105;
  1014. data->auto_corr_ofdm_mrc_x1 = 220;
  1015. data->auto_corr_cck = AUTO_CORR_CCK_MIN_VAL_DEF;
  1016. data->auto_corr_cck_mrc = 200;
  1017. data->nrg_th_cck = 100;
  1018. data->nrg_th_ofdm = 100;
  1019. data->last_bad_plcp_cnt_ofdm = 0;
  1020. data->last_fa_cnt_ofdm = 0;
  1021. data->last_bad_plcp_cnt_cck = 0;
  1022. data->last_fa_cnt_cck = 0;
  1023. /* Clear prior Sensitivity command data to force send to uCode */
  1024. if (force)
  1025. memset(&(priv->sensitivity_tbl[0]), 0,
  1026. sizeof(u16)*HD_TABLE_SIZE);
  1027. rc |= iwl4965_sensitivity_write(priv, flags);
  1028. IWL_DEBUG_CALIB("<<return 0x%X\n", rc);
  1029. return;
  1030. }
  1031. /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
  1032. * Called after every association, but this runs only once!
  1033. * ... once chain noise is calibrated the first time, it's good forever. */
  1034. void iwl4965_chain_noise_reset(struct iwl4965_priv *priv)
  1035. {
  1036. struct iwl4965_chain_noise_data *data = NULL;
  1037. int rc = 0;
  1038. data = &(priv->chain_noise_data);
  1039. if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl4965_is_associated(priv)) {
  1040. struct iwl4965_calibration_cmd cmd;
  1041. memset(&cmd, 0, sizeof(cmd));
  1042. cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
  1043. cmd.diff_gain_a = 0;
  1044. cmd.diff_gain_b = 0;
  1045. cmd.diff_gain_c = 0;
  1046. rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
  1047. sizeof(cmd), &cmd);
  1048. msleep(4);
  1049. data->state = IWL_CHAIN_NOISE_ACCUMULATE;
  1050. IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
  1051. }
  1052. return;
  1053. }
  1054. /*
  1055. * Accumulate 20 beacons of signal and noise statistics for each of
  1056. * 3 receivers/antennas/rx-chains, then figure out:
  1057. * 1) Which antennas are connected.
  1058. * 2) Differential rx gain settings to balance the 3 receivers.
  1059. */
  1060. static void iwl4965_noise_calibration(struct iwl4965_priv *priv,
  1061. struct iwl4965_notif_statistics *stat_resp)
  1062. {
  1063. struct iwl4965_chain_noise_data *data = NULL;
  1064. int rc = 0;
  1065. u32 chain_noise_a;
  1066. u32 chain_noise_b;
  1067. u32 chain_noise_c;
  1068. u32 chain_sig_a;
  1069. u32 chain_sig_b;
  1070. u32 chain_sig_c;
  1071. u32 average_sig[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
  1072. u32 average_noise[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
  1073. u32 max_average_sig;
  1074. u16 max_average_sig_antenna_i;
  1075. u32 min_average_noise = MIN_AVERAGE_NOISE_MAX_VALUE;
  1076. u16 min_average_noise_antenna_i = INITIALIZATION_VALUE;
  1077. u16 i = 0;
  1078. u16 chan_num = INITIALIZATION_VALUE;
  1079. u32 band = INITIALIZATION_VALUE;
  1080. u32 active_chains = 0;
  1081. unsigned long flags;
  1082. struct statistics_rx_non_phy *rx_info = &(stat_resp->rx.general);
  1083. data = &(priv->chain_noise_data);
  1084. /* Accumulate just the first 20 beacons after the first association,
  1085. * then we're done forever. */
  1086. if (data->state != IWL_CHAIN_NOISE_ACCUMULATE) {
  1087. if (data->state == IWL_CHAIN_NOISE_ALIVE)
  1088. IWL_DEBUG_CALIB("Wait for noise calib reset\n");
  1089. return;
  1090. }
  1091. spin_lock_irqsave(&priv->lock, flags);
  1092. if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
  1093. IWL_DEBUG_CALIB(" << Interference data unavailable\n");
  1094. spin_unlock_irqrestore(&priv->lock, flags);
  1095. return;
  1096. }
  1097. band = (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) ? 0 : 1;
  1098. chan_num = le16_to_cpu(priv->staging_rxon.channel);
  1099. /* Make sure we accumulate data for just the associated channel
  1100. * (even if scanning). */
  1101. if ((chan_num != (le32_to_cpu(stat_resp->flag) >> 16)) ||
  1102. ((STATISTICS_REPLY_FLG_BAND_24G_MSK ==
  1103. (stat_resp->flag & STATISTICS_REPLY_FLG_BAND_24G_MSK)) && band)) {
  1104. IWL_DEBUG_CALIB("Stats not from chan=%d, band=%d\n",
  1105. chan_num, band);
  1106. spin_unlock_irqrestore(&priv->lock, flags);
  1107. return;
  1108. }
  1109. /* Accumulate beacon statistics values across 20 beacons */
  1110. chain_noise_a = le32_to_cpu(rx_info->beacon_silence_rssi_a) &
  1111. IN_BAND_FILTER;
  1112. chain_noise_b = le32_to_cpu(rx_info->beacon_silence_rssi_b) &
  1113. IN_BAND_FILTER;
  1114. chain_noise_c = le32_to_cpu(rx_info->beacon_silence_rssi_c) &
  1115. IN_BAND_FILTER;
  1116. chain_sig_a = le32_to_cpu(rx_info->beacon_rssi_a) & IN_BAND_FILTER;
  1117. chain_sig_b = le32_to_cpu(rx_info->beacon_rssi_b) & IN_BAND_FILTER;
  1118. chain_sig_c = le32_to_cpu(rx_info->beacon_rssi_c) & IN_BAND_FILTER;
  1119. spin_unlock_irqrestore(&priv->lock, flags);
  1120. data->beacon_count++;
  1121. data->chain_noise_a = (chain_noise_a + data->chain_noise_a);
  1122. data->chain_noise_b = (chain_noise_b + data->chain_noise_b);
  1123. data->chain_noise_c = (chain_noise_c + data->chain_noise_c);
  1124. data->chain_signal_a = (chain_sig_a + data->chain_signal_a);
  1125. data->chain_signal_b = (chain_sig_b + data->chain_signal_b);
  1126. data->chain_signal_c = (chain_sig_c + data->chain_signal_c);
  1127. IWL_DEBUG_CALIB("chan=%d, band=%d, beacon=%d\n", chan_num, band,
  1128. data->beacon_count);
  1129. IWL_DEBUG_CALIB("chain_sig: a %d b %d c %d\n",
  1130. chain_sig_a, chain_sig_b, chain_sig_c);
  1131. IWL_DEBUG_CALIB("chain_noise: a %d b %d c %d\n",
  1132. chain_noise_a, chain_noise_b, chain_noise_c);
  1133. /* If this is the 20th beacon, determine:
  1134. * 1) Disconnected antennas (using signal strengths)
  1135. * 2) Differential gain (using silence noise) to balance receivers */
  1136. if (data->beacon_count == CAL_NUM_OF_BEACONS) {
  1137. /* Analyze signal for disconnected antenna */
  1138. average_sig[0] = (data->chain_signal_a) / CAL_NUM_OF_BEACONS;
  1139. average_sig[1] = (data->chain_signal_b) / CAL_NUM_OF_BEACONS;
  1140. average_sig[2] = (data->chain_signal_c) / CAL_NUM_OF_BEACONS;
  1141. if (average_sig[0] >= average_sig[1]) {
  1142. max_average_sig = average_sig[0];
  1143. max_average_sig_antenna_i = 0;
  1144. active_chains = (1 << max_average_sig_antenna_i);
  1145. } else {
  1146. max_average_sig = average_sig[1];
  1147. max_average_sig_antenna_i = 1;
  1148. active_chains = (1 << max_average_sig_antenna_i);
  1149. }
  1150. if (average_sig[2] >= max_average_sig) {
  1151. max_average_sig = average_sig[2];
  1152. max_average_sig_antenna_i = 2;
  1153. active_chains = (1 << max_average_sig_antenna_i);
  1154. }
  1155. IWL_DEBUG_CALIB("average_sig: a %d b %d c %d\n",
  1156. average_sig[0], average_sig[1], average_sig[2]);
  1157. IWL_DEBUG_CALIB("max_average_sig = %d, antenna %d\n",
  1158. max_average_sig, max_average_sig_antenna_i);
  1159. /* Compare signal strengths for all 3 receivers. */
  1160. for (i = 0; i < NUM_RX_CHAINS; i++) {
  1161. if (i != max_average_sig_antenna_i) {
  1162. s32 rssi_delta = (max_average_sig -
  1163. average_sig[i]);
  1164. /* If signal is very weak, compared with
  1165. * strongest, mark it as disconnected. */
  1166. if (rssi_delta > MAXIMUM_ALLOWED_PATHLOSS)
  1167. data->disconn_array[i] = 1;
  1168. else
  1169. active_chains |= (1 << i);
  1170. IWL_DEBUG_CALIB("i = %d rssiDelta = %d "
  1171. "disconn_array[i] = %d\n",
  1172. i, rssi_delta, data->disconn_array[i]);
  1173. }
  1174. }
  1175. /*If both chains A & B are disconnected -
  1176. * connect B and leave A as is */
  1177. if (data->disconn_array[CHAIN_A] &&
  1178. data->disconn_array[CHAIN_B]) {
  1179. data->disconn_array[CHAIN_B] = 0;
  1180. active_chains |= (1 << CHAIN_B);
  1181. IWL_DEBUG_CALIB("both A & B chains are disconnected! "
  1182. "W/A - declare B as connected\n");
  1183. }
  1184. IWL_DEBUG_CALIB("active_chains (bitwise) = 0x%x\n",
  1185. active_chains);
  1186. /* Save for use within RXON, TX, SCAN commands, etc. */
  1187. priv->valid_antenna = active_chains;
  1188. /* Analyze noise for rx balance */
  1189. average_noise[0] = ((data->chain_noise_a)/CAL_NUM_OF_BEACONS);
  1190. average_noise[1] = ((data->chain_noise_b)/CAL_NUM_OF_BEACONS);
  1191. average_noise[2] = ((data->chain_noise_c)/CAL_NUM_OF_BEACONS);
  1192. for (i = 0; i < NUM_RX_CHAINS; i++) {
  1193. if (!(data->disconn_array[i]) &&
  1194. (average_noise[i] <= min_average_noise)) {
  1195. /* This means that chain i is active and has
  1196. * lower noise values so far: */
  1197. min_average_noise = average_noise[i];
  1198. min_average_noise_antenna_i = i;
  1199. }
  1200. }
  1201. data->delta_gain_code[min_average_noise_antenna_i] = 0;
  1202. IWL_DEBUG_CALIB("average_noise: a %d b %d c %d\n",
  1203. average_noise[0], average_noise[1],
  1204. average_noise[2]);
  1205. IWL_DEBUG_CALIB("min_average_noise = %d, antenna %d\n",
  1206. min_average_noise, min_average_noise_antenna_i);
  1207. for (i = 0; i < NUM_RX_CHAINS; i++) {
  1208. s32 delta_g = 0;
  1209. if (!(data->disconn_array[i]) &&
  1210. (data->delta_gain_code[i] ==
  1211. CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
  1212. delta_g = average_noise[i] - min_average_noise;
  1213. data->delta_gain_code[i] = (u8)((delta_g *
  1214. 10) / 15);
  1215. if (CHAIN_NOISE_MAX_DELTA_GAIN_CODE <
  1216. data->delta_gain_code[i])
  1217. data->delta_gain_code[i] =
  1218. CHAIN_NOISE_MAX_DELTA_GAIN_CODE;
  1219. data->delta_gain_code[i] =
  1220. (data->delta_gain_code[i] | (1 << 2));
  1221. } else
  1222. data->delta_gain_code[i] = 0;
  1223. }
  1224. IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
  1225. data->delta_gain_code[0],
  1226. data->delta_gain_code[1],
  1227. data->delta_gain_code[2]);
  1228. /* Differential gain gets sent to uCode only once */
  1229. if (!data->radio_write) {
  1230. struct iwl4965_calibration_cmd cmd;
  1231. data->radio_write = 1;
  1232. memset(&cmd, 0, sizeof(cmd));
  1233. cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
  1234. cmd.diff_gain_a = data->delta_gain_code[0];
  1235. cmd.diff_gain_b = data->delta_gain_code[1];
  1236. cmd.diff_gain_c = data->delta_gain_code[2];
  1237. rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
  1238. sizeof(cmd), &cmd);
  1239. if (rc)
  1240. IWL_DEBUG_CALIB("fail sending cmd "
  1241. "REPLY_PHY_CALIBRATION_CMD \n");
  1242. /* TODO we might want recalculate
  1243. * rx_chain in rxon cmd */
  1244. /* Mark so we run this algo only once! */
  1245. data->state = IWL_CHAIN_NOISE_CALIBRATED;
  1246. }
  1247. data->chain_noise_a = 0;
  1248. data->chain_noise_b = 0;
  1249. data->chain_noise_c = 0;
  1250. data->chain_signal_a = 0;
  1251. data->chain_signal_b = 0;
  1252. data->chain_signal_c = 0;
  1253. data->beacon_count = 0;
  1254. }
  1255. return;
  1256. }
  1257. static void iwl4965_sensitivity_calibration(struct iwl4965_priv *priv,
  1258. struct iwl4965_notif_statistics *resp)
  1259. {
  1260. int rc = 0;
  1261. u32 rx_enable_time;
  1262. u32 fa_cck;
  1263. u32 fa_ofdm;
  1264. u32 bad_plcp_cck;
  1265. u32 bad_plcp_ofdm;
  1266. u32 norm_fa_ofdm;
  1267. u32 norm_fa_cck;
  1268. struct iwl4965_sensitivity_data *data = NULL;
  1269. struct statistics_rx_non_phy *rx_info = &(resp->rx.general);
  1270. struct statistics_rx *statistics = &(resp->rx);
  1271. unsigned long flags;
  1272. struct statistics_general_data statis;
  1273. data = &(priv->sensitivity_data);
  1274. if (!iwl4965_is_associated(priv)) {
  1275. IWL_DEBUG_CALIB("<< - not associated\n");
  1276. return;
  1277. }
  1278. spin_lock_irqsave(&priv->lock, flags);
  1279. if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
  1280. IWL_DEBUG_CALIB("<< invalid data.\n");
  1281. spin_unlock_irqrestore(&priv->lock, flags);
  1282. return;
  1283. }
  1284. /* Extract Statistics: */
  1285. rx_enable_time = le32_to_cpu(rx_info->channel_load);
  1286. fa_cck = le32_to_cpu(statistics->cck.false_alarm_cnt);
  1287. fa_ofdm = le32_to_cpu(statistics->ofdm.false_alarm_cnt);
  1288. bad_plcp_cck = le32_to_cpu(statistics->cck.plcp_err);
  1289. bad_plcp_ofdm = le32_to_cpu(statistics->ofdm.plcp_err);
  1290. statis.beacon_silence_rssi_a =
  1291. le32_to_cpu(statistics->general.beacon_silence_rssi_a);
  1292. statis.beacon_silence_rssi_b =
  1293. le32_to_cpu(statistics->general.beacon_silence_rssi_b);
  1294. statis.beacon_silence_rssi_c =
  1295. le32_to_cpu(statistics->general.beacon_silence_rssi_c);
  1296. statis.beacon_energy_a =
  1297. le32_to_cpu(statistics->general.beacon_energy_a);
  1298. statis.beacon_energy_b =
  1299. le32_to_cpu(statistics->general.beacon_energy_b);
  1300. statis.beacon_energy_c =
  1301. le32_to_cpu(statistics->general.beacon_energy_c);
  1302. spin_unlock_irqrestore(&priv->lock, flags);
  1303. IWL_DEBUG_CALIB("rx_enable_time = %u usecs\n", rx_enable_time);
  1304. if (!rx_enable_time) {
  1305. IWL_DEBUG_CALIB("<< RX Enable Time == 0! \n");
  1306. return;
  1307. }
  1308. /* These statistics increase monotonically, and do not reset
  1309. * at each beacon. Calculate difference from last value, or just
  1310. * use the new statistics value if it has reset or wrapped around. */
  1311. if (data->last_bad_plcp_cnt_cck > bad_plcp_cck)
  1312. data->last_bad_plcp_cnt_cck = bad_plcp_cck;
  1313. else {
  1314. bad_plcp_cck -= data->last_bad_plcp_cnt_cck;
  1315. data->last_bad_plcp_cnt_cck += bad_plcp_cck;
  1316. }
  1317. if (data->last_bad_plcp_cnt_ofdm > bad_plcp_ofdm)
  1318. data->last_bad_plcp_cnt_ofdm = bad_plcp_ofdm;
  1319. else {
  1320. bad_plcp_ofdm -= data->last_bad_plcp_cnt_ofdm;
  1321. data->last_bad_plcp_cnt_ofdm += bad_plcp_ofdm;
  1322. }
  1323. if (data->last_fa_cnt_ofdm > fa_ofdm)
  1324. data->last_fa_cnt_ofdm = fa_ofdm;
  1325. else {
  1326. fa_ofdm -= data->last_fa_cnt_ofdm;
  1327. data->last_fa_cnt_ofdm += fa_ofdm;
  1328. }
  1329. if (data->last_fa_cnt_cck > fa_cck)
  1330. data->last_fa_cnt_cck = fa_cck;
  1331. else {
  1332. fa_cck -= data->last_fa_cnt_cck;
  1333. data->last_fa_cnt_cck += fa_cck;
  1334. }
  1335. /* Total aborted signal locks */
  1336. norm_fa_ofdm = fa_ofdm + bad_plcp_ofdm;
  1337. norm_fa_cck = fa_cck + bad_plcp_cck;
  1338. IWL_DEBUG_CALIB("cck: fa %u badp %u ofdm: fa %u badp %u\n", fa_cck,
  1339. bad_plcp_cck, fa_ofdm, bad_plcp_ofdm);
  1340. iwl4965_sens_auto_corr_ofdm(priv, norm_fa_ofdm, rx_enable_time);
  1341. iwl4965_sens_energy_cck(priv, norm_fa_cck, rx_enable_time, &statis);
  1342. rc |= iwl4965_sensitivity_write(priv, CMD_ASYNC);
  1343. return;
  1344. }
  1345. static void iwl4965_bg_sensitivity_work(struct work_struct *work)
  1346. {
  1347. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
  1348. sensitivity_work);
  1349. mutex_lock(&priv->mutex);
  1350. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  1351. test_bit(STATUS_SCANNING, &priv->status)) {
  1352. mutex_unlock(&priv->mutex);
  1353. return;
  1354. }
  1355. if (priv->start_calib) {
  1356. iwl4965_noise_calibration(priv, &priv->statistics);
  1357. if (priv->sensitivity_data.state ==
  1358. IWL_SENS_CALIB_NEED_REINIT) {
  1359. iwl4965_init_sensitivity(priv, CMD_ASYNC, 0);
  1360. priv->sensitivity_data.state = IWL_SENS_CALIB_ALLOWED;
  1361. } else
  1362. iwl4965_sensitivity_calibration(priv,
  1363. &priv->statistics);
  1364. }
  1365. mutex_unlock(&priv->mutex);
  1366. return;
  1367. }
  1368. #endif /*CONFIG_IWL4965_SENSITIVITY*/
  1369. static void iwl4965_bg_txpower_work(struct work_struct *work)
  1370. {
  1371. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
  1372. txpower_work);
  1373. /* If a scan happened to start before we got here
  1374. * then just return; the statistics notification will
  1375. * kick off another scheduled work to compensate for
  1376. * any temperature delta we missed here. */
  1377. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  1378. test_bit(STATUS_SCANNING, &priv->status))
  1379. return;
  1380. mutex_lock(&priv->mutex);
  1381. /* Regardless of if we are assocaited, we must reconfigure the
  1382. * TX power since frames can be sent on non-radar channels while
  1383. * not associated */
  1384. iwl4965_hw_reg_send_txpower(priv);
  1385. /* Update last_temperature to keep is_calib_needed from running
  1386. * when it isn't needed... */
  1387. priv->last_temperature = priv->temperature;
  1388. mutex_unlock(&priv->mutex);
  1389. }
  1390. /*
  1391. * Acquire priv->lock before calling this function !
  1392. */
  1393. static void iwl4965_set_wr_ptrs(struct iwl4965_priv *priv, int txq_id, u32 index)
  1394. {
  1395. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  1396. (index & 0xff) | (txq_id << 8));
  1397. iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(txq_id), index);
  1398. }
  1399. /**
  1400. * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
  1401. * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
  1402. * @scd_retry: (1) Indicates queue will be used in aggregation mode
  1403. *
  1404. * NOTE: Acquire priv->lock before calling this function !
  1405. */
  1406. static void iwl4965_tx_queue_set_status(struct iwl4965_priv *priv,
  1407. struct iwl4965_tx_queue *txq,
  1408. int tx_fifo_id, int scd_retry)
  1409. {
  1410. int txq_id = txq->q.id;
  1411. /* Find out whether to activate Tx queue */
  1412. int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
  1413. /* Set up and activate */
  1414. iwl4965_write_prph(priv, KDR_SCD_QUEUE_STATUS_BITS(txq_id),
  1415. (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) |
  1416. (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) |
  1417. (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) |
  1418. (scd_retry << SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
  1419. SCD_QUEUE_STTS_REG_MSK);
  1420. txq->sched_retry = scd_retry;
  1421. IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
  1422. active ? "Activate" : "Deactivate",
  1423. scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
  1424. }
  1425. static const u16 default_queue_to_tx_fifo[] = {
  1426. IWL_TX_FIFO_AC3,
  1427. IWL_TX_FIFO_AC2,
  1428. IWL_TX_FIFO_AC1,
  1429. IWL_TX_FIFO_AC0,
  1430. IWL_CMD_FIFO_NUM,
  1431. IWL_TX_FIFO_HCCA_1,
  1432. IWL_TX_FIFO_HCCA_2
  1433. };
  1434. static inline void iwl4965_txq_ctx_activate(struct iwl4965_priv *priv, int txq_id)
  1435. {
  1436. set_bit(txq_id, &priv->txq_ctx_active_msk);
  1437. }
  1438. static inline void iwl4965_txq_ctx_deactivate(struct iwl4965_priv *priv, int txq_id)
  1439. {
  1440. clear_bit(txq_id, &priv->txq_ctx_active_msk);
  1441. }
  1442. int iwl4965_alive_notify(struct iwl4965_priv *priv)
  1443. {
  1444. u32 a;
  1445. int i = 0;
  1446. unsigned long flags;
  1447. int rc;
  1448. spin_lock_irqsave(&priv->lock, flags);
  1449. #ifdef CONFIG_IWL4965_SENSITIVITY
  1450. memset(&(priv->sensitivity_data), 0,
  1451. sizeof(struct iwl4965_sensitivity_data));
  1452. memset(&(priv->chain_noise_data), 0,
  1453. sizeof(struct iwl4965_chain_noise_data));
  1454. for (i = 0; i < NUM_RX_CHAINS; i++)
  1455. priv->chain_noise_data.delta_gain_code[i] =
  1456. CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
  1457. #endif /* CONFIG_IWL4965_SENSITIVITY*/
  1458. rc = iwl4965_grab_nic_access(priv);
  1459. if (rc) {
  1460. spin_unlock_irqrestore(&priv->lock, flags);
  1461. return rc;
  1462. }
  1463. /* Clear 4965's internal Tx Scheduler data base */
  1464. priv->scd_base_addr = iwl4965_read_prph(priv, KDR_SCD_SRAM_BASE_ADDR);
  1465. a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET;
  1466. for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4)
  1467. iwl4965_write_targ_mem(priv, a, 0);
  1468. for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4)
  1469. iwl4965_write_targ_mem(priv, a, 0);
  1470. for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4)
  1471. iwl4965_write_targ_mem(priv, a, 0);
  1472. /* Tel 4965 where to find Tx byte count tables */
  1473. iwl4965_write_prph(priv, KDR_SCD_DRAM_BASE_ADDR,
  1474. (priv->hw_setting.shared_phys +
  1475. offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
  1476. /* Disable chain mode for all queues */
  1477. iwl4965_write_prph(priv, KDR_SCD_QUEUECHAIN_SEL, 0);
  1478. /* Initialize each Tx queue (including the command queue) */
  1479. for (i = 0; i < priv->hw_setting.max_txq_num; i++) {
  1480. /* TFD circular buffer read/write indexes */
  1481. iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(i), 0);
  1482. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
  1483. /* Max Tx Window size for Scheduler-ACK mode */
  1484. iwl4965_write_targ_mem(priv, priv->scd_base_addr +
  1485. SCD_CONTEXT_QUEUE_OFFSET(i),
  1486. (SCD_WIN_SIZE <<
  1487. SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
  1488. SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
  1489. /* Frame limit */
  1490. iwl4965_write_targ_mem(priv, priv->scd_base_addr +
  1491. SCD_CONTEXT_QUEUE_OFFSET(i) +
  1492. sizeof(u32),
  1493. (SCD_FRAME_LIMIT <<
  1494. SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
  1495. SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
  1496. }
  1497. iwl4965_write_prph(priv, KDR_SCD_INTERRUPT_MASK,
  1498. (1 << priv->hw_setting.max_txq_num) - 1);
  1499. /* Activate all Tx DMA/FIFO channels */
  1500. iwl4965_write_prph(priv, KDR_SCD_TXFACT,
  1501. SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
  1502. iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
  1503. /* Map each Tx/cmd queue to its corresponding fifo */
  1504. for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
  1505. int ac = default_queue_to_tx_fifo[i];
  1506. iwl4965_txq_ctx_activate(priv, i);
  1507. iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
  1508. }
  1509. iwl4965_release_nic_access(priv);
  1510. spin_unlock_irqrestore(&priv->lock, flags);
  1511. return 0;
  1512. }
  1513. /**
  1514. * iwl4965_hw_set_hw_setting
  1515. *
  1516. * Called when initializing driver
  1517. */
  1518. int iwl4965_hw_set_hw_setting(struct iwl4965_priv *priv)
  1519. {
  1520. /* Allocate area for Tx byte count tables and Rx queue status */
  1521. priv->hw_setting.shared_virt =
  1522. pci_alloc_consistent(priv->pci_dev,
  1523. sizeof(struct iwl4965_shared),
  1524. &priv->hw_setting.shared_phys);
  1525. if (!priv->hw_setting.shared_virt)
  1526. return -1;
  1527. memset(priv->hw_setting.shared_virt, 0, sizeof(struct iwl4965_shared));
  1528. priv->hw_setting.max_txq_num = iwl4965_param_queues_num;
  1529. priv->hw_setting.tx_cmd_len = sizeof(struct iwl4965_tx_cmd);
  1530. priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
  1531. priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
  1532. if (iwl4965_param_amsdu_size_8K)
  1533. priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_8K;
  1534. else
  1535. priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_4K;
  1536. priv->hw_setting.max_pkt_size = priv->hw_setting.rx_buf_size - 256;
  1537. priv->hw_setting.max_stations = IWL4965_STATION_COUNT;
  1538. priv->hw_setting.bcast_sta_id = IWL4965_BROADCAST_ID;
  1539. priv->hw_setting.tx_ant_num = 2;
  1540. return 0;
  1541. }
  1542. /**
  1543. * iwl4965_hw_txq_ctx_free - Free TXQ Context
  1544. *
  1545. * Destroy all TX DMA queues and structures
  1546. */
  1547. void iwl4965_hw_txq_ctx_free(struct iwl4965_priv *priv)
  1548. {
  1549. int txq_id;
  1550. /* Tx queues */
  1551. for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
  1552. iwl4965_tx_queue_free(priv, &priv->txq[txq_id]);
  1553. /* Keep-warm buffer */
  1554. iwl4965_kw_free(priv);
  1555. }
  1556. /**
  1557. * iwl4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
  1558. *
  1559. * Does NOT advance any TFD circular buffer read/write indexes
  1560. * Does NOT free the TFD itself (which is within circular buffer)
  1561. */
  1562. int iwl4965_hw_txq_free_tfd(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  1563. {
  1564. struct iwl4965_tfd_frame *bd_tmp = (struct iwl4965_tfd_frame *)&txq->bd[0];
  1565. struct iwl4965_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
  1566. struct pci_dev *dev = priv->pci_dev;
  1567. int i;
  1568. int counter = 0;
  1569. int index, is_odd;
  1570. /* Host command buffers stay mapped in memory, nothing to clean */
  1571. if (txq->q.id == IWL_CMD_QUEUE_NUM)
  1572. return 0;
  1573. /* Sanity check on number of chunks */
  1574. counter = IWL_GET_BITS(*bd, num_tbs);
  1575. if (counter > MAX_NUM_OF_TBS) {
  1576. IWL_ERROR("Too many chunks: %i\n", counter);
  1577. /* @todo issue fatal error, it is quite serious situation */
  1578. return 0;
  1579. }
  1580. /* Unmap chunks, if any.
  1581. * TFD info for odd chunks is different format than for even chunks. */
  1582. for (i = 0; i < counter; i++) {
  1583. index = i / 2;
  1584. is_odd = i & 0x1;
  1585. if (is_odd)
  1586. pci_unmap_single(
  1587. dev,
  1588. IWL_GET_BITS(bd->pa[index], tb2_addr_lo16) |
  1589. (IWL_GET_BITS(bd->pa[index],
  1590. tb2_addr_hi20) << 16),
  1591. IWL_GET_BITS(bd->pa[index], tb2_len),
  1592. PCI_DMA_TODEVICE);
  1593. else if (i > 0)
  1594. pci_unmap_single(dev,
  1595. le32_to_cpu(bd->pa[index].tb1_addr),
  1596. IWL_GET_BITS(bd->pa[index], tb1_len),
  1597. PCI_DMA_TODEVICE);
  1598. /* Free SKB, if any, for this chunk */
  1599. if (txq->txb[txq->q.read_ptr].skb[i]) {
  1600. struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[i];
  1601. dev_kfree_skb(skb);
  1602. txq->txb[txq->q.read_ptr].skb[i] = NULL;
  1603. }
  1604. }
  1605. return 0;
  1606. }
  1607. int iwl4965_hw_reg_set_txpower(struct iwl4965_priv *priv, s8 power)
  1608. {
  1609. IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
  1610. return -EINVAL;
  1611. }
  1612. static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
  1613. {
  1614. s32 sign = 1;
  1615. if (num < 0) {
  1616. sign = -sign;
  1617. num = -num;
  1618. }
  1619. if (denom < 0) {
  1620. sign = -sign;
  1621. denom = -denom;
  1622. }
  1623. *res = 1;
  1624. *res = ((num * 2 + denom) / (denom * 2)) * sign;
  1625. return 1;
  1626. }
  1627. /**
  1628. * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
  1629. *
  1630. * Determines power supply voltage compensation for txpower calculations.
  1631. * Returns number of 1/2-dB steps to subtract from gain table index,
  1632. * to compensate for difference between power supply voltage during
  1633. * factory measurements, vs. current power supply voltage.
  1634. *
  1635. * Voltage indication is higher for lower voltage.
  1636. * Lower voltage requires more gain (lower gain table index).
  1637. */
  1638. static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
  1639. s32 current_voltage)
  1640. {
  1641. s32 comp = 0;
  1642. if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
  1643. (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
  1644. return 0;
  1645. iwl4965_math_div_round(current_voltage - eeprom_voltage,
  1646. TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
  1647. if (current_voltage > eeprom_voltage)
  1648. comp *= 2;
  1649. if ((comp < -2) || (comp > 2))
  1650. comp = 0;
  1651. return comp;
  1652. }
  1653. static const struct iwl4965_channel_info *
  1654. iwl4965_get_channel_txpower_info(struct iwl4965_priv *priv,
  1655. enum ieee80211_band band, u16 channel)
  1656. {
  1657. const struct iwl4965_channel_info *ch_info;
  1658. ch_info = iwl4965_get_channel_info(priv, band, channel);
  1659. if (!is_channel_valid(ch_info))
  1660. return NULL;
  1661. return ch_info;
  1662. }
  1663. static s32 iwl4965_get_tx_atten_grp(u16 channel)
  1664. {
  1665. if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
  1666. channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
  1667. return CALIB_CH_GROUP_5;
  1668. if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
  1669. channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
  1670. return CALIB_CH_GROUP_1;
  1671. if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
  1672. channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
  1673. return CALIB_CH_GROUP_2;
  1674. if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
  1675. channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
  1676. return CALIB_CH_GROUP_3;
  1677. if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
  1678. channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
  1679. return CALIB_CH_GROUP_4;
  1680. IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
  1681. return -1;
  1682. }
  1683. static u32 iwl4965_get_sub_band(const struct iwl4965_priv *priv, u32 channel)
  1684. {
  1685. s32 b = -1;
  1686. for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
  1687. if (priv->eeprom.calib_info.band_info[b].ch_from == 0)
  1688. continue;
  1689. if ((channel >= priv->eeprom.calib_info.band_info[b].ch_from)
  1690. && (channel <= priv->eeprom.calib_info.band_info[b].ch_to))
  1691. break;
  1692. }
  1693. return b;
  1694. }
  1695. static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
  1696. {
  1697. s32 val;
  1698. if (x2 == x1)
  1699. return y1;
  1700. else {
  1701. iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
  1702. return val + y2;
  1703. }
  1704. }
  1705. /**
  1706. * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
  1707. *
  1708. * Interpolates factory measurements from the two sample channels within a
  1709. * sub-band, to apply to channel of interest. Interpolation is proportional to
  1710. * differences in channel frequencies, which is proportional to differences
  1711. * in channel number.
  1712. */
  1713. static int iwl4965_interpolate_chan(struct iwl4965_priv *priv, u32 channel,
  1714. struct iwl4965_eeprom_calib_ch_info *chan_info)
  1715. {
  1716. s32 s = -1;
  1717. u32 c;
  1718. u32 m;
  1719. const struct iwl4965_eeprom_calib_measure *m1;
  1720. const struct iwl4965_eeprom_calib_measure *m2;
  1721. struct iwl4965_eeprom_calib_measure *omeas;
  1722. u32 ch_i1;
  1723. u32 ch_i2;
  1724. s = iwl4965_get_sub_band(priv, channel);
  1725. if (s >= EEPROM_TX_POWER_BANDS) {
  1726. IWL_ERROR("Tx Power can not find channel %d ", channel);
  1727. return -1;
  1728. }
  1729. ch_i1 = priv->eeprom.calib_info.band_info[s].ch1.ch_num;
  1730. ch_i2 = priv->eeprom.calib_info.band_info[s].ch2.ch_num;
  1731. chan_info->ch_num = (u8) channel;
  1732. IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
  1733. channel, s, ch_i1, ch_i2);
  1734. for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
  1735. for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
  1736. m1 = &(priv->eeprom.calib_info.band_info[s].ch1.
  1737. measurements[c][m]);
  1738. m2 = &(priv->eeprom.calib_info.band_info[s].ch2.
  1739. measurements[c][m]);
  1740. omeas = &(chan_info->measurements[c][m]);
  1741. omeas->actual_pow =
  1742. (u8) iwl4965_interpolate_value(channel, ch_i1,
  1743. m1->actual_pow,
  1744. ch_i2,
  1745. m2->actual_pow);
  1746. omeas->gain_idx =
  1747. (u8) iwl4965_interpolate_value(channel, ch_i1,
  1748. m1->gain_idx, ch_i2,
  1749. m2->gain_idx);
  1750. omeas->temperature =
  1751. (u8) iwl4965_interpolate_value(channel, ch_i1,
  1752. m1->temperature,
  1753. ch_i2,
  1754. m2->temperature);
  1755. omeas->pa_det =
  1756. (s8) iwl4965_interpolate_value(channel, ch_i1,
  1757. m1->pa_det, ch_i2,
  1758. m2->pa_det);
  1759. IWL_DEBUG_TXPOWER
  1760. ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
  1761. m1->actual_pow, m2->actual_pow, omeas->actual_pow);
  1762. IWL_DEBUG_TXPOWER
  1763. ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
  1764. m1->gain_idx, m2->gain_idx, omeas->gain_idx);
  1765. IWL_DEBUG_TXPOWER
  1766. ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
  1767. m1->pa_det, m2->pa_det, omeas->pa_det);
  1768. IWL_DEBUG_TXPOWER
  1769. ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
  1770. m1->temperature, m2->temperature,
  1771. omeas->temperature);
  1772. }
  1773. }
  1774. return 0;
  1775. }
  1776. /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
  1777. * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
  1778. static s32 back_off_table[] = {
  1779. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
  1780. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
  1781. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
  1782. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
  1783. 10 /* CCK */
  1784. };
  1785. /* Thermal compensation values for txpower for various frequency ranges ...
  1786. * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
  1787. static struct iwl4965_txpower_comp_entry {
  1788. s32 degrees_per_05db_a;
  1789. s32 degrees_per_05db_a_denom;
  1790. } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
  1791. {9, 2}, /* group 0 5.2, ch 34-43 */
  1792. {4, 1}, /* group 1 5.2, ch 44-70 */
  1793. {4, 1}, /* group 2 5.2, ch 71-124 */
  1794. {4, 1}, /* group 3 5.2, ch 125-200 */
  1795. {3, 1} /* group 4 2.4, ch all */
  1796. };
  1797. static s32 get_min_power_index(s32 rate_power_index, u32 band)
  1798. {
  1799. if (!band) {
  1800. if ((rate_power_index & 7) <= 4)
  1801. return MIN_TX_GAIN_INDEX_52GHZ_EXT;
  1802. }
  1803. return MIN_TX_GAIN_INDEX;
  1804. }
  1805. struct gain_entry {
  1806. u8 dsp;
  1807. u8 radio;
  1808. };
  1809. static const struct gain_entry gain_table[2][108] = {
  1810. /* 5.2GHz power gain index table */
  1811. {
  1812. {123, 0x3F}, /* highest txpower */
  1813. {117, 0x3F},
  1814. {110, 0x3F},
  1815. {104, 0x3F},
  1816. {98, 0x3F},
  1817. {110, 0x3E},
  1818. {104, 0x3E},
  1819. {98, 0x3E},
  1820. {110, 0x3D},
  1821. {104, 0x3D},
  1822. {98, 0x3D},
  1823. {110, 0x3C},
  1824. {104, 0x3C},
  1825. {98, 0x3C},
  1826. {110, 0x3B},
  1827. {104, 0x3B},
  1828. {98, 0x3B},
  1829. {110, 0x3A},
  1830. {104, 0x3A},
  1831. {98, 0x3A},
  1832. {110, 0x39},
  1833. {104, 0x39},
  1834. {98, 0x39},
  1835. {110, 0x38},
  1836. {104, 0x38},
  1837. {98, 0x38},
  1838. {110, 0x37},
  1839. {104, 0x37},
  1840. {98, 0x37},
  1841. {110, 0x36},
  1842. {104, 0x36},
  1843. {98, 0x36},
  1844. {110, 0x35},
  1845. {104, 0x35},
  1846. {98, 0x35},
  1847. {110, 0x34},
  1848. {104, 0x34},
  1849. {98, 0x34},
  1850. {110, 0x33},
  1851. {104, 0x33},
  1852. {98, 0x33},
  1853. {110, 0x32},
  1854. {104, 0x32},
  1855. {98, 0x32},
  1856. {110, 0x31},
  1857. {104, 0x31},
  1858. {98, 0x31},
  1859. {110, 0x30},
  1860. {104, 0x30},
  1861. {98, 0x30},
  1862. {110, 0x25},
  1863. {104, 0x25},
  1864. {98, 0x25},
  1865. {110, 0x24},
  1866. {104, 0x24},
  1867. {98, 0x24},
  1868. {110, 0x23},
  1869. {104, 0x23},
  1870. {98, 0x23},
  1871. {110, 0x22},
  1872. {104, 0x18},
  1873. {98, 0x18},
  1874. {110, 0x17},
  1875. {104, 0x17},
  1876. {98, 0x17},
  1877. {110, 0x16},
  1878. {104, 0x16},
  1879. {98, 0x16},
  1880. {110, 0x15},
  1881. {104, 0x15},
  1882. {98, 0x15},
  1883. {110, 0x14},
  1884. {104, 0x14},
  1885. {98, 0x14},
  1886. {110, 0x13},
  1887. {104, 0x13},
  1888. {98, 0x13},
  1889. {110, 0x12},
  1890. {104, 0x08},
  1891. {98, 0x08},
  1892. {110, 0x07},
  1893. {104, 0x07},
  1894. {98, 0x07},
  1895. {110, 0x06},
  1896. {104, 0x06},
  1897. {98, 0x06},
  1898. {110, 0x05},
  1899. {104, 0x05},
  1900. {98, 0x05},
  1901. {110, 0x04},
  1902. {104, 0x04},
  1903. {98, 0x04},
  1904. {110, 0x03},
  1905. {104, 0x03},
  1906. {98, 0x03},
  1907. {110, 0x02},
  1908. {104, 0x02},
  1909. {98, 0x02},
  1910. {110, 0x01},
  1911. {104, 0x01},
  1912. {98, 0x01},
  1913. {110, 0x00},
  1914. {104, 0x00},
  1915. {98, 0x00},
  1916. {93, 0x00},
  1917. {88, 0x00},
  1918. {83, 0x00},
  1919. {78, 0x00},
  1920. },
  1921. /* 2.4GHz power gain index table */
  1922. {
  1923. {110, 0x3f}, /* highest txpower */
  1924. {104, 0x3f},
  1925. {98, 0x3f},
  1926. {110, 0x3e},
  1927. {104, 0x3e},
  1928. {98, 0x3e},
  1929. {110, 0x3d},
  1930. {104, 0x3d},
  1931. {98, 0x3d},
  1932. {110, 0x3c},
  1933. {104, 0x3c},
  1934. {98, 0x3c},
  1935. {110, 0x3b},
  1936. {104, 0x3b},
  1937. {98, 0x3b},
  1938. {110, 0x3a},
  1939. {104, 0x3a},
  1940. {98, 0x3a},
  1941. {110, 0x39},
  1942. {104, 0x39},
  1943. {98, 0x39},
  1944. {110, 0x38},
  1945. {104, 0x38},
  1946. {98, 0x38},
  1947. {110, 0x37},
  1948. {104, 0x37},
  1949. {98, 0x37},
  1950. {110, 0x36},
  1951. {104, 0x36},
  1952. {98, 0x36},
  1953. {110, 0x35},
  1954. {104, 0x35},
  1955. {98, 0x35},
  1956. {110, 0x34},
  1957. {104, 0x34},
  1958. {98, 0x34},
  1959. {110, 0x33},
  1960. {104, 0x33},
  1961. {98, 0x33},
  1962. {110, 0x32},
  1963. {104, 0x32},
  1964. {98, 0x32},
  1965. {110, 0x31},
  1966. {104, 0x31},
  1967. {98, 0x31},
  1968. {110, 0x30},
  1969. {104, 0x30},
  1970. {98, 0x30},
  1971. {110, 0x6},
  1972. {104, 0x6},
  1973. {98, 0x6},
  1974. {110, 0x5},
  1975. {104, 0x5},
  1976. {98, 0x5},
  1977. {110, 0x4},
  1978. {104, 0x4},
  1979. {98, 0x4},
  1980. {110, 0x3},
  1981. {104, 0x3},
  1982. {98, 0x3},
  1983. {110, 0x2},
  1984. {104, 0x2},
  1985. {98, 0x2},
  1986. {110, 0x1},
  1987. {104, 0x1},
  1988. {98, 0x1},
  1989. {110, 0x0},
  1990. {104, 0x0},
  1991. {98, 0x0},
  1992. {97, 0},
  1993. {96, 0},
  1994. {95, 0},
  1995. {94, 0},
  1996. {93, 0},
  1997. {92, 0},
  1998. {91, 0},
  1999. {90, 0},
  2000. {89, 0},
  2001. {88, 0},
  2002. {87, 0},
  2003. {86, 0},
  2004. {85, 0},
  2005. {84, 0},
  2006. {83, 0},
  2007. {82, 0},
  2008. {81, 0},
  2009. {80, 0},
  2010. {79, 0},
  2011. {78, 0},
  2012. {77, 0},
  2013. {76, 0},
  2014. {75, 0},
  2015. {74, 0},
  2016. {73, 0},
  2017. {72, 0},
  2018. {71, 0},
  2019. {70, 0},
  2020. {69, 0},
  2021. {68, 0},
  2022. {67, 0},
  2023. {66, 0},
  2024. {65, 0},
  2025. {64, 0},
  2026. {63, 0},
  2027. {62, 0},
  2028. {61, 0},
  2029. {60, 0},
  2030. {59, 0},
  2031. }
  2032. };
  2033. static int iwl4965_fill_txpower_tbl(struct iwl4965_priv *priv, u8 band, u16 channel,
  2034. u8 is_fat, u8 ctrl_chan_high,
  2035. struct iwl4965_tx_power_db *tx_power_tbl)
  2036. {
  2037. u8 saturation_power;
  2038. s32 target_power;
  2039. s32 user_target_power;
  2040. s32 power_limit;
  2041. s32 current_temp;
  2042. s32 reg_limit;
  2043. s32 current_regulatory;
  2044. s32 txatten_grp = CALIB_CH_GROUP_MAX;
  2045. int i;
  2046. int c;
  2047. const struct iwl4965_channel_info *ch_info = NULL;
  2048. struct iwl4965_eeprom_calib_ch_info ch_eeprom_info;
  2049. const struct iwl4965_eeprom_calib_measure *measurement;
  2050. s16 voltage;
  2051. s32 init_voltage;
  2052. s32 voltage_compensation;
  2053. s32 degrees_per_05db_num;
  2054. s32 degrees_per_05db_denom;
  2055. s32 factory_temp;
  2056. s32 temperature_comp[2];
  2057. s32 factory_gain_index[2];
  2058. s32 factory_actual_pwr[2];
  2059. s32 power_index;
  2060. /* Sanity check requested level (dBm) */
  2061. if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
  2062. IWL_WARNING("Requested user TXPOWER %d below limit.\n",
  2063. priv->user_txpower_limit);
  2064. return -EINVAL;
  2065. }
  2066. if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
  2067. IWL_WARNING("Requested user TXPOWER %d above limit.\n",
  2068. priv->user_txpower_limit);
  2069. return -EINVAL;
  2070. }
  2071. /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
  2072. * are used for indexing into txpower table) */
  2073. user_target_power = 2 * priv->user_txpower_limit;
  2074. /* Get current (RXON) channel, band, width */
  2075. ch_info =
  2076. iwl4965_get_channel_txpower_info(priv, priv->band, channel);
  2077. IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
  2078. is_fat);
  2079. if (!ch_info)
  2080. return -EINVAL;
  2081. /* get txatten group, used to select 1) thermal txpower adjustment
  2082. * and 2) mimo txpower balance between Tx chains. */
  2083. txatten_grp = iwl4965_get_tx_atten_grp(channel);
  2084. if (txatten_grp < 0)
  2085. return -EINVAL;
  2086. IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
  2087. channel, txatten_grp);
  2088. if (is_fat) {
  2089. if (ctrl_chan_high)
  2090. channel -= 2;
  2091. else
  2092. channel += 2;
  2093. }
  2094. /* hardware txpower limits ...
  2095. * saturation (clipping distortion) txpowers are in half-dBm */
  2096. if (band)
  2097. saturation_power = priv->eeprom.calib_info.saturation_power24;
  2098. else
  2099. saturation_power = priv->eeprom.calib_info.saturation_power52;
  2100. if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
  2101. saturation_power > IWL_TX_POWER_SATURATION_MAX) {
  2102. if (band)
  2103. saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
  2104. else
  2105. saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
  2106. }
  2107. /* regulatory txpower limits ... reg_limit values are in half-dBm,
  2108. * max_power_avg values are in dBm, convert * 2 */
  2109. if (is_fat)
  2110. reg_limit = ch_info->fat_max_power_avg * 2;
  2111. else
  2112. reg_limit = ch_info->max_power_avg * 2;
  2113. if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
  2114. (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
  2115. if (band)
  2116. reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
  2117. else
  2118. reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
  2119. }
  2120. /* Interpolate txpower calibration values for this channel,
  2121. * based on factory calibration tests on spaced channels. */
  2122. iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
  2123. /* calculate tx gain adjustment based on power supply voltage */
  2124. voltage = priv->eeprom.calib_info.voltage;
  2125. init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
  2126. voltage_compensation =
  2127. iwl4965_get_voltage_compensation(voltage, init_voltage);
  2128. IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
  2129. init_voltage,
  2130. voltage, voltage_compensation);
  2131. /* get current temperature (Celsius) */
  2132. current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
  2133. current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
  2134. current_temp = KELVIN_TO_CELSIUS(current_temp);
  2135. /* select thermal txpower adjustment params, based on channel group
  2136. * (same frequency group used for mimo txatten adjustment) */
  2137. degrees_per_05db_num =
  2138. tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
  2139. degrees_per_05db_denom =
  2140. tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
  2141. /* get per-chain txpower values from factory measurements */
  2142. for (c = 0; c < 2; c++) {
  2143. measurement = &ch_eeprom_info.measurements[c][1];
  2144. /* txgain adjustment (in half-dB steps) based on difference
  2145. * between factory and current temperature */
  2146. factory_temp = measurement->temperature;
  2147. iwl4965_math_div_round((current_temp - factory_temp) *
  2148. degrees_per_05db_denom,
  2149. degrees_per_05db_num,
  2150. &temperature_comp[c]);
  2151. factory_gain_index[c] = measurement->gain_idx;
  2152. factory_actual_pwr[c] = measurement->actual_pow;
  2153. IWL_DEBUG_TXPOWER("chain = %d\n", c);
  2154. IWL_DEBUG_TXPOWER("fctry tmp %d, "
  2155. "curr tmp %d, comp %d steps\n",
  2156. factory_temp, current_temp,
  2157. temperature_comp[c]);
  2158. IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
  2159. factory_gain_index[c],
  2160. factory_actual_pwr[c]);
  2161. }
  2162. /* for each of 33 bit-rates (including 1 for CCK) */
  2163. for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
  2164. u8 is_mimo_rate;
  2165. union iwl4965_tx_power_dual_stream tx_power;
  2166. /* for mimo, reduce each chain's txpower by half
  2167. * (3dB, 6 steps), so total output power is regulatory
  2168. * compliant. */
  2169. if (i & 0x8) {
  2170. current_regulatory = reg_limit -
  2171. IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
  2172. is_mimo_rate = 1;
  2173. } else {
  2174. current_regulatory = reg_limit;
  2175. is_mimo_rate = 0;
  2176. }
  2177. /* find txpower limit, either hardware or regulatory */
  2178. power_limit = saturation_power - back_off_table[i];
  2179. if (power_limit > current_regulatory)
  2180. power_limit = current_regulatory;
  2181. /* reduce user's txpower request if necessary
  2182. * for this rate on this channel */
  2183. target_power = user_target_power;
  2184. if (target_power > power_limit)
  2185. target_power = power_limit;
  2186. IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
  2187. i, saturation_power - back_off_table[i],
  2188. current_regulatory, user_target_power,
  2189. target_power);
  2190. /* for each of 2 Tx chains (radio transmitters) */
  2191. for (c = 0; c < 2; c++) {
  2192. s32 atten_value;
  2193. if (is_mimo_rate)
  2194. atten_value =
  2195. (s32)le32_to_cpu(priv->card_alive_init.
  2196. tx_atten[txatten_grp][c]);
  2197. else
  2198. atten_value = 0;
  2199. /* calculate index; higher index means lower txpower */
  2200. power_index = (u8) (factory_gain_index[c] -
  2201. (target_power -
  2202. factory_actual_pwr[c]) -
  2203. temperature_comp[c] -
  2204. voltage_compensation +
  2205. atten_value);
  2206. /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
  2207. power_index); */
  2208. if (power_index < get_min_power_index(i, band))
  2209. power_index = get_min_power_index(i, band);
  2210. /* adjust 5 GHz index to support negative indexes */
  2211. if (!band)
  2212. power_index += 9;
  2213. /* CCK, rate 32, reduce txpower for CCK */
  2214. if (i == POWER_TABLE_CCK_ENTRY)
  2215. power_index +=
  2216. IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
  2217. /* stay within the table! */
  2218. if (power_index > 107) {
  2219. IWL_WARNING("txpower index %d > 107\n",
  2220. power_index);
  2221. power_index = 107;
  2222. }
  2223. if (power_index < 0) {
  2224. IWL_WARNING("txpower index %d < 0\n",
  2225. power_index);
  2226. power_index = 0;
  2227. }
  2228. /* fill txpower command for this rate/chain */
  2229. tx_power.s.radio_tx_gain[c] =
  2230. gain_table[band][power_index].radio;
  2231. tx_power.s.dsp_predis_atten[c] =
  2232. gain_table[band][power_index].dsp;
  2233. IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
  2234. "gain 0x%02x dsp %d\n",
  2235. c, atten_value, power_index,
  2236. tx_power.s.radio_tx_gain[c],
  2237. tx_power.s.dsp_predis_atten[c]);
  2238. }/* for each chain */
  2239. tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
  2240. }/* for each rate */
  2241. return 0;
  2242. }
  2243. /**
  2244. * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
  2245. *
  2246. * Uses the active RXON for channel, band, and characteristics (fat, high)
  2247. * The power limit is taken from priv->user_txpower_limit.
  2248. */
  2249. int iwl4965_hw_reg_send_txpower(struct iwl4965_priv *priv)
  2250. {
  2251. struct iwl4965_txpowertable_cmd cmd = { 0 };
  2252. int rc = 0;
  2253. u8 band = 0;
  2254. u8 is_fat = 0;
  2255. u8 ctrl_chan_high = 0;
  2256. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2257. /* If this gets hit a lot, switch it to a BUG() and catch
  2258. * the stack trace to find out who is calling this during
  2259. * a scan. */
  2260. IWL_WARNING("TX Power requested while scanning!\n");
  2261. return -EAGAIN;
  2262. }
  2263. band = priv->band == IEEE80211_BAND_2GHZ;
  2264. is_fat = is_fat_channel(priv->active_rxon.flags);
  2265. if (is_fat &&
  2266. (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
  2267. ctrl_chan_high = 1;
  2268. cmd.band = band;
  2269. cmd.channel = priv->active_rxon.channel;
  2270. rc = iwl4965_fill_txpower_tbl(priv, band,
  2271. le16_to_cpu(priv->active_rxon.channel),
  2272. is_fat, ctrl_chan_high, &cmd.tx_power);
  2273. if (rc)
  2274. return rc;
  2275. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
  2276. return rc;
  2277. }
  2278. int iwl4965_hw_channel_switch(struct iwl4965_priv *priv, u16 channel)
  2279. {
  2280. int rc;
  2281. u8 band = 0;
  2282. u8 is_fat = 0;
  2283. u8 ctrl_chan_high = 0;
  2284. struct iwl4965_channel_switch_cmd cmd = { 0 };
  2285. const struct iwl4965_channel_info *ch_info;
  2286. band = priv->band == IEEE80211_BAND_2GHZ;
  2287. ch_info = iwl4965_get_channel_info(priv, priv->band, channel);
  2288. is_fat = is_fat_channel(priv->staging_rxon.flags);
  2289. if (is_fat &&
  2290. (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
  2291. ctrl_chan_high = 1;
  2292. cmd.band = band;
  2293. cmd.expect_beacon = 0;
  2294. cmd.channel = cpu_to_le16(channel);
  2295. cmd.rxon_flags = priv->active_rxon.flags;
  2296. cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
  2297. cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
  2298. if (ch_info)
  2299. cmd.expect_beacon = is_channel_radar(ch_info);
  2300. else
  2301. cmd.expect_beacon = 1;
  2302. rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
  2303. ctrl_chan_high, &cmd.tx_power);
  2304. if (rc) {
  2305. IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
  2306. return rc;
  2307. }
  2308. rc = iwl4965_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
  2309. return rc;
  2310. }
  2311. #define RTS_HCCA_RETRY_LIMIT 3
  2312. #define RTS_DFAULT_RETRY_LIMIT 60
  2313. void iwl4965_hw_build_tx_cmd_rate(struct iwl4965_priv *priv,
  2314. struct iwl4965_cmd *cmd,
  2315. struct ieee80211_tx_control *ctrl,
  2316. struct ieee80211_hdr *hdr, int sta_id,
  2317. int is_hcca)
  2318. {
  2319. struct iwl4965_tx_cmd *tx = &cmd->cmd.tx;
  2320. u8 rts_retry_limit = 0;
  2321. u8 data_retry_limit = 0;
  2322. u16 fc = le16_to_cpu(hdr->frame_control);
  2323. u8 rate_plcp;
  2324. u16 rate_flags = 0;
  2325. int rate_idx = min(ctrl->tx_rate->hw_value & 0xffff, IWL_RATE_COUNT - 1);
  2326. rate_plcp = iwl4965_rates[rate_idx].plcp;
  2327. rts_retry_limit = (is_hcca) ?
  2328. RTS_HCCA_RETRY_LIMIT : RTS_DFAULT_RETRY_LIMIT;
  2329. if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE))
  2330. rate_flags |= RATE_MCS_CCK_MSK;
  2331. if (ieee80211_is_probe_response(fc)) {
  2332. data_retry_limit = 3;
  2333. if (data_retry_limit < rts_retry_limit)
  2334. rts_retry_limit = data_retry_limit;
  2335. } else
  2336. data_retry_limit = IWL_DEFAULT_TX_RETRY;
  2337. if (priv->data_retry_limit != -1)
  2338. data_retry_limit = priv->data_retry_limit;
  2339. if (ieee80211_is_data(fc)) {
  2340. tx->initial_rate_index = 0;
  2341. tx->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
  2342. } else {
  2343. switch (fc & IEEE80211_FCTL_STYPE) {
  2344. case IEEE80211_STYPE_AUTH:
  2345. case IEEE80211_STYPE_DEAUTH:
  2346. case IEEE80211_STYPE_ASSOC_REQ:
  2347. case IEEE80211_STYPE_REASSOC_REQ:
  2348. if (tx->tx_flags & TX_CMD_FLG_RTS_MSK) {
  2349. tx->tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2350. tx->tx_flags |= TX_CMD_FLG_CTS_MSK;
  2351. }
  2352. break;
  2353. default:
  2354. break;
  2355. }
  2356. /* Alternate between antenna A and B for successive frames */
  2357. if (priv->use_ant_b_for_management_frame) {
  2358. priv->use_ant_b_for_management_frame = 0;
  2359. rate_flags |= RATE_MCS_ANT_B_MSK;
  2360. } else {
  2361. priv->use_ant_b_for_management_frame = 1;
  2362. rate_flags |= RATE_MCS_ANT_A_MSK;
  2363. }
  2364. }
  2365. tx->rts_retry_limit = rts_retry_limit;
  2366. tx->data_retry_limit = data_retry_limit;
  2367. tx->rate_n_flags = iwl4965_hw_set_rate_n_flags(rate_plcp, rate_flags);
  2368. }
  2369. int iwl4965_hw_get_rx_read(struct iwl4965_priv *priv)
  2370. {
  2371. struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
  2372. return IWL_GET_BITS(*shared_data, rb_closed_stts_rb_num);
  2373. }
  2374. int iwl4965_hw_get_temperature(struct iwl4965_priv *priv)
  2375. {
  2376. return priv->temperature;
  2377. }
  2378. unsigned int iwl4965_hw_get_beacon_cmd(struct iwl4965_priv *priv,
  2379. struct iwl4965_frame *frame, u8 rate)
  2380. {
  2381. struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
  2382. unsigned int frame_size;
  2383. tx_beacon_cmd = &frame->u.beacon;
  2384. memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
  2385. tx_beacon_cmd->tx.sta_id = priv->hw_setting.bcast_sta_id;
  2386. tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2387. frame_size = iwl4965_fill_beacon_frame(priv,
  2388. tx_beacon_cmd->frame,
  2389. iwl4965_broadcast_addr,
  2390. sizeof(frame->u) - sizeof(*tx_beacon_cmd));
  2391. BUG_ON(frame_size > MAX_MPDU_SIZE);
  2392. tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
  2393. if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
  2394. tx_beacon_cmd->tx.rate_n_flags =
  2395. iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
  2396. else
  2397. tx_beacon_cmd->tx.rate_n_flags =
  2398. iwl4965_hw_set_rate_n_flags(rate, 0);
  2399. tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
  2400. TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
  2401. return (sizeof(*tx_beacon_cmd) + frame_size);
  2402. }
  2403. /*
  2404. * Tell 4965 where to find circular buffer of Tx Frame Descriptors for
  2405. * given Tx queue, and enable the DMA channel used for that queue.
  2406. *
  2407. * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
  2408. * channels supported in hardware.
  2409. */
  2410. int iwl4965_hw_tx_queue_init(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  2411. {
  2412. int rc;
  2413. unsigned long flags;
  2414. int txq_id = txq->q.id;
  2415. spin_lock_irqsave(&priv->lock, flags);
  2416. rc = iwl4965_grab_nic_access(priv);
  2417. if (rc) {
  2418. spin_unlock_irqrestore(&priv->lock, flags);
  2419. return rc;
  2420. }
  2421. /* Circular buffer (TFD queue in DRAM) physical base address */
  2422. iwl4965_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
  2423. txq->q.dma_addr >> 8);
  2424. /* Enable DMA channel, using same id as for TFD queue */
  2425. iwl4965_write_direct32(
  2426. priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
  2427. IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
  2428. IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL);
  2429. iwl4965_release_nic_access(priv);
  2430. spin_unlock_irqrestore(&priv->lock, flags);
  2431. return 0;
  2432. }
  2433. int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl4965_priv *priv, void *ptr,
  2434. dma_addr_t addr, u16 len)
  2435. {
  2436. int index, is_odd;
  2437. struct iwl4965_tfd_frame *tfd = ptr;
  2438. u32 num_tbs = IWL_GET_BITS(*tfd, num_tbs);
  2439. /* Each TFD can point to a maximum 20 Tx buffers */
  2440. if ((num_tbs >= MAX_NUM_OF_TBS) || (num_tbs < 0)) {
  2441. IWL_ERROR("Error can not send more than %d chunks\n",
  2442. MAX_NUM_OF_TBS);
  2443. return -EINVAL;
  2444. }
  2445. index = num_tbs / 2;
  2446. is_odd = num_tbs & 0x1;
  2447. if (!is_odd) {
  2448. tfd->pa[index].tb1_addr = cpu_to_le32(addr);
  2449. IWL_SET_BITS(tfd->pa[index], tb1_addr_hi,
  2450. iwl_get_dma_hi_address(addr));
  2451. IWL_SET_BITS(tfd->pa[index], tb1_len, len);
  2452. } else {
  2453. IWL_SET_BITS(tfd->pa[index], tb2_addr_lo16,
  2454. (u32) (addr & 0xffff));
  2455. IWL_SET_BITS(tfd->pa[index], tb2_addr_hi20, addr >> 16);
  2456. IWL_SET_BITS(tfd->pa[index], tb2_len, len);
  2457. }
  2458. IWL_SET_BITS(*tfd, num_tbs, num_tbs + 1);
  2459. return 0;
  2460. }
  2461. static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv)
  2462. {
  2463. u16 hw_version = priv->eeprom.board_revision_4965;
  2464. IWL_DEBUG_INFO("4965ABGN HW Version %u.%u.%u\n",
  2465. ((hw_version >> 8) & 0x0F),
  2466. ((hw_version >> 8) >> 4), (hw_version & 0x00FF));
  2467. IWL_DEBUG_INFO("4965ABGN PBA Number %.16s\n",
  2468. priv->eeprom.board_pba_number_4965);
  2469. }
  2470. #define IWL_TX_CRC_SIZE 4
  2471. #define IWL_TX_DELIMITER_SIZE 4
  2472. /**
  2473. * iwl4965_tx_queue_update_wr_ptr - Set up entry in Tx byte-count array
  2474. */
  2475. int iwl4965_tx_queue_update_wr_ptr(struct iwl4965_priv *priv,
  2476. struct iwl4965_tx_queue *txq, u16 byte_cnt)
  2477. {
  2478. int len;
  2479. int txq_id = txq->q.id;
  2480. struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
  2481. if (txq->need_update == 0)
  2482. return 0;
  2483. len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
  2484. /* Set up byte count within first 256 entries */
  2485. IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
  2486. tfd_offset[txq->q.write_ptr], byte_cnt, len);
  2487. /* If within first 64 entries, duplicate at end */
  2488. if (txq->q.write_ptr < IWL4965_MAX_WIN_SIZE)
  2489. IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
  2490. tfd_offset[IWL4965_QUEUE_SIZE + txq->q.write_ptr],
  2491. byte_cnt, len);
  2492. return 0;
  2493. }
  2494. /**
  2495. * iwl4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  2496. *
  2497. * Selects how many and which Rx receivers/antennas/chains to use.
  2498. * This should not be used for scan command ... it puts data in wrong place.
  2499. */
  2500. void iwl4965_set_rxon_chain(struct iwl4965_priv *priv)
  2501. {
  2502. u8 is_single = is_single_stream(priv);
  2503. u8 idle_state, rx_state;
  2504. priv->staging_rxon.rx_chain = 0;
  2505. rx_state = idle_state = 3;
  2506. /* Tell uCode which antennas are actually connected.
  2507. * Before first association, we assume all antennas are connected.
  2508. * Just after first association, iwl4965_noise_calibration()
  2509. * checks which antennas actually *are* connected. */
  2510. priv->staging_rxon.rx_chain |=
  2511. cpu_to_le16(priv->valid_antenna << RXON_RX_CHAIN_VALID_POS);
  2512. /* How many receivers should we use? */
  2513. iwl4965_get_rx_chain_counter(priv, &idle_state, &rx_state);
  2514. priv->staging_rxon.rx_chain |=
  2515. cpu_to_le16(rx_state << RXON_RX_CHAIN_MIMO_CNT_POS);
  2516. priv->staging_rxon.rx_chain |=
  2517. cpu_to_le16(idle_state << RXON_RX_CHAIN_CNT_POS);
  2518. if (!is_single && (rx_state >= 2) &&
  2519. !test_bit(STATUS_POWER_PMI, &priv->status))
  2520. priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  2521. else
  2522. priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  2523. IWL_DEBUG_ASSOC("rx chain %X\n", priv->staging_rxon.rx_chain);
  2524. }
  2525. /**
  2526. * sign_extend - Sign extend a value using specified bit as sign-bit
  2527. *
  2528. * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
  2529. * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
  2530. *
  2531. * @param oper value to sign extend
  2532. * @param index 0 based bit index (0<=index<32) to sign bit
  2533. */
  2534. static s32 sign_extend(u32 oper, int index)
  2535. {
  2536. u8 shift = 31 - index;
  2537. return (s32)(oper << shift) >> shift;
  2538. }
  2539. /**
  2540. * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
  2541. * @statistics: Provides the temperature reading from the uCode
  2542. *
  2543. * A return of <0 indicates bogus data in the statistics
  2544. */
  2545. int iwl4965_get_temperature(const struct iwl4965_priv *priv)
  2546. {
  2547. s32 temperature;
  2548. s32 vt;
  2549. s32 R1, R2, R3;
  2550. u32 R4;
  2551. if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
  2552. (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
  2553. IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
  2554. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
  2555. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
  2556. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
  2557. R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
  2558. } else {
  2559. IWL_DEBUG_TEMP("Running temperature calibration\n");
  2560. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
  2561. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
  2562. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
  2563. R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
  2564. }
  2565. /*
  2566. * Temperature is only 23 bits, so sign extend out to 32.
  2567. *
  2568. * NOTE If we haven't received a statistics notification yet
  2569. * with an updated temperature, use R4 provided to us in the
  2570. * "initialize" ALIVE response.
  2571. */
  2572. if (!test_bit(STATUS_TEMPERATURE, &priv->status))
  2573. vt = sign_extend(R4, 23);
  2574. else
  2575. vt = sign_extend(
  2576. le32_to_cpu(priv->statistics.general.temperature), 23);
  2577. IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
  2578. R1, R2, R3, vt);
  2579. if (R3 == R1) {
  2580. IWL_ERROR("Calibration conflict R1 == R3\n");
  2581. return -1;
  2582. }
  2583. /* Calculate temperature in degrees Kelvin, adjust by 97%.
  2584. * Add offset to center the adjustment around 0 degrees Centigrade. */
  2585. temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
  2586. temperature /= (R3 - R1);
  2587. temperature = (temperature * 97) / 100 +
  2588. TEMPERATURE_CALIB_KELVIN_OFFSET;
  2589. IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
  2590. KELVIN_TO_CELSIUS(temperature));
  2591. return temperature;
  2592. }
  2593. /* Adjust Txpower only if temperature variance is greater than threshold. */
  2594. #define IWL_TEMPERATURE_THRESHOLD 3
  2595. /**
  2596. * iwl4965_is_temp_calib_needed - determines if new calibration is needed
  2597. *
  2598. * If the temperature changed has changed sufficiently, then a recalibration
  2599. * is needed.
  2600. *
  2601. * Assumes caller will replace priv->last_temperature once calibration
  2602. * executed.
  2603. */
  2604. static int iwl4965_is_temp_calib_needed(struct iwl4965_priv *priv)
  2605. {
  2606. int temp_diff;
  2607. if (!test_bit(STATUS_STATISTICS, &priv->status)) {
  2608. IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
  2609. return 0;
  2610. }
  2611. temp_diff = priv->temperature - priv->last_temperature;
  2612. /* get absolute value */
  2613. if (temp_diff < 0) {
  2614. IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
  2615. temp_diff = -temp_diff;
  2616. } else if (temp_diff == 0)
  2617. IWL_DEBUG_POWER("Same temp, \n");
  2618. else
  2619. IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
  2620. if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
  2621. IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
  2622. return 0;
  2623. }
  2624. IWL_DEBUG_POWER("Thermal txpower calib needed\n");
  2625. return 1;
  2626. }
  2627. /* Calculate noise level, based on measurements during network silence just
  2628. * before arriving beacon. This measurement can be done only if we know
  2629. * exactly when to expect beacons, therefore only when we're associated. */
  2630. static void iwl4965_rx_calc_noise(struct iwl4965_priv *priv)
  2631. {
  2632. struct statistics_rx_non_phy *rx_info
  2633. = &(priv->statistics.rx.general);
  2634. int num_active_rx = 0;
  2635. int total_silence = 0;
  2636. int bcn_silence_a =
  2637. le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
  2638. int bcn_silence_b =
  2639. le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
  2640. int bcn_silence_c =
  2641. le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
  2642. if (bcn_silence_a) {
  2643. total_silence += bcn_silence_a;
  2644. num_active_rx++;
  2645. }
  2646. if (bcn_silence_b) {
  2647. total_silence += bcn_silence_b;
  2648. num_active_rx++;
  2649. }
  2650. if (bcn_silence_c) {
  2651. total_silence += bcn_silence_c;
  2652. num_active_rx++;
  2653. }
  2654. /* Average among active antennas */
  2655. if (num_active_rx)
  2656. priv->last_rx_noise = (total_silence / num_active_rx) - 107;
  2657. else
  2658. priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  2659. IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
  2660. bcn_silence_a, bcn_silence_b, bcn_silence_c,
  2661. priv->last_rx_noise);
  2662. }
  2663. void iwl4965_hw_rx_statistics(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  2664. {
  2665. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2666. int change;
  2667. s32 temp;
  2668. IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
  2669. (int)sizeof(priv->statistics), pkt->len);
  2670. change = ((priv->statistics.general.temperature !=
  2671. pkt->u.stats.general.temperature) ||
  2672. ((priv->statistics.flag &
  2673. STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
  2674. (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
  2675. memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
  2676. set_bit(STATUS_STATISTICS, &priv->status);
  2677. /* Reschedule the statistics timer to occur in
  2678. * REG_RECALIB_PERIOD seconds to ensure we get a
  2679. * thermal update even if the uCode doesn't give
  2680. * us one */
  2681. mod_timer(&priv->statistics_periodic, jiffies +
  2682. msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
  2683. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
  2684. (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
  2685. iwl4965_rx_calc_noise(priv);
  2686. #ifdef CONFIG_IWL4965_SENSITIVITY
  2687. queue_work(priv->workqueue, &priv->sensitivity_work);
  2688. #endif
  2689. }
  2690. /* If the hardware hasn't reported a change in
  2691. * temperature then don't bother computing a
  2692. * calibrated temperature value */
  2693. if (!change)
  2694. return;
  2695. temp = iwl4965_get_temperature(priv);
  2696. if (temp < 0)
  2697. return;
  2698. if (priv->temperature != temp) {
  2699. if (priv->temperature)
  2700. IWL_DEBUG_TEMP("Temperature changed "
  2701. "from %dC to %dC\n",
  2702. KELVIN_TO_CELSIUS(priv->temperature),
  2703. KELVIN_TO_CELSIUS(temp));
  2704. else
  2705. IWL_DEBUG_TEMP("Temperature "
  2706. "initialized to %dC\n",
  2707. KELVIN_TO_CELSIUS(temp));
  2708. }
  2709. priv->temperature = temp;
  2710. set_bit(STATUS_TEMPERATURE, &priv->status);
  2711. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
  2712. iwl4965_is_temp_calib_needed(priv))
  2713. queue_work(priv->workqueue, &priv->txpower_work);
  2714. }
  2715. static void iwl4965_add_radiotap(struct iwl4965_priv *priv,
  2716. struct sk_buff *skb,
  2717. struct iwl4965_rx_phy_res *rx_start,
  2718. struct ieee80211_rx_status *stats,
  2719. u32 ampdu_status)
  2720. {
  2721. s8 signal = stats->ssi;
  2722. s8 noise = 0;
  2723. int rate = stats->rate_idx;
  2724. u64 tsf = stats->mactime;
  2725. __le16 phy_flags_hw = rx_start->phy_flags;
  2726. struct iwl4965_rt_rx_hdr {
  2727. struct ieee80211_radiotap_header rt_hdr;
  2728. __le64 rt_tsf; /* TSF */
  2729. u8 rt_flags; /* radiotap packet flags */
  2730. u8 rt_rate; /* rate in 500kb/s */
  2731. __le16 rt_channelMHz; /* channel in MHz */
  2732. __le16 rt_chbitmask; /* channel bitfield */
  2733. s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
  2734. s8 rt_dbmnoise;
  2735. u8 rt_antenna; /* antenna number */
  2736. } __attribute__ ((packed)) *iwl4965_rt;
  2737. /* TODO: We won't have enough headroom for HT frames. Fix it later. */
  2738. if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
  2739. if (net_ratelimit())
  2740. printk(KERN_ERR "not enough headroom [%d] for "
  2741. "radiotap head [%zd]\n",
  2742. skb_headroom(skb), sizeof(*iwl4965_rt));
  2743. return;
  2744. }
  2745. /* put radiotap header in front of 802.11 header and data */
  2746. iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
  2747. /* initialise radiotap header */
  2748. iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  2749. iwl4965_rt->rt_hdr.it_pad = 0;
  2750. /* total header + data */
  2751. put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
  2752. &iwl4965_rt->rt_hdr.it_len);
  2753. /* Indicate all the fields we add to the radiotap header */
  2754. put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  2755. (1 << IEEE80211_RADIOTAP_FLAGS) |
  2756. (1 << IEEE80211_RADIOTAP_RATE) |
  2757. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  2758. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  2759. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  2760. (1 << IEEE80211_RADIOTAP_ANTENNA)),
  2761. &iwl4965_rt->rt_hdr.it_present);
  2762. /* Zero the flags, we'll add to them as we go */
  2763. iwl4965_rt->rt_flags = 0;
  2764. put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
  2765. iwl4965_rt->rt_dbmsignal = signal;
  2766. iwl4965_rt->rt_dbmnoise = noise;
  2767. /* Convert the channel frequency and set the flags */
  2768. put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
  2769. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  2770. put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
  2771. IEEE80211_CHAN_5GHZ),
  2772. &iwl4965_rt->rt_chbitmask);
  2773. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  2774. put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
  2775. IEEE80211_CHAN_2GHZ),
  2776. &iwl4965_rt->rt_chbitmask);
  2777. else /* 802.11g */
  2778. put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
  2779. IEEE80211_CHAN_2GHZ),
  2780. &iwl4965_rt->rt_chbitmask);
  2781. if (rate == -1)
  2782. iwl4965_rt->rt_rate = 0;
  2783. else
  2784. iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
  2785. /*
  2786. * "antenna number"
  2787. *
  2788. * It seems that the antenna field in the phy flags value
  2789. * is actually a bitfield. This is undefined by radiotap,
  2790. * it wants an actual antenna number but I always get "7"
  2791. * for most legacy frames I receive indicating that the
  2792. * same frame was received on all three RX chains.
  2793. *
  2794. * I think this field should be removed in favour of a
  2795. * new 802.11n radiotap field "RX chains" that is defined
  2796. * as a bitmask.
  2797. */
  2798. iwl4965_rt->rt_antenna =
  2799. le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
  2800. /* set the preamble flag if appropriate */
  2801. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  2802. iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  2803. stats->flag |= RX_FLAG_RADIOTAP;
  2804. }
  2805. static void iwl4965_handle_data_packet(struct iwl4965_priv *priv, int is_data,
  2806. int include_phy,
  2807. struct iwl4965_rx_mem_buffer *rxb,
  2808. struct ieee80211_rx_status *stats)
  2809. {
  2810. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  2811. struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
  2812. (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
  2813. struct ieee80211_hdr *hdr;
  2814. u16 len;
  2815. __le32 *rx_end;
  2816. unsigned int skblen;
  2817. u32 ampdu_status;
  2818. if (!include_phy && priv->last_phy_res[0])
  2819. rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
  2820. if (!rx_start) {
  2821. IWL_ERROR("MPDU frame without a PHY data\n");
  2822. return;
  2823. }
  2824. if (include_phy) {
  2825. hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
  2826. rx_start->cfg_phy_cnt);
  2827. len = le16_to_cpu(rx_start->byte_count);
  2828. rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
  2829. sizeof(struct iwl4965_rx_phy_res) +
  2830. rx_start->cfg_phy_cnt + len);
  2831. } else {
  2832. struct iwl4965_rx_mpdu_res_start *amsdu =
  2833. (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
  2834. hdr = (struct ieee80211_hdr *)(pkt->u.raw +
  2835. sizeof(struct iwl4965_rx_mpdu_res_start));
  2836. len = le16_to_cpu(amsdu->byte_count);
  2837. rx_start->byte_count = amsdu->byte_count;
  2838. rx_end = (__le32 *) (((u8 *) hdr) + len);
  2839. }
  2840. if (len > priv->hw_setting.max_pkt_size || len < 16) {
  2841. IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
  2842. return;
  2843. }
  2844. ampdu_status = le32_to_cpu(*rx_end);
  2845. skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
  2846. /* start from MAC */
  2847. skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
  2848. skb_put(rxb->skb, len); /* end where data ends */
  2849. /* We only process data packets if the interface is open */
  2850. if (unlikely(!priv->is_open)) {
  2851. IWL_DEBUG_DROP_LIMIT
  2852. ("Dropping packet while interface is not open.\n");
  2853. return;
  2854. }
  2855. stats->flag = 0;
  2856. hdr = (struct ieee80211_hdr *)rxb->skb->data;
  2857. if (iwl4965_param_hwcrypto)
  2858. iwl4965_set_decrypted_flag(priv, rxb->skb, ampdu_status, stats);
  2859. if (priv->add_radiotap)
  2860. iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
  2861. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2862. priv->alloc_rxb_skb--;
  2863. rxb->skb = NULL;
  2864. #ifdef LED
  2865. priv->led_packets += len;
  2866. iwl4965_setup_activity_timer(priv);
  2867. #endif
  2868. }
  2869. /* Calc max signal level (dBm) among 3 possible receivers */
  2870. static int iwl4965_calc_rssi(struct iwl4965_rx_phy_res *rx_resp)
  2871. {
  2872. /* data from PHY/DSP regarding signal strength, etc.,
  2873. * contents are always there, not configurable by host. */
  2874. struct iwl4965_rx_non_cfg_phy *ncphy =
  2875. (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
  2876. u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
  2877. >> IWL_AGC_DB_POS;
  2878. u32 valid_antennae =
  2879. (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
  2880. >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
  2881. u8 max_rssi = 0;
  2882. u32 i;
  2883. /* Find max rssi among 3 possible receivers.
  2884. * These values are measured by the digital signal processor (DSP).
  2885. * They should stay fairly constant even as the signal strength varies,
  2886. * if the radio's automatic gain control (AGC) is working right.
  2887. * AGC value (see below) will provide the "interesting" info. */
  2888. for (i = 0; i < 3; i++)
  2889. if (valid_antennae & (1 << i))
  2890. max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
  2891. IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
  2892. ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
  2893. max_rssi, agc);
  2894. /* dBm = max_rssi dB - agc dB - constant.
  2895. * Higher AGC (higher radio gain) means lower signal. */
  2896. return (max_rssi - agc - IWL_RSSI_OFFSET);
  2897. }
  2898. #ifdef CONFIG_IWL4965_HT
  2899. /* Parsed Information Elements */
  2900. struct ieee802_11_elems {
  2901. u8 *ds_params;
  2902. u8 ds_params_len;
  2903. u8 *tim;
  2904. u8 tim_len;
  2905. u8 *ibss_params;
  2906. u8 ibss_params_len;
  2907. u8 *erp_info;
  2908. u8 erp_info_len;
  2909. u8 *ht_cap_param;
  2910. u8 ht_cap_param_len;
  2911. u8 *ht_extra_param;
  2912. u8 ht_extra_param_len;
  2913. };
  2914. static int parse_elems(u8 *start, size_t len, struct ieee802_11_elems *elems)
  2915. {
  2916. size_t left = len;
  2917. u8 *pos = start;
  2918. int unknown = 0;
  2919. memset(elems, 0, sizeof(*elems));
  2920. while (left >= 2) {
  2921. u8 id, elen;
  2922. id = *pos++;
  2923. elen = *pos++;
  2924. left -= 2;
  2925. if (elen > left)
  2926. return -1;
  2927. switch (id) {
  2928. case WLAN_EID_DS_PARAMS:
  2929. elems->ds_params = pos;
  2930. elems->ds_params_len = elen;
  2931. break;
  2932. case WLAN_EID_TIM:
  2933. elems->tim = pos;
  2934. elems->tim_len = elen;
  2935. break;
  2936. case WLAN_EID_IBSS_PARAMS:
  2937. elems->ibss_params = pos;
  2938. elems->ibss_params_len = elen;
  2939. break;
  2940. case WLAN_EID_ERP_INFO:
  2941. elems->erp_info = pos;
  2942. elems->erp_info_len = elen;
  2943. break;
  2944. case WLAN_EID_HT_CAPABILITY:
  2945. elems->ht_cap_param = pos;
  2946. elems->ht_cap_param_len = elen;
  2947. break;
  2948. case WLAN_EID_HT_EXTRA_INFO:
  2949. elems->ht_extra_param = pos;
  2950. elems->ht_extra_param_len = elen;
  2951. break;
  2952. default:
  2953. unknown++;
  2954. break;
  2955. }
  2956. left -= elen;
  2957. pos += elen;
  2958. }
  2959. return 0;
  2960. }
  2961. void iwl4965_init_ht_hw_capab(struct ieee80211_ht_info *ht_info,
  2962. enum ieee80211_band band)
  2963. {
  2964. ht_info->cap = 0;
  2965. memset(ht_info->supp_mcs_set, 0, 16);
  2966. ht_info->ht_supported = 1;
  2967. if (band == IEEE80211_BAND_5GHZ) {
  2968. ht_info->cap |= (u16)IEEE80211_HT_CAP_SUP_WIDTH;
  2969. ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_40;
  2970. ht_info->supp_mcs_set[4] = 0x01;
  2971. }
  2972. ht_info->cap |= (u16)IEEE80211_HT_CAP_GRN_FLD;
  2973. ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_20;
  2974. ht_info->cap |= (u16)(IEEE80211_HT_CAP_MIMO_PS &
  2975. (IWL_MIMO_PS_NONE << 2));
  2976. if (iwl4965_param_amsdu_size_8K) {
  2977. printk(KERN_DEBUG "iwl4965 in A-MSDU 8K support mode\n");
  2978. ht_info->cap |= (u16)IEEE80211_HT_CAP_MAX_AMSDU;
  2979. }
  2980. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  2981. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  2982. ht_info->supp_mcs_set[0] = 0xFF;
  2983. ht_info->supp_mcs_set[1] = 0xFF;
  2984. }
  2985. #endif /* CONFIG_IWL4965_HT */
  2986. static void iwl4965_sta_modify_ps_wake(struct iwl4965_priv *priv, int sta_id)
  2987. {
  2988. unsigned long flags;
  2989. spin_lock_irqsave(&priv->sta_lock, flags);
  2990. priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
  2991. priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
  2992. priv->stations[sta_id].sta.sta.modify_mask = 0;
  2993. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  2994. spin_unlock_irqrestore(&priv->sta_lock, flags);
  2995. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  2996. }
  2997. static void iwl4965_update_ps_mode(struct iwl4965_priv *priv, u16 ps_bit, u8 *addr)
  2998. {
  2999. /* FIXME: need locking over ps_status ??? */
  3000. u8 sta_id = iwl4965_hw_find_station(priv, addr);
  3001. if (sta_id != IWL_INVALID_STATION) {
  3002. u8 sta_awake = priv->stations[sta_id].
  3003. ps_status == STA_PS_STATUS_WAKE;
  3004. if (sta_awake && ps_bit)
  3005. priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
  3006. else if (!sta_awake && !ps_bit) {
  3007. iwl4965_sta_modify_ps_wake(priv, sta_id);
  3008. priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
  3009. }
  3010. }
  3011. }
  3012. #ifdef CONFIG_IWL4965_DEBUG
  3013. /**
  3014. * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
  3015. *
  3016. * You may hack this function to show different aspects of received frames,
  3017. * including selective frame dumps.
  3018. * group100 parameter selects whether to show 1 out of 100 good frames.
  3019. *
  3020. * TODO: This was originally written for 3945, need to audit for
  3021. * proper operation with 4965.
  3022. */
  3023. static void iwl4965_dbg_report_frame(struct iwl4965_priv *priv,
  3024. struct iwl4965_rx_packet *pkt,
  3025. struct ieee80211_hdr *header, int group100)
  3026. {
  3027. u32 to_us;
  3028. u32 print_summary = 0;
  3029. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  3030. u32 hundred = 0;
  3031. u32 dataframe = 0;
  3032. u16 fc;
  3033. u16 seq_ctl;
  3034. u16 channel;
  3035. u16 phy_flags;
  3036. int rate_sym;
  3037. u16 length;
  3038. u16 status;
  3039. u16 bcn_tmr;
  3040. u32 tsf_low;
  3041. u64 tsf;
  3042. u8 rssi;
  3043. u8 agc;
  3044. u16 sig_avg;
  3045. u16 noise_diff;
  3046. struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  3047. struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  3048. struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
  3049. u8 *data = IWL_RX_DATA(pkt);
  3050. if (likely(!(iwl4965_debug_level & IWL_DL_RX)))
  3051. return;
  3052. /* MAC header */
  3053. fc = le16_to_cpu(header->frame_control);
  3054. seq_ctl = le16_to_cpu(header->seq_ctrl);
  3055. /* metadata */
  3056. channel = le16_to_cpu(rx_hdr->channel);
  3057. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  3058. rate_sym = rx_hdr->rate;
  3059. length = le16_to_cpu(rx_hdr->len);
  3060. /* end-of-frame status and timestamp */
  3061. status = le32_to_cpu(rx_end->status);
  3062. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  3063. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  3064. tsf = le64_to_cpu(rx_end->timestamp);
  3065. /* signal statistics */
  3066. rssi = rx_stats->rssi;
  3067. agc = rx_stats->agc;
  3068. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  3069. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  3070. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  3071. /* if data frame is to us and all is good,
  3072. * (optionally) print summary for only 1 out of every 100 */
  3073. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  3074. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  3075. dataframe = 1;
  3076. if (!group100)
  3077. print_summary = 1; /* print each frame */
  3078. else if (priv->framecnt_to_us < 100) {
  3079. priv->framecnt_to_us++;
  3080. print_summary = 0;
  3081. } else {
  3082. priv->framecnt_to_us = 0;
  3083. print_summary = 1;
  3084. hundred = 1;
  3085. }
  3086. } else {
  3087. /* print summary for all other frames */
  3088. print_summary = 1;
  3089. }
  3090. if (print_summary) {
  3091. char *title;
  3092. int rate_idx;
  3093. u32 bitrate;
  3094. if (hundred)
  3095. title = "100Frames";
  3096. else if (fc & IEEE80211_FCTL_RETRY)
  3097. title = "Retry";
  3098. else if (ieee80211_is_assoc_response(fc))
  3099. title = "AscRsp";
  3100. else if (ieee80211_is_reassoc_response(fc))
  3101. title = "RasRsp";
  3102. else if (ieee80211_is_probe_response(fc)) {
  3103. title = "PrbRsp";
  3104. print_dump = 1; /* dump frame contents */
  3105. } else if (ieee80211_is_beacon(fc)) {
  3106. title = "Beacon";
  3107. print_dump = 1; /* dump frame contents */
  3108. } else if (ieee80211_is_atim(fc))
  3109. title = "ATIM";
  3110. else if (ieee80211_is_auth(fc))
  3111. title = "Auth";
  3112. else if (ieee80211_is_deauth(fc))
  3113. title = "DeAuth";
  3114. else if (ieee80211_is_disassoc(fc))
  3115. title = "DisAssoc";
  3116. else
  3117. title = "Frame";
  3118. rate_idx = iwl4965_hwrate_to_plcp_idx(rate_sym);
  3119. if (unlikely(rate_idx == -1))
  3120. bitrate = 0;
  3121. else
  3122. bitrate = iwl4965_rates[rate_idx].ieee / 2;
  3123. /* print frame summary.
  3124. * MAC addresses show just the last byte (for brevity),
  3125. * but you can hack it to show more, if you'd like to. */
  3126. if (dataframe)
  3127. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  3128. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  3129. title, fc, header->addr1[5],
  3130. length, rssi, channel, bitrate);
  3131. else {
  3132. /* src/dst addresses assume managed mode */
  3133. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  3134. "src=0x%02x, rssi=%u, tim=%lu usec, "
  3135. "phy=0x%02x, chnl=%d\n",
  3136. title, fc, header->addr1[5],
  3137. header->addr3[5], rssi,
  3138. tsf_low - priv->scan_start_tsf,
  3139. phy_flags, channel);
  3140. }
  3141. }
  3142. if (print_dump)
  3143. iwl4965_print_hex_dump(IWL_DL_RX, data, length);
  3144. }
  3145. #else
  3146. static inline void iwl4965_dbg_report_frame(struct iwl4965_priv *priv,
  3147. struct iwl4965_rx_packet *pkt,
  3148. struct ieee80211_hdr *header,
  3149. int group100)
  3150. {
  3151. }
  3152. #endif
  3153. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  3154. /* Called for REPLY_4965_RX (legacy ABG frames), or
  3155. * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
  3156. static void iwl4965_rx_reply_rx(struct iwl4965_priv *priv,
  3157. struct iwl4965_rx_mem_buffer *rxb)
  3158. {
  3159. struct ieee80211_hdr *header;
  3160. struct ieee80211_rx_status rx_status;
  3161. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3162. /* Use phy data (Rx signal strength, etc.) contained within
  3163. * this rx packet for legacy frames,
  3164. * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
  3165. int include_phy = (pkt->hdr.cmd == REPLY_4965_RX);
  3166. struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
  3167. (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
  3168. (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
  3169. __le32 *rx_end;
  3170. unsigned int len = 0;
  3171. u16 fc;
  3172. u8 network_packet;
  3173. rx_status.mactime = le64_to_cpu(rx_start->timestamp);
  3174. rx_status.freq = ieee80211chan2mhz(le16_to_cpu(rx_start->channel));
  3175. rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
  3176. IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  3177. rx_status.rate_idx = iwl4965_hwrate_to_plcp_idx(
  3178. le32_to_cpu(rx_start->rate_n_flags));
  3179. if (rx_status.band == IEEE80211_BAND_5GHZ)
  3180. rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
  3181. rx_status.antenna = 0;
  3182. rx_status.flag = 0;
  3183. if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
  3184. IWL_DEBUG_DROP
  3185. ("dsp size out of range [0,20]: "
  3186. "%d/n", rx_start->cfg_phy_cnt);
  3187. return;
  3188. }
  3189. if (!include_phy) {
  3190. if (priv->last_phy_res[0])
  3191. rx_start = (struct iwl4965_rx_phy_res *)
  3192. &priv->last_phy_res[1];
  3193. else
  3194. rx_start = NULL;
  3195. }
  3196. if (!rx_start) {
  3197. IWL_ERROR("MPDU frame without a PHY data\n");
  3198. return;
  3199. }
  3200. if (include_phy) {
  3201. header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
  3202. + rx_start->cfg_phy_cnt);
  3203. len = le16_to_cpu(rx_start->byte_count);
  3204. rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
  3205. sizeof(struct iwl4965_rx_phy_res) + len);
  3206. } else {
  3207. struct iwl4965_rx_mpdu_res_start *amsdu =
  3208. (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
  3209. header = (void *)(pkt->u.raw +
  3210. sizeof(struct iwl4965_rx_mpdu_res_start));
  3211. len = le16_to_cpu(amsdu->byte_count);
  3212. rx_end = (__le32 *) (pkt->u.raw +
  3213. sizeof(struct iwl4965_rx_mpdu_res_start) + len);
  3214. }
  3215. if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
  3216. !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
  3217. IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
  3218. le32_to_cpu(*rx_end));
  3219. return;
  3220. }
  3221. priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
  3222. /* Find max signal strength (dBm) among 3 antenna/receiver chains */
  3223. rx_status.ssi = iwl4965_calc_rssi(rx_start);
  3224. /* Meaningful noise values are available only from beacon statistics,
  3225. * which are gathered only when associated, and indicate noise
  3226. * only for the associated network channel ...
  3227. * Ignore these noise values while scanning (other channels) */
  3228. if (iwl4965_is_associated(priv) &&
  3229. !test_bit(STATUS_SCANNING, &priv->status)) {
  3230. rx_status.noise = priv->last_rx_noise;
  3231. rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi,
  3232. rx_status.noise);
  3233. } else {
  3234. rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  3235. rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi, 0);
  3236. }
  3237. /* Reset beacon noise level if not associated. */
  3238. if (!iwl4965_is_associated(priv))
  3239. priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  3240. /* Set "1" to report good data frames in groups of 100 */
  3241. /* FIXME: need to optimze the call: */
  3242. iwl4965_dbg_report_frame(priv, pkt, header, 1);
  3243. IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
  3244. rx_status.ssi, rx_status.noise, rx_status.signal,
  3245. rx_status.mactime);
  3246. network_packet = iwl4965_is_network_packet(priv, header);
  3247. if (network_packet) {
  3248. priv->last_rx_rssi = rx_status.ssi;
  3249. priv->last_beacon_time = priv->ucode_beacon_time;
  3250. priv->last_tsf = le64_to_cpu(rx_start->timestamp);
  3251. }
  3252. fc = le16_to_cpu(header->frame_control);
  3253. switch (fc & IEEE80211_FCTL_FTYPE) {
  3254. case IEEE80211_FTYPE_MGMT:
  3255. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  3256. iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
  3257. header->addr2);
  3258. switch (fc & IEEE80211_FCTL_STYPE) {
  3259. case IEEE80211_STYPE_PROBE_RESP:
  3260. case IEEE80211_STYPE_BEACON:
  3261. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA &&
  3262. !compare_ether_addr(header->addr2, priv->bssid)) ||
  3263. (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
  3264. !compare_ether_addr(header->addr3, priv->bssid))) {
  3265. struct ieee80211_mgmt *mgmt =
  3266. (struct ieee80211_mgmt *)header;
  3267. u64 timestamp =
  3268. le64_to_cpu(mgmt->u.beacon.timestamp);
  3269. priv->timestamp0 = timestamp & 0xFFFFFFFF;
  3270. priv->timestamp1 =
  3271. (timestamp >> 32) & 0xFFFFFFFF;
  3272. priv->beacon_int = le16_to_cpu(
  3273. mgmt->u.beacon.beacon_int);
  3274. if (priv->call_post_assoc_from_beacon &&
  3275. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  3276. priv->call_post_assoc_from_beacon = 0;
  3277. queue_work(priv->workqueue,
  3278. &priv->post_associate.work);
  3279. }
  3280. }
  3281. break;
  3282. case IEEE80211_STYPE_ACTION:
  3283. break;
  3284. /*
  3285. * TODO: Use the new callback function from
  3286. * mac80211 instead of sniffing these packets.
  3287. */
  3288. case IEEE80211_STYPE_ASSOC_RESP:
  3289. case IEEE80211_STYPE_REASSOC_RESP:
  3290. if (network_packet) {
  3291. #ifdef CONFIG_IWL4965_HT
  3292. u8 *pos = NULL;
  3293. struct ieee802_11_elems elems;
  3294. #endif /*CONFIG_IWL4965_HT */
  3295. struct ieee80211_mgmt *mgnt =
  3296. (struct ieee80211_mgmt *)header;
  3297. /* We have just associated, give some
  3298. * time for the 4-way handshake if
  3299. * any. Don't start scan too early. */
  3300. priv->next_scan_jiffies = jiffies +
  3301. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  3302. priv->assoc_id = (~((1 << 15) | (1 << 14))
  3303. & le16_to_cpu(mgnt->u.assoc_resp.aid));
  3304. priv->assoc_capability =
  3305. le16_to_cpu(
  3306. mgnt->u.assoc_resp.capab_info);
  3307. #ifdef CONFIG_IWL4965_HT
  3308. pos = mgnt->u.assoc_resp.variable;
  3309. if (!parse_elems(pos,
  3310. len - (pos - (u8 *) mgnt),
  3311. &elems)) {
  3312. if (elems.ht_extra_param &&
  3313. elems.ht_cap_param)
  3314. break;
  3315. }
  3316. #endif /*CONFIG_IWL4965_HT */
  3317. /* assoc_id is 0 no association */
  3318. if (!priv->assoc_id)
  3319. break;
  3320. if (priv->beacon_int)
  3321. queue_work(priv->workqueue,
  3322. &priv->post_associate.work);
  3323. else
  3324. priv->call_post_assoc_from_beacon = 1;
  3325. }
  3326. break;
  3327. case IEEE80211_STYPE_PROBE_REQ:
  3328. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  3329. !iwl4965_is_associated(priv)) {
  3330. DECLARE_MAC_BUF(mac1);
  3331. DECLARE_MAC_BUF(mac2);
  3332. DECLARE_MAC_BUF(mac3);
  3333. IWL_DEBUG_DROP("Dropping (non network): "
  3334. "%s, %s, %s\n",
  3335. print_mac(mac1, header->addr1),
  3336. print_mac(mac2, header->addr2),
  3337. print_mac(mac3, header->addr3));
  3338. return;
  3339. }
  3340. }
  3341. iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
  3342. break;
  3343. case IEEE80211_FTYPE_CTL:
  3344. #ifdef CONFIG_IWL4965_HT
  3345. switch (fc & IEEE80211_FCTL_STYPE) {
  3346. case IEEE80211_STYPE_BACK_REQ:
  3347. IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
  3348. iwl4965_handle_data_packet(priv, 0, include_phy,
  3349. rxb, &rx_status);
  3350. break;
  3351. default:
  3352. break;
  3353. }
  3354. #endif
  3355. break;
  3356. case IEEE80211_FTYPE_DATA: {
  3357. DECLARE_MAC_BUF(mac1);
  3358. DECLARE_MAC_BUF(mac2);
  3359. DECLARE_MAC_BUF(mac3);
  3360. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  3361. iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
  3362. header->addr2);
  3363. if (unlikely(!network_packet))
  3364. IWL_DEBUG_DROP("Dropping (non network): "
  3365. "%s, %s, %s\n",
  3366. print_mac(mac1, header->addr1),
  3367. print_mac(mac2, header->addr2),
  3368. print_mac(mac3, header->addr3));
  3369. else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
  3370. IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
  3371. print_mac(mac1, header->addr1),
  3372. print_mac(mac2, header->addr2),
  3373. print_mac(mac3, header->addr3));
  3374. else
  3375. iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
  3376. &rx_status);
  3377. break;
  3378. }
  3379. default:
  3380. break;
  3381. }
  3382. }
  3383. /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
  3384. * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
  3385. static void iwl4965_rx_reply_rx_phy(struct iwl4965_priv *priv,
  3386. struct iwl4965_rx_mem_buffer *rxb)
  3387. {
  3388. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3389. priv->last_phy_res[0] = 1;
  3390. memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
  3391. sizeof(struct iwl4965_rx_phy_res));
  3392. }
  3393. static void iwl4965_rx_missed_beacon_notif(struct iwl4965_priv *priv,
  3394. struct iwl4965_rx_mem_buffer *rxb)
  3395. {
  3396. #ifdef CONFIG_IWL4965_SENSITIVITY
  3397. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3398. struct iwl4965_missed_beacon_notif *missed_beacon;
  3399. missed_beacon = &pkt->u.missed_beacon;
  3400. if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
  3401. IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
  3402. le32_to_cpu(missed_beacon->consequtive_missed_beacons),
  3403. le32_to_cpu(missed_beacon->total_missed_becons),
  3404. le32_to_cpu(missed_beacon->num_recvd_beacons),
  3405. le32_to_cpu(missed_beacon->num_expected_beacons));
  3406. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  3407. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)))
  3408. queue_work(priv->workqueue, &priv->sensitivity_work);
  3409. }
  3410. #endif /*CONFIG_IWL4965_SENSITIVITY*/
  3411. }
  3412. #ifdef CONFIG_IWL4965_HT
  3413. /**
  3414. * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table
  3415. */
  3416. static void iwl4965_sta_modify_enable_tid_tx(struct iwl4965_priv *priv,
  3417. int sta_id, int tid)
  3418. {
  3419. unsigned long flags;
  3420. /* Remove "disable" flag, to enable Tx for this TID */
  3421. spin_lock_irqsave(&priv->sta_lock, flags);
  3422. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
  3423. priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
  3424. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  3425. spin_unlock_irqrestore(&priv->sta_lock, flags);
  3426. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  3427. }
  3428. /**
  3429. * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
  3430. *
  3431. * Go through block-ack's bitmap of ACK'd frames, update driver's record of
  3432. * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
  3433. */
  3434. static int iwl4965_tx_status_reply_compressed_ba(struct iwl4965_priv *priv,
  3435. struct iwl4965_ht_agg *agg,
  3436. struct iwl4965_compressed_ba_resp*
  3437. ba_resp)
  3438. {
  3439. int i, sh, ack;
  3440. u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
  3441. u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
  3442. u64 bitmap;
  3443. int successes = 0;
  3444. struct ieee80211_tx_status *tx_status;
  3445. if (unlikely(!agg->wait_for_ba)) {
  3446. IWL_ERROR("Received BA when not expected\n");
  3447. return -EINVAL;
  3448. }
  3449. /* Mark that the expected block-ack response arrived */
  3450. agg->wait_for_ba = 0;
  3451. IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
  3452. /* Calculate shift to align block-ack bits with our Tx window bits */
  3453. sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
  3454. if (sh < 0) /* tbw something is wrong with indices */
  3455. sh += 0x100;
  3456. /* don't use 64-bit values for now */
  3457. bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
  3458. if (agg->frame_count > (64 - sh)) {
  3459. IWL_DEBUG_TX_REPLY("more frames than bitmap size");
  3460. return -1;
  3461. }
  3462. /* check for success or failure according to the
  3463. * transmitted bitmap and block-ack bitmap */
  3464. bitmap &= agg->bitmap;
  3465. /* For each frame attempted in aggregation,
  3466. * update driver's record of tx frame's status. */
  3467. for (i = 0; i < agg->frame_count ; i++) {
  3468. ack = bitmap & (1 << i);
  3469. successes += !!ack;
  3470. IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
  3471. ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
  3472. agg->start_idx + i);
  3473. }
  3474. tx_status = &priv->txq[scd_flow].txb[agg->start_idx].status;
  3475. tx_status->flags = IEEE80211_TX_STATUS_ACK;
  3476. tx_status->flags |= IEEE80211_TX_STATUS_AMPDU;
  3477. tx_status->ampdu_ack_map = successes;
  3478. tx_status->ampdu_ack_len = agg->frame_count;
  3479. iwl4965_hwrate_to_tx_control(priv, agg->rate_n_flags,
  3480. &tx_status->control);
  3481. IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
  3482. return 0;
  3483. }
  3484. /**
  3485. * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
  3486. */
  3487. static void iwl4965_tx_queue_stop_scheduler(struct iwl4965_priv *priv,
  3488. u16 txq_id)
  3489. {
  3490. /* Simply stop the queue, but don't change any configuration;
  3491. * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
  3492. iwl4965_write_prph(priv,
  3493. KDR_SCD_QUEUE_STATUS_BITS(txq_id),
  3494. (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)|
  3495. (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
  3496. }
  3497. /**
  3498. * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
  3499. * priv->lock must be held by the caller
  3500. */
  3501. static int iwl4965_tx_queue_agg_disable(struct iwl4965_priv *priv, u16 txq_id,
  3502. u16 ssn_idx, u8 tx_fifo)
  3503. {
  3504. int ret = 0;
  3505. if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
  3506. IWL_WARNING("queue number too small: %d, must be > %d\n",
  3507. txq_id, IWL_BACK_QUEUE_FIRST_ID);
  3508. return -EINVAL;
  3509. }
  3510. ret = iwl4965_grab_nic_access(priv);
  3511. if (ret)
  3512. return ret;
  3513. iwl4965_tx_queue_stop_scheduler(priv, txq_id);
  3514. iwl4965_clear_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
  3515. priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
  3516. priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
  3517. /* supposes that ssn_idx is valid (!= 0xFFF) */
  3518. iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
  3519. iwl4965_clear_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
  3520. iwl4965_txq_ctx_deactivate(priv, txq_id);
  3521. iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
  3522. iwl4965_release_nic_access(priv);
  3523. return 0;
  3524. }
  3525. int iwl4965_check_empty_hw_queue(struct iwl4965_priv *priv, int sta_id,
  3526. u8 tid, int txq_id)
  3527. {
  3528. struct iwl4965_queue *q = &priv->txq[txq_id].q;
  3529. u8 *addr = priv->stations[sta_id].sta.sta.addr;
  3530. struct iwl4965_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
  3531. switch (priv->stations[sta_id].tid[tid].agg.state) {
  3532. case IWL_EMPTYING_HW_QUEUE_DELBA:
  3533. /* We are reclaiming the last packet of the */
  3534. /* aggregated HW queue */
  3535. if (txq_id == tid_data->agg.txq_id &&
  3536. q->read_ptr == q->write_ptr) {
  3537. u16 ssn = SEQ_TO_SN(tid_data->seq_number);
  3538. int tx_fifo = default_tid_to_tx_fifo[tid];
  3539. IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n");
  3540. iwl4965_tx_queue_agg_disable(priv, txq_id,
  3541. ssn, tx_fifo);
  3542. tid_data->agg.state = IWL_AGG_OFF;
  3543. ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
  3544. }
  3545. break;
  3546. case IWL_EMPTYING_HW_QUEUE_ADDBA:
  3547. /* We are reclaiming the last packet of the queue */
  3548. if (tid_data->tfds_in_queue == 0) {
  3549. IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n");
  3550. tid_data->agg.state = IWL_AGG_ON;
  3551. ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
  3552. }
  3553. break;
  3554. }
  3555. return 0;
  3556. }
  3557. /**
  3558. * iwl4965_queue_dec_wrap - Decrement queue index, wrap back to end if needed
  3559. * @index -- current index
  3560. * @n_bd -- total number of entries in queue (s/b power of 2)
  3561. */
  3562. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  3563. {
  3564. return (index == 0) ? n_bd - 1 : index - 1;
  3565. }
  3566. /**
  3567. * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
  3568. *
  3569. * Handles block-acknowledge notification from device, which reports success
  3570. * of frames sent via aggregation.
  3571. */
  3572. static void iwl4965_rx_reply_compressed_ba(struct iwl4965_priv *priv,
  3573. struct iwl4965_rx_mem_buffer *rxb)
  3574. {
  3575. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3576. struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
  3577. int index;
  3578. struct iwl4965_tx_queue *txq = NULL;
  3579. struct iwl4965_ht_agg *agg;
  3580. DECLARE_MAC_BUF(mac);
  3581. /* "flow" corresponds to Tx queue */
  3582. u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
  3583. /* "ssn" is start of block-ack Tx window, corresponds to index
  3584. * (in Tx queue's circular buffer) of first TFD/frame in window */
  3585. u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
  3586. if (scd_flow >= ARRAY_SIZE(priv->txq)) {
  3587. IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
  3588. return;
  3589. }
  3590. txq = &priv->txq[scd_flow];
  3591. agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
  3592. /* Find index just before block-ack window */
  3593. index = iwl4965_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
  3594. /* TODO: Need to get this copy more safely - now good for debug */
  3595. IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
  3596. "sta_id = %d\n",
  3597. agg->wait_for_ba,
  3598. print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
  3599. ba_resp->sta_id);
  3600. IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
  3601. "%d, scd_ssn = %d\n",
  3602. ba_resp->tid,
  3603. ba_resp->seq_ctl,
  3604. (unsigned long long)ba_resp->bitmap,
  3605. ba_resp->scd_flow,
  3606. ba_resp->scd_ssn);
  3607. IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
  3608. agg->start_idx,
  3609. (unsigned long long)agg->bitmap);
  3610. /* Update driver's record of ACK vs. not for each frame in window */
  3611. iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
  3612. /* Release all TFDs before the SSN, i.e. all TFDs in front of
  3613. * block-ack window (we assume that they've been successfully
  3614. * transmitted ... if not, it's too late anyway). */
  3615. if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
  3616. int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index);
  3617. priv->stations[ba_resp->sta_id].
  3618. tid[ba_resp->tid].tfds_in_queue -= freed;
  3619. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  3620. priv->mac80211_registered &&
  3621. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  3622. ieee80211_wake_queue(priv->hw, scd_flow);
  3623. iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id,
  3624. ba_resp->tid, scd_flow);
  3625. }
  3626. }
  3627. /**
  3628. * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
  3629. */
  3630. static int iwl4965_tx_queue_set_q2ratid(struct iwl4965_priv *priv, u16 ra_tid,
  3631. u16 txq_id)
  3632. {
  3633. u32 tbl_dw_addr;
  3634. u32 tbl_dw;
  3635. u16 scd_q2ratid;
  3636. scd_q2ratid = ra_tid & SCD_QUEUE_RA_TID_MAP_RATID_MSK;
  3637. tbl_dw_addr = priv->scd_base_addr +
  3638. SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
  3639. tbl_dw = iwl4965_read_targ_mem(priv, tbl_dw_addr);
  3640. if (txq_id & 0x1)
  3641. tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
  3642. else
  3643. tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
  3644. iwl4965_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
  3645. return 0;
  3646. }
  3647. /**
  3648. * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
  3649. *
  3650. * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
  3651. * i.e. it must be one of the higher queues used for aggregation
  3652. */
  3653. static int iwl4965_tx_queue_agg_enable(struct iwl4965_priv *priv, int txq_id,
  3654. int tx_fifo, int sta_id, int tid,
  3655. u16 ssn_idx)
  3656. {
  3657. unsigned long flags;
  3658. int rc;
  3659. u16 ra_tid;
  3660. if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
  3661. IWL_WARNING("queue number too small: %d, must be > %d\n",
  3662. txq_id, IWL_BACK_QUEUE_FIRST_ID);
  3663. ra_tid = BUILD_RAxTID(sta_id, tid);
  3664. /* Modify device's station table to Tx this TID */
  3665. iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
  3666. spin_lock_irqsave(&priv->lock, flags);
  3667. rc = iwl4965_grab_nic_access(priv);
  3668. if (rc) {
  3669. spin_unlock_irqrestore(&priv->lock, flags);
  3670. return rc;
  3671. }
  3672. /* Stop this Tx queue before configuring it */
  3673. iwl4965_tx_queue_stop_scheduler(priv, txq_id);
  3674. /* Map receiver-address / traffic-ID to this queue */
  3675. iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
  3676. /* Set this queue as a chain-building queue */
  3677. iwl4965_set_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
  3678. /* Place first TFD at index corresponding to start sequence number.
  3679. * Assumes that ssn_idx is valid (!= 0xFFF) */
  3680. priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
  3681. priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
  3682. iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
  3683. /* Set up Tx window size and frame limit for this queue */
  3684. iwl4965_write_targ_mem(priv,
  3685. priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id),
  3686. (SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
  3687. SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
  3688. iwl4965_write_targ_mem(priv, priv->scd_base_addr +
  3689. SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
  3690. (SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
  3691. & SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
  3692. iwl4965_set_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
  3693. /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
  3694. iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
  3695. iwl4965_release_nic_access(priv);
  3696. spin_unlock_irqrestore(&priv->lock, flags);
  3697. return 0;
  3698. }
  3699. #endif /* CONFIG_IWL4965_HT */
  3700. /**
  3701. * iwl4965_add_station - Initialize a station's hardware rate table
  3702. *
  3703. * The uCode's station table contains a table of fallback rates
  3704. * for automatic fallback during transmission.
  3705. *
  3706. * NOTE: This sets up a default set of values. These will be replaced later
  3707. * if the driver's iwl-4965-rs rate scaling algorithm is used, instead of
  3708. * rc80211_simple.
  3709. *
  3710. * NOTE: Run REPLY_ADD_STA command to set up station table entry, before
  3711. * calling this function (which runs REPLY_TX_LINK_QUALITY_CMD,
  3712. * which requires station table entry to exist).
  3713. */
  3714. void iwl4965_add_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  3715. {
  3716. int i, r;
  3717. struct iwl4965_link_quality_cmd link_cmd = {
  3718. .reserved1 = 0,
  3719. };
  3720. u16 rate_flags;
  3721. /* Set up the rate scaling to start at selected rate, fall back
  3722. * all the way down to 1M in IEEE order, and then spin on 1M */
  3723. if (is_ap)
  3724. r = IWL_RATE_54M_INDEX;
  3725. else if (priv->band == IEEE80211_BAND_5GHZ)
  3726. r = IWL_RATE_6M_INDEX;
  3727. else
  3728. r = IWL_RATE_1M_INDEX;
  3729. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
  3730. rate_flags = 0;
  3731. if (r >= IWL_FIRST_CCK_RATE && r <= IWL_LAST_CCK_RATE)
  3732. rate_flags |= RATE_MCS_CCK_MSK;
  3733. /* Use Tx antenna B only */
  3734. rate_flags |= RATE_MCS_ANT_B_MSK;
  3735. rate_flags &= ~RATE_MCS_ANT_A_MSK;
  3736. link_cmd.rs_table[i].rate_n_flags =
  3737. iwl4965_hw_set_rate_n_flags(iwl4965_rates[r].plcp, rate_flags);
  3738. r = iwl4965_get_prev_ieee_rate(r);
  3739. }
  3740. link_cmd.general_params.single_stream_ant_msk = 2;
  3741. link_cmd.general_params.dual_stream_ant_msk = 3;
  3742. link_cmd.agg_params.agg_dis_start_th = 3;
  3743. link_cmd.agg_params.agg_time_limit = cpu_to_le16(4000);
  3744. /* Update the rate scaling for control frame Tx to AP */
  3745. link_cmd.sta_id = is_ap ? IWL_AP_ID : priv->hw_setting.bcast_sta_id;
  3746. iwl4965_send_cmd_pdu(priv, REPLY_TX_LINK_QUALITY_CMD, sizeof(link_cmd),
  3747. &link_cmd);
  3748. }
  3749. #ifdef CONFIG_IWL4965_HT
  3750. static u8 iwl4965_is_channel_extension(struct iwl4965_priv *priv,
  3751. enum ieee80211_band band,
  3752. u16 channel, u8 extension_chan_offset)
  3753. {
  3754. const struct iwl4965_channel_info *ch_info;
  3755. ch_info = iwl4965_get_channel_info(priv, band, channel);
  3756. if (!is_channel_valid(ch_info))
  3757. return 0;
  3758. if (extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_NONE)
  3759. return 0;
  3760. if ((ch_info->fat_extension_channel == extension_chan_offset) ||
  3761. (ch_info->fat_extension_channel == HT_IE_EXT_CHANNEL_MAX))
  3762. return 1;
  3763. return 0;
  3764. }
  3765. static u8 iwl4965_is_fat_tx_allowed(struct iwl4965_priv *priv,
  3766. struct ieee80211_ht_info *sta_ht_inf)
  3767. {
  3768. struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
  3769. if ((!iwl_ht_conf->is_ht) ||
  3770. (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) ||
  3771. (iwl_ht_conf->extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_NONE))
  3772. return 0;
  3773. if (sta_ht_inf) {
  3774. if ((!sta_ht_inf->ht_supported) ||
  3775. (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH)))
  3776. return 0;
  3777. }
  3778. return (iwl4965_is_channel_extension(priv, priv->band,
  3779. iwl_ht_conf->control_channel,
  3780. iwl_ht_conf->extension_chan_offset));
  3781. }
  3782. void iwl4965_set_rxon_ht(struct iwl4965_priv *priv, struct iwl_ht_info *ht_info)
  3783. {
  3784. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  3785. u32 val;
  3786. if (!ht_info->is_ht)
  3787. return;
  3788. /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */
  3789. if (iwl4965_is_fat_tx_allowed(priv, NULL))
  3790. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
  3791. else
  3792. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  3793. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  3794. if (le16_to_cpu(rxon->channel) != ht_info->control_channel) {
  3795. IWL_DEBUG_ASSOC("control diff than current %d %d\n",
  3796. le16_to_cpu(rxon->channel),
  3797. ht_info->control_channel);
  3798. rxon->channel = cpu_to_le16(ht_info->control_channel);
  3799. return;
  3800. }
  3801. /* Note: control channel is opposite of extension channel */
  3802. switch (ht_info->extension_chan_offset) {
  3803. case IWL_EXT_CHANNEL_OFFSET_ABOVE:
  3804. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3805. break;
  3806. case IWL_EXT_CHANNEL_OFFSET_BELOW:
  3807. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3808. break;
  3809. case IWL_EXT_CHANNEL_OFFSET_NONE:
  3810. default:
  3811. rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
  3812. break;
  3813. }
  3814. val = ht_info->ht_protection;
  3815. rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
  3816. iwl4965_set_rxon_chain(priv);
  3817. IWL_DEBUG_ASSOC("supported HT rate 0x%X %X "
  3818. "rxon flags 0x%X operation mode :0x%X "
  3819. "extension channel offset 0x%x "
  3820. "control chan %d\n",
  3821. ht_info->supp_mcs_set[0], ht_info->supp_mcs_set[1],
  3822. le32_to_cpu(rxon->flags), ht_info->ht_protection,
  3823. ht_info->extension_chan_offset,
  3824. ht_info->control_channel);
  3825. return;
  3826. }
  3827. void iwl4965_set_ht_add_station(struct iwl4965_priv *priv, u8 index,
  3828. struct ieee80211_ht_info *sta_ht_inf)
  3829. {
  3830. __le32 sta_flags;
  3831. u8 mimo_ps_mode;
  3832. if (!sta_ht_inf || !sta_ht_inf->ht_supported)
  3833. goto done;
  3834. mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2;
  3835. sta_flags = priv->stations[index].sta.station_flags;
  3836. sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
  3837. switch (mimo_ps_mode) {
  3838. case WLAN_HT_CAP_MIMO_PS_STATIC:
  3839. sta_flags |= STA_FLG_MIMO_DIS_MSK;
  3840. break;
  3841. case WLAN_HT_CAP_MIMO_PS_DYNAMIC:
  3842. sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
  3843. break;
  3844. case WLAN_HT_CAP_MIMO_PS_DISABLED:
  3845. break;
  3846. default:
  3847. IWL_WARNING("Invalid MIMO PS mode %d", mimo_ps_mode);
  3848. break;
  3849. }
  3850. sta_flags |= cpu_to_le32(
  3851. (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
  3852. sta_flags |= cpu_to_le32(
  3853. (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
  3854. if (iwl4965_is_fat_tx_allowed(priv, sta_ht_inf))
  3855. sta_flags |= STA_FLG_FAT_EN_MSK;
  3856. else
  3857. sta_flags &= ~STA_FLG_FAT_EN_MSK;
  3858. priv->stations[index].sta.station_flags = sta_flags;
  3859. done:
  3860. return;
  3861. }
  3862. static void iwl4965_sta_modify_add_ba_tid(struct iwl4965_priv *priv,
  3863. int sta_id, int tid, u16 ssn)
  3864. {
  3865. unsigned long flags;
  3866. spin_lock_irqsave(&priv->sta_lock, flags);
  3867. priv->stations[sta_id].sta.station_flags_msk = 0;
  3868. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
  3869. priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
  3870. priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
  3871. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  3872. spin_unlock_irqrestore(&priv->sta_lock, flags);
  3873. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  3874. }
  3875. static void iwl4965_sta_modify_del_ba_tid(struct iwl4965_priv *priv,
  3876. int sta_id, int tid)
  3877. {
  3878. unsigned long flags;
  3879. spin_lock_irqsave(&priv->sta_lock, flags);
  3880. priv->stations[sta_id].sta.station_flags_msk = 0;
  3881. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
  3882. priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
  3883. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  3884. spin_unlock_irqrestore(&priv->sta_lock, flags);
  3885. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  3886. }
  3887. /*
  3888. * Find first available (lowest unused) Tx Queue, mark it "active".
  3889. * Called only when finding queue for aggregation.
  3890. * Should never return anything < 7, because they should already
  3891. * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
  3892. */
  3893. static int iwl4965_txq_ctx_activate_free(struct iwl4965_priv *priv)
  3894. {
  3895. int txq_id;
  3896. for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
  3897. if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
  3898. return txq_id;
  3899. return -1;
  3900. }
  3901. static int iwl4965_mac_ht_tx_agg_start(struct ieee80211_hw *hw, const u8 *da,
  3902. u16 tid, u16 *start_seq_num)
  3903. {
  3904. struct iwl4965_priv *priv = hw->priv;
  3905. int sta_id;
  3906. int tx_fifo;
  3907. int txq_id;
  3908. int ssn = -1;
  3909. int ret = 0;
  3910. unsigned long flags;
  3911. struct iwl4965_tid_data *tid_data;
  3912. DECLARE_MAC_BUF(mac);
  3913. if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
  3914. tx_fifo = default_tid_to_tx_fifo[tid];
  3915. else
  3916. return -EINVAL;
  3917. IWL_WARNING("%s on da = %s tid = %d\n",
  3918. __func__, print_mac(mac, da), tid);
  3919. sta_id = iwl4965_hw_find_station(priv, da);
  3920. if (sta_id == IWL_INVALID_STATION)
  3921. return -ENXIO;
  3922. if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
  3923. IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n");
  3924. return -ENXIO;
  3925. }
  3926. txq_id = iwl4965_txq_ctx_activate_free(priv);
  3927. if (txq_id == -1)
  3928. return -ENXIO;
  3929. spin_lock_irqsave(&priv->sta_lock, flags);
  3930. tid_data = &priv->stations[sta_id].tid[tid];
  3931. ssn = SEQ_TO_SN(tid_data->seq_number);
  3932. tid_data->agg.txq_id = txq_id;
  3933. spin_unlock_irqrestore(&priv->sta_lock, flags);
  3934. *start_seq_num = ssn;
  3935. ret = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
  3936. sta_id, tid, ssn);
  3937. if (ret)
  3938. return ret;
  3939. ret = 0;
  3940. if (tid_data->tfds_in_queue == 0) {
  3941. printk(KERN_ERR "HW queue is empty\n");
  3942. tid_data->agg.state = IWL_AGG_ON;
  3943. ieee80211_start_tx_ba_cb_irqsafe(hw, da, tid);
  3944. } else {
  3945. IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n",
  3946. tid_data->tfds_in_queue);
  3947. tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
  3948. }
  3949. return ret;
  3950. }
  3951. static int iwl4965_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, const u8 *da,
  3952. u16 tid)
  3953. {
  3954. struct iwl4965_priv *priv = hw->priv;
  3955. int tx_fifo_id, txq_id, sta_id, ssn = -1;
  3956. struct iwl4965_tid_data *tid_data;
  3957. int ret, write_ptr, read_ptr;
  3958. unsigned long flags;
  3959. DECLARE_MAC_BUF(mac);
  3960. if (!da) {
  3961. IWL_ERROR("da = NULL\n");
  3962. return -EINVAL;
  3963. }
  3964. if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
  3965. tx_fifo_id = default_tid_to_tx_fifo[tid];
  3966. else
  3967. return -EINVAL;
  3968. sta_id = iwl4965_hw_find_station(priv, da);
  3969. if (sta_id == IWL_INVALID_STATION)
  3970. return -ENXIO;
  3971. if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
  3972. IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n");
  3973. tid_data = &priv->stations[sta_id].tid[tid];
  3974. ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
  3975. txq_id = tid_data->agg.txq_id;
  3976. write_ptr = priv->txq[txq_id].q.write_ptr;
  3977. read_ptr = priv->txq[txq_id].q.read_ptr;
  3978. /* The queue is not empty */
  3979. if (write_ptr != read_ptr) {
  3980. IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n");
  3981. priv->stations[sta_id].tid[tid].agg.state =
  3982. IWL_EMPTYING_HW_QUEUE_DELBA;
  3983. return 0;
  3984. }
  3985. IWL_DEBUG_HT("HW queue empty\n");;
  3986. priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
  3987. spin_lock_irqsave(&priv->lock, flags);
  3988. ret = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
  3989. spin_unlock_irqrestore(&priv->lock, flags);
  3990. if (ret)
  3991. return ret;
  3992. ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, da, tid);
  3993. IWL_DEBUG_INFO("iwl4965_mac_ht_tx_agg_stop on da=%s tid=%d\n",
  3994. print_mac(mac, da), tid);
  3995. return 0;
  3996. }
  3997. int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
  3998. enum ieee80211_ampdu_mlme_action action,
  3999. const u8 *addr, u16 tid, u16 *ssn)
  4000. {
  4001. struct iwl4965_priv *priv = hw->priv;
  4002. int sta_id;
  4003. DECLARE_MAC_BUF(mac);
  4004. IWL_DEBUG_HT("A-MPDU action on da=%s tid=%d ",
  4005. print_mac(mac, addr), tid);
  4006. sta_id = iwl4965_hw_find_station(priv, addr);
  4007. switch (action) {
  4008. case IEEE80211_AMPDU_RX_START:
  4009. IWL_DEBUG_HT("start Rx\n");
  4010. iwl4965_sta_modify_add_ba_tid(priv, sta_id, tid, *ssn);
  4011. break;
  4012. case IEEE80211_AMPDU_RX_STOP:
  4013. IWL_DEBUG_HT("stop Rx\n");
  4014. iwl4965_sta_modify_del_ba_tid(priv, sta_id, tid);
  4015. break;
  4016. case IEEE80211_AMPDU_TX_START:
  4017. IWL_DEBUG_HT("start Tx\n");
  4018. return iwl4965_mac_ht_tx_agg_start(hw, addr, tid, ssn);
  4019. case IEEE80211_AMPDU_TX_STOP:
  4020. IWL_DEBUG_HT("stop Tx\n");
  4021. return iwl4965_mac_ht_tx_agg_stop(hw, addr, tid);
  4022. default:
  4023. IWL_DEBUG_HT("unknown\n");
  4024. return -EINVAL;
  4025. break;
  4026. }
  4027. return 0;
  4028. }
  4029. #endif /* CONFIG_IWL4965_HT */
  4030. /* Set up 4965-specific Rx frame reply handlers */
  4031. void iwl4965_hw_rx_handler_setup(struct iwl4965_priv *priv)
  4032. {
  4033. /* Legacy Rx frames */
  4034. priv->rx_handlers[REPLY_4965_RX] = iwl4965_rx_reply_rx;
  4035. /* High-throughput (HT) Rx frames */
  4036. priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
  4037. priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
  4038. priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
  4039. iwl4965_rx_missed_beacon_notif;
  4040. #ifdef CONFIG_IWL4965_HT
  4041. priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
  4042. #endif /* CONFIG_IWL4965_HT */
  4043. }
  4044. void iwl4965_hw_setup_deferred_work(struct iwl4965_priv *priv)
  4045. {
  4046. INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
  4047. INIT_WORK(&priv->statistics_work, iwl4965_bg_statistics_work);
  4048. #ifdef CONFIG_IWL4965_SENSITIVITY
  4049. INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
  4050. #endif
  4051. init_timer(&priv->statistics_periodic);
  4052. priv->statistics_periodic.data = (unsigned long)priv;
  4053. priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
  4054. }
  4055. void iwl4965_hw_cancel_deferred_work(struct iwl4965_priv *priv)
  4056. {
  4057. del_timer_sync(&priv->statistics_periodic);
  4058. cancel_delayed_work(&priv->init_alive_start);
  4059. }
  4060. static struct iwl_lib_ops iwl4965_lib = {
  4061. .eeprom_ops = {
  4062. .verify_signature = iwlcore_eeprom_verify_signature,
  4063. .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
  4064. .release_semaphore = iwlcore_eeprom_release_semaphore,
  4065. },
  4066. };
  4067. static struct iwl_ops iwl4965_ops = {
  4068. .lib = &iwl4965_lib,
  4069. };
  4070. static struct iwl_cfg iwl4965_agn_cfg = {
  4071. .name = "4965AGN",
  4072. .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
  4073. .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
  4074. .ops = &iwl4965_ops,
  4075. };
  4076. struct pci_device_id iwl4965_hw_card_ids[] = {
  4077. {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
  4078. {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
  4079. {0}
  4080. };
  4081. MODULE_DEVICE_TABLE(pci, iwl4965_hw_card_ids);