init.c 41 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/of.h>
  17. #include <linux/mmc/sdio_func.h>
  18. #include "core.h"
  19. #include "cfg80211.h"
  20. #include "target.h"
  21. #include "debug.h"
  22. #include "hif-ops.h"
  23. unsigned int debug_mask;
  24. static unsigned int testmode;
  25. module_param(debug_mask, uint, 0644);
  26. module_param(testmode, uint, 0644);
  27. /*
  28. * Include definitions here that can be used to tune the WLAN module
  29. * behavior. Different customers can tune the behavior as per their needs,
  30. * here.
  31. */
  32. /*
  33. * This configuration item enable/disable keepalive support.
  34. * Keepalive support: In the absence of any data traffic to AP, null
  35. * frames will be sent to the AP at periodic interval, to keep the association
  36. * active. This configuration item defines the periodic interval.
  37. * Use value of zero to disable keepalive support
  38. * Default: 60 seconds
  39. */
  40. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  41. /*
  42. * This configuration item sets the value of disconnect timeout
  43. * Firmware delays sending the disconnec event to the host for this
  44. * timeout after is gets disconnected from the current AP.
  45. * If the firmware successly roams within the disconnect timeout
  46. * it sends a new connect event
  47. */
  48. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  49. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  50. #define ATH6KL_DATA_OFFSET 64
  51. struct sk_buff *ath6kl_buf_alloc(int size)
  52. {
  53. struct sk_buff *skb;
  54. u16 reserved;
  55. /* Add chacheline space at front and back of buffer */
  56. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  57. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  58. skb = dev_alloc_skb(size + reserved);
  59. if (skb)
  60. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  61. return skb;
  62. }
  63. void ath6kl_init_profile_info(struct ath6kl *ar)
  64. {
  65. ar->ssid_len = 0;
  66. memset(ar->ssid, 0, sizeof(ar->ssid));
  67. ar->dot11_auth_mode = OPEN_AUTH;
  68. ar->auth_mode = NONE_AUTH;
  69. ar->prwise_crypto = NONE_CRYPT;
  70. ar->prwise_crypto_len = 0;
  71. ar->grp_crypto = NONE_CRYPT;
  72. ar->grp_crypto_len = 0;
  73. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  74. memset(ar->req_bssid, 0, sizeof(ar->req_bssid));
  75. memset(ar->bssid, 0, sizeof(ar->bssid));
  76. ar->bss_ch = 0;
  77. ar->nw_type = ar->next_mode = INFRA_NETWORK;
  78. }
  79. static u8 ath6kl_get_fw_iftype(struct ath6kl *ar)
  80. {
  81. switch (ar->nw_type) {
  82. case INFRA_NETWORK:
  83. return HI_OPTION_FW_MODE_BSS_STA;
  84. case ADHOC_NETWORK:
  85. return HI_OPTION_FW_MODE_IBSS;
  86. case AP_NETWORK:
  87. return HI_OPTION_FW_MODE_AP;
  88. default:
  89. ath6kl_err("Unsupported interface type :%d\n", ar->nw_type);
  90. return 0xff;
  91. }
  92. }
  93. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  94. {
  95. u32 address, data;
  96. struct host_app_area host_app_area;
  97. /* Fetch the address of the host_app_area_s
  98. * instance in the host interest area */
  99. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  100. address = TARG_VTOP(ar->target_type, address);
  101. if (ath6kl_diag_read32(ar, address, &data))
  102. return -EIO;
  103. address = TARG_VTOP(ar->target_type, data);
  104. host_app_area.wmi_protocol_ver = WMI_PROTOCOL_VERSION;
  105. if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
  106. sizeof(struct host_app_area)))
  107. return -EIO;
  108. return 0;
  109. }
  110. static inline void set_ac2_ep_map(struct ath6kl *ar,
  111. u8 ac,
  112. enum htc_endpoint_id ep)
  113. {
  114. ar->ac2ep_map[ac] = ep;
  115. ar->ep2ac_map[ep] = ac;
  116. }
  117. /* connect to a service */
  118. static int ath6kl_connectservice(struct ath6kl *ar,
  119. struct htc_service_connect_req *con_req,
  120. char *desc)
  121. {
  122. int status;
  123. struct htc_service_connect_resp response;
  124. memset(&response, 0, sizeof(response));
  125. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  126. if (status) {
  127. ath6kl_err("failed to connect to %s service status:%d\n",
  128. desc, status);
  129. return status;
  130. }
  131. switch (con_req->svc_id) {
  132. case WMI_CONTROL_SVC:
  133. if (test_bit(WMI_ENABLED, &ar->flag))
  134. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  135. ar->ctrl_ep = response.endpoint;
  136. break;
  137. case WMI_DATA_BE_SVC:
  138. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  139. break;
  140. case WMI_DATA_BK_SVC:
  141. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  142. break;
  143. case WMI_DATA_VI_SVC:
  144. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  145. break;
  146. case WMI_DATA_VO_SVC:
  147. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  148. break;
  149. default:
  150. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  151. return -EINVAL;
  152. }
  153. return 0;
  154. }
  155. static int ath6kl_init_service_ep(struct ath6kl *ar)
  156. {
  157. struct htc_service_connect_req connect;
  158. memset(&connect, 0, sizeof(connect));
  159. /* these fields are the same for all service endpoints */
  160. connect.ep_cb.rx = ath6kl_rx;
  161. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  162. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  163. /*
  164. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  165. * gets called.
  166. */
  167. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  168. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  169. if (!connect.ep_cb.rx_refill_thresh)
  170. connect.ep_cb.rx_refill_thresh++;
  171. /* connect to control service */
  172. connect.svc_id = WMI_CONTROL_SVC;
  173. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  174. return -EIO;
  175. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  176. /*
  177. * Limit the HTC message size on the send path, although e can
  178. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  179. * (802.3) frames on the send path.
  180. */
  181. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  182. /*
  183. * To reduce the amount of committed memory for larger A_MSDU
  184. * frames, use the recv-alloc threshold mechanism for larger
  185. * packets.
  186. */
  187. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  188. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  189. /*
  190. * For the remaining data services set the connection flag to
  191. * reduce dribbling, if configured to do so.
  192. */
  193. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  194. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  195. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  196. connect.svc_id = WMI_DATA_BE_SVC;
  197. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  198. return -EIO;
  199. /* connect to back-ground map this to WMI LOW_PRI */
  200. connect.svc_id = WMI_DATA_BK_SVC;
  201. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  202. return -EIO;
  203. /* connect to Video service, map this to to HI PRI */
  204. connect.svc_id = WMI_DATA_VI_SVC;
  205. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  206. return -EIO;
  207. /*
  208. * Connect to VO service, this is currently not mapped to a WMI
  209. * priority stream due to historical reasons. WMI originally
  210. * defined 3 priorities over 3 mailboxes We can change this when
  211. * WMI is reworked so that priorities are not dependent on
  212. * mailboxes.
  213. */
  214. connect.svc_id = WMI_DATA_VO_SVC;
  215. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  216. return -EIO;
  217. return 0;
  218. }
  219. static void ath6kl_init_control_info(struct ath6kl *ar)
  220. {
  221. u8 ctr;
  222. clear_bit(WMI_ENABLED, &ar->flag);
  223. ath6kl_init_profile_info(ar);
  224. ar->def_txkey_index = 0;
  225. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  226. ar->ch_hint = 0;
  227. ar->listen_intvl_t = A_DEFAULT_LISTEN_INTERVAL;
  228. ar->listen_intvl_b = 0;
  229. ar->tx_pwr = 0;
  230. clear_bit(SKIP_SCAN, &ar->flag);
  231. set_bit(WMM_ENABLED, &ar->flag);
  232. ar->intra_bss = 1;
  233. memset(&ar->sc_params, 0, sizeof(ar->sc_params));
  234. ar->sc_params.short_scan_ratio = WMI_SHORTSCANRATIO_DEFAULT;
  235. ar->sc_params.scan_ctrl_flags = DEFAULT_SCAN_CTRL_FLAGS;
  236. ar->lrssi_roam_threshold = DEF_LRSSI_ROAM_THRESHOLD;
  237. memset((u8 *)ar->sta_list, 0,
  238. AP_MAX_NUM_STA * sizeof(struct ath6kl_sta));
  239. spin_lock_init(&ar->mcastpsq_lock);
  240. /* Init the PS queues */
  241. for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) {
  242. spin_lock_init(&ar->sta_list[ctr].psq_lock);
  243. skb_queue_head_init(&ar->sta_list[ctr].psq);
  244. }
  245. skb_queue_head_init(&ar->mcastpsq);
  246. memcpy(ar->ap_country_code, DEF_AP_COUNTRY_CODE, 3);
  247. }
  248. /*
  249. * Set HTC/Mbox operational parameters, this can only be called when the
  250. * target is in the BMI phase.
  251. */
  252. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  253. u8 htc_ctrl_buf)
  254. {
  255. int status;
  256. u32 blk_size;
  257. blk_size = ar->mbox_info.block_size;
  258. if (htc_ctrl_buf)
  259. blk_size |= ((u32)htc_ctrl_buf) << 16;
  260. /* set the host interest area for the block size */
  261. status = ath6kl_bmi_write(ar,
  262. ath6kl_get_hi_item_addr(ar,
  263. HI_ITEM(hi_mbox_io_block_sz)),
  264. (u8 *)&blk_size,
  265. 4);
  266. if (status) {
  267. ath6kl_err("bmi_write_memory for IO block size failed\n");
  268. goto out;
  269. }
  270. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  271. blk_size,
  272. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  273. if (mbox_isr_yield_val) {
  274. /* set the host interest area for the mbox ISR yield limit */
  275. status = ath6kl_bmi_write(ar,
  276. ath6kl_get_hi_item_addr(ar,
  277. HI_ITEM(hi_mbox_isr_yield_limit)),
  278. (u8 *)&mbox_isr_yield_val,
  279. 4);
  280. if (status) {
  281. ath6kl_err("bmi_write_memory for yield limit failed\n");
  282. goto out;
  283. }
  284. }
  285. out:
  286. return status;
  287. }
  288. #define REG_DUMP_COUNT_AR6003 60
  289. #define REGISTER_DUMP_LEN_MAX 60
  290. static void ath6kl_dump_target_assert_info(struct ath6kl *ar)
  291. {
  292. u32 address;
  293. u32 regdump_loc = 0;
  294. int status;
  295. u32 regdump_val[REGISTER_DUMP_LEN_MAX];
  296. u32 i;
  297. if (ar->target_type != TARGET_TYPE_AR6003)
  298. return;
  299. /* the reg dump pointer is copied to the host interest area */
  300. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state));
  301. address = TARG_VTOP(ar->target_type, address);
  302. /* read RAM location through diagnostic window */
  303. status = ath6kl_diag_read32(ar, address, &regdump_loc);
  304. if (status || !regdump_loc) {
  305. ath6kl_err("failed to get ptr to register dump area\n");
  306. return;
  307. }
  308. ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n",
  309. regdump_loc);
  310. regdump_loc = TARG_VTOP(ar->target_type, regdump_loc);
  311. /* fetch register dump data */
  312. status = ath6kl_diag_read(ar, regdump_loc, (u8 *)&regdump_val[0],
  313. REG_DUMP_COUNT_AR6003 * (sizeof(u32)));
  314. if (status) {
  315. ath6kl_err("failed to get register dump\n");
  316. return;
  317. }
  318. ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n");
  319. for (i = 0; i < REG_DUMP_COUNT_AR6003; i++)
  320. ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n",
  321. i, regdump_val[i]);
  322. }
  323. void ath6kl_target_failure(struct ath6kl *ar)
  324. {
  325. ath6kl_err("target asserted\n");
  326. /* try dumping target assertion information (if any) */
  327. ath6kl_dump_target_assert_info(ar);
  328. }
  329. static int ath6kl_target_config_wlan_params(struct ath6kl *ar)
  330. {
  331. int status = 0;
  332. int ret;
  333. /*
  334. * Configure the device for rx dot11 header rules. "0,0" are the
  335. * default values. Required if checksum offload is needed. Set
  336. * RxMetaVersion to 2.
  337. */
  338. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi,
  339. ar->rx_meta_ver, 0, 0)) {
  340. ath6kl_err("unable to set the rx frame format\n");
  341. status = -EIO;
  342. }
  343. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  344. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1,
  345. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  346. ath6kl_err("unable to set power save fail event policy\n");
  347. status = -EIO;
  348. }
  349. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  350. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0,
  351. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  352. ath6kl_err("unable to set barker preamble policy\n");
  353. status = -EIO;
  354. }
  355. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi,
  356. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  357. ath6kl_err("unable to set keep alive interval\n");
  358. status = -EIO;
  359. }
  360. if (ath6kl_wmi_disctimeout_cmd(ar->wmi,
  361. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  362. ath6kl_err("unable to set disconnect timeout\n");
  363. status = -EIO;
  364. }
  365. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  366. if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) {
  367. ath6kl_err("unable to set txop bursting\n");
  368. status = -EIO;
  369. }
  370. if (ar->p2p) {
  371. ret = ath6kl_wmi_info_req_cmd(ar->wmi,
  372. P2P_FLAG_CAPABILITIES_REQ |
  373. P2P_FLAG_MACADDR_REQ |
  374. P2P_FLAG_HMODEL_REQ);
  375. if (ret) {
  376. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  377. "capabilities (%d) - assuming P2P not "
  378. "supported\n", ret);
  379. ar->p2p = 0;
  380. }
  381. }
  382. if (ar->p2p) {
  383. /* Enable Probe Request reporting for P2P */
  384. ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, true);
  385. if (ret) {
  386. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
  387. "Request reporting (%d)\n", ret);
  388. }
  389. }
  390. return status;
  391. }
  392. int ath6kl_configure_target(struct ath6kl *ar)
  393. {
  394. u32 param, ram_reserved_size;
  395. u8 fw_iftype;
  396. fw_iftype = ath6kl_get_fw_iftype(ar);
  397. if (fw_iftype == 0xff)
  398. return -EINVAL;
  399. /* Tell target which HTC version it is used*/
  400. param = HTC_PROTOCOL_VERSION;
  401. if (ath6kl_bmi_write(ar,
  402. ath6kl_get_hi_item_addr(ar,
  403. HI_ITEM(hi_app_host_interest)),
  404. (u8 *)&param, 4) != 0) {
  405. ath6kl_err("bmi_write_memory for htc version failed\n");
  406. return -EIO;
  407. }
  408. /* set the firmware mode to STA/IBSS/AP */
  409. param = 0;
  410. if (ath6kl_bmi_read(ar,
  411. ath6kl_get_hi_item_addr(ar,
  412. HI_ITEM(hi_option_flag)),
  413. (u8 *)&param, 4) != 0) {
  414. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  415. return -EIO;
  416. }
  417. param |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  418. param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT);
  419. if (ar->p2p && fw_iftype == HI_OPTION_FW_MODE_BSS_STA) {
  420. param |= HI_OPTION_FW_SUBMODE_P2PDEV <<
  421. HI_OPTION_FW_SUBMODE_SHIFT;
  422. }
  423. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  424. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  425. if (ath6kl_bmi_write(ar,
  426. ath6kl_get_hi_item_addr(ar,
  427. HI_ITEM(hi_option_flag)),
  428. (u8 *)&param,
  429. 4) != 0) {
  430. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  431. return -EIO;
  432. }
  433. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  434. /*
  435. * Hardcode the address use for the extended board data
  436. * Ideally this should be pre-allocate by the OS at boot time
  437. * But since it is a new feature and board data is loaded
  438. * at init time, we have to workaround this from host.
  439. * It is difficult to patch the firmware boot code,
  440. * but possible in theory.
  441. */
  442. param = ar->hw.board_ext_data_addr;
  443. ram_reserved_size = ar->hw.reserved_ram_size;
  444. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  445. HI_ITEM(hi_board_ext_data)),
  446. (u8 *)&param, 4) != 0) {
  447. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  448. return -EIO;
  449. }
  450. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  451. HI_ITEM(hi_end_ram_reserve_sz)),
  452. (u8 *)&ram_reserved_size, 4) != 0) {
  453. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  454. return -EIO;
  455. }
  456. /* set the block size for the target */
  457. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  458. /* use default number of control buffers */
  459. return -EIO;
  460. return 0;
  461. }
  462. struct ath6kl *ath6kl_core_alloc(struct device *sdev)
  463. {
  464. struct net_device *dev;
  465. struct ath6kl *ar;
  466. struct wireless_dev *wdev;
  467. wdev = ath6kl_cfg80211_init(sdev);
  468. if (!wdev) {
  469. ath6kl_err("ath6kl_cfg80211_init failed\n");
  470. return NULL;
  471. }
  472. ar = wdev_priv(wdev);
  473. ar->dev = sdev;
  474. ar->wdev = wdev;
  475. wdev->iftype = NL80211_IFTYPE_STATION;
  476. if (ath6kl_debug_init(ar)) {
  477. ath6kl_err("Failed to initialize debugfs\n");
  478. ath6kl_cfg80211_deinit(ar);
  479. return NULL;
  480. }
  481. dev = alloc_netdev(0, "wlan%d", ether_setup);
  482. if (!dev) {
  483. ath6kl_err("no memory for network device instance\n");
  484. ath6kl_cfg80211_deinit(ar);
  485. return NULL;
  486. }
  487. dev->ieee80211_ptr = wdev;
  488. SET_NETDEV_DEV(dev, wiphy_dev(wdev->wiphy));
  489. wdev->netdev = dev;
  490. ar->sme_state = SME_DISCONNECTED;
  491. init_netdev(dev);
  492. ar->net_dev = dev;
  493. set_bit(WLAN_ENABLED, &ar->flag);
  494. ar->wlan_pwr_state = WLAN_POWER_STATE_ON;
  495. spin_lock_init(&ar->lock);
  496. ath6kl_init_control_info(ar);
  497. init_waitqueue_head(&ar->event_wq);
  498. sema_init(&ar->sem, 1);
  499. clear_bit(DESTROY_IN_PROGRESS, &ar->flag);
  500. INIT_LIST_HEAD(&ar->amsdu_rx_buffer_queue);
  501. setup_timer(&ar->disconnect_timer, disconnect_timer_handler,
  502. (unsigned long) dev);
  503. return ar;
  504. }
  505. int ath6kl_unavail_ev(struct ath6kl *ar)
  506. {
  507. ath6kl_destroy(ar->net_dev, 1);
  508. return 0;
  509. }
  510. /* firmware upload */
  511. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  512. u8 **fw, size_t *fw_len)
  513. {
  514. const struct firmware *fw_entry;
  515. int ret;
  516. ret = request_firmware(&fw_entry, filename, ar->dev);
  517. if (ret)
  518. return ret;
  519. *fw_len = fw_entry->size;
  520. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  521. if (*fw == NULL)
  522. ret = -ENOMEM;
  523. release_firmware(fw_entry);
  524. return ret;
  525. }
  526. #ifdef CONFIG_OF
  527. static const char *get_target_ver_dir(const struct ath6kl *ar)
  528. {
  529. switch (ar->version.target_ver) {
  530. case AR6003_REV1_VERSION:
  531. return "ath6k/AR6003/hw1.0";
  532. case AR6003_REV2_VERSION:
  533. return "ath6k/AR6003/hw2.0";
  534. case AR6003_REV3_VERSION:
  535. return "ath6k/AR6003/hw2.1.1";
  536. }
  537. ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
  538. ar->version.target_ver);
  539. return NULL;
  540. }
  541. /*
  542. * Check the device tree for a board-id and use it to construct
  543. * the pathname to the firmware file. Used (for now) to find a
  544. * fallback to the "bdata.bin" file--typically a symlink to the
  545. * appropriate board-specific file.
  546. */
  547. static bool check_device_tree(struct ath6kl *ar)
  548. {
  549. static const char *board_id_prop = "atheros,board-id";
  550. struct device_node *node;
  551. char board_filename[64];
  552. const char *board_id;
  553. int ret;
  554. for_each_compatible_node(node, NULL, "atheros,ath6kl") {
  555. board_id = of_get_property(node, board_id_prop, NULL);
  556. if (board_id == NULL) {
  557. ath6kl_warn("No \"%s\" property on %s node.\n",
  558. board_id_prop, node->name);
  559. continue;
  560. }
  561. snprintf(board_filename, sizeof(board_filename),
  562. "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
  563. ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
  564. &ar->fw_board_len);
  565. if (ret) {
  566. ath6kl_err("Failed to get DT board file %s: %d\n",
  567. board_filename, ret);
  568. continue;
  569. }
  570. return true;
  571. }
  572. return false;
  573. }
  574. #else
  575. static bool check_device_tree(struct ath6kl *ar)
  576. {
  577. return false;
  578. }
  579. #endif /* CONFIG_OF */
  580. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  581. {
  582. const char *filename;
  583. int ret;
  584. if (ar->fw_board != NULL)
  585. return 0;
  586. switch (ar->version.target_ver) {
  587. case AR6003_REV2_VERSION:
  588. filename = AR6003_REV2_BOARD_DATA_FILE;
  589. break;
  590. case AR6004_REV1_VERSION:
  591. filename = AR6004_REV1_BOARD_DATA_FILE;
  592. break;
  593. default:
  594. filename = AR6003_REV3_BOARD_DATA_FILE;
  595. break;
  596. }
  597. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  598. &ar->fw_board_len);
  599. if (ret == 0) {
  600. /* managed to get proper board file */
  601. return 0;
  602. }
  603. if (check_device_tree(ar)) {
  604. /* got board file from device tree */
  605. return 0;
  606. }
  607. /* there was no proper board file, try to use default instead */
  608. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  609. filename, ret);
  610. switch (ar->version.target_ver) {
  611. case AR6003_REV2_VERSION:
  612. filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
  613. break;
  614. case AR6004_REV1_VERSION:
  615. filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
  616. break;
  617. default:
  618. filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
  619. break;
  620. }
  621. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  622. &ar->fw_board_len);
  623. if (ret) {
  624. ath6kl_err("Failed to get default board file %s: %d\n",
  625. filename, ret);
  626. return ret;
  627. }
  628. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  629. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  630. return 0;
  631. }
  632. static int ath6kl_fetch_otp_file(struct ath6kl *ar)
  633. {
  634. const char *filename;
  635. int ret;
  636. if (ar->fw_otp != NULL)
  637. return 0;
  638. switch (ar->version.target_ver) {
  639. case AR6003_REV2_VERSION:
  640. filename = AR6003_REV2_OTP_FILE;
  641. break;
  642. case AR6004_REV1_VERSION:
  643. ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
  644. return 0;
  645. break;
  646. default:
  647. filename = AR6003_REV3_OTP_FILE;
  648. break;
  649. }
  650. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  651. &ar->fw_otp_len);
  652. if (ret) {
  653. ath6kl_err("Failed to get OTP file %s: %d\n",
  654. filename, ret);
  655. return ret;
  656. }
  657. return 0;
  658. }
  659. static int ath6kl_fetch_fw_file(struct ath6kl *ar)
  660. {
  661. const char *filename;
  662. int ret;
  663. if (ar->fw != NULL)
  664. return 0;
  665. if (testmode) {
  666. switch (ar->version.target_ver) {
  667. case AR6003_REV2_VERSION:
  668. filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
  669. break;
  670. case AR6003_REV3_VERSION:
  671. filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
  672. break;
  673. case AR6004_REV1_VERSION:
  674. ath6kl_warn("testmode not supported with ar6004\n");
  675. return -EOPNOTSUPP;
  676. default:
  677. ath6kl_warn("unknown target version: 0x%x\n",
  678. ar->version.target_ver);
  679. return -EINVAL;
  680. }
  681. set_bit(TESTMODE, &ar->flag);
  682. goto get_fw;
  683. }
  684. switch (ar->version.target_ver) {
  685. case AR6003_REV2_VERSION:
  686. filename = AR6003_REV2_FIRMWARE_FILE;
  687. break;
  688. case AR6004_REV1_VERSION:
  689. filename = AR6004_REV1_FIRMWARE_FILE;
  690. break;
  691. default:
  692. filename = AR6003_REV3_FIRMWARE_FILE;
  693. break;
  694. }
  695. get_fw:
  696. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  697. if (ret) {
  698. ath6kl_err("Failed to get firmware file %s: %d\n",
  699. filename, ret);
  700. return ret;
  701. }
  702. return 0;
  703. }
  704. static int ath6kl_fetch_patch_file(struct ath6kl *ar)
  705. {
  706. const char *filename;
  707. int ret;
  708. switch (ar->version.target_ver) {
  709. case AR6003_REV2_VERSION:
  710. filename = AR6003_REV2_PATCH_FILE;
  711. break;
  712. case AR6004_REV1_VERSION:
  713. /* FIXME: implement for AR6004 */
  714. return 0;
  715. break;
  716. default:
  717. filename = AR6003_REV3_PATCH_FILE;
  718. break;
  719. }
  720. if (ar->fw_patch == NULL) {
  721. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  722. &ar->fw_patch_len);
  723. if (ret) {
  724. ath6kl_err("Failed to get patch file %s: %d\n",
  725. filename, ret);
  726. return ret;
  727. }
  728. }
  729. return 0;
  730. }
  731. static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
  732. {
  733. int ret;
  734. ret = ath6kl_fetch_otp_file(ar);
  735. if (ret)
  736. return ret;
  737. ret = ath6kl_fetch_fw_file(ar);
  738. if (ret)
  739. return ret;
  740. ret = ath6kl_fetch_patch_file(ar);
  741. if (ret)
  742. return ret;
  743. return 0;
  744. }
  745. static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
  746. {
  747. size_t magic_len, len, ie_len;
  748. const struct firmware *fw;
  749. struct ath6kl_fw_ie *hdr;
  750. const char *filename;
  751. const u8 *data;
  752. int ret, ie_id, i, index, bit;
  753. __le32 *val;
  754. switch (ar->version.target_ver) {
  755. case AR6003_REV2_VERSION:
  756. filename = AR6003_REV2_FIRMWARE_2_FILE;
  757. break;
  758. case AR6003_REV3_VERSION:
  759. filename = AR6003_REV3_FIRMWARE_2_FILE;
  760. break;
  761. case AR6004_REV1_VERSION:
  762. filename = AR6004_REV1_FIRMWARE_2_FILE;
  763. break;
  764. default:
  765. return -EOPNOTSUPP;
  766. }
  767. ret = request_firmware(&fw, filename, ar->dev);
  768. if (ret)
  769. return ret;
  770. data = fw->data;
  771. len = fw->size;
  772. /* magic also includes the null byte, check that as well */
  773. magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
  774. if (len < magic_len) {
  775. ret = -EINVAL;
  776. goto out;
  777. }
  778. if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
  779. ret = -EINVAL;
  780. goto out;
  781. }
  782. len -= magic_len;
  783. data += magic_len;
  784. /* loop elements */
  785. while (len > sizeof(struct ath6kl_fw_ie)) {
  786. /* hdr is unaligned! */
  787. hdr = (struct ath6kl_fw_ie *) data;
  788. ie_id = le32_to_cpup(&hdr->id);
  789. ie_len = le32_to_cpup(&hdr->len);
  790. len -= sizeof(*hdr);
  791. data += sizeof(*hdr);
  792. if (len < ie_len) {
  793. ret = -EINVAL;
  794. goto out;
  795. }
  796. switch (ie_id) {
  797. case ATH6KL_FW_IE_OTP_IMAGE:
  798. ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%d B)\n",
  799. ie_len);
  800. ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
  801. if (ar->fw_otp == NULL) {
  802. ret = -ENOMEM;
  803. goto out;
  804. }
  805. ar->fw_otp_len = ie_len;
  806. break;
  807. case ATH6KL_FW_IE_FW_IMAGE:
  808. ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%d B)\n",
  809. ie_len);
  810. ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
  811. if (ar->fw == NULL) {
  812. ret = -ENOMEM;
  813. goto out;
  814. }
  815. ar->fw_len = ie_len;
  816. break;
  817. case ATH6KL_FW_IE_PATCH_IMAGE:
  818. ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%d B)\n",
  819. ie_len);
  820. ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
  821. if (ar->fw_patch == NULL) {
  822. ret = -ENOMEM;
  823. goto out;
  824. }
  825. ar->fw_patch_len = ie_len;
  826. break;
  827. case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
  828. val = (__le32 *) data;
  829. ar->hw.reserved_ram_size = le32_to_cpup(val);
  830. ath6kl_dbg(ATH6KL_DBG_BOOT,
  831. "found reserved ram size ie 0x%d\n",
  832. ar->hw.reserved_ram_size);
  833. break;
  834. case ATH6KL_FW_IE_CAPABILITIES:
  835. ath6kl_dbg(ATH6KL_DBG_BOOT,
  836. "found firmware capabilities ie (%d B)\n",
  837. ie_len);
  838. for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
  839. index = ALIGN(i, 8) / 8;
  840. bit = i % 8;
  841. if (data[index] & (1 << bit))
  842. __set_bit(i, ar->fw_capabilities);
  843. }
  844. ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
  845. ar->fw_capabilities,
  846. sizeof(ar->fw_capabilities));
  847. break;
  848. case ATH6KL_FW_IE_PATCH_ADDR:
  849. if (ie_len != sizeof(*val))
  850. break;
  851. val = (__le32 *) data;
  852. ar->hw.dataset_patch_addr = le32_to_cpup(val);
  853. ath6kl_dbg(ATH6KL_DBG_BOOT,
  854. "found patch address ie 0x%d\n",
  855. ar->hw.dataset_patch_addr);
  856. break;
  857. default:
  858. ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
  859. le32_to_cpup(&hdr->id));
  860. break;
  861. }
  862. len -= ie_len;
  863. data += ie_len;
  864. };
  865. ret = 0;
  866. out:
  867. release_firmware(fw);
  868. return ret;
  869. }
  870. static int ath6kl_fetch_firmwares(struct ath6kl *ar)
  871. {
  872. int ret;
  873. ret = ath6kl_fetch_board_file(ar);
  874. if (ret)
  875. return ret;
  876. ret = ath6kl_fetch_fw_api2(ar);
  877. if (ret == 0) {
  878. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
  879. return 0;
  880. }
  881. ret = ath6kl_fetch_fw_api1(ar);
  882. if (ret)
  883. return ret;
  884. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
  885. return 0;
  886. }
  887. static int ath6kl_upload_board_file(struct ath6kl *ar)
  888. {
  889. u32 board_address, board_ext_address, param;
  890. u32 board_data_size, board_ext_data_size;
  891. int ret;
  892. if (WARN_ON(ar->fw_board == NULL))
  893. return -ENOENT;
  894. /*
  895. * Determine where in Target RAM to write Board Data.
  896. * For AR6004, host determine Target RAM address for
  897. * writing board data.
  898. */
  899. if (ar->target_type == TARGET_TYPE_AR6004) {
  900. board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
  901. ath6kl_bmi_write(ar,
  902. ath6kl_get_hi_item_addr(ar,
  903. HI_ITEM(hi_board_data)),
  904. (u8 *) &board_address, 4);
  905. } else {
  906. ath6kl_bmi_read(ar,
  907. ath6kl_get_hi_item_addr(ar,
  908. HI_ITEM(hi_board_data)),
  909. (u8 *) &board_address, 4);
  910. }
  911. /* determine where in target ram to write extended board data */
  912. ath6kl_bmi_read(ar,
  913. ath6kl_get_hi_item_addr(ar,
  914. HI_ITEM(hi_board_ext_data)),
  915. (u8 *) &board_ext_address, 4);
  916. if (board_ext_address == 0) {
  917. ath6kl_err("Failed to get board file target address.\n");
  918. return -EINVAL;
  919. }
  920. switch (ar->target_type) {
  921. case TARGET_TYPE_AR6003:
  922. board_data_size = AR6003_BOARD_DATA_SZ;
  923. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  924. break;
  925. case TARGET_TYPE_AR6004:
  926. board_data_size = AR6004_BOARD_DATA_SZ;
  927. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  928. break;
  929. default:
  930. WARN_ON(1);
  931. return -EINVAL;
  932. break;
  933. }
  934. if (ar->fw_board_len == (board_data_size +
  935. board_ext_data_size)) {
  936. /* write extended board data */
  937. ath6kl_dbg(ATH6KL_DBG_BOOT,
  938. "writing extended board data to 0x%x (%d B)\n",
  939. board_ext_address, board_ext_data_size);
  940. ret = ath6kl_bmi_write(ar, board_ext_address,
  941. ar->fw_board + board_data_size,
  942. board_ext_data_size);
  943. if (ret) {
  944. ath6kl_err("Failed to write extended board data: %d\n",
  945. ret);
  946. return ret;
  947. }
  948. /* record that extended board data is initialized */
  949. param = (board_ext_data_size << 16) | 1;
  950. ath6kl_bmi_write(ar,
  951. ath6kl_get_hi_item_addr(ar,
  952. HI_ITEM(hi_board_ext_data_config)),
  953. (unsigned char *) &param, 4);
  954. }
  955. if (ar->fw_board_len < board_data_size) {
  956. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  957. ret = -EINVAL;
  958. return ret;
  959. }
  960. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
  961. board_address, board_data_size);
  962. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  963. board_data_size);
  964. if (ret) {
  965. ath6kl_err("Board file bmi write failed: %d\n", ret);
  966. return ret;
  967. }
  968. /* record the fact that Board Data IS initialized */
  969. param = 1;
  970. ath6kl_bmi_write(ar,
  971. ath6kl_get_hi_item_addr(ar,
  972. HI_ITEM(hi_board_data_initialized)),
  973. (u8 *)&param, 4);
  974. return ret;
  975. }
  976. static int ath6kl_upload_otp(struct ath6kl *ar)
  977. {
  978. u32 address, param;
  979. int ret;
  980. if (WARN_ON(ar->fw_otp == NULL))
  981. return -ENOENT;
  982. address = ar->hw.app_load_addr;
  983. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%d B)\n", address,
  984. ar->fw_otp_len);
  985. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  986. ar->fw_otp_len);
  987. if (ret) {
  988. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  989. return ret;
  990. }
  991. /* read firmware start address */
  992. ret = ath6kl_bmi_read(ar,
  993. ath6kl_get_hi_item_addr(ar,
  994. HI_ITEM(hi_app_start)),
  995. (u8 *) &address, sizeof(address));
  996. if (ret) {
  997. ath6kl_err("Failed to read hi_app_start: %d\n", ret);
  998. return ret;
  999. }
  1000. ar->hw.app_start_override_addr = address;
  1001. ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr 0x%x\n",
  1002. ar->hw.app_start_override_addr);
  1003. /* execute the OTP code */
  1004. ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", address);
  1005. param = 0;
  1006. ath6kl_bmi_execute(ar, address, &param);
  1007. return ret;
  1008. }
  1009. static int ath6kl_upload_firmware(struct ath6kl *ar)
  1010. {
  1011. u32 address;
  1012. int ret;
  1013. if (WARN_ON(ar->fw == NULL))
  1014. return -ENOENT;
  1015. address = ar->hw.app_load_addr;
  1016. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%d B)\n",
  1017. address, ar->fw_len);
  1018. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  1019. if (ret) {
  1020. ath6kl_err("Failed to write firmware: %d\n", ret);
  1021. return ret;
  1022. }
  1023. /*
  1024. * Set starting address for firmware
  1025. * Don't need to setup app_start override addr on AR6004
  1026. */
  1027. if (ar->target_type != TARGET_TYPE_AR6004) {
  1028. address = ar->hw.app_start_override_addr;
  1029. ath6kl_bmi_set_app_start(ar, address);
  1030. }
  1031. return ret;
  1032. }
  1033. static int ath6kl_upload_patch(struct ath6kl *ar)
  1034. {
  1035. u32 address, param;
  1036. int ret;
  1037. if (WARN_ON(ar->fw_patch == NULL))
  1038. return -ENOENT;
  1039. address = ar->hw.dataset_patch_addr;
  1040. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%d B)\n",
  1041. address, ar->fw_patch_len);
  1042. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  1043. if (ret) {
  1044. ath6kl_err("Failed to write patch file: %d\n", ret);
  1045. return ret;
  1046. }
  1047. param = address;
  1048. ath6kl_bmi_write(ar,
  1049. ath6kl_get_hi_item_addr(ar,
  1050. HI_ITEM(hi_dset_list_head)),
  1051. (unsigned char *) &param, 4);
  1052. return 0;
  1053. }
  1054. static int ath6kl_init_upload(struct ath6kl *ar)
  1055. {
  1056. u32 param, options, sleep, address;
  1057. int status = 0;
  1058. if (ar->target_type != TARGET_TYPE_AR6003 &&
  1059. ar->target_type != TARGET_TYPE_AR6004)
  1060. return -EINVAL;
  1061. /* temporarily disable system sleep */
  1062. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1063. status = ath6kl_bmi_reg_read(ar, address, &param);
  1064. if (status)
  1065. return status;
  1066. options = param;
  1067. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  1068. status = ath6kl_bmi_reg_write(ar, address, param);
  1069. if (status)
  1070. return status;
  1071. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1072. status = ath6kl_bmi_reg_read(ar, address, &param);
  1073. if (status)
  1074. return status;
  1075. sleep = param;
  1076. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  1077. status = ath6kl_bmi_reg_write(ar, address, param);
  1078. if (status)
  1079. return status;
  1080. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  1081. options, sleep);
  1082. /* program analog PLL register */
  1083. /* no need to control 40/44MHz clock on AR6004 */
  1084. if (ar->target_type != TARGET_TYPE_AR6004) {
  1085. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  1086. 0xF9104001);
  1087. if (status)
  1088. return status;
  1089. /* Run at 80/88MHz by default */
  1090. param = SM(CPU_CLOCK_STANDARD, 1);
  1091. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  1092. status = ath6kl_bmi_reg_write(ar, address, param);
  1093. if (status)
  1094. return status;
  1095. }
  1096. param = 0;
  1097. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  1098. param = SM(LPO_CAL_ENABLE, 1);
  1099. status = ath6kl_bmi_reg_write(ar, address, param);
  1100. if (status)
  1101. return status;
  1102. /* WAR to avoid SDIO CRC err */
  1103. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  1104. ath6kl_err("temporary war to avoid sdio crc error\n");
  1105. param = 0x20;
  1106. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  1107. status = ath6kl_bmi_reg_write(ar, address, param);
  1108. if (status)
  1109. return status;
  1110. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  1111. status = ath6kl_bmi_reg_write(ar, address, param);
  1112. if (status)
  1113. return status;
  1114. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  1115. status = ath6kl_bmi_reg_write(ar, address, param);
  1116. if (status)
  1117. return status;
  1118. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  1119. status = ath6kl_bmi_reg_write(ar, address, param);
  1120. if (status)
  1121. return status;
  1122. }
  1123. /* write EEPROM data to Target RAM */
  1124. status = ath6kl_upload_board_file(ar);
  1125. if (status)
  1126. return status;
  1127. /* transfer One time Programmable data */
  1128. status = ath6kl_upload_otp(ar);
  1129. if (status)
  1130. return status;
  1131. /* Download Target firmware */
  1132. status = ath6kl_upload_firmware(ar);
  1133. if (status)
  1134. return status;
  1135. status = ath6kl_upload_patch(ar);
  1136. if (status)
  1137. return status;
  1138. /* Restore system sleep */
  1139. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1140. status = ath6kl_bmi_reg_write(ar, address, sleep);
  1141. if (status)
  1142. return status;
  1143. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1144. param = options | 0x20;
  1145. status = ath6kl_bmi_reg_write(ar, address, param);
  1146. if (status)
  1147. return status;
  1148. /* Configure GPIO AR6003 UART */
  1149. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  1150. status = ath6kl_bmi_write(ar,
  1151. ath6kl_get_hi_item_addr(ar,
  1152. HI_ITEM(hi_dbg_uart_txpin)),
  1153. (u8 *)&param, 4);
  1154. return status;
  1155. }
  1156. static int ath6kl_init_hw_params(struct ath6kl *ar)
  1157. {
  1158. switch (ar->version.target_ver) {
  1159. case AR6003_REV2_VERSION:
  1160. ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
  1161. ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS;
  1162. ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
  1163. ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE;
  1164. break;
  1165. case AR6003_REV3_VERSION:
  1166. ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS;
  1167. ar->hw.app_load_addr = 0x1234;
  1168. ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
  1169. ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE;
  1170. break;
  1171. case AR6004_REV1_VERSION:
  1172. ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
  1173. ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS;
  1174. ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
  1175. ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE;
  1176. break;
  1177. default:
  1178. ath6kl_err("Unsupported hardware version: 0x%x\n",
  1179. ar->version.target_ver);
  1180. return -EINVAL;
  1181. }
  1182. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1183. "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
  1184. ar->version.target_ver, ar->target_type,
  1185. ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
  1186. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1187. "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
  1188. ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
  1189. ar->hw.reserved_ram_size);
  1190. return 0;
  1191. }
  1192. static int ath6kl_init(struct net_device *dev)
  1193. {
  1194. struct ath6kl *ar = ath6kl_priv(dev);
  1195. int status = 0;
  1196. s32 timeleft;
  1197. if (!ar)
  1198. return -EIO;
  1199. /* Do we need to finish the BMI phase */
  1200. if (ath6kl_bmi_done(ar)) {
  1201. status = -EIO;
  1202. goto ath6kl_init_done;
  1203. }
  1204. /* Indicate that WMI is enabled (although not ready yet) */
  1205. set_bit(WMI_ENABLED, &ar->flag);
  1206. ar->wmi = ath6kl_wmi_init(ar);
  1207. if (!ar->wmi) {
  1208. ath6kl_err("failed to initialize wmi\n");
  1209. status = -EIO;
  1210. goto ath6kl_init_done;
  1211. }
  1212. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  1213. /*
  1214. * The reason we have to wait for the target here is that the
  1215. * driver layer has to init BMI in order to set the host block
  1216. * size.
  1217. */
  1218. if (ath6kl_htc_wait_target(ar->htc_target)) {
  1219. status = -EIO;
  1220. goto err_node_cleanup;
  1221. }
  1222. if (ath6kl_init_service_ep(ar)) {
  1223. status = -EIO;
  1224. goto err_cleanup_scatter;
  1225. }
  1226. /* setup access class priority mappings */
  1227. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  1228. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  1229. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  1230. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  1231. /* give our connected endpoints some buffers */
  1232. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  1233. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  1234. /* allocate some buffers that handle larger AMSDU frames */
  1235. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  1236. /* setup credit distribution */
  1237. ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info);
  1238. ath6kl_cookie_init(ar);
  1239. /* start HTC */
  1240. status = ath6kl_htc_start(ar->htc_target);
  1241. if (status) {
  1242. ath6kl_cookie_cleanup(ar);
  1243. goto err_rxbuf_cleanup;
  1244. }
  1245. /* Wait for Wmi event to be ready */
  1246. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  1247. test_bit(WMI_READY,
  1248. &ar->flag),
  1249. WMI_TIMEOUT);
  1250. ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
  1251. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  1252. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  1253. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  1254. status = -EIO;
  1255. goto err_htc_stop;
  1256. }
  1257. if (!timeleft || signal_pending(current)) {
  1258. ath6kl_err("wmi is not ready or wait was interrupted\n");
  1259. status = -EIO;
  1260. goto err_htc_stop;
  1261. }
  1262. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1263. /* communicate the wmi protocol verision to the target */
  1264. if ((ath6kl_set_host_app_area(ar)) != 0)
  1265. ath6kl_err("unable to set the host app area\n");
  1266. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  1267. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  1268. ar->wdev->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM;
  1269. status = ath6kl_target_config_wlan_params(ar);
  1270. if (!status)
  1271. goto ath6kl_init_done;
  1272. err_htc_stop:
  1273. ath6kl_htc_stop(ar->htc_target);
  1274. err_rxbuf_cleanup:
  1275. ath6kl_htc_flush_rx_buf(ar->htc_target);
  1276. ath6kl_cleanup_amsdu_rxbufs(ar);
  1277. err_cleanup_scatter:
  1278. ath6kl_hif_cleanup_scatter(ar);
  1279. err_node_cleanup:
  1280. ath6kl_wmi_shutdown(ar->wmi);
  1281. clear_bit(WMI_ENABLED, &ar->flag);
  1282. ar->wmi = NULL;
  1283. ath6kl_init_done:
  1284. return status;
  1285. }
  1286. int ath6kl_core_init(struct ath6kl *ar)
  1287. {
  1288. int ret = 0;
  1289. struct ath6kl_bmi_target_info targ_info;
  1290. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1291. if (!ar->ath6kl_wq)
  1292. return -ENOMEM;
  1293. ret = ath6kl_bmi_init(ar);
  1294. if (ret)
  1295. goto err_wq;
  1296. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1297. if (ret)
  1298. goto err_bmi_cleanup;
  1299. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1300. ar->target_type = le32_to_cpu(targ_info.type);
  1301. ar->wdev->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1302. ret = ath6kl_init_hw_params(ar);
  1303. if (ret)
  1304. goto err_bmi_cleanup;
  1305. ret = ath6kl_configure_target(ar);
  1306. if (ret)
  1307. goto err_bmi_cleanup;
  1308. ar->htc_target = ath6kl_htc_create(ar);
  1309. if (!ar->htc_target) {
  1310. ret = -ENOMEM;
  1311. goto err_bmi_cleanup;
  1312. }
  1313. ar->aggr_cntxt = aggr_init(ar->net_dev);
  1314. if (!ar->aggr_cntxt) {
  1315. ath6kl_err("failed to initialize aggr\n");
  1316. ret = -ENOMEM;
  1317. goto err_htc_cleanup;
  1318. }
  1319. ret = ath6kl_fetch_firmwares(ar);
  1320. if (ret)
  1321. goto err_htc_cleanup;
  1322. ret = ath6kl_init_upload(ar);
  1323. if (ret)
  1324. goto err_htc_cleanup;
  1325. ret = ath6kl_init(ar->net_dev);
  1326. if (ret)
  1327. goto err_htc_cleanup;
  1328. /* This runs the init function if registered */
  1329. ret = register_netdev(ar->net_dev);
  1330. if (ret) {
  1331. ath6kl_err("register_netdev failed\n");
  1332. ath6kl_destroy(ar->net_dev, 0);
  1333. return ret;
  1334. }
  1335. set_bit(NETDEV_REGISTERED, &ar->flag);
  1336. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1337. __func__, ar->net_dev->name, ar->net_dev, ar);
  1338. return ret;
  1339. err_htc_cleanup:
  1340. ath6kl_htc_cleanup(ar->htc_target);
  1341. err_bmi_cleanup:
  1342. ath6kl_bmi_cleanup(ar);
  1343. err_wq:
  1344. destroy_workqueue(ar->ath6kl_wq);
  1345. return ret;
  1346. }
  1347. void ath6kl_stop_txrx(struct ath6kl *ar)
  1348. {
  1349. struct net_device *ndev = ar->net_dev;
  1350. if (!ndev)
  1351. return;
  1352. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1353. if (down_interruptible(&ar->sem)) {
  1354. ath6kl_err("down_interruptible failed\n");
  1355. return;
  1356. }
  1357. if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR)
  1358. ath6kl_stop_endpoint(ndev, false, true);
  1359. clear_bit(WLAN_ENABLED, &ar->flag);
  1360. }
  1361. /*
  1362. * We need to differentiate between the surprise and planned removal of the
  1363. * device because of the following consideration:
  1364. *
  1365. * - In case of surprise removal, the hcd already frees up the pending
  1366. * for the device and hence there is no need to unregister the function
  1367. * driver inorder to get these requests. For planned removal, the function
  1368. * driver has to explicitly unregister itself to have the hcd return all the
  1369. * pending requests before the data structures for the devices are freed up.
  1370. * Note that as per the current implementation, the function driver will
  1371. * end up releasing all the devices since there is no API to selectively
  1372. * release a particular device.
  1373. *
  1374. * - Certain commands issued to the target can be skipped for surprise
  1375. * removal since they will anyway not go through.
  1376. */
  1377. void ath6kl_destroy(struct net_device *dev, unsigned int unregister)
  1378. {
  1379. struct ath6kl *ar;
  1380. if (!dev || !ath6kl_priv(dev)) {
  1381. ath6kl_err("failed to get device structure\n");
  1382. return;
  1383. }
  1384. ar = ath6kl_priv(dev);
  1385. destroy_workqueue(ar->ath6kl_wq);
  1386. if (ar->htc_target)
  1387. ath6kl_htc_cleanup(ar->htc_target);
  1388. aggr_module_destroy(ar->aggr_cntxt);
  1389. ath6kl_cookie_cleanup(ar);
  1390. ath6kl_cleanup_amsdu_rxbufs(ar);
  1391. ath6kl_bmi_cleanup(ar);
  1392. ath6kl_debug_cleanup(ar);
  1393. if (unregister && test_bit(NETDEV_REGISTERED, &ar->flag)) {
  1394. unregister_netdev(dev);
  1395. clear_bit(NETDEV_REGISTERED, &ar->flag);
  1396. }
  1397. free_netdev(dev);
  1398. kfree(ar->fw_board);
  1399. kfree(ar->fw_otp);
  1400. kfree(ar->fw);
  1401. kfree(ar->fw_patch);
  1402. ath6kl_cfg80211_deinit(ar);
  1403. }