taishan.dts 8.8 KB

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  1. /*
  2. * Device Tree Source for IBM/AMCC Taishan
  3. *
  4. * Copyright 2007 IBM Corp.
  5. * Hugh Blemings <hugh@au.ibm.com> based off code by
  6. * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without
  10. * any warranty of any kind, whether express or implied.
  11. */
  12. / {
  13. #address-cells = <2>;
  14. #size-cells = <1>;
  15. model = "amcc,taishan";
  16. compatible = "amcc,taishan";
  17. dcr-parent = <&/cpus/PowerPC,440GX@0>;
  18. cpus {
  19. #address-cells = <1>;
  20. #size-cells = <0>;
  21. PowerPC,440GX@0 {
  22. device_type = "cpu";
  23. reg = <0>;
  24. clock-frequency = <2FAF0800>; // 800MHz
  25. timebase-frequency = <0>; // Filled in by zImage
  26. i-cache-line-size = <32>;
  27. d-cache-line-size = <32>;
  28. i-cache-size = <8000>; /* 32 kB */
  29. d-cache-size = <8000>; /* 32 kB */
  30. dcr-controller;
  31. dcr-access-method = "native";
  32. };
  33. };
  34. memory {
  35. device_type = "memory";
  36. reg = <0 0 0>; // Filled in by zImage
  37. };
  38. UICB0: interrupt-controller-base {
  39. compatible = "ibm,uic-440gx", "ibm,uic";
  40. interrupt-controller;
  41. cell-index = <3>;
  42. dcr-reg = <200 009>;
  43. #address-cells = <0>;
  44. #size-cells = <0>;
  45. #interrupt-cells = <2>;
  46. };
  47. UIC0: interrupt-controller0 {
  48. compatible = "ibm,uic-440gx", "ibm,uic";
  49. interrupt-controller;
  50. cell-index = <0>;
  51. dcr-reg = <0c0 009>;
  52. #address-cells = <0>;
  53. #size-cells = <0>;
  54. #interrupt-cells = <2>;
  55. interrupts = <01 4 00 4>; /* cascade - first non-critical */
  56. interrupt-parent = <&UICB0>;
  57. };
  58. UIC1: interrupt-controller1 {
  59. compatible = "ibm,uic-440gx", "ibm,uic";
  60. interrupt-controller;
  61. cell-index = <1>;
  62. dcr-reg = <0d0 009>;
  63. #address-cells = <0>;
  64. #size-cells = <0>;
  65. #interrupt-cells = <2>;
  66. interrupts = <03 4 02 4>; /* cascade */
  67. interrupt-parent = <&UICB0>;
  68. };
  69. UIC2: interrupt-controller2 {
  70. compatible = "ibm,uic-440gx", "ibm,uic";
  71. interrupt-controller;
  72. cell-index = <2>; /* was 1 */
  73. dcr-reg = <210 009>;
  74. #address-cells = <0>;
  75. #size-cells = <0>;
  76. #interrupt-cells = <2>;
  77. interrupts = <05 4 04 4>; /* cascade */
  78. interrupt-parent = <&UICB0>;
  79. };
  80. CPC0: cpc {
  81. compatible = "ibm,cpc-440gp";
  82. dcr-reg = <0b0 003 0e0 010>;
  83. // FIXME: anything else?
  84. };
  85. plb {
  86. compatible = "ibm,plb-440gx", "ibm,plb4";
  87. #address-cells = <2>;
  88. #size-cells = <1>;
  89. ranges;
  90. clock-frequency = <9896800>; // 160MHz
  91. SDRAM0: memory-controller {
  92. compatible = "ibm,sdram-440gp";
  93. dcr-reg = <010 2>;
  94. // FIXME: anything else?
  95. };
  96. SRAM0: sram {
  97. compatible = "ibm,sram-440gp";
  98. dcr-reg = <020 8 00a 1>;
  99. };
  100. DMA0: dma {
  101. // FIXME: ???
  102. compatible = "ibm,dma-440gp";
  103. dcr-reg = <100 027>;
  104. };
  105. MAL0: mcmal {
  106. compatible = "ibm,mcmal-440gx", "ibm,mcmal2";
  107. dcr-reg = <180 62>;
  108. num-tx-chans = <4>;
  109. num-rx-chans = <4>;
  110. interrupt-parent = <&MAL0>;
  111. interrupts = <0 1 2 3 4>;
  112. #interrupt-cells = <1>;
  113. #address-cells = <0>;
  114. #size-cells = <0>;
  115. interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
  116. /*RXEOB*/ 1 &UIC0 b 4
  117. /*SERR*/ 2 &UIC1 0 4
  118. /*TXDE*/ 3 &UIC1 1 4
  119. /*RXDE*/ 4 &UIC1 2 4>;
  120. interrupt-map-mask = <ffffffff>;
  121. };
  122. POB0: opb {
  123. compatible = "ibm,opb-440gx", "ibm,opb";
  124. #address-cells = <1>;
  125. #size-cells = <1>;
  126. /* Wish there was a nicer way of specifying a full 32-bit
  127. range */
  128. ranges = <00000000 1 00000000 80000000
  129. 80000000 1 80000000 80000000>;
  130. dcr-reg = <090 00b>;
  131. interrupt-parent = <&UIC1>;
  132. interrupts = <7 4>;
  133. clock-frequency = <4C4B400>; // 80MHz
  134. EBC0: ebc {
  135. compatible = "ibm,ebc-440gx", "ibm,ebc";
  136. dcr-reg = <012 2>;
  137. #address-cells = <2>;
  138. #size-cells = <1>;
  139. clock-frequency = <4C4B400>; // 80MHz
  140. /* ranges property is supplied by zImage
  141. * based on firmware's configuration of the
  142. * EBC bridge */
  143. interrupts = <5 4>;
  144. interrupt-parent = <&UIC1>;
  145. /* TODO: Add other EBC devices */
  146. };
  147. UART0: serial@40000200 {
  148. device_type = "serial";
  149. compatible = "ns16550";
  150. reg = <40000200 8>;
  151. virtual-reg = <e0000200>;
  152. clock-frequency = <A8C000>;
  153. current-speed = <1C200>; /* 115200 */
  154. interrupt-parent = <&UIC0>;
  155. interrupts = <0 4>;
  156. };
  157. UART1: serial@40000300 {
  158. device_type = "serial";
  159. compatible = "ns16550";
  160. reg = <40000300 8>;
  161. virtual-reg = <e0000300>;
  162. clock-frequency = <A8C000>;
  163. current-speed = <1C200>; /* 115200 */
  164. interrupt-parent = <&UIC0>;
  165. interrupts = <1 4>;
  166. };
  167. IIC0: i2c@40000400 {
  168. /* FIXME */
  169. device_type = "i2c";
  170. compatible = "ibm,iic-440gp", "ibm,iic";
  171. reg = <40000400 14>;
  172. interrupt-parent = <&UIC0>;
  173. interrupts = <2 4>;
  174. };
  175. IIC1: i2c@40000500 {
  176. /* FIXME */
  177. device_type = "i2c";
  178. compatible = "ibm,iic-440gp", "ibm,iic";
  179. reg = <40000500 14>;
  180. interrupt-parent = <&UIC0>;
  181. interrupts = <3 4>;
  182. };
  183. GPIO0: gpio@40000700 {
  184. /* FIXME */
  185. compatible = "ibm,gpio-440gp";
  186. reg = <40000700 20>;
  187. };
  188. ZMII0: emac-zmii@40000780 {
  189. device_type = "zgmii-interface";
  190. compatible = "ibm,zmii-440gx", "ibm,zmii";
  191. reg = <40000780 c>;
  192. };
  193. RGMII0: emac-rgmii@40000790 {
  194. device_type = "rgmii-interface";
  195. compatible = "ibm,rgmii";
  196. reg = <40000790 8>;
  197. };
  198. EMAC0: ethernet@40000800 {
  199. unused = <1>;
  200. linux,network-index = <2>;
  201. device_type = "network";
  202. compatible = "ibm,emac-440gx", "ibm,emac4";
  203. interrupt-parent = <&UIC1>;
  204. interrupts = <1c 4 1d 4>;
  205. reg = <40000800 70>;
  206. local-mac-address = [000000000000]; // Filled in by zImage
  207. mal-device = <&MAL0>;
  208. mal-tx-channel = <0>;
  209. mal-rx-channel = <0>;
  210. cell-index = <0>;
  211. max-frame-size = <5dc>;
  212. rx-fifo-size = <1000>;
  213. tx-fifo-size = <800>;
  214. phy-mode = "rmii";
  215. phy-map = <00000001>;
  216. zmii-device = <&ZMII0>;
  217. zmii-channel = <0>;
  218. };
  219. EMAC1: ethernet@40000900 {
  220. unused = <1>;
  221. linux,network-index = <3>;
  222. device_type = "network";
  223. compatible = "ibm,emac-440gx", "ibm,emac4";
  224. interrupt-parent = <&UIC1>;
  225. interrupts = <1e 4 1f 4>;
  226. reg = <40000900 70>;
  227. local-mac-address = [000000000000]; // Filled in by zImage
  228. mal-device = <&MAL0>;
  229. mal-tx-channel = <1>;
  230. mal-rx-channel = <1>;
  231. cell-index = <1>;
  232. max-frame-size = <5dc>;
  233. rx-fifo-size = <1000>;
  234. tx-fifo-size = <800>;
  235. phy-mode = "rmii";
  236. phy-map = <00000001>;
  237. zmii-device = <&ZMII0>;
  238. zmii-channel = <1>;
  239. };
  240. EMAC2: ethernet@40000c00 {
  241. linux,network-index = <0>;
  242. device_type = "network";
  243. compatible = "ibm,emac-440gx", "ibm,emac4";
  244. interrupt-parent = <&UIC2>;
  245. interrupts = <0 4 1 4>;
  246. reg = <40000c00 70>;
  247. local-mac-address = [000000000000]; // Filled in by zImage
  248. mal-device = <&MAL0>;
  249. mal-tx-channel = <2>;
  250. mal-rx-channel = <2>;
  251. cell-index = <2>;
  252. max-frame-size = <5dc>;
  253. rx-fifo-size = <1000>;
  254. tx-fifo-size = <800>;
  255. phy-mode = "rgmii";
  256. phy-map = <00000001>;
  257. rgmii-device = <&RGMII0>;
  258. rgmii-channel = <0>;
  259. zmii-device = <&ZMII0>;
  260. zmii-channel = <2>;
  261. };
  262. EMAC3: ethernet@40000e00 {
  263. linux,network-index = <1>;
  264. device_type = "network";
  265. compatible = "ibm,emac-440gx", "ibm,emac4";
  266. interrupt-parent = <&UIC2>;
  267. interrupts = <2 4 3 4>;
  268. reg = <40000e00 70>;
  269. local-mac-address = [000000000000]; // Filled in by zImage
  270. mal-device = <&MAL0>;
  271. mal-tx-channel = <3>;
  272. mal-rx-channel = <3>;
  273. cell-index = <3>;
  274. max-frame-size = <5dc>;
  275. rx-fifo-size = <1000>;
  276. tx-fifo-size = <800>;
  277. phy-mode = "rgmii";
  278. phy-map = <00000003>;
  279. rgmii-device = <&RGMII0>;
  280. rgmii-channel = <1>;
  281. zmii-device = <&ZMII0>;
  282. zmii-channel = <3>;
  283. };
  284. GPT0: gpt@40000a00 {
  285. /* FIXME */
  286. reg = <40000a00 d4>;
  287. interrupt-parent = <&UIC0>;
  288. interrupts = <12 4 13 4 14 4 15 4 16 4>;
  289. };
  290. };
  291. PCIX0: pci@20ec00000 {
  292. device_type = "pci";
  293. #interrupt-cells = <1>;
  294. #size-cells = <2>;
  295. #address-cells = <3>;
  296. compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
  297. primary;
  298. large-inbound-windows;
  299. enable-msi-hole;
  300. reg = <2 0ec00000 8 /* Config space access */
  301. 0 0 0 /* no IACK cycles */
  302. 2 0ed00000 4 /* Special cycles */
  303. 2 0ec80000 100 /* Internal registers */
  304. 2 0ec80100 fc>; /* Internal messaging registers */
  305. /* Outbound ranges, one memory and one IO,
  306. * later cannot be changed
  307. */
  308. ranges = <02000000 0 80000000 00000003 80000000 0 80000000
  309. 01000000 0 00000000 00000002 08000000 0 00010000>;
  310. /* Inbound 2GB range starting at 0 */
  311. dma-ranges = <42000000 0 0 0 0 0 80000000>;
  312. interrupt-map-mask = <f800 0 0 7>;
  313. interrupt-map = <
  314. /* IDSEL 1 */
  315. 0800 0 0 1 &UIC0 17 8
  316. 0800 0 0 2 &UIC0 18 8
  317. 0800 0 0 3 &UIC0 19 8
  318. 0800 0 0 4 &UIC0 1a 8
  319. /* IDSEL 2 */
  320. 1000 0 0 1 &UIC0 18 8
  321. 1000 0 0 2 &UIC0 19 8
  322. 1000 0 0 3 &UIC0 1a 8
  323. 1000 0 0 4 &UIC0 17 8
  324. >;
  325. };
  326. };
  327. chosen {
  328. linux,stdout-path = "/plb/opb/serial@40000300";
  329. };
  330. };