cx23885-dvb.c 24 KB

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  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/module.h>
  22. #include <linux/init.h>
  23. #include <linux/device.h>
  24. #include <linux/fs.h>
  25. #include <linux/kthread.h>
  26. #include <linux/file.h>
  27. #include <linux/suspend.h>
  28. #include "cx23885.h"
  29. #include <media/v4l2-common.h>
  30. #include "dvb_ca_en50221.h"
  31. #include "s5h1409.h"
  32. #include "s5h1411.h"
  33. #include "mt2131.h"
  34. #include "tda8290.h"
  35. #include "tda18271.h"
  36. #include "lgdt330x.h"
  37. #include "xc5000.h"
  38. #include "tda10048.h"
  39. #include "tuner-xc2028.h"
  40. #include "tuner-simple.h"
  41. #include "dib7000p.h"
  42. #include "dibx000_common.h"
  43. #include "zl10353.h"
  44. #include "stv0900.h"
  45. #include "stv6110.h"
  46. #include "lnbh24.h"
  47. #include "cx24116.h"
  48. #include "cimax2.h"
  49. #include "netup-eeprom.h"
  50. #include "netup-init.h"
  51. #include "lgdt3305.h"
  52. static unsigned int debug;
  53. #define dprintk(level, fmt, arg...)\
  54. do { if (debug >= level)\
  55. printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
  56. } while (0)
  57. /* ------------------------------------------------------------------ */
  58. static unsigned int alt_tuner;
  59. module_param(alt_tuner, int, 0644);
  60. MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
  61. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  62. /* ------------------------------------------------------------------ */
  63. static int dvb_buf_setup(struct videobuf_queue *q,
  64. unsigned int *count, unsigned int *size)
  65. {
  66. struct cx23885_tsport *port = q->priv_data;
  67. port->ts_packet_size = 188 * 4;
  68. port->ts_packet_count = 32;
  69. *size = port->ts_packet_size * port->ts_packet_count;
  70. *count = 32;
  71. return 0;
  72. }
  73. static int dvb_buf_prepare(struct videobuf_queue *q,
  74. struct videobuf_buffer *vb, enum v4l2_field field)
  75. {
  76. struct cx23885_tsport *port = q->priv_data;
  77. return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
  78. }
  79. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  80. {
  81. struct cx23885_tsport *port = q->priv_data;
  82. cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
  83. }
  84. static void dvb_buf_release(struct videobuf_queue *q,
  85. struct videobuf_buffer *vb)
  86. {
  87. cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
  88. }
  89. static struct videobuf_queue_ops dvb_qops = {
  90. .buf_setup = dvb_buf_setup,
  91. .buf_prepare = dvb_buf_prepare,
  92. .buf_queue = dvb_buf_queue,
  93. .buf_release = dvb_buf_release,
  94. };
  95. static struct s5h1409_config hauppauge_generic_config = {
  96. .demod_address = 0x32 >> 1,
  97. .output_mode = S5H1409_SERIAL_OUTPUT,
  98. .gpio = S5H1409_GPIO_ON,
  99. .qam_if = 44000,
  100. .inversion = S5H1409_INVERSION_OFF,
  101. .status_mode = S5H1409_DEMODLOCKING,
  102. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  103. };
  104. static struct tda10048_config hauppauge_hvr1200_config = {
  105. .demod_address = 0x10 >> 1,
  106. .output_mode = TDA10048_SERIAL_OUTPUT,
  107. .fwbulkwritelen = TDA10048_BULKWRITE_200,
  108. .inversion = TDA10048_INVERSION_ON,
  109. .if_freq_khz = TDA10048_IF_4300,
  110. .clk_freq_khz = TDA10048_CLK_16000,
  111. };
  112. static struct tda10048_config hauppauge_hvr1210_config = {
  113. .demod_address = 0x10 >> 1,
  114. .output_mode = TDA10048_SERIAL_OUTPUT,
  115. .fwbulkwritelen = TDA10048_BULKWRITE_200,
  116. .inversion = TDA10048_INVERSION_ON,
  117. .if_freq_khz = TDA10048_IF_4000,
  118. .clk_freq_khz = TDA10048_CLK_16000,
  119. };
  120. static struct s5h1409_config hauppauge_ezqam_config = {
  121. .demod_address = 0x32 >> 1,
  122. .output_mode = S5H1409_SERIAL_OUTPUT,
  123. .gpio = S5H1409_GPIO_OFF,
  124. .qam_if = 4000,
  125. .inversion = S5H1409_INVERSION_ON,
  126. .status_mode = S5H1409_DEMODLOCKING,
  127. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  128. };
  129. static struct s5h1409_config hauppauge_hvr1800lp_config = {
  130. .demod_address = 0x32 >> 1,
  131. .output_mode = S5H1409_SERIAL_OUTPUT,
  132. .gpio = S5H1409_GPIO_OFF,
  133. .qam_if = 44000,
  134. .inversion = S5H1409_INVERSION_OFF,
  135. .status_mode = S5H1409_DEMODLOCKING,
  136. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  137. };
  138. static struct s5h1409_config hauppauge_hvr1500_config = {
  139. .demod_address = 0x32 >> 1,
  140. .output_mode = S5H1409_SERIAL_OUTPUT,
  141. .gpio = S5H1409_GPIO_OFF,
  142. .inversion = S5H1409_INVERSION_OFF,
  143. .status_mode = S5H1409_DEMODLOCKING,
  144. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  145. };
  146. static struct mt2131_config hauppauge_generic_tunerconfig = {
  147. 0x61
  148. };
  149. static struct lgdt330x_config fusionhdtv_5_express = {
  150. .demod_address = 0x0e,
  151. .demod_chip = LGDT3303,
  152. .serial_mpeg = 0x40,
  153. };
  154. static struct s5h1409_config hauppauge_hvr1500q_config = {
  155. .demod_address = 0x32 >> 1,
  156. .output_mode = S5H1409_SERIAL_OUTPUT,
  157. .gpio = S5H1409_GPIO_ON,
  158. .qam_if = 44000,
  159. .inversion = S5H1409_INVERSION_OFF,
  160. .status_mode = S5H1409_DEMODLOCKING,
  161. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  162. };
  163. static struct s5h1409_config dvico_s5h1409_config = {
  164. .demod_address = 0x32 >> 1,
  165. .output_mode = S5H1409_SERIAL_OUTPUT,
  166. .gpio = S5H1409_GPIO_ON,
  167. .qam_if = 44000,
  168. .inversion = S5H1409_INVERSION_OFF,
  169. .status_mode = S5H1409_DEMODLOCKING,
  170. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  171. };
  172. static struct s5h1411_config dvico_s5h1411_config = {
  173. .output_mode = S5H1411_SERIAL_OUTPUT,
  174. .gpio = S5H1411_GPIO_ON,
  175. .qam_if = S5H1411_IF_44000,
  176. .vsb_if = S5H1411_IF_44000,
  177. .inversion = S5H1411_INVERSION_OFF,
  178. .status_mode = S5H1411_DEMODLOCKING,
  179. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  180. };
  181. static struct s5h1411_config hcw_s5h1411_config = {
  182. .output_mode = S5H1411_SERIAL_OUTPUT,
  183. .gpio = S5H1411_GPIO_OFF,
  184. .vsb_if = S5H1411_IF_44000,
  185. .qam_if = S5H1411_IF_4000,
  186. .inversion = S5H1411_INVERSION_ON,
  187. .status_mode = S5H1411_DEMODLOCKING,
  188. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  189. };
  190. static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
  191. .i2c_address = 0x61,
  192. .if_khz = 5380,
  193. };
  194. static struct xc5000_config dvico_xc5000_tunerconfig = {
  195. .i2c_address = 0x64,
  196. .if_khz = 5380,
  197. };
  198. static struct tda829x_config tda829x_no_probe = {
  199. .probe_tuner = TDA829X_DONT_PROBE,
  200. };
  201. static struct tda18271_std_map hauppauge_tda18271_std_map = {
  202. .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
  203. .if_lvl = 6, .rfagc_top = 0x37 },
  204. .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
  205. .if_lvl = 6, .rfagc_top = 0x37 },
  206. };
  207. static struct tda18271_config hauppauge_tda18271_config = {
  208. .std_map = &hauppauge_tda18271_std_map,
  209. .gate = TDA18271_GATE_ANALOG,
  210. };
  211. static struct tda18271_config hauppauge_hvr1200_tuner_config = {
  212. .gate = TDA18271_GATE_ANALOG,
  213. };
  214. static struct tda18271_config hauppauge_hvr1210_tuner_config = {
  215. .gate = TDA18271_GATE_DIGITAL,
  216. };
  217. static struct tda18271_std_map hcw_lgdt3305_tda18271_std_map = {
  218. .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
  219. .if_lvl = 1, .rfagc_top = 0x58 },
  220. .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
  221. .if_lvl = 1, .rfagc_top = 0x58 },
  222. };
  223. static struct tda18271_config hcw_lgdt3305_tda18271_config = {
  224. .std_map = &hcw_lgdt3305_tda18271_std_map,
  225. };
  226. static struct lgdt3305_config hcw_lgdt3305_config = {
  227. .i2c_addr = 0x0e,
  228. .mpeg_mode = LGDT3305_MPEG_SERIAL,
  229. .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
  230. .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
  231. .deny_i2c_rptr = 1,
  232. .spectral_inversion = 1,
  233. .qam_if_khz = 4000,
  234. .vsb_if_khz = 3250,
  235. };
  236. static struct dibx000_agc_config xc3028_agc_config = {
  237. BAND_VHF | BAND_UHF, /* band_caps */
  238. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
  239. * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
  240. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
  241. * P_agc_nb_est=2, P_agc_write=0
  242. */
  243. (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
  244. (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
  245. 712, /* inv_gain */
  246. 21, /* time_stabiliz */
  247. 0, /* alpha_level */
  248. 118, /* thlock */
  249. 0, /* wbd_inv */
  250. 2867, /* wbd_ref */
  251. 0, /* wbd_sel */
  252. 2, /* wbd_alpha */
  253. 0, /* agc1_max */
  254. 0, /* agc1_min */
  255. 39718, /* agc2_max */
  256. 9930, /* agc2_min */
  257. 0, /* agc1_pt1 */
  258. 0, /* agc1_pt2 */
  259. 0, /* agc1_pt3 */
  260. 0, /* agc1_slope1 */
  261. 0, /* agc1_slope2 */
  262. 0, /* agc2_pt1 */
  263. 128, /* agc2_pt2 */
  264. 29, /* agc2_slope1 */
  265. 29, /* agc2_slope2 */
  266. 17, /* alpha_mant */
  267. 27, /* alpha_exp */
  268. 23, /* beta_mant */
  269. 51, /* beta_exp */
  270. 1, /* perform_agc_softsplit */
  271. };
  272. /* PLL Configuration for COFDM BW_MHz = 8.000000
  273. * With external clock = 30.000000 */
  274. static struct dibx000_bandwidth_config xc3028_bw_config = {
  275. 60000, /* internal */
  276. 30000, /* sampling */
  277. 1, /* pll_cfg: prediv */
  278. 8, /* pll_cfg: ratio */
  279. 3, /* pll_cfg: range */
  280. 1, /* pll_cfg: reset */
  281. 0, /* pll_cfg: bypass */
  282. 0, /* misc: refdiv */
  283. 0, /* misc: bypclk_div */
  284. 1, /* misc: IO_CLK_en_core */
  285. 1, /* misc: ADClkSrc */
  286. 0, /* misc: modulo */
  287. (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
  288. (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
  289. 20452225, /* timf */
  290. 30000000 /* xtal_hz */
  291. };
  292. static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
  293. .output_mpeg2_in_188_bytes = 1,
  294. .hostbus_diversity = 1,
  295. .tuner_is_baseband = 0,
  296. .update_lna = NULL,
  297. .agc_config_count = 1,
  298. .agc = &xc3028_agc_config,
  299. .bw = &xc3028_bw_config,
  300. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  301. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  302. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  303. .pwm_freq_div = 0,
  304. .agc_control = NULL,
  305. .spur_protect = 0,
  306. .output_mode = OUTMODE_MPEG2_SERIAL,
  307. };
  308. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  309. .demod_address = 0x0f,
  310. .if2 = 45600,
  311. .no_tuner = 1,
  312. .disable_i2c_gate_ctrl = 1,
  313. };
  314. static struct stv0900_config netup_stv0900_config = {
  315. .demod_address = 0x68,
  316. .xtal = 27000000,
  317. .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
  318. .diseqc_mode = 2,/* 2/3 PWM */
  319. .path1_mode = 2,/*Serial continues clock */
  320. .path2_mode = 2,/*Serial continues clock */
  321. .tun1_maddress = 0,/* 0x60 */
  322. .tun2_maddress = 3,/* 0x63 */
  323. .tun1_adc = 1,/* 1 Vpp */
  324. .tun2_adc = 1,/* 1 Vpp */
  325. };
  326. static struct stv6110_config netup_stv6110_tunerconfig_a = {
  327. .i2c_address = 0x60,
  328. .mclk = 27000000,
  329. .iq_wiring = 0,
  330. };
  331. static struct stv6110_config netup_stv6110_tunerconfig_b = {
  332. .i2c_address = 0x63,
  333. .mclk = 27000000,
  334. .iq_wiring = 1,
  335. };
  336. static int tbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  337. {
  338. struct cx23885_tsport *port = fe->dvb->priv;
  339. struct cx23885_dev *dev = port->dev;
  340. if (voltage == SEC_VOLTAGE_18)
  341. cx_write(MC417_RWD, 0x00001e00);/* GPIO-13 high */
  342. else if (voltage == SEC_VOLTAGE_13)
  343. cx_write(MC417_RWD, 0x00001a00);/* GPIO-13 low */
  344. else
  345. cx_write(MC417_RWD, 0x00001800);/* GPIO-12 low */
  346. return 0;
  347. }
  348. static struct cx24116_config tbs_cx24116_config = {
  349. .demod_address = 0x05,
  350. };
  351. static struct cx24116_config tevii_cx24116_config = {
  352. .demod_address = 0x55,
  353. };
  354. static struct cx24116_config dvbworld_cx24116_config = {
  355. .demod_address = 0x05,
  356. };
  357. static int dvb_register(struct cx23885_tsport *port)
  358. {
  359. struct cx23885_dev *dev = port->dev;
  360. struct cx23885_i2c *i2c_bus = NULL;
  361. struct videobuf_dvb_frontend *fe0;
  362. int ret;
  363. /* Get the first frontend */
  364. fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
  365. if (!fe0)
  366. return -EINVAL;
  367. /* init struct videobuf_dvb */
  368. fe0->dvb.name = dev->name;
  369. /* init frontend */
  370. switch (dev->board) {
  371. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  372. i2c_bus = &dev->i2c_bus[0];
  373. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  374. &hauppauge_generic_config,
  375. &i2c_bus->i2c_adap);
  376. if (fe0->dvb.frontend != NULL) {
  377. dvb_attach(mt2131_attach, fe0->dvb.frontend,
  378. &i2c_bus->i2c_adap,
  379. &hauppauge_generic_tunerconfig, 0);
  380. }
  381. break;
  382. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  383. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  384. i2c_bus = &dev->i2c_bus[0];
  385. fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
  386. &hcw_lgdt3305_config,
  387. &i2c_bus->i2c_adap);
  388. if (fe0->dvb.frontend != NULL) {
  389. dvb_attach(tda18271_attach, fe0->dvb.frontend,
  390. 0x60, &dev->i2c_bus[1].i2c_adap,
  391. &hcw_lgdt3305_tda18271_config);
  392. }
  393. break;
  394. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  395. i2c_bus = &dev->i2c_bus[0];
  396. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  397. &hcw_s5h1411_config,
  398. &i2c_bus->i2c_adap);
  399. if (fe0->dvb.frontend != NULL) {
  400. dvb_attach(tda18271_attach, fe0->dvb.frontend,
  401. 0x60, &dev->i2c_bus[1].i2c_adap,
  402. &hauppauge_tda18271_config);
  403. }
  404. break;
  405. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  406. i2c_bus = &dev->i2c_bus[0];
  407. switch (alt_tuner) {
  408. case 1:
  409. fe0->dvb.frontend =
  410. dvb_attach(s5h1409_attach,
  411. &hauppauge_ezqam_config,
  412. &i2c_bus->i2c_adap);
  413. if (fe0->dvb.frontend != NULL) {
  414. dvb_attach(tda829x_attach, fe0->dvb.frontend,
  415. &dev->i2c_bus[1].i2c_adap, 0x42,
  416. &tda829x_no_probe);
  417. dvb_attach(tda18271_attach, fe0->dvb.frontend,
  418. 0x60, &dev->i2c_bus[1].i2c_adap,
  419. &hauppauge_tda18271_config);
  420. }
  421. break;
  422. case 0:
  423. default:
  424. fe0->dvb.frontend =
  425. dvb_attach(s5h1409_attach,
  426. &hauppauge_generic_config,
  427. &i2c_bus->i2c_adap);
  428. if (fe0->dvb.frontend != NULL)
  429. dvb_attach(mt2131_attach, fe0->dvb.frontend,
  430. &i2c_bus->i2c_adap,
  431. &hauppauge_generic_tunerconfig, 0);
  432. break;
  433. }
  434. break;
  435. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  436. i2c_bus = &dev->i2c_bus[0];
  437. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  438. &hauppauge_hvr1800lp_config,
  439. &i2c_bus->i2c_adap);
  440. if (fe0->dvb.frontend != NULL) {
  441. dvb_attach(mt2131_attach, fe0->dvb.frontend,
  442. &i2c_bus->i2c_adap,
  443. &hauppauge_generic_tunerconfig, 0);
  444. }
  445. break;
  446. case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
  447. i2c_bus = &dev->i2c_bus[0];
  448. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  449. &fusionhdtv_5_express,
  450. &i2c_bus->i2c_adap);
  451. if (fe0->dvb.frontend != NULL) {
  452. dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  453. &i2c_bus->i2c_adap, 0x61,
  454. TUNER_LG_TDVS_H06XF);
  455. }
  456. break;
  457. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  458. i2c_bus = &dev->i2c_bus[1];
  459. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  460. &hauppauge_hvr1500q_config,
  461. &dev->i2c_bus[0].i2c_adap);
  462. if (fe0->dvb.frontend != NULL)
  463. dvb_attach(xc5000_attach, fe0->dvb.frontend,
  464. &i2c_bus->i2c_adap,
  465. &hauppauge_hvr1500q_tunerconfig);
  466. break;
  467. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  468. i2c_bus = &dev->i2c_bus[1];
  469. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  470. &hauppauge_hvr1500_config,
  471. &dev->i2c_bus[0].i2c_adap);
  472. if (fe0->dvb.frontend != NULL) {
  473. struct dvb_frontend *fe;
  474. struct xc2028_config cfg = {
  475. .i2c_adap = &i2c_bus->i2c_adap,
  476. .i2c_addr = 0x61,
  477. };
  478. static struct xc2028_ctrl ctl = {
  479. .fname = XC2028_DEFAULT_FIRMWARE,
  480. .max_len = 64,
  481. .demod = XC3028_FE_OREN538,
  482. };
  483. fe = dvb_attach(xc2028_attach,
  484. fe0->dvb.frontend, &cfg);
  485. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  486. fe->ops.tuner_ops.set_config(fe, &ctl);
  487. }
  488. break;
  489. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  490. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  491. i2c_bus = &dev->i2c_bus[0];
  492. fe0->dvb.frontend = dvb_attach(tda10048_attach,
  493. &hauppauge_hvr1200_config,
  494. &i2c_bus->i2c_adap);
  495. if (fe0->dvb.frontend != NULL) {
  496. dvb_attach(tda829x_attach, fe0->dvb.frontend,
  497. &dev->i2c_bus[1].i2c_adap, 0x42,
  498. &tda829x_no_probe);
  499. dvb_attach(tda18271_attach, fe0->dvb.frontend,
  500. 0x60, &dev->i2c_bus[1].i2c_adap,
  501. &hauppauge_hvr1200_tuner_config);
  502. }
  503. break;
  504. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  505. i2c_bus = &dev->i2c_bus[0];
  506. fe0->dvb.frontend = dvb_attach(tda10048_attach,
  507. &hauppauge_hvr1210_config,
  508. &i2c_bus->i2c_adap);
  509. if (fe0->dvb.frontend != NULL) {
  510. dvb_attach(tda18271_attach, fe0->dvb.frontend,
  511. 0x60, &dev->i2c_bus[1].i2c_adap,
  512. &hauppauge_hvr1210_tuner_config);
  513. }
  514. break;
  515. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  516. i2c_bus = &dev->i2c_bus[0];
  517. fe0->dvb.frontend = dvb_attach(dib7000p_attach,
  518. &i2c_bus->i2c_adap,
  519. 0x12, &hauppauge_hvr1400_dib7000_config);
  520. if (fe0->dvb.frontend != NULL) {
  521. struct dvb_frontend *fe;
  522. struct xc2028_config cfg = {
  523. .i2c_adap = &dev->i2c_bus[1].i2c_adap,
  524. .i2c_addr = 0x64,
  525. };
  526. static struct xc2028_ctrl ctl = {
  527. .fname = XC3028L_DEFAULT_FIRMWARE,
  528. .max_len = 64,
  529. .demod = 5000,
  530. /* This is true for all demods with
  531. v36 firmware? */
  532. .type = XC2028_D2633,
  533. };
  534. fe = dvb_attach(xc2028_attach,
  535. fe0->dvb.frontend, &cfg);
  536. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  537. fe->ops.tuner_ops.set_config(fe, &ctl);
  538. }
  539. break;
  540. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  541. i2c_bus = &dev->i2c_bus[port->nr - 1];
  542. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  543. &dvico_s5h1409_config,
  544. &i2c_bus->i2c_adap);
  545. if (fe0->dvb.frontend == NULL)
  546. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  547. &dvico_s5h1411_config,
  548. &i2c_bus->i2c_adap);
  549. if (fe0->dvb.frontend != NULL)
  550. dvb_attach(xc5000_attach, fe0->dvb.frontend,
  551. &i2c_bus->i2c_adap,
  552. &dvico_xc5000_tunerconfig);
  553. break;
  554. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
  555. i2c_bus = &dev->i2c_bus[port->nr - 1];
  556. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  557. &dvico_fusionhdtv_xc3028,
  558. &i2c_bus->i2c_adap);
  559. if (fe0->dvb.frontend != NULL) {
  560. struct dvb_frontend *fe;
  561. struct xc2028_config cfg = {
  562. .i2c_adap = &i2c_bus->i2c_adap,
  563. .i2c_addr = 0x61,
  564. };
  565. static struct xc2028_ctrl ctl = {
  566. .fname = XC2028_DEFAULT_FIRMWARE,
  567. .max_len = 64,
  568. .demod = XC3028_FE_ZARLINK456,
  569. };
  570. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
  571. &cfg);
  572. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  573. fe->ops.tuner_ops.set_config(fe, &ctl);
  574. }
  575. break;
  576. }
  577. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  578. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  579. i2c_bus = &dev->i2c_bus[0];
  580. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  581. &dvico_fusionhdtv_xc3028,
  582. &i2c_bus->i2c_adap);
  583. if (fe0->dvb.frontend != NULL) {
  584. struct dvb_frontend *fe;
  585. struct xc2028_config cfg = {
  586. .i2c_adap = &dev->i2c_bus[1].i2c_adap,
  587. .i2c_addr = 0x61,
  588. };
  589. static struct xc2028_ctrl ctl = {
  590. .fname = XC2028_DEFAULT_FIRMWARE,
  591. .max_len = 64,
  592. .demod = XC3028_FE_ZARLINK456,
  593. };
  594. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
  595. &cfg);
  596. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  597. fe->ops.tuner_ops.set_config(fe, &ctl);
  598. }
  599. break;
  600. case CX23885_BOARD_TBS_6920:
  601. i2c_bus = &dev->i2c_bus[0];
  602. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  603. &tbs_cx24116_config,
  604. &i2c_bus->i2c_adap);
  605. if (fe0->dvb.frontend != NULL)
  606. fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
  607. break;
  608. case CX23885_BOARD_TEVII_S470:
  609. i2c_bus = &dev->i2c_bus[1];
  610. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  611. &tevii_cx24116_config,
  612. &i2c_bus->i2c_adap);
  613. if (fe0->dvb.frontend != NULL)
  614. fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
  615. break;
  616. case CX23885_BOARD_DVBWORLD_2005:
  617. i2c_bus = &dev->i2c_bus[1];
  618. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  619. &dvbworld_cx24116_config,
  620. &i2c_bus->i2c_adap);
  621. break;
  622. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  623. i2c_bus = &dev->i2c_bus[0];
  624. switch (port->nr) {
  625. /* port B */
  626. case 1:
  627. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  628. &netup_stv0900_config,
  629. &i2c_bus->i2c_adap, 0);
  630. if (fe0->dvb.frontend != NULL) {
  631. if (dvb_attach(stv6110_attach,
  632. fe0->dvb.frontend,
  633. &netup_stv6110_tunerconfig_a,
  634. &i2c_bus->i2c_adap)) {
  635. if (!dvb_attach(lnbh24_attach,
  636. fe0->dvb.frontend,
  637. &i2c_bus->i2c_adap,
  638. LNBH24_PCL, 0, 0x09))
  639. printk(KERN_ERR
  640. "No LNBH24 found!\n");
  641. }
  642. }
  643. break;
  644. /* port C */
  645. case 2:
  646. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  647. &netup_stv0900_config,
  648. &i2c_bus->i2c_adap, 1);
  649. if (fe0->dvb.frontend != NULL) {
  650. if (dvb_attach(stv6110_attach,
  651. fe0->dvb.frontend,
  652. &netup_stv6110_tunerconfig_b,
  653. &i2c_bus->i2c_adap)) {
  654. if (!dvb_attach(lnbh24_attach,
  655. fe0->dvb.frontend,
  656. &i2c_bus->i2c_adap,
  657. LNBH24_PCL, 0, 0x0a))
  658. printk(KERN_ERR
  659. "No LNBH24 found!\n");
  660. }
  661. }
  662. break;
  663. }
  664. break;
  665. default:
  666. printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
  667. " isn't supported yet\n",
  668. dev->name);
  669. break;
  670. }
  671. if (NULL == fe0->dvb.frontend) {
  672. printk(KERN_ERR "%s: frontend initialization failed\n",
  673. dev->name);
  674. return -1;
  675. }
  676. /* define general-purpose callback pointer */
  677. fe0->dvb.frontend->callback = cx23885_tuner_callback;
  678. /* Put the analog decoder in standby to keep it quiet */
  679. call_all(dev, tuner, s_standby);
  680. if (fe0->dvb.frontend->ops.analog_ops.standby)
  681. fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
  682. /* register everything */
  683. ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
  684. &dev->pci->dev, adapter_nr, 0);
  685. /* init CI & MAC */
  686. switch (dev->board) {
  687. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
  688. static struct netup_card_info cinfo;
  689. netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
  690. memcpy(port->frontends.adapter.proposed_mac,
  691. cinfo.port[port->nr - 1].mac, 6);
  692. printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC="
  693. "%02X:%02X:%02X:%02X:%02X:%02X\n",
  694. port->nr,
  695. port->frontends.adapter.proposed_mac[0],
  696. port->frontends.adapter.proposed_mac[1],
  697. port->frontends.adapter.proposed_mac[2],
  698. port->frontends.adapter.proposed_mac[3],
  699. port->frontends.adapter.proposed_mac[4],
  700. port->frontends.adapter.proposed_mac[5]);
  701. netup_ci_init(port);
  702. break;
  703. }
  704. }
  705. return ret;
  706. }
  707. int cx23885_dvb_register(struct cx23885_tsport *port)
  708. {
  709. struct videobuf_dvb_frontend *fe0;
  710. struct cx23885_dev *dev = port->dev;
  711. int err, i;
  712. /* Here we need to allocate the correct number of frontends,
  713. * as reflected in the cards struct. The reality is that currrently
  714. * no cx23885 boards support this - yet. But, if we don't modify this
  715. * code then the second frontend would never be allocated (later)
  716. * and fail with error before the attach in dvb_register().
  717. * Without these changes we risk an OOPS later. The changes here
  718. * are for safety, and should provide a good foundation for the
  719. * future addition of any multi-frontend cx23885 based boards.
  720. */
  721. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  722. port->num_frontends);
  723. for (i = 1; i <= port->num_frontends; i++) {
  724. if (videobuf_dvb_alloc_frontend(
  725. &port->frontends, i) == NULL) {
  726. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  727. return -ENOMEM;
  728. }
  729. fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
  730. if (!fe0)
  731. err = -EINVAL;
  732. dprintk(1, "%s\n", __func__);
  733. dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
  734. dev->board,
  735. dev->name,
  736. dev->pci_bus,
  737. dev->pci_slot);
  738. err = -ENODEV;
  739. /* dvb stuff */
  740. /* We have to init the queue for each frontend on a port. */
  741. printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
  742. videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
  743. &dev->pci->dev, &port->slock,
  744. V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
  745. sizeof(struct cx23885_buffer), port);
  746. }
  747. err = dvb_register(port);
  748. if (err != 0)
  749. printk(KERN_ERR "%s() dvb_register failed err = %d\n",
  750. __func__, err);
  751. return err;
  752. }
  753. int cx23885_dvb_unregister(struct cx23885_tsport *port)
  754. {
  755. struct videobuf_dvb_frontend *fe0;
  756. /* FIXME: in an error condition where the we have
  757. * an expected number of frontends (attach problem)
  758. * then this might not clean up correctly, if 1
  759. * is invalid.
  760. * This comment only applies to future boards IF they
  761. * implement MFE support.
  762. */
  763. fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
  764. if (fe0->dvb.frontend)
  765. videobuf_dvb_unregister_bus(&port->frontends);
  766. switch (port->dev->board) {
  767. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  768. netup_ci_exit(port);
  769. break;
  770. }
  771. return 0;
  772. }