ixgb_main.c 60 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "ixgb.h"
  21. /* Change Log
  22. * 1.0.96 04/19/05
  23. * - Make needlessly global code static -- bunk@stusta.de
  24. * - ethtool cleanup -- shemminger@osdl.org
  25. * - Support for MODULE_VERSION -- linville@tuxdriver.com
  26. * - add skb_header_cloned check to the tso path -- herbert@apana.org.au
  27. * 1.0.88 01/05/05
  28. * - include fix to the condition that determines when to quit NAPI - Robert Olsson
  29. * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
  30. * 1.0.84 10/26/04
  31. * - reset buffer_info->dma in Tx resource cleanup logic
  32. * 1.0.83 10/12/04
  33. * - sparse cleanup - shemminger@osdl.org
  34. * - fix tx resource cleanup logic
  35. */
  36. char ixgb_driver_name[] = "ixgb";
  37. static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
  38. #ifndef CONFIG_IXGB_NAPI
  39. #define DRIVERNAPI
  40. #else
  41. #define DRIVERNAPI "-NAPI"
  42. #endif
  43. #define DRV_VERSION "1.0.104-k2"DRIVERNAPI
  44. char ixgb_driver_version[] = DRV_VERSION;
  45. static char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  46. /* ixgb_pci_tbl - PCI Device ID Table
  47. *
  48. * Wildcard entries (PCI_ANY_ID) should come last
  49. * Last entry must be all 0s
  50. *
  51. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  52. * Class, Class Mask, private data (not used) }
  53. */
  54. static struct pci_device_id ixgb_pci_tbl[] = {
  55. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
  56. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  57. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
  58. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  59. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
  60. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  61. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
  62. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  63. /* required last entry */
  64. {0,}
  65. };
  66. MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
  67. /* Local Function Prototypes */
  68. int ixgb_up(struct ixgb_adapter *adapter);
  69. void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
  70. void ixgb_reset(struct ixgb_adapter *adapter);
  71. int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
  72. int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
  73. void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
  74. void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
  75. void ixgb_update_stats(struct ixgb_adapter *adapter);
  76. static int ixgb_init_module(void);
  77. static void ixgb_exit_module(void);
  78. static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  79. static void __devexit ixgb_remove(struct pci_dev *pdev);
  80. static int ixgb_sw_init(struct ixgb_adapter *adapter);
  81. static int ixgb_open(struct net_device *netdev);
  82. static int ixgb_close(struct net_device *netdev);
  83. static void ixgb_configure_tx(struct ixgb_adapter *adapter);
  84. static void ixgb_configure_rx(struct ixgb_adapter *adapter);
  85. static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
  86. static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
  87. static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
  88. static void ixgb_set_multi(struct net_device *netdev);
  89. static void ixgb_watchdog(unsigned long data);
  90. static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  91. static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
  92. static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
  93. static int ixgb_set_mac(struct net_device *netdev, void *p);
  94. static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
  95. static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
  96. #ifdef CONFIG_IXGB_NAPI
  97. static int ixgb_clean(struct net_device *netdev, int *budget);
  98. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
  99. int *work_done, int work_to_do);
  100. #else
  101. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
  102. #endif
  103. static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
  104. void ixgb_set_ethtool_ops(struct net_device *netdev);
  105. static void ixgb_tx_timeout(struct net_device *dev);
  106. static void ixgb_tx_timeout_task(struct net_device *dev);
  107. static void ixgb_vlan_rx_register(struct net_device *netdev,
  108. struct vlan_group *grp);
  109. static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  110. static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  111. static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
  112. #ifdef CONFIG_NET_POLL_CONTROLLER
  113. /* for netdump / net console */
  114. static void ixgb_netpoll(struct net_device *dev);
  115. #endif
  116. /* Exported from other modules */
  117. extern void ixgb_check_options(struct ixgb_adapter *adapter);
  118. static struct pci_driver ixgb_driver = {
  119. .name = ixgb_driver_name,
  120. .id_table = ixgb_pci_tbl,
  121. .probe = ixgb_probe,
  122. .remove = __devexit_p(ixgb_remove),
  123. };
  124. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  125. MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
  126. MODULE_LICENSE("GPL");
  127. MODULE_VERSION(DRV_VERSION);
  128. #define DEFAULT_DEBUG_LEVEL_SHIFT 3
  129. static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
  130. module_param(debug, int, 0);
  131. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  132. /* some defines for controlling descriptor fetches in h/w */
  133. #define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
  134. #define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
  135. * this */
  136. #define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
  137. * is pushed this many descriptors
  138. * from head */
  139. /**
  140. * ixgb_init_module - Driver Registration Routine
  141. *
  142. * ixgb_init_module is the first routine called when the driver is
  143. * loaded. All it does is register with the PCI subsystem.
  144. **/
  145. static int __init
  146. ixgb_init_module(void)
  147. {
  148. printk(KERN_INFO "%s - version %s\n",
  149. ixgb_driver_string, ixgb_driver_version);
  150. printk(KERN_INFO "%s\n", ixgb_copyright);
  151. return pci_module_init(&ixgb_driver);
  152. }
  153. module_init(ixgb_init_module);
  154. /**
  155. * ixgb_exit_module - Driver Exit Cleanup Routine
  156. *
  157. * ixgb_exit_module is called just before the driver is removed
  158. * from memory.
  159. **/
  160. static void __exit
  161. ixgb_exit_module(void)
  162. {
  163. pci_unregister_driver(&ixgb_driver);
  164. }
  165. module_exit(ixgb_exit_module);
  166. /**
  167. * ixgb_irq_disable - Mask off interrupt generation on the NIC
  168. * @adapter: board private structure
  169. **/
  170. static inline void
  171. ixgb_irq_disable(struct ixgb_adapter *adapter)
  172. {
  173. atomic_inc(&adapter->irq_sem);
  174. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  175. IXGB_WRITE_FLUSH(&adapter->hw);
  176. synchronize_irq(adapter->pdev->irq);
  177. }
  178. /**
  179. * ixgb_irq_enable - Enable default interrupt generation settings
  180. * @adapter: board private structure
  181. **/
  182. static inline void
  183. ixgb_irq_enable(struct ixgb_adapter *adapter)
  184. {
  185. if(atomic_dec_and_test(&adapter->irq_sem)) {
  186. IXGB_WRITE_REG(&adapter->hw, IMS,
  187. IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
  188. IXGB_INT_LSC);
  189. IXGB_WRITE_FLUSH(&adapter->hw);
  190. }
  191. }
  192. int
  193. ixgb_up(struct ixgb_adapter *adapter)
  194. {
  195. struct net_device *netdev = adapter->netdev;
  196. int err;
  197. int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  198. struct ixgb_hw *hw = &adapter->hw;
  199. /* hardware has been reset, we need to reload some things */
  200. ixgb_set_multi(netdev);
  201. ixgb_restore_vlan(adapter);
  202. ixgb_configure_tx(adapter);
  203. ixgb_setup_rctl(adapter);
  204. ixgb_configure_rx(adapter);
  205. ixgb_alloc_rx_buffers(adapter);
  206. #ifdef CONFIG_PCI_MSI
  207. {
  208. boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
  209. IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
  210. adapter->have_msi = TRUE;
  211. if (!pcix)
  212. adapter->have_msi = FALSE;
  213. else if((err = pci_enable_msi(adapter->pdev))) {
  214. DPRINTK(PROBE, ERR,
  215. "Unable to allocate MSI interrupt Error: %d\n", err);
  216. adapter->have_msi = FALSE;
  217. /* proceed to try to request regular interrupt */
  218. }
  219. }
  220. #endif
  221. if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
  222. SA_SHIRQ | SA_SAMPLE_RANDOM,
  223. netdev->name, netdev))) {
  224. DPRINTK(PROBE, ERR,
  225. "Unable to allocate interrupt Error: %d\n", err);
  226. return err;
  227. }
  228. /* disable interrupts and get the hardware into a known state */
  229. IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
  230. if((hw->max_frame_size != max_frame) ||
  231. (hw->max_frame_size !=
  232. (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
  233. hw->max_frame_size = max_frame;
  234. IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
  235. if(hw->max_frame_size >
  236. IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
  237. uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
  238. if(!(ctrl0 & IXGB_CTRL0_JFE)) {
  239. ctrl0 |= IXGB_CTRL0_JFE;
  240. IXGB_WRITE_REG(hw, CTRL0, ctrl0);
  241. }
  242. }
  243. }
  244. mod_timer(&adapter->watchdog_timer, jiffies);
  245. ixgb_irq_enable(adapter);
  246. #ifdef CONFIG_IXGB_NAPI
  247. netif_poll_enable(netdev);
  248. #endif
  249. return 0;
  250. }
  251. void
  252. ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
  253. {
  254. struct net_device *netdev = adapter->netdev;
  255. ixgb_irq_disable(adapter);
  256. free_irq(adapter->pdev->irq, netdev);
  257. #ifdef CONFIG_PCI_MSI
  258. if(adapter->have_msi == TRUE)
  259. pci_disable_msi(adapter->pdev);
  260. #endif
  261. if(kill_watchdog)
  262. del_timer_sync(&adapter->watchdog_timer);
  263. #ifdef CONFIG_IXGB_NAPI
  264. netif_poll_disable(netdev);
  265. #endif
  266. adapter->link_speed = 0;
  267. adapter->link_duplex = 0;
  268. netif_carrier_off(netdev);
  269. netif_stop_queue(netdev);
  270. ixgb_reset(adapter);
  271. ixgb_clean_tx_ring(adapter);
  272. ixgb_clean_rx_ring(adapter);
  273. }
  274. void
  275. ixgb_reset(struct ixgb_adapter *adapter)
  276. {
  277. ixgb_adapter_stop(&adapter->hw);
  278. if(!ixgb_init_hw(&adapter->hw))
  279. DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
  280. }
  281. /**
  282. * ixgb_probe - Device Initialization Routine
  283. * @pdev: PCI device information struct
  284. * @ent: entry in ixgb_pci_tbl
  285. *
  286. * Returns 0 on success, negative on failure
  287. *
  288. * ixgb_probe initializes an adapter identified by a pci_dev structure.
  289. * The OS initialization, configuring of the adapter private structure,
  290. * and a hardware reset occur.
  291. **/
  292. static int __devinit
  293. ixgb_probe(struct pci_dev *pdev,
  294. const struct pci_device_id *ent)
  295. {
  296. struct net_device *netdev = NULL;
  297. struct ixgb_adapter *adapter;
  298. static int cards_found = 0;
  299. unsigned long mmio_start;
  300. int mmio_len;
  301. int pci_using_dac;
  302. int i;
  303. int err;
  304. if((err = pci_enable_device(pdev)))
  305. return err;
  306. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
  307. !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
  308. pci_using_dac = 1;
  309. } else {
  310. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
  311. (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
  312. printk(KERN_ERR
  313. "ixgb: No usable DMA configuration, aborting\n");
  314. goto err_dma_mask;
  315. }
  316. pci_using_dac = 0;
  317. }
  318. if((err = pci_request_regions(pdev, ixgb_driver_name)))
  319. goto err_request_regions;
  320. pci_set_master(pdev);
  321. netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
  322. if(!netdev) {
  323. err = -ENOMEM;
  324. goto err_alloc_etherdev;
  325. }
  326. SET_MODULE_OWNER(netdev);
  327. SET_NETDEV_DEV(netdev, &pdev->dev);
  328. pci_set_drvdata(pdev, netdev);
  329. adapter = netdev_priv(netdev);
  330. adapter->netdev = netdev;
  331. adapter->pdev = pdev;
  332. adapter->hw.back = adapter;
  333. adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
  334. mmio_start = pci_resource_start(pdev, BAR_0);
  335. mmio_len = pci_resource_len(pdev, BAR_0);
  336. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  337. if(!adapter->hw.hw_addr) {
  338. err = -EIO;
  339. goto err_ioremap;
  340. }
  341. for(i = BAR_1; i <= BAR_5; i++) {
  342. if(pci_resource_len(pdev, i) == 0)
  343. continue;
  344. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  345. adapter->hw.io_base = pci_resource_start(pdev, i);
  346. break;
  347. }
  348. }
  349. netdev->open = &ixgb_open;
  350. netdev->stop = &ixgb_close;
  351. netdev->hard_start_xmit = &ixgb_xmit_frame;
  352. netdev->get_stats = &ixgb_get_stats;
  353. netdev->set_multicast_list = &ixgb_set_multi;
  354. netdev->set_mac_address = &ixgb_set_mac;
  355. netdev->change_mtu = &ixgb_change_mtu;
  356. ixgb_set_ethtool_ops(netdev);
  357. netdev->tx_timeout = &ixgb_tx_timeout;
  358. netdev->watchdog_timeo = 5 * HZ;
  359. #ifdef CONFIG_IXGB_NAPI
  360. netdev->poll = &ixgb_clean;
  361. netdev->weight = 64;
  362. #endif
  363. netdev->vlan_rx_register = ixgb_vlan_rx_register;
  364. netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
  365. netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
  366. #ifdef CONFIG_NET_POLL_CONTROLLER
  367. netdev->poll_controller = ixgb_netpoll;
  368. #endif
  369. strcpy(netdev->name, pci_name(pdev));
  370. netdev->mem_start = mmio_start;
  371. netdev->mem_end = mmio_start + mmio_len;
  372. netdev->base_addr = adapter->hw.io_base;
  373. adapter->bd_number = cards_found;
  374. adapter->link_speed = 0;
  375. adapter->link_duplex = 0;
  376. /* setup the private structure */
  377. if((err = ixgb_sw_init(adapter)))
  378. goto err_sw_init;
  379. netdev->features = NETIF_F_SG |
  380. NETIF_F_HW_CSUM |
  381. NETIF_F_HW_VLAN_TX |
  382. NETIF_F_HW_VLAN_RX |
  383. NETIF_F_HW_VLAN_FILTER;
  384. #ifdef NETIF_F_TSO
  385. netdev->features |= NETIF_F_TSO;
  386. #endif
  387. #ifdef NETIF_F_LLTX
  388. netdev->features |= NETIF_F_LLTX;
  389. #endif
  390. if(pci_using_dac)
  391. netdev->features |= NETIF_F_HIGHDMA;
  392. /* make sure the EEPROM is good */
  393. if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
  394. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  395. err = -EIO;
  396. goto err_eeprom;
  397. }
  398. ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
  399. memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
  400. if(!is_valid_ether_addr(netdev->perm_addr)) {
  401. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  402. err = -EIO;
  403. goto err_eeprom;
  404. }
  405. adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
  406. init_timer(&adapter->watchdog_timer);
  407. adapter->watchdog_timer.function = &ixgb_watchdog;
  408. adapter->watchdog_timer.data = (unsigned long)adapter;
  409. INIT_WORK(&adapter->tx_timeout_task,
  410. (void (*)(void *))ixgb_tx_timeout_task, netdev);
  411. strcpy(netdev->name, "eth%d");
  412. if((err = register_netdev(netdev)))
  413. goto err_register;
  414. /* we're going to reset, so assume we have no link for now */
  415. netif_carrier_off(netdev);
  416. netif_stop_queue(netdev);
  417. DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
  418. ixgb_check_options(adapter);
  419. /* reset the hardware with the new settings */
  420. ixgb_reset(adapter);
  421. cards_found++;
  422. return 0;
  423. err_register:
  424. err_sw_init:
  425. err_eeprom:
  426. iounmap(adapter->hw.hw_addr);
  427. err_ioremap:
  428. free_netdev(netdev);
  429. err_alloc_etherdev:
  430. pci_release_regions(pdev);
  431. err_request_regions:
  432. err_dma_mask:
  433. pci_disable_device(pdev);
  434. return err;
  435. }
  436. /**
  437. * ixgb_remove - Device Removal Routine
  438. * @pdev: PCI device information struct
  439. *
  440. * ixgb_remove is called by the PCI subsystem to alert the driver
  441. * that it should release a PCI device. The could be caused by a
  442. * Hot-Plug event, or because the driver is going to be removed from
  443. * memory.
  444. **/
  445. static void __devexit
  446. ixgb_remove(struct pci_dev *pdev)
  447. {
  448. struct net_device *netdev = pci_get_drvdata(pdev);
  449. struct ixgb_adapter *adapter = netdev_priv(netdev);
  450. unregister_netdev(netdev);
  451. iounmap(adapter->hw.hw_addr);
  452. pci_release_regions(pdev);
  453. free_netdev(netdev);
  454. }
  455. /**
  456. * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
  457. * @adapter: board private structure to initialize
  458. *
  459. * ixgb_sw_init initializes the Adapter private data structure.
  460. * Fields are initialized based on PCI device information and
  461. * OS network device settings (MTU size).
  462. **/
  463. static int __devinit
  464. ixgb_sw_init(struct ixgb_adapter *adapter)
  465. {
  466. struct ixgb_hw *hw = &adapter->hw;
  467. struct net_device *netdev = adapter->netdev;
  468. struct pci_dev *pdev = adapter->pdev;
  469. /* PCI config space info */
  470. hw->vendor_id = pdev->vendor;
  471. hw->device_id = pdev->device;
  472. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  473. hw->subsystem_id = pdev->subsystem_device;
  474. adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
  475. hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  476. if((hw->device_id == IXGB_DEVICE_ID_82597EX)
  477. || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
  478. || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
  479. || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
  480. hw->mac_type = ixgb_82597;
  481. else {
  482. /* should never have loaded on this device */
  483. DPRINTK(PROBE, ERR, "unsupported device id\n");
  484. }
  485. /* enable flow control to be programmed */
  486. hw->fc.send_xon = 1;
  487. atomic_set(&adapter->irq_sem, 1);
  488. spin_lock_init(&adapter->tx_lock);
  489. return 0;
  490. }
  491. /**
  492. * ixgb_open - Called when a network interface is made active
  493. * @netdev: network interface device structure
  494. *
  495. * Returns 0 on success, negative value on failure
  496. *
  497. * The open entry point is called when a network interface is made
  498. * active by the system (IFF_UP). At this point all resources needed
  499. * for transmit and receive operations are allocated, the interrupt
  500. * handler is registered with the OS, the watchdog timer is started,
  501. * and the stack is notified that the interface is ready.
  502. **/
  503. static int
  504. ixgb_open(struct net_device *netdev)
  505. {
  506. struct ixgb_adapter *adapter = netdev_priv(netdev);
  507. int err;
  508. /* allocate transmit descriptors */
  509. if((err = ixgb_setup_tx_resources(adapter)))
  510. goto err_setup_tx;
  511. /* allocate receive descriptors */
  512. if((err = ixgb_setup_rx_resources(adapter)))
  513. goto err_setup_rx;
  514. if((err = ixgb_up(adapter)))
  515. goto err_up;
  516. return 0;
  517. err_up:
  518. ixgb_free_rx_resources(adapter);
  519. err_setup_rx:
  520. ixgb_free_tx_resources(adapter);
  521. err_setup_tx:
  522. ixgb_reset(adapter);
  523. return err;
  524. }
  525. /**
  526. * ixgb_close - Disables a network interface
  527. * @netdev: network interface device structure
  528. *
  529. * Returns 0, this is not allowed to fail
  530. *
  531. * The close entry point is called when an interface is de-activated
  532. * by the OS. The hardware is still under the drivers control, but
  533. * needs to be disabled. A global MAC reset is issued to stop the
  534. * hardware, and all transmit and receive resources are freed.
  535. **/
  536. static int
  537. ixgb_close(struct net_device *netdev)
  538. {
  539. struct ixgb_adapter *adapter = netdev_priv(netdev);
  540. ixgb_down(adapter, TRUE);
  541. ixgb_free_tx_resources(adapter);
  542. ixgb_free_rx_resources(adapter);
  543. return 0;
  544. }
  545. /**
  546. * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
  547. * @adapter: board private structure
  548. *
  549. * Return 0 on success, negative on failure
  550. **/
  551. int
  552. ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
  553. {
  554. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  555. struct pci_dev *pdev = adapter->pdev;
  556. int size;
  557. size = sizeof(struct ixgb_buffer) * txdr->count;
  558. txdr->buffer_info = vmalloc(size);
  559. if(!txdr->buffer_info) {
  560. DPRINTK(PROBE, ERR,
  561. "Unable to allocate transmit descriptor ring memory\n");
  562. return -ENOMEM;
  563. }
  564. memset(txdr->buffer_info, 0, size);
  565. /* round up to nearest 4K */
  566. txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
  567. IXGB_ROUNDUP(txdr->size, 4096);
  568. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  569. if(!txdr->desc) {
  570. vfree(txdr->buffer_info);
  571. DPRINTK(PROBE, ERR,
  572. "Unable to allocate transmit descriptor memory\n");
  573. return -ENOMEM;
  574. }
  575. memset(txdr->desc, 0, txdr->size);
  576. txdr->next_to_use = 0;
  577. txdr->next_to_clean = 0;
  578. return 0;
  579. }
  580. /**
  581. * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
  582. * @adapter: board private structure
  583. *
  584. * Configure the Tx unit of the MAC after a reset.
  585. **/
  586. static void
  587. ixgb_configure_tx(struct ixgb_adapter *adapter)
  588. {
  589. uint64_t tdba = adapter->tx_ring.dma;
  590. uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
  591. uint32_t tctl;
  592. struct ixgb_hw *hw = &adapter->hw;
  593. /* Setup the Base and Length of the Tx Descriptor Ring
  594. * tx_ring.dma can be either a 32 or 64 bit value
  595. */
  596. IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  597. IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
  598. IXGB_WRITE_REG(hw, TDLEN, tdlen);
  599. /* Setup the HW Tx Head and Tail descriptor pointers */
  600. IXGB_WRITE_REG(hw, TDH, 0);
  601. IXGB_WRITE_REG(hw, TDT, 0);
  602. /* don't set up txdctl, it induces performance problems if configured
  603. * incorrectly */
  604. /* Set the Tx Interrupt Delay register */
  605. IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  606. /* Program the Transmit Control Register */
  607. tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
  608. IXGB_WRITE_REG(hw, TCTL, tctl);
  609. /* Setup Transmit Descriptor Settings for this adapter */
  610. adapter->tx_cmd_type =
  611. IXGB_TX_DESC_TYPE
  612. | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
  613. }
  614. /**
  615. * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
  616. * @adapter: board private structure
  617. *
  618. * Returns 0 on success, negative on failure
  619. **/
  620. int
  621. ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
  622. {
  623. struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
  624. struct pci_dev *pdev = adapter->pdev;
  625. int size;
  626. size = sizeof(struct ixgb_buffer) * rxdr->count;
  627. rxdr->buffer_info = vmalloc(size);
  628. if(!rxdr->buffer_info) {
  629. DPRINTK(PROBE, ERR,
  630. "Unable to allocate receive descriptor ring\n");
  631. return -ENOMEM;
  632. }
  633. memset(rxdr->buffer_info, 0, size);
  634. /* Round up to nearest 4K */
  635. rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
  636. IXGB_ROUNDUP(rxdr->size, 4096);
  637. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  638. if(!rxdr->desc) {
  639. vfree(rxdr->buffer_info);
  640. DPRINTK(PROBE, ERR,
  641. "Unable to allocate receive descriptors\n");
  642. return -ENOMEM;
  643. }
  644. memset(rxdr->desc, 0, rxdr->size);
  645. rxdr->next_to_clean = 0;
  646. rxdr->next_to_use = 0;
  647. return 0;
  648. }
  649. /**
  650. * ixgb_setup_rctl - configure the receive control register
  651. * @adapter: Board private structure
  652. **/
  653. static void
  654. ixgb_setup_rctl(struct ixgb_adapter *adapter)
  655. {
  656. uint32_t rctl;
  657. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  658. rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
  659. rctl |=
  660. IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
  661. IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
  662. (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
  663. rctl |= IXGB_RCTL_SECRC;
  664. switch (adapter->rx_buffer_len) {
  665. case IXGB_RXBUFFER_2048:
  666. default:
  667. rctl |= IXGB_RCTL_BSIZE_2048;
  668. break;
  669. case IXGB_RXBUFFER_4096:
  670. rctl |= IXGB_RCTL_BSIZE_4096;
  671. break;
  672. case IXGB_RXBUFFER_8192:
  673. rctl |= IXGB_RCTL_BSIZE_8192;
  674. break;
  675. case IXGB_RXBUFFER_16384:
  676. rctl |= IXGB_RCTL_BSIZE_16384;
  677. break;
  678. }
  679. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  680. }
  681. /**
  682. * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
  683. * @adapter: board private structure
  684. *
  685. * Configure the Rx unit of the MAC after a reset.
  686. **/
  687. static void
  688. ixgb_configure_rx(struct ixgb_adapter *adapter)
  689. {
  690. uint64_t rdba = adapter->rx_ring.dma;
  691. uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
  692. struct ixgb_hw *hw = &adapter->hw;
  693. uint32_t rctl;
  694. uint32_t rxcsum;
  695. uint32_t rxdctl;
  696. /* make sure receives are disabled while setting up the descriptors */
  697. rctl = IXGB_READ_REG(hw, RCTL);
  698. IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
  699. /* set the Receive Delay Timer Register */
  700. IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  701. /* Setup the Base and Length of the Rx Descriptor Ring */
  702. IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  703. IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
  704. IXGB_WRITE_REG(hw, RDLEN, rdlen);
  705. /* Setup the HW Rx Head and Tail Descriptor Pointers */
  706. IXGB_WRITE_REG(hw, RDH, 0);
  707. IXGB_WRITE_REG(hw, RDT, 0);
  708. /* set up pre-fetching of receive buffers so we get some before we
  709. * run out (default hardware behavior is to run out before fetching
  710. * more). This sets up to fetch if HTHRESH rx descriptors are avail
  711. * and the descriptors in hw cache are below PTHRESH. This avoids
  712. * the hardware behavior of fetching <=512 descriptors in a single
  713. * burst that pre-empts all other activity, usually causing fifo
  714. * overflows. */
  715. /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
  716. rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
  717. RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
  718. RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
  719. IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
  720. /* Enable Receive Checksum Offload for TCP and UDP */
  721. if(adapter->rx_csum == TRUE) {
  722. rxcsum = IXGB_READ_REG(hw, RXCSUM);
  723. rxcsum |= IXGB_RXCSUM_TUOFL;
  724. IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
  725. }
  726. /* Enable Receives */
  727. IXGB_WRITE_REG(hw, RCTL, rctl);
  728. }
  729. /**
  730. * ixgb_free_tx_resources - Free Tx Resources
  731. * @adapter: board private structure
  732. *
  733. * Free all transmit software resources
  734. **/
  735. void
  736. ixgb_free_tx_resources(struct ixgb_adapter *adapter)
  737. {
  738. struct pci_dev *pdev = adapter->pdev;
  739. ixgb_clean_tx_ring(adapter);
  740. vfree(adapter->tx_ring.buffer_info);
  741. adapter->tx_ring.buffer_info = NULL;
  742. pci_free_consistent(pdev, adapter->tx_ring.size,
  743. adapter->tx_ring.desc, adapter->tx_ring.dma);
  744. adapter->tx_ring.desc = NULL;
  745. }
  746. static inline void
  747. ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
  748. struct ixgb_buffer *buffer_info)
  749. {
  750. struct pci_dev *pdev = adapter->pdev;
  751. if (buffer_info->dma)
  752. pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
  753. PCI_DMA_TODEVICE);
  754. if (buffer_info->skb)
  755. dev_kfree_skb_any(buffer_info->skb);
  756. buffer_info->skb = NULL;
  757. buffer_info->dma = 0;
  758. buffer_info->time_stamp = 0;
  759. /* these fields must always be initialized in tx
  760. * buffer_info->length = 0;
  761. * buffer_info->next_to_watch = 0; */
  762. }
  763. /**
  764. * ixgb_clean_tx_ring - Free Tx Buffers
  765. * @adapter: board private structure
  766. **/
  767. static void
  768. ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
  769. {
  770. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  771. struct ixgb_buffer *buffer_info;
  772. unsigned long size;
  773. unsigned int i;
  774. /* Free all the Tx ring sk_buffs */
  775. for(i = 0; i < tx_ring->count; i++) {
  776. buffer_info = &tx_ring->buffer_info[i];
  777. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  778. }
  779. size = sizeof(struct ixgb_buffer) * tx_ring->count;
  780. memset(tx_ring->buffer_info, 0, size);
  781. /* Zero out the descriptor ring */
  782. memset(tx_ring->desc, 0, tx_ring->size);
  783. tx_ring->next_to_use = 0;
  784. tx_ring->next_to_clean = 0;
  785. IXGB_WRITE_REG(&adapter->hw, TDH, 0);
  786. IXGB_WRITE_REG(&adapter->hw, TDT, 0);
  787. }
  788. /**
  789. * ixgb_free_rx_resources - Free Rx Resources
  790. * @adapter: board private structure
  791. *
  792. * Free all receive software resources
  793. **/
  794. void
  795. ixgb_free_rx_resources(struct ixgb_adapter *adapter)
  796. {
  797. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  798. struct pci_dev *pdev = adapter->pdev;
  799. ixgb_clean_rx_ring(adapter);
  800. vfree(rx_ring->buffer_info);
  801. rx_ring->buffer_info = NULL;
  802. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  803. rx_ring->desc = NULL;
  804. }
  805. /**
  806. * ixgb_clean_rx_ring - Free Rx Buffers
  807. * @adapter: board private structure
  808. **/
  809. static void
  810. ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
  811. {
  812. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  813. struct ixgb_buffer *buffer_info;
  814. struct pci_dev *pdev = adapter->pdev;
  815. unsigned long size;
  816. unsigned int i;
  817. /* Free all the Rx ring sk_buffs */
  818. for(i = 0; i < rx_ring->count; i++) {
  819. buffer_info = &rx_ring->buffer_info[i];
  820. if(buffer_info->skb) {
  821. pci_unmap_single(pdev,
  822. buffer_info->dma,
  823. buffer_info->length,
  824. PCI_DMA_FROMDEVICE);
  825. dev_kfree_skb(buffer_info->skb);
  826. buffer_info->skb = NULL;
  827. }
  828. }
  829. size = sizeof(struct ixgb_buffer) * rx_ring->count;
  830. memset(rx_ring->buffer_info, 0, size);
  831. /* Zero out the descriptor ring */
  832. memset(rx_ring->desc, 0, rx_ring->size);
  833. rx_ring->next_to_clean = 0;
  834. rx_ring->next_to_use = 0;
  835. IXGB_WRITE_REG(&adapter->hw, RDH, 0);
  836. IXGB_WRITE_REG(&adapter->hw, RDT, 0);
  837. }
  838. /**
  839. * ixgb_set_mac - Change the Ethernet Address of the NIC
  840. * @netdev: network interface device structure
  841. * @p: pointer to an address structure
  842. *
  843. * Returns 0 on success, negative on failure
  844. **/
  845. static int
  846. ixgb_set_mac(struct net_device *netdev, void *p)
  847. {
  848. struct ixgb_adapter *adapter = netdev_priv(netdev);
  849. struct sockaddr *addr = p;
  850. if(!is_valid_ether_addr(addr->sa_data))
  851. return -EADDRNOTAVAIL;
  852. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  853. ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
  854. return 0;
  855. }
  856. /**
  857. * ixgb_set_multi - Multicast and Promiscuous mode set
  858. * @netdev: network interface device structure
  859. *
  860. * The set_multi entry point is called whenever the multicast address
  861. * list or the network interface flags are updated. This routine is
  862. * responsible for configuring the hardware for proper multicast,
  863. * promiscuous mode, and all-multi behavior.
  864. **/
  865. static void
  866. ixgb_set_multi(struct net_device *netdev)
  867. {
  868. struct ixgb_adapter *adapter = netdev_priv(netdev);
  869. struct ixgb_hw *hw = &adapter->hw;
  870. struct dev_mc_list *mc_ptr;
  871. uint32_t rctl;
  872. int i;
  873. /* Check for Promiscuous and All Multicast modes */
  874. rctl = IXGB_READ_REG(hw, RCTL);
  875. if(netdev->flags & IFF_PROMISC) {
  876. rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  877. } else if(netdev->flags & IFF_ALLMULTI) {
  878. rctl |= IXGB_RCTL_MPE;
  879. rctl &= ~IXGB_RCTL_UPE;
  880. } else {
  881. rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  882. }
  883. if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
  884. rctl |= IXGB_RCTL_MPE;
  885. IXGB_WRITE_REG(hw, RCTL, rctl);
  886. } else {
  887. uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
  888. IXGB_WRITE_REG(hw, RCTL, rctl);
  889. for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
  890. i++, mc_ptr = mc_ptr->next)
  891. memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
  892. mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
  893. ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
  894. }
  895. }
  896. /**
  897. * ixgb_watchdog - Timer Call-back
  898. * @data: pointer to netdev cast into an unsigned long
  899. **/
  900. static void
  901. ixgb_watchdog(unsigned long data)
  902. {
  903. struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
  904. struct net_device *netdev = adapter->netdev;
  905. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  906. ixgb_check_for_link(&adapter->hw);
  907. if (ixgb_check_for_bad_link(&adapter->hw)) {
  908. /* force the reset path */
  909. netif_stop_queue(netdev);
  910. }
  911. if(adapter->hw.link_up) {
  912. if(!netif_carrier_ok(netdev)) {
  913. DPRINTK(LINK, INFO,
  914. "NIC Link is Up 10000 Mbps Full Duplex\n");
  915. adapter->link_speed = 10000;
  916. adapter->link_duplex = FULL_DUPLEX;
  917. netif_carrier_on(netdev);
  918. netif_wake_queue(netdev);
  919. }
  920. } else {
  921. if(netif_carrier_ok(netdev)) {
  922. adapter->link_speed = 0;
  923. adapter->link_duplex = 0;
  924. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  925. netif_carrier_off(netdev);
  926. netif_stop_queue(netdev);
  927. }
  928. }
  929. ixgb_update_stats(adapter);
  930. if(!netif_carrier_ok(netdev)) {
  931. if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
  932. /* We've lost link, so the controller stops DMA,
  933. * but we've got queued Tx work that's never going
  934. * to get done, so reset controller to flush Tx.
  935. * (Do the reset outside of interrupt context). */
  936. schedule_work(&adapter->tx_timeout_task);
  937. }
  938. }
  939. /* Force detection of hung controller every watchdog period */
  940. adapter->detect_tx_hung = TRUE;
  941. /* generate an interrupt to force clean up of any stragglers */
  942. IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
  943. /* Reset the timer */
  944. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  945. }
  946. #define IXGB_TX_FLAGS_CSUM 0x00000001
  947. #define IXGB_TX_FLAGS_VLAN 0x00000002
  948. #define IXGB_TX_FLAGS_TSO 0x00000004
  949. static inline int
  950. ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
  951. {
  952. #ifdef NETIF_F_TSO
  953. struct ixgb_context_desc *context_desc;
  954. unsigned int i;
  955. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  956. uint16_t ipcse, tucse, mss;
  957. int err;
  958. if(likely(skb_shinfo(skb)->tso_size)) {
  959. if (skb_header_cloned(skb)) {
  960. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  961. if (err)
  962. return err;
  963. }
  964. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  965. mss = skb_shinfo(skb)->tso_size;
  966. skb->nh.iph->tot_len = 0;
  967. skb->nh.iph->check = 0;
  968. skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
  969. skb->nh.iph->daddr,
  970. 0, IPPROTO_TCP, 0);
  971. ipcss = skb->nh.raw - skb->data;
  972. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  973. ipcse = skb->h.raw - skb->data - 1;
  974. tucss = skb->h.raw - skb->data;
  975. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  976. tucse = 0;
  977. i = adapter->tx_ring.next_to_use;
  978. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  979. context_desc->ipcss = ipcss;
  980. context_desc->ipcso = ipcso;
  981. context_desc->ipcse = cpu_to_le16(ipcse);
  982. context_desc->tucss = tucss;
  983. context_desc->tucso = tucso;
  984. context_desc->tucse = cpu_to_le16(tucse);
  985. context_desc->mss = cpu_to_le16(mss);
  986. context_desc->hdr_len = hdr_len;
  987. context_desc->status = 0;
  988. context_desc->cmd_type_len = cpu_to_le32(
  989. IXGB_CONTEXT_DESC_TYPE
  990. | IXGB_CONTEXT_DESC_CMD_TSE
  991. | IXGB_CONTEXT_DESC_CMD_IP
  992. | IXGB_CONTEXT_DESC_CMD_TCP
  993. | IXGB_CONTEXT_DESC_CMD_IDE
  994. | (skb->len - (hdr_len)));
  995. if(++i == adapter->tx_ring.count) i = 0;
  996. adapter->tx_ring.next_to_use = i;
  997. return 1;
  998. }
  999. #endif
  1000. return 0;
  1001. }
  1002. static inline boolean_t
  1003. ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
  1004. {
  1005. struct ixgb_context_desc *context_desc;
  1006. unsigned int i;
  1007. uint8_t css, cso;
  1008. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  1009. css = skb->h.raw - skb->data;
  1010. cso = (skb->h.raw + skb->csum) - skb->data;
  1011. i = adapter->tx_ring.next_to_use;
  1012. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  1013. context_desc->tucss = css;
  1014. context_desc->tucso = cso;
  1015. context_desc->tucse = 0;
  1016. /* zero out any previously existing data in one instruction */
  1017. *(uint32_t *)&(context_desc->ipcss) = 0;
  1018. context_desc->status = 0;
  1019. context_desc->hdr_len = 0;
  1020. context_desc->mss = 0;
  1021. context_desc->cmd_type_len =
  1022. cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
  1023. | IXGB_TX_DESC_CMD_IDE);
  1024. if(++i == adapter->tx_ring.count) i = 0;
  1025. adapter->tx_ring.next_to_use = i;
  1026. return TRUE;
  1027. }
  1028. return FALSE;
  1029. }
  1030. #define IXGB_MAX_TXD_PWR 14
  1031. #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
  1032. static inline int
  1033. ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
  1034. unsigned int first)
  1035. {
  1036. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1037. struct ixgb_buffer *buffer_info;
  1038. int len = skb->len;
  1039. unsigned int offset = 0, size, count = 0, i;
  1040. unsigned int mss = skb_shinfo(skb)->tso_size;
  1041. unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
  1042. unsigned int f;
  1043. len -= skb->data_len;
  1044. i = tx_ring->next_to_use;
  1045. while(len) {
  1046. buffer_info = &tx_ring->buffer_info[i];
  1047. size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
  1048. /* Workaround for premature desc write-backs
  1049. * in TSO mode. Append 4-byte sentinel desc */
  1050. if(unlikely(mss && !nr_frags && size == len && size > 8))
  1051. size -= 4;
  1052. buffer_info->length = size;
  1053. buffer_info->dma =
  1054. pci_map_single(adapter->pdev,
  1055. skb->data + offset,
  1056. size,
  1057. PCI_DMA_TODEVICE);
  1058. buffer_info->time_stamp = jiffies;
  1059. buffer_info->next_to_watch = 0;
  1060. len -= size;
  1061. offset += size;
  1062. count++;
  1063. if(++i == tx_ring->count) i = 0;
  1064. }
  1065. for(f = 0; f < nr_frags; f++) {
  1066. struct skb_frag_struct *frag;
  1067. frag = &skb_shinfo(skb)->frags[f];
  1068. len = frag->size;
  1069. offset = 0;
  1070. while(len) {
  1071. buffer_info = &tx_ring->buffer_info[i];
  1072. size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
  1073. /* Workaround for premature desc write-backs
  1074. * in TSO mode. Append 4-byte sentinel desc */
  1075. if(unlikely(mss && (f == (nr_frags-1)) && (size == len)
  1076. && (size > 8)))
  1077. size -= 4;
  1078. buffer_info->length = size;
  1079. buffer_info->dma =
  1080. pci_map_page(adapter->pdev,
  1081. frag->page,
  1082. frag->page_offset + offset,
  1083. size,
  1084. PCI_DMA_TODEVICE);
  1085. buffer_info->time_stamp = jiffies;
  1086. buffer_info->next_to_watch = 0;
  1087. len -= size;
  1088. offset += size;
  1089. count++;
  1090. if(++i == tx_ring->count) i = 0;
  1091. }
  1092. }
  1093. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  1094. tx_ring->buffer_info[i].skb = skb;
  1095. tx_ring->buffer_info[first].next_to_watch = i;
  1096. return count;
  1097. }
  1098. static inline void
  1099. ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
  1100. {
  1101. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1102. struct ixgb_tx_desc *tx_desc = NULL;
  1103. struct ixgb_buffer *buffer_info;
  1104. uint32_t cmd_type_len = adapter->tx_cmd_type;
  1105. uint8_t status = 0;
  1106. uint8_t popts = 0;
  1107. unsigned int i;
  1108. if(tx_flags & IXGB_TX_FLAGS_TSO) {
  1109. cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
  1110. popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
  1111. }
  1112. if(tx_flags & IXGB_TX_FLAGS_CSUM)
  1113. popts |= IXGB_TX_DESC_POPTS_TXSM;
  1114. if(tx_flags & IXGB_TX_FLAGS_VLAN) {
  1115. cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
  1116. }
  1117. i = tx_ring->next_to_use;
  1118. while(count--) {
  1119. buffer_info = &tx_ring->buffer_info[i];
  1120. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1121. tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1122. tx_desc->cmd_type_len =
  1123. cpu_to_le32(cmd_type_len | buffer_info->length);
  1124. tx_desc->status = status;
  1125. tx_desc->popts = popts;
  1126. tx_desc->vlan = cpu_to_le16(vlan_id);
  1127. if(++i == tx_ring->count) i = 0;
  1128. }
  1129. tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
  1130. | IXGB_TX_DESC_CMD_RS );
  1131. /* Force memory writes to complete before letting h/w
  1132. * know there are new descriptors to fetch. (Only
  1133. * applicable for weak-ordered memory model archs,
  1134. * such as IA-64). */
  1135. wmb();
  1136. tx_ring->next_to_use = i;
  1137. IXGB_WRITE_REG(&adapter->hw, TDT, i);
  1138. }
  1139. /* Tx Descriptors needed, worst case */
  1140. #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
  1141. (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
  1142. #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
  1143. MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 \
  1144. /* one more for TSO workaround */ + 1
  1145. static int
  1146. ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1147. {
  1148. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1149. unsigned int first;
  1150. unsigned int tx_flags = 0;
  1151. unsigned long flags;
  1152. int vlan_id = 0;
  1153. int tso;
  1154. if(skb->len <= 0) {
  1155. dev_kfree_skb_any(skb);
  1156. return 0;
  1157. }
  1158. #ifdef NETIF_F_LLTX
  1159. local_irq_save(flags);
  1160. if (!spin_trylock(&adapter->tx_lock)) {
  1161. /* Collision - tell upper layer to requeue */
  1162. local_irq_restore(flags);
  1163. return NETDEV_TX_LOCKED;
  1164. }
  1165. #else
  1166. spin_lock_irqsave(&adapter->tx_lock, flags);
  1167. #endif
  1168. if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
  1169. netif_stop_queue(netdev);
  1170. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1171. return NETDEV_TX_BUSY;
  1172. }
  1173. #ifndef NETIF_F_LLTX
  1174. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1175. #endif
  1176. if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1177. tx_flags |= IXGB_TX_FLAGS_VLAN;
  1178. vlan_id = vlan_tx_tag_get(skb);
  1179. }
  1180. first = adapter->tx_ring.next_to_use;
  1181. tso = ixgb_tso(adapter, skb);
  1182. if (tso < 0) {
  1183. dev_kfree_skb_any(skb);
  1184. #ifdef NETIF_F_LLTX
  1185. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1186. #endif
  1187. return NETDEV_TX_OK;
  1188. }
  1189. if (likely(tso))
  1190. tx_flags |= IXGB_TX_FLAGS_TSO;
  1191. else if(ixgb_tx_csum(adapter, skb))
  1192. tx_flags |= IXGB_TX_FLAGS_CSUM;
  1193. ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
  1194. tx_flags);
  1195. netdev->trans_start = jiffies;
  1196. #ifdef NETIF_F_LLTX
  1197. /* Make sure there is space in the ring for the next send. */
  1198. if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED))
  1199. netif_stop_queue(netdev);
  1200. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1201. #endif
  1202. return NETDEV_TX_OK;
  1203. }
  1204. /**
  1205. * ixgb_tx_timeout - Respond to a Tx Hang
  1206. * @netdev: network interface device structure
  1207. **/
  1208. static void
  1209. ixgb_tx_timeout(struct net_device *netdev)
  1210. {
  1211. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1212. /* Do the reset outside of interrupt context */
  1213. schedule_work(&adapter->tx_timeout_task);
  1214. }
  1215. static void
  1216. ixgb_tx_timeout_task(struct net_device *netdev)
  1217. {
  1218. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1219. adapter->tx_timeout_count++;
  1220. ixgb_down(adapter, TRUE);
  1221. ixgb_up(adapter);
  1222. }
  1223. /**
  1224. * ixgb_get_stats - Get System Network Statistics
  1225. * @netdev: network interface device structure
  1226. *
  1227. * Returns the address of the device statistics structure.
  1228. * The statistics are actually updated from the timer callback.
  1229. **/
  1230. static struct net_device_stats *
  1231. ixgb_get_stats(struct net_device *netdev)
  1232. {
  1233. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1234. return &adapter->net_stats;
  1235. }
  1236. /**
  1237. * ixgb_change_mtu - Change the Maximum Transfer Unit
  1238. * @netdev: network interface device structure
  1239. * @new_mtu: new value for maximum frame size
  1240. *
  1241. * Returns 0 on success, negative on failure
  1242. **/
  1243. static int
  1244. ixgb_change_mtu(struct net_device *netdev, int new_mtu)
  1245. {
  1246. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1247. int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1248. int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1249. if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1250. || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
  1251. DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
  1252. return -EINVAL;
  1253. }
  1254. if((max_frame <= IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1255. || (max_frame <= IXGB_RXBUFFER_2048)) {
  1256. adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
  1257. } else if(max_frame <= IXGB_RXBUFFER_4096) {
  1258. adapter->rx_buffer_len = IXGB_RXBUFFER_4096;
  1259. } else if(max_frame <= IXGB_RXBUFFER_8192) {
  1260. adapter->rx_buffer_len = IXGB_RXBUFFER_8192;
  1261. } else {
  1262. adapter->rx_buffer_len = IXGB_RXBUFFER_16384;
  1263. }
  1264. netdev->mtu = new_mtu;
  1265. if(old_max_frame != max_frame && netif_running(netdev)) {
  1266. ixgb_down(adapter, TRUE);
  1267. ixgb_up(adapter);
  1268. }
  1269. return 0;
  1270. }
  1271. /**
  1272. * ixgb_update_stats - Update the board statistics counters.
  1273. * @adapter: board private structure
  1274. **/
  1275. void
  1276. ixgb_update_stats(struct ixgb_adapter *adapter)
  1277. {
  1278. struct net_device *netdev = adapter->netdev;
  1279. if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
  1280. (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
  1281. u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
  1282. u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
  1283. u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
  1284. u64 bcast = ((u64)bcast_h << 32) | bcast_l;
  1285. multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
  1286. /* fix up multicast stats by removing broadcasts */
  1287. if(multi >= bcast)
  1288. multi -= bcast;
  1289. adapter->stats.mprcl += (multi & 0xFFFFFFFF);
  1290. adapter->stats.mprch += (multi >> 32);
  1291. adapter->stats.bprcl += bcast_l;
  1292. adapter->stats.bprch += bcast_h;
  1293. } else {
  1294. adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
  1295. adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
  1296. adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
  1297. adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
  1298. }
  1299. adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
  1300. adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
  1301. adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
  1302. adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
  1303. adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
  1304. adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
  1305. adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
  1306. adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
  1307. adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
  1308. adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
  1309. adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
  1310. adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
  1311. adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
  1312. adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
  1313. adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
  1314. adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
  1315. adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
  1316. adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
  1317. adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
  1318. adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
  1319. adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
  1320. adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
  1321. adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
  1322. adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
  1323. adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
  1324. adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
  1325. adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
  1326. adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
  1327. adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
  1328. adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
  1329. adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
  1330. adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
  1331. adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
  1332. adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
  1333. adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
  1334. adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
  1335. adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
  1336. adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
  1337. adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
  1338. adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
  1339. adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
  1340. adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
  1341. adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
  1342. adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
  1343. adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
  1344. adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
  1345. adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
  1346. adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
  1347. adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
  1348. adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
  1349. adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
  1350. adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
  1351. adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
  1352. adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
  1353. adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
  1354. adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
  1355. /* Fill out the OS statistics structure */
  1356. adapter->net_stats.rx_packets = adapter->stats.gprcl;
  1357. adapter->net_stats.tx_packets = adapter->stats.gptcl;
  1358. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  1359. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  1360. adapter->net_stats.multicast = adapter->stats.mprcl;
  1361. adapter->net_stats.collisions = 0;
  1362. /* ignore RLEC as it reports errors for padded (<64bytes) frames
  1363. * with a length in the type/len field */
  1364. adapter->net_stats.rx_errors =
  1365. /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
  1366. adapter->stats.ruc +
  1367. adapter->stats.roc /*+ adapter->stats.rlec */ +
  1368. adapter->stats.icbc +
  1369. adapter->stats.ecbc + adapter->stats.mpc;
  1370. /* see above
  1371. * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  1372. */
  1373. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  1374. adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
  1375. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  1376. adapter->net_stats.rx_over_errors = adapter->stats.mpc;
  1377. adapter->net_stats.tx_errors = 0;
  1378. adapter->net_stats.rx_frame_errors = 0;
  1379. adapter->net_stats.tx_aborted_errors = 0;
  1380. adapter->net_stats.tx_carrier_errors = 0;
  1381. adapter->net_stats.tx_fifo_errors = 0;
  1382. adapter->net_stats.tx_heartbeat_errors = 0;
  1383. adapter->net_stats.tx_window_errors = 0;
  1384. }
  1385. #define IXGB_MAX_INTR 10
  1386. /**
  1387. * ixgb_intr - Interrupt Handler
  1388. * @irq: interrupt number
  1389. * @data: pointer to a network interface device structure
  1390. * @pt_regs: CPU registers structure
  1391. **/
  1392. static irqreturn_t
  1393. ixgb_intr(int irq, void *data, struct pt_regs *regs)
  1394. {
  1395. struct net_device *netdev = data;
  1396. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1397. struct ixgb_hw *hw = &adapter->hw;
  1398. uint32_t icr = IXGB_READ_REG(hw, ICR);
  1399. #ifndef CONFIG_IXGB_NAPI
  1400. unsigned int i;
  1401. #endif
  1402. if(unlikely(!icr))
  1403. return IRQ_NONE; /* Not our interrupt */
  1404. if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
  1405. mod_timer(&adapter->watchdog_timer, jiffies);
  1406. }
  1407. #ifdef CONFIG_IXGB_NAPI
  1408. if(netif_rx_schedule_prep(netdev)) {
  1409. /* Disable interrupts and register for poll. The flush
  1410. of the posted write is intentionally left out.
  1411. */
  1412. atomic_inc(&adapter->irq_sem);
  1413. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  1414. __netif_rx_schedule(netdev);
  1415. }
  1416. #else
  1417. /* yes, that is actually a & and it is meant to make sure that
  1418. * every pass through this for loop checks both receive and
  1419. * transmit queues for completed descriptors, intended to
  1420. * avoid starvation issues and assist tx/rx fairness. */
  1421. for(i = 0; i < IXGB_MAX_INTR; i++)
  1422. if(!ixgb_clean_rx_irq(adapter) &
  1423. !ixgb_clean_tx_irq(adapter))
  1424. break;
  1425. #endif
  1426. return IRQ_HANDLED;
  1427. }
  1428. #ifdef CONFIG_IXGB_NAPI
  1429. /**
  1430. * ixgb_clean - NAPI Rx polling callback
  1431. * @adapter: board private structure
  1432. **/
  1433. static int
  1434. ixgb_clean(struct net_device *netdev, int *budget)
  1435. {
  1436. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1437. int work_to_do = min(*budget, netdev->quota);
  1438. int tx_cleaned;
  1439. int work_done = 0;
  1440. tx_cleaned = ixgb_clean_tx_irq(adapter);
  1441. ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
  1442. *budget -= work_done;
  1443. netdev->quota -= work_done;
  1444. /* if no Tx and not enough Rx work done, exit the polling mode */
  1445. if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
  1446. netif_rx_complete(netdev);
  1447. ixgb_irq_enable(adapter);
  1448. return 0;
  1449. }
  1450. return 1;
  1451. }
  1452. #endif
  1453. /**
  1454. * ixgb_clean_tx_irq - Reclaim resources after transmit completes
  1455. * @adapter: board private structure
  1456. **/
  1457. static boolean_t
  1458. ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
  1459. {
  1460. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1461. struct net_device *netdev = adapter->netdev;
  1462. struct ixgb_tx_desc *tx_desc, *eop_desc;
  1463. struct ixgb_buffer *buffer_info;
  1464. unsigned int i, eop;
  1465. boolean_t cleaned = FALSE;
  1466. i = tx_ring->next_to_clean;
  1467. eop = tx_ring->buffer_info[i].next_to_watch;
  1468. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1469. while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
  1470. for(cleaned = FALSE; !cleaned; ) {
  1471. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1472. buffer_info = &tx_ring->buffer_info[i];
  1473. if (tx_desc->popts
  1474. & (IXGB_TX_DESC_POPTS_TXSM |
  1475. IXGB_TX_DESC_POPTS_IXSM))
  1476. adapter->hw_csum_tx_good++;
  1477. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  1478. *(uint32_t *)&(tx_desc->status) = 0;
  1479. cleaned = (i == eop);
  1480. if(++i == tx_ring->count) i = 0;
  1481. }
  1482. eop = tx_ring->buffer_info[i].next_to_watch;
  1483. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1484. }
  1485. tx_ring->next_to_clean = i;
  1486. spin_lock(&adapter->tx_lock);
  1487. if(cleaned && netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
  1488. (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) {
  1489. netif_wake_queue(netdev);
  1490. }
  1491. spin_unlock(&adapter->tx_lock);
  1492. if(adapter->detect_tx_hung) {
  1493. /* detect a transmit hang in hardware, this serializes the
  1494. * check with the clearing of time_stamp and movement of i */
  1495. adapter->detect_tx_hung = FALSE;
  1496. if (tx_ring->buffer_info[eop].dma &&
  1497. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
  1498. && !(IXGB_READ_REG(&adapter->hw, STATUS) &
  1499. IXGB_STATUS_TXOFF)) {
  1500. /* detected Tx unit hang */
  1501. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  1502. " TDH <%x>\n"
  1503. " TDT <%x>\n"
  1504. " next_to_use <%x>\n"
  1505. " next_to_clean <%x>\n"
  1506. "buffer_info[next_to_clean]\n"
  1507. " time_stamp <%lx>\n"
  1508. " next_to_watch <%x>\n"
  1509. " jiffies <%lx>\n"
  1510. " next_to_watch.status <%x>\n",
  1511. IXGB_READ_REG(&adapter->hw, TDH),
  1512. IXGB_READ_REG(&adapter->hw, TDT),
  1513. tx_ring->next_to_use,
  1514. tx_ring->next_to_clean,
  1515. tx_ring->buffer_info[eop].time_stamp,
  1516. eop,
  1517. jiffies,
  1518. eop_desc->status);
  1519. netif_stop_queue(netdev);
  1520. }
  1521. }
  1522. return cleaned;
  1523. }
  1524. /**
  1525. * ixgb_rx_checksum - Receive Checksum Offload for 82597.
  1526. * @adapter: board private structure
  1527. * @rx_desc: receive descriptor
  1528. * @sk_buff: socket buffer with received data
  1529. **/
  1530. static inline void
  1531. ixgb_rx_checksum(struct ixgb_adapter *adapter,
  1532. struct ixgb_rx_desc *rx_desc,
  1533. struct sk_buff *skb)
  1534. {
  1535. /* Ignore Checksum bit is set OR
  1536. * TCP Checksum has not been calculated
  1537. */
  1538. if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
  1539. (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
  1540. skb->ip_summed = CHECKSUM_NONE;
  1541. return;
  1542. }
  1543. /* At this point we know the hardware did the TCP checksum */
  1544. /* now look at the TCP checksum error bit */
  1545. if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
  1546. /* let the stack verify checksum errors */
  1547. skb->ip_summed = CHECKSUM_NONE;
  1548. adapter->hw_csum_rx_error++;
  1549. } else {
  1550. /* TCP checksum is good */
  1551. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1552. adapter->hw_csum_rx_good++;
  1553. }
  1554. }
  1555. /**
  1556. * ixgb_clean_rx_irq - Send received data up the network stack,
  1557. * @adapter: board private structure
  1558. **/
  1559. static boolean_t
  1560. #ifdef CONFIG_IXGB_NAPI
  1561. ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
  1562. #else
  1563. ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
  1564. #endif
  1565. {
  1566. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1567. struct net_device *netdev = adapter->netdev;
  1568. struct pci_dev *pdev = adapter->pdev;
  1569. struct ixgb_rx_desc *rx_desc, *next_rxd;
  1570. struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
  1571. uint32_t length;
  1572. unsigned int i, j;
  1573. boolean_t cleaned = FALSE;
  1574. i = rx_ring->next_to_clean;
  1575. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1576. buffer_info = &rx_ring->buffer_info[i];
  1577. while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
  1578. struct sk_buff *skb, *next_skb;
  1579. u8 status;
  1580. #ifdef CONFIG_IXGB_NAPI
  1581. if(*work_done >= work_to_do)
  1582. break;
  1583. (*work_done)++;
  1584. #endif
  1585. status = rx_desc->status;
  1586. skb = buffer_info->skb;
  1587. buffer_info->skb = NULL;
  1588. prefetch(skb->data);
  1589. if(++i == rx_ring->count) i = 0;
  1590. next_rxd = IXGB_RX_DESC(*rx_ring, i);
  1591. prefetch(next_rxd);
  1592. if((j = i + 1) == rx_ring->count) j = 0;
  1593. next2_buffer = &rx_ring->buffer_info[j];
  1594. prefetch(next2_buffer);
  1595. next_buffer = &rx_ring->buffer_info[i];
  1596. next_skb = next_buffer->skb;
  1597. prefetch(next_skb);
  1598. cleaned = TRUE;
  1599. pci_unmap_single(pdev,
  1600. buffer_info->dma,
  1601. buffer_info->length,
  1602. PCI_DMA_FROMDEVICE);
  1603. length = le16_to_cpu(rx_desc->length);
  1604. if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
  1605. /* All receives must fit into a single buffer */
  1606. IXGB_DBG("Receive packet consumed multiple buffers "
  1607. "length<%x>\n", length);
  1608. dev_kfree_skb_irq(skb);
  1609. goto rxdesc_done;
  1610. }
  1611. if (unlikely(rx_desc->errors
  1612. & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
  1613. | IXGB_RX_DESC_ERRORS_P |
  1614. IXGB_RX_DESC_ERRORS_RXE))) {
  1615. dev_kfree_skb_irq(skb);
  1616. goto rxdesc_done;
  1617. }
  1618. /* code added for copybreak, this should improve
  1619. * performance for small packets with large amounts
  1620. * of reassembly being done in the stack */
  1621. #define IXGB_CB_LENGTH 256
  1622. if (length < IXGB_CB_LENGTH) {
  1623. struct sk_buff *new_skb =
  1624. dev_alloc_skb(length + NET_IP_ALIGN);
  1625. if (new_skb) {
  1626. skb_reserve(new_skb, NET_IP_ALIGN);
  1627. new_skb->dev = netdev;
  1628. memcpy(new_skb->data - NET_IP_ALIGN,
  1629. skb->data - NET_IP_ALIGN,
  1630. length + NET_IP_ALIGN);
  1631. /* save the skb in buffer_info as good */
  1632. buffer_info->skb = skb;
  1633. skb = new_skb;
  1634. }
  1635. }
  1636. /* end copybreak code */
  1637. /* Good Receive */
  1638. skb_put(skb, length);
  1639. /* Receive Checksum Offload */
  1640. ixgb_rx_checksum(adapter, rx_desc, skb);
  1641. skb->protocol = eth_type_trans(skb, netdev);
  1642. #ifdef CONFIG_IXGB_NAPI
  1643. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1644. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  1645. le16_to_cpu(rx_desc->special) &
  1646. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1647. } else {
  1648. netif_receive_skb(skb);
  1649. }
  1650. #else /* CONFIG_IXGB_NAPI */
  1651. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1652. vlan_hwaccel_rx(skb, adapter->vlgrp,
  1653. le16_to_cpu(rx_desc->special) &
  1654. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1655. } else {
  1656. netif_rx(skb);
  1657. }
  1658. #endif /* CONFIG_IXGB_NAPI */
  1659. netdev->last_rx = jiffies;
  1660. rxdesc_done:
  1661. /* clean up descriptor, might be written over by hw */
  1662. rx_desc->status = 0;
  1663. /* use prefetched values */
  1664. rx_desc = next_rxd;
  1665. buffer_info = next_buffer;
  1666. }
  1667. rx_ring->next_to_clean = i;
  1668. ixgb_alloc_rx_buffers(adapter);
  1669. return cleaned;
  1670. }
  1671. /**
  1672. * ixgb_alloc_rx_buffers - Replace used receive buffers
  1673. * @adapter: address of board private structure
  1674. **/
  1675. static void
  1676. ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
  1677. {
  1678. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1679. struct net_device *netdev = adapter->netdev;
  1680. struct pci_dev *pdev = adapter->pdev;
  1681. struct ixgb_rx_desc *rx_desc;
  1682. struct ixgb_buffer *buffer_info;
  1683. struct sk_buff *skb;
  1684. unsigned int i;
  1685. int num_group_tail_writes;
  1686. long cleancount;
  1687. i = rx_ring->next_to_use;
  1688. buffer_info = &rx_ring->buffer_info[i];
  1689. cleancount = IXGB_DESC_UNUSED(rx_ring);
  1690. num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
  1691. /* leave three descriptors unused */
  1692. while(--cleancount > 2) {
  1693. /* recycle! its good for you */
  1694. if (!(skb = buffer_info->skb))
  1695. skb = dev_alloc_skb(adapter->rx_buffer_len
  1696. + NET_IP_ALIGN);
  1697. else {
  1698. skb_trim(skb, 0);
  1699. goto map_skb;
  1700. }
  1701. if (unlikely(!skb)) {
  1702. /* Better luck next round */
  1703. adapter->alloc_rx_buff_failed++;
  1704. break;
  1705. }
  1706. /* Make buffer alignment 2 beyond a 16 byte boundary
  1707. * this will result in a 16 byte aligned IP header after
  1708. * the 14 byte MAC header is removed
  1709. */
  1710. skb_reserve(skb, NET_IP_ALIGN);
  1711. skb->dev = netdev;
  1712. buffer_info->skb = skb;
  1713. buffer_info->length = adapter->rx_buffer_len;
  1714. map_skb:
  1715. buffer_info->dma = pci_map_single(pdev,
  1716. skb->data,
  1717. adapter->rx_buffer_len,
  1718. PCI_DMA_FROMDEVICE);
  1719. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1720. rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1721. /* guarantee DD bit not set now before h/w gets descriptor
  1722. * this is the rest of the workaround for h/w double
  1723. * writeback. */
  1724. rx_desc->status = 0;
  1725. if(++i == rx_ring->count) i = 0;
  1726. buffer_info = &rx_ring->buffer_info[i];
  1727. }
  1728. if (likely(rx_ring->next_to_use != i)) {
  1729. rx_ring->next_to_use = i;
  1730. if (unlikely(i-- == 0))
  1731. i = (rx_ring->count - 1);
  1732. /* Force memory writes to complete before letting h/w
  1733. * know there are new descriptors to fetch. (Only
  1734. * applicable for weak-ordered memory model archs, such
  1735. * as IA-64). */
  1736. wmb();
  1737. IXGB_WRITE_REG(&adapter->hw, RDT, i);
  1738. }
  1739. }
  1740. /**
  1741. * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
  1742. *
  1743. * @param netdev network interface device structure
  1744. * @param grp indicates to enable or disable tagging/stripping
  1745. **/
  1746. static void
  1747. ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  1748. {
  1749. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1750. uint32_t ctrl, rctl;
  1751. ixgb_irq_disable(adapter);
  1752. adapter->vlgrp = grp;
  1753. if(grp) {
  1754. /* enable VLAN tag insert/strip */
  1755. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1756. ctrl |= IXGB_CTRL0_VME;
  1757. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1758. /* enable VLAN receive filtering */
  1759. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1760. rctl |= IXGB_RCTL_VFE;
  1761. rctl &= ~IXGB_RCTL_CFIEN;
  1762. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1763. } else {
  1764. /* disable VLAN tag insert/strip */
  1765. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1766. ctrl &= ~IXGB_CTRL0_VME;
  1767. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1768. /* disable VLAN filtering */
  1769. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1770. rctl &= ~IXGB_RCTL_VFE;
  1771. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1772. }
  1773. ixgb_irq_enable(adapter);
  1774. }
  1775. static void
  1776. ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  1777. {
  1778. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1779. uint32_t vfta, index;
  1780. /* add VID to filter table */
  1781. index = (vid >> 5) & 0x7F;
  1782. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1783. vfta |= (1 << (vid & 0x1F));
  1784. ixgb_write_vfta(&adapter->hw, index, vfta);
  1785. }
  1786. static void
  1787. ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  1788. {
  1789. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1790. uint32_t vfta, index;
  1791. ixgb_irq_disable(adapter);
  1792. if(adapter->vlgrp)
  1793. adapter->vlgrp->vlan_devices[vid] = NULL;
  1794. ixgb_irq_enable(adapter);
  1795. /* remove VID from filter table*/
  1796. index = (vid >> 5) & 0x7F;
  1797. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1798. vfta &= ~(1 << (vid & 0x1F));
  1799. ixgb_write_vfta(&adapter->hw, index, vfta);
  1800. }
  1801. static void
  1802. ixgb_restore_vlan(struct ixgb_adapter *adapter)
  1803. {
  1804. ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1805. if(adapter->vlgrp) {
  1806. uint16_t vid;
  1807. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  1808. if(!adapter->vlgrp->vlan_devices[vid])
  1809. continue;
  1810. ixgb_vlan_rx_add_vid(adapter->netdev, vid);
  1811. }
  1812. }
  1813. }
  1814. #ifdef CONFIG_NET_POLL_CONTROLLER
  1815. /*
  1816. * Polling 'interrupt' - used by things like netconsole to send skbs
  1817. * without having to re-enable interrupts. It's not called while
  1818. * the interrupt routine is executing.
  1819. */
  1820. static void ixgb_netpoll(struct net_device *dev)
  1821. {
  1822. struct ixgb_adapter *adapter = dev->priv;
  1823. disable_irq(adapter->pdev->irq);
  1824. ixgb_intr(adapter->pdev->irq, dev, NULL);
  1825. enable_irq(adapter->pdev->irq);
  1826. }
  1827. #endif
  1828. /* ixgb_main.c */