prodigy_hifi.c 31 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195
  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for Audiotrak Prodigy 7.1 Hifi
  5. * based on pontis.c
  6. *
  7. * Copyright (c) 2007 Julian Scheel <julian@jusst.de>
  8. * Copyright (c) 2007 allank
  9. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. */
  26. #include <asm/io.h>
  27. #include <linux/delay.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/init.h>
  30. #include <linux/slab.h>
  31. #include <linux/mutex.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/tlv.h>
  35. #include "ice1712.h"
  36. #include "envy24ht.h"
  37. #include "prodigy_hifi.h"
  38. /* I2C addresses */
  39. #define WM_DEV 0x34
  40. /* WM8776 registers */
  41. #define WM_HP_ATTEN_L 0x00 /* headphone left attenuation */
  42. #define WM_HP_ATTEN_R 0x01 /* headphone left attenuation */
  43. #define WM_HP_MASTER 0x02 /* headphone master (both channels),
  44. override LLR */
  45. #define WM_DAC_ATTEN_L 0x03 /* digital left attenuation */
  46. #define WM_DAC_ATTEN_R 0x04
  47. #define WM_DAC_MASTER 0x05
  48. #define WM_PHASE_SWAP 0x06 /* DAC phase swap */
  49. #define WM_DAC_CTRL1 0x07
  50. #define WM_DAC_MUTE 0x08
  51. #define WM_DAC_CTRL2 0x09
  52. #define WM_DAC_INT 0x0a
  53. #define WM_ADC_INT 0x0b
  54. #define WM_MASTER_CTRL 0x0c
  55. #define WM_POWERDOWN 0x0d
  56. #define WM_ADC_ATTEN_L 0x0e
  57. #define WM_ADC_ATTEN_R 0x0f
  58. #define WM_ALC_CTRL1 0x10
  59. #define WM_ALC_CTRL2 0x11
  60. #define WM_ALC_CTRL3 0x12
  61. #define WM_NOISE_GATE 0x13
  62. #define WM_LIMITER 0x14
  63. #define WM_ADC_MUX 0x15
  64. #define WM_OUT_MUX 0x16
  65. #define WM_RESET 0x17
  66. /* Analog Recording Source :- Mic, LineIn, CD/Video, */
  67. /* implement capture source select control for WM8776 */
  68. #define WM_AIN1 "AIN1"
  69. #define WM_AIN2 "AIN2"
  70. #define WM_AIN3 "AIN3"
  71. #define WM_AIN4 "AIN4"
  72. #define WM_AIN5 "AIN5"
  73. /* GPIO pins of envy24ht connected to wm8766 */
  74. #define WM8766_SPI_CLK (1<<17) /* CLK, Pin97 on ICE1724 */
  75. #define WM8766_SPI_MD (1<<16) /* DATA VT1724 -> WM8766, Pin96 */
  76. #define WM8766_SPI_ML (1<<18) /* Latch, Pin98 */
  77. /* WM8766 registers */
  78. #define WM8766_DAC_CTRL 0x02 /* DAC Control */
  79. #define WM8766_INT_CTRL 0x03 /* Interface Control */
  80. #define WM8766_DAC_CTRL2 0x09
  81. #define WM8766_DAC_CTRL3 0x0a
  82. #define WM8766_RESET 0x1f
  83. #define WM8766_LDA1 0x00
  84. #define WM8766_LDA2 0x04
  85. #define WM8766_LDA3 0x06
  86. #define WM8766_RDA1 0x01
  87. #define WM8766_RDA2 0x05
  88. #define WM8766_RDA3 0x07
  89. #define WM8766_MUTE1 0x0C
  90. #define WM8766_MUTE2 0x0F
  91. /*
  92. * Prodigy HD2
  93. */
  94. #define AK4396_ADDR 0x00
  95. #define AK4396_CSN (1 << 8) /* CSN->GPIO8, pin 75 */
  96. #define AK4396_CCLK (1 << 9) /* CCLK->GPIO9, pin 76 */
  97. #define AK4396_CDTI (1 << 10) /* CDTI->GPIO10, pin 77 */
  98. /* ak4396 registers */
  99. #define AK4396_CTRL1 0x00
  100. #define AK4396_CTRL2 0x01
  101. #define AK4396_CTRL3 0x02
  102. #define AK4396_LCH_ATT 0x03
  103. #define AK4396_RCH_ATT 0x04
  104. /*
  105. * get the current register value of WM codec
  106. */
  107. static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
  108. {
  109. reg <<= 1;
  110. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  111. ice->akm[0].images[reg + 1];
  112. }
  113. /*
  114. * set the register value of WM codec and remember it
  115. */
  116. static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
  117. {
  118. unsigned short cval;
  119. cval = (reg << 9) | val;
  120. snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
  121. }
  122. static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
  123. {
  124. wm_put_nocache(ice, reg, val);
  125. reg <<= 1;
  126. ice->akm[0].images[reg] = val >> 8;
  127. ice->akm[0].images[reg + 1] = val;
  128. }
  129. /*
  130. * write data in the SPI mode
  131. */
  132. static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val)
  133. {
  134. unsigned int tmp = snd_ice1712_gpio_read(ice);
  135. if (val)
  136. tmp |= bit;
  137. else
  138. tmp &= ~bit;
  139. snd_ice1712_gpio_write(ice, tmp);
  140. }
  141. /*
  142. * SPI implementation for WM8766 codec - only writing supported, no readback
  143. */
  144. static void wm8766_spi_send_word(struct snd_ice1712 *ice, unsigned int data)
  145. {
  146. int i;
  147. for (i = 0; i < 16; i++) {
  148. set_gpio_bit(ice, WM8766_SPI_CLK, 0);
  149. udelay(1);
  150. set_gpio_bit(ice, WM8766_SPI_MD, data & 0x8000);
  151. udelay(1);
  152. set_gpio_bit(ice, WM8766_SPI_CLK, 1);
  153. udelay(1);
  154. data <<= 1;
  155. }
  156. }
  157. static void wm8766_spi_write(struct snd_ice1712 *ice, unsigned int reg, unsigned int data)
  158. {
  159. unsigned int block;
  160. snd_ice1712_gpio_set_dir(ice, WM8766_SPI_MD|
  161. WM8766_SPI_CLK|WM8766_SPI_ML);
  162. snd_ice1712_gpio_set_mask(ice, ~(WM8766_SPI_MD|
  163. WM8766_SPI_CLK|WM8766_SPI_ML));
  164. /* latch must be low when writing */
  165. set_gpio_bit(ice, WM8766_SPI_ML, 0);
  166. block = (reg << 9) | (data & 0x1ff);
  167. wm8766_spi_send_word(ice, block); /* REGISTER ADDRESS */
  168. /* release latch */
  169. set_gpio_bit(ice, WM8766_SPI_ML, 1);
  170. udelay(1);
  171. /* restore */
  172. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  173. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  174. }
  175. /*
  176. * serial interface for ak4396 - only writing supported, no readback
  177. */
  178. static void ak4396_send_word(struct snd_ice1712 *ice, unsigned int data)
  179. {
  180. int i;
  181. for (i = 0; i < 16; i++) {
  182. set_gpio_bit(ice, AK4396_CCLK, 0);
  183. udelay(1);
  184. set_gpio_bit(ice, AK4396_CDTI, data & 0x8000);
  185. udelay(1);
  186. set_gpio_bit(ice, AK4396_CCLK, 1);
  187. udelay(1);
  188. data <<= 1;
  189. }
  190. }
  191. static void ak4396_write(struct snd_ice1712 *ice, unsigned int reg, unsigned int data)
  192. {
  193. unsigned int block;
  194. snd_ice1712_gpio_set_dir(ice, AK4396_CSN|AK4396_CCLK|AK4396_CDTI);
  195. snd_ice1712_gpio_set_mask(ice, ~(AK4396_CSN|AK4396_CCLK|AK4396_CDTI));
  196. /* latch must be low when writing */
  197. set_gpio_bit(ice, AK4396_CSN, 0);
  198. block = ((AK4396_ADDR & 0x03) << 14) | (1 << 13) |
  199. ((reg & 0x1f) << 8) | (data & 0xff);
  200. ak4396_send_word(ice, block); /* REGISTER ADDRESS */
  201. /* release latch */
  202. set_gpio_bit(ice, AK4396_CSN, 1);
  203. udelay(1);
  204. /* restore */
  205. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  206. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  207. }
  208. /*
  209. * ak4396 mixers
  210. */
  211. /*
  212. * DAC volume attenuation mixer control (-64dB to 0dB)
  213. */
  214. static int ak4396_dac_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  215. {
  216. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  217. uinfo->count = 2;
  218. uinfo->value.integer.min = 0; /* mute */
  219. uinfo->value.integer.max = 0xFF; /* linear */
  220. return 0;
  221. }
  222. static int ak4396_dac_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  223. {
  224. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  225. int i;
  226. for (i = 0; i < 2; i++) {
  227. ucontrol->value.integer.value[i] =ice->spec.prodigy_hd2.vol[i];
  228. }
  229. return 0;
  230. }
  231. static int ak4396_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  232. {
  233. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  234. int i;
  235. int change = 0;
  236. mutex_lock(&ice->gpio_mutex);
  237. for (i = 0; i < 2; i++) {
  238. if (ucontrol->value.integer.value[i] !=
  239. ice->spec.prodigy_hd2.vol[i]) {
  240. ice->spec.prodigy_hd2.vol[i] =
  241. ucontrol->value.integer.value[i];
  242. ak4396_write(ice, AK4396_LCH_ATT+i,
  243. (ice->spec.prodigy_hd2.vol[i] & 0xff));
  244. change = 1;
  245. }
  246. }
  247. mutex_unlock(&ice->gpio_mutex);
  248. return change;
  249. }
  250. static const DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -12700, 100, 1);
  251. static struct snd_kcontrol_new prodigy_hd2_controls[] __devinitdata = {
  252. {
  253. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  254. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  255. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  256. .name = "Front Playback Volume",
  257. .info = ak4396_dac_vol_info,
  258. .get = ak4396_dac_vol_get,
  259. .put = ak4396_dac_vol_put,
  260. .tlv = { .p = db_scale_wm_dac },
  261. },
  262. };
  263. /* --------------- */
  264. /*
  265. * Logarithmic volume values for WM87*6
  266. * Computed as 20 * Log10(255 / x)
  267. */
  268. static const unsigned char wm_vol[256] = {
  269. 127, 48, 42, 39, 36, 34, 33, 31, 30, 29, 28, 27, 27, 26, 25, 25, 24, 24, 23,
  270. 23, 22, 22, 21, 21, 21, 20, 20, 20, 19, 19, 19, 18, 18, 18, 18, 17, 17, 17,
  271. 17, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 14, 14, 14, 14, 14, 13, 13, 13,
  272. 13, 13, 13, 13, 12, 12, 12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 11,
  273. 11, 10, 10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8,
  274. 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6,
  275. 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
  276. 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3,
  277. 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
  278. 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
  279. 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  280. 0, 0
  281. };
  282. #define WM_VOL_MAX (sizeof(wm_vol) - 1)
  283. #define WM_VOL_MUTE 0x8000
  284. #define DAC_0dB 0xff
  285. #define DAC_RES 128
  286. #define DAC_MIN (DAC_0dB - DAC_RES)
  287. static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, unsigned short vol, unsigned short master)
  288. {
  289. unsigned char nvol;
  290. if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
  291. nvol = 0;
  292. else {
  293. nvol = (((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 128)
  294. & WM_VOL_MAX;
  295. nvol = (nvol ? (nvol + DAC_MIN) : 0) & 0xff;
  296. }
  297. wm_put(ice, index, nvol);
  298. wm_put_nocache(ice, index, 0x100 | nvol);
  299. }
  300. static void wm8766_set_vol(struct snd_ice1712 *ice, unsigned int index, unsigned short vol, unsigned short master)
  301. {
  302. unsigned char nvol;
  303. if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
  304. nvol = 0;
  305. else {
  306. nvol = (((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 128)
  307. & WM_VOL_MAX;
  308. nvol = (nvol ? (nvol + DAC_MIN) : 0) & 0xff;
  309. }
  310. wm8766_spi_write(ice, index, (0x0100 | nvol));
  311. }
  312. /*
  313. * DAC volume attenuation mixer control (-64dB to 0dB)
  314. */
  315. static int wm_dac_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  316. {
  317. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  318. uinfo->count = 2;
  319. uinfo->value.integer.min = 0; /* mute */
  320. uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */
  321. return 0;
  322. }
  323. static int wm_dac_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  324. {
  325. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  326. int i;
  327. for (i = 0; i < 2; i++) {
  328. ucontrol->value.integer.value[i] =
  329. ice->spec.prodigy_hifi.vol[2+i] & ~WM_VOL_MUTE;
  330. }
  331. return 0;
  332. }
  333. static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  334. {
  335. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  336. int i, idx, change = 0;
  337. mutex_lock(&ice->gpio_mutex);
  338. for (i = 0; i < 2; i++) {
  339. if (ucontrol->value.integer.value[i] !=
  340. ice->spec.prodigy_hifi.vol[2+i]) {
  341. idx = WM_DAC_ATTEN_L + i;
  342. ice->spec.prodigy_hifi.vol[2+i] &= WM_VOL_MUTE;
  343. ice->spec.prodigy_hifi.vol[2+i] |=
  344. ucontrol->value.integer.value[i];
  345. wm_set_vol(ice, idx, ice->spec.prodigy_hifi.vol[2+i],
  346. ice->spec.prodigy_hifi.master[i]);
  347. change = 1;
  348. }
  349. }
  350. mutex_unlock(&ice->gpio_mutex);
  351. return change;
  352. }
  353. /*
  354. * WM8766 DAC volume attenuation mixer control
  355. */
  356. static int wm8766_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  357. {
  358. int voices = kcontrol->private_value >> 8;
  359. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  360. uinfo->count = voices;
  361. uinfo->value.integer.min = 0; /* mute */
  362. uinfo->value.integer.max = DAC_RES; /* 0dB */
  363. return 0;
  364. }
  365. static int wm8766_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  366. {
  367. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  368. int i, ofs, voices;
  369. voices = kcontrol->private_value >> 8;
  370. ofs = kcontrol->private_value & 0xff;
  371. for (i = 0; i < voices; i++)
  372. ucontrol->value.integer.value[i] =
  373. ice->spec.prodigy_hifi.vol[ofs+i];
  374. return 0;
  375. }
  376. static int wm8766_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  377. {
  378. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  379. int i, idx, ofs, voices;
  380. int change = 0;
  381. voices = kcontrol->private_value >> 8;
  382. ofs = kcontrol->private_value & 0xff;
  383. mutex_lock(&ice->gpio_mutex);
  384. for (i = 0; i < voices; i++) {
  385. if (ucontrol->value.integer.value[i] !=
  386. ice->spec.prodigy_hifi.vol[ofs+i]) {
  387. idx = WM8766_LDA1 + ofs + i;
  388. ice->spec.prodigy_hifi.vol[ofs+i] &= WM_VOL_MUTE;
  389. ice->spec.prodigy_hifi.vol[ofs+i] |=
  390. ucontrol->value.integer.value[i];
  391. wm8766_set_vol(ice, idx,
  392. ice->spec.prodigy_hifi.vol[ofs+i],
  393. ice->spec.prodigy_hifi.master[i]);
  394. change = 1;
  395. }
  396. }
  397. mutex_unlock(&ice->gpio_mutex);
  398. return change;
  399. }
  400. /*
  401. * Master volume attenuation mixer control / applied to WM8776+WM8766
  402. */
  403. static int wm_master_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  404. {
  405. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  406. uinfo->count = 2;
  407. uinfo->value.integer.min = 0;
  408. uinfo->value.integer.max = DAC_RES;
  409. return 0;
  410. }
  411. static int wm_master_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  412. {
  413. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  414. int i;
  415. for (i=0; i<2; i++)
  416. ucontrol->value.integer.value[i] =
  417. ice->spec.prodigy_hifi.master[i];
  418. return 0;
  419. }
  420. static int wm_master_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  421. {
  422. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  423. int ch, change = 0;
  424. mutex_lock(&ice->gpio_mutex);
  425. for (ch = 0; ch < 2; ch++) {
  426. if (ucontrol->value.integer.value[ch] !=
  427. ice->spec.prodigy_hifi.master[ch]) {
  428. ice->spec.prodigy_hifi.master[ch] &= 0x00;
  429. ice->spec.prodigy_hifi.master[ch] |=
  430. ucontrol->value.integer.value[ch];
  431. /* Apply to front DAC */
  432. wm_set_vol(ice, WM_DAC_ATTEN_L + ch,
  433. ice->spec.prodigy_hifi.vol[2 + ch],
  434. ice->spec.prodigy_hifi.master[ch]);
  435. wm8766_set_vol(ice, WM8766_LDA1 + ch,
  436. ice->spec.prodigy_hifi.vol[0 + ch],
  437. ice->spec.prodigy_hifi.master[ch]);
  438. wm8766_set_vol(ice, WM8766_LDA2 + ch,
  439. ice->spec.prodigy_hifi.vol[4 + ch],
  440. ice->spec.prodigy_hifi.master[ch]);
  441. wm8766_set_vol(ice, WM8766_LDA3 + ch,
  442. ice->spec.prodigy_hifi.vol[6 + ch],
  443. ice->spec.prodigy_hifi.master[ch]);
  444. change = 1;
  445. }
  446. }
  447. mutex_unlock(&ice->gpio_mutex);
  448. return change;
  449. }
  450. /* KONSTI */
  451. static int wm_adc_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  452. {
  453. static char* texts[32] = {"NULL", WM_AIN1, WM_AIN2, WM_AIN1 "+" WM_AIN2,
  454. WM_AIN3, WM_AIN1 "+" WM_AIN3, WM_AIN2 "+" WM_AIN3,
  455. WM_AIN1 "+" WM_AIN2 "+" WM_AIN3,
  456. WM_AIN4, WM_AIN1 "+" WM_AIN4, WM_AIN2 "+" WM_AIN4,
  457. WM_AIN1 "+" WM_AIN2 "+" WM_AIN4,
  458. WM_AIN3 "+" WM_AIN4, WM_AIN1 "+" WM_AIN3 "+" WM_AIN4,
  459. WM_AIN2 "+" WM_AIN3 "+" WM_AIN4,
  460. WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN4,
  461. WM_AIN5, WM_AIN1 "+" WM_AIN5, WM_AIN2 "+" WM_AIN5,
  462. WM_AIN1 "+" WM_AIN2 "+" WM_AIN5,
  463. WM_AIN3 "+" WM_AIN5, WM_AIN1 "+" WM_AIN3 "+" WM_AIN5,
  464. WM_AIN2 "+" WM_AIN3 "+" WM_AIN5,
  465. WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN5,
  466. WM_AIN4 "+" WM_AIN5, WM_AIN1 "+" WM_AIN4 "+" WM_AIN5,
  467. WM_AIN2 "+" WM_AIN4 "+" WM_AIN5,
  468. WM_AIN1 "+" WM_AIN2 "+" WM_AIN4 "+" WM_AIN5,
  469. WM_AIN3 "+" WM_AIN4 "+" WM_AIN5,
  470. WM_AIN1 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5,
  471. WM_AIN2 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5,
  472. WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5};
  473. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  474. uinfo->count = 1;
  475. uinfo->value.enumerated.items = 32;
  476. if (uinfo->value.enumerated.item > 31)
  477. uinfo->value.enumerated.item = 31;
  478. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  479. return 0;
  480. }
  481. static int wm_adc_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  482. {
  483. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  484. mutex_lock(&ice->gpio_mutex);
  485. ucontrol->value.integer.value[0]=wm_get(ice, WM_ADC_MUX) & 0x1f;
  486. mutex_unlock(&ice->gpio_mutex);
  487. return 0;
  488. }
  489. static int wm_adc_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  490. {
  491. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  492. unsigned short oval, nval;
  493. mutex_lock(&ice->gpio_mutex);
  494. oval = wm_get(ice, WM_ADC_MUX);
  495. nval = ( oval & 0xe0 ) | ucontrol->value.integer.value[0] ;
  496. if ( nval != oval ) {
  497. wm_put(ice, WM_ADC_MUX, nval);
  498. }
  499. mutex_unlock(&ice->gpio_mutex);
  500. return 0;
  501. }
  502. /* KONSTI */
  503. /*
  504. * ADC gain mixer control (-64dB to 0dB)
  505. */
  506. #define ADC_0dB 0xcf
  507. #define ADC_RES 128
  508. #define ADC_MIN (ADC_0dB - ADC_RES)
  509. static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  510. {
  511. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  512. uinfo->count = 2;
  513. uinfo->value.integer.min = 0; /* mute (-64dB) */
  514. uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */
  515. return 0;
  516. }
  517. static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  518. {
  519. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  520. unsigned short val;
  521. int i;
  522. mutex_lock(&ice->gpio_mutex);
  523. for (i = 0; i < 2; i++) {
  524. val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff;
  525. val = val > ADC_MIN ? (val - ADC_MIN) : 0;
  526. ucontrol->value.integer.value[i] = val;
  527. }
  528. mutex_unlock(&ice->gpio_mutex);
  529. return 0;
  530. }
  531. static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  532. {
  533. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  534. unsigned short ovol, nvol;
  535. int i, idx, change = 0;
  536. mutex_lock(&ice->gpio_mutex);
  537. for (i = 0; i < 2; i++) {
  538. nvol = ucontrol->value.integer.value[i];
  539. nvol = nvol ? (nvol + ADC_MIN) : 0;
  540. idx = WM_ADC_ATTEN_L + i;
  541. ovol = wm_get(ice, idx) & 0xff;
  542. if (ovol != nvol) {
  543. wm_put(ice, idx, nvol);
  544. change = 1;
  545. }
  546. }
  547. mutex_unlock(&ice->gpio_mutex);
  548. return change;
  549. }
  550. /*
  551. * ADC input mux mixer control
  552. */
  553. static int wm_adc_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  554. {
  555. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  556. uinfo->count = 1;
  557. uinfo->value.integer.min = 0;
  558. uinfo->value.integer.max = 1;
  559. return 0;
  560. }
  561. static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  562. {
  563. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  564. int bit = kcontrol->private_value;
  565. mutex_lock(&ice->gpio_mutex);
  566. ucontrol->value.integer.value[0] = (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0;
  567. mutex_unlock(&ice->gpio_mutex);
  568. return 0;
  569. }
  570. static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  571. {
  572. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  573. int bit = kcontrol->private_value;
  574. unsigned short oval, nval;
  575. int change;
  576. mutex_lock(&ice->gpio_mutex);
  577. nval = oval = wm_get(ice, WM_ADC_MUX);
  578. if (ucontrol->value.integer.value[0])
  579. nval |= (1 << bit);
  580. else
  581. nval &= ~(1 << bit);
  582. change = nval != oval;
  583. if (change) {
  584. wm_put(ice, WM_ADC_MUX, nval);
  585. }
  586. mutex_unlock(&ice->gpio_mutex);
  587. return 0;
  588. }
  589. /*
  590. * Analog bypass (In -> Out)
  591. */
  592. static int wm_bypass_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  593. {
  594. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  595. uinfo->count = 1;
  596. uinfo->value.integer.min = 0;
  597. uinfo->value.integer.max = 1;
  598. return 0;
  599. }
  600. static int wm_bypass_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  601. {
  602. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  603. mutex_lock(&ice->gpio_mutex);
  604. ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0;
  605. mutex_unlock(&ice->gpio_mutex);
  606. return 0;
  607. }
  608. static int wm_bypass_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  609. {
  610. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  611. unsigned short val, oval;
  612. int change = 0;
  613. mutex_lock(&ice->gpio_mutex);
  614. val = oval = wm_get(ice, WM_OUT_MUX);
  615. if (ucontrol->value.integer.value[0])
  616. val |= 0x04;
  617. else
  618. val &= ~0x04;
  619. if (val != oval) {
  620. wm_put(ice, WM_OUT_MUX, val);
  621. change = 1;
  622. }
  623. mutex_unlock(&ice->gpio_mutex);
  624. return change;
  625. }
  626. /*
  627. * Left/Right swap
  628. */
  629. static int wm_chswap_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  630. {
  631. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  632. uinfo->count = 1;
  633. uinfo->value.integer.min = 0;
  634. uinfo->value.integer.max = 1;
  635. return 0;
  636. }
  637. static int wm_chswap_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  638. {
  639. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  640. mutex_lock(&ice->gpio_mutex);
  641. ucontrol->value.integer.value[0] =
  642. (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90;
  643. mutex_unlock(&ice->gpio_mutex);
  644. return 0;
  645. }
  646. static int wm_chswap_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  647. {
  648. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  649. unsigned short val, oval;
  650. int change = 0;
  651. mutex_lock(&ice->gpio_mutex);
  652. oval = wm_get(ice, WM_DAC_CTRL1);
  653. val = oval & 0x0f;
  654. if (ucontrol->value.integer.value[0])
  655. val |= 0x60;
  656. else
  657. val |= 0x90;
  658. if (val != oval) {
  659. wm_put(ice, WM_DAC_CTRL1, val);
  660. wm_put_nocache(ice, WM_DAC_CTRL1, val);
  661. change = 1;
  662. }
  663. mutex_unlock(&ice->gpio_mutex);
  664. return change;
  665. }
  666. /*
  667. * mixers
  668. */
  669. static struct snd_kcontrol_new prodigy_hifi_controls[] __devinitdata = {
  670. {
  671. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  672. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  673. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  674. .name = "Master Playback Volume",
  675. .info = wm_master_vol_info,
  676. .get = wm_master_vol_get,
  677. .put = wm_master_vol_put,
  678. .tlv = { .p = db_scale_wm_dac }
  679. },
  680. {
  681. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  682. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  683. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  684. .name = "Front Playback Volume",
  685. .info = wm_dac_vol_info,
  686. .get = wm_dac_vol_get,
  687. .put = wm_dac_vol_put,
  688. .tlv = { .p = db_scale_wm_dac },
  689. },
  690. {
  691. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  692. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  693. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  694. .name = "Rear Playback Volume",
  695. .info = wm8766_vol_info,
  696. .get = wm8766_vol_get,
  697. .put = wm8766_vol_put,
  698. .private_value = (2 << 8) | 0,
  699. .tlv = { .p = db_scale_wm_dac },
  700. },
  701. {
  702. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  703. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  704. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  705. .name = "Center Playback Volume",
  706. .info = wm8766_vol_info,
  707. .get = wm8766_vol_get,
  708. .put = wm8766_vol_put,
  709. .private_value = (1 << 8) | 4,
  710. .tlv = { .p = db_scale_wm_dac }
  711. },
  712. {
  713. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  714. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  715. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  716. .name = "LFE Playback Volume",
  717. .info = wm8766_vol_info,
  718. .get = wm8766_vol_get,
  719. .put = wm8766_vol_put,
  720. .private_value = (1 << 8) | 5,
  721. .tlv = { .p = db_scale_wm_dac }
  722. },
  723. {
  724. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  725. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  726. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  727. .name = "Side Playback Volume",
  728. .info = wm8766_vol_info,
  729. .get = wm8766_vol_get,
  730. .put = wm8766_vol_put,
  731. .private_value = (2 << 8) | 6,
  732. .tlv = { .p = db_scale_wm_dac },
  733. },
  734. {
  735. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  736. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  737. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  738. .name = "Capture Volume",
  739. .info = wm_adc_vol_info,
  740. .get = wm_adc_vol_get,
  741. .put = wm_adc_vol_put,
  742. .tlv = { .p = db_scale_wm_dac },
  743. },
  744. {
  745. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  746. .name = "CD Capture Switch",
  747. .info = wm_adc_mux_info,
  748. .get = wm_adc_mux_get,
  749. .put = wm_adc_mux_put,
  750. .private_value = 0,
  751. },
  752. {
  753. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  754. .name = "Line Capture Switch",
  755. .info = wm_adc_mux_info,
  756. .get = wm_adc_mux_get,
  757. .put = wm_adc_mux_put,
  758. .private_value = 1,
  759. },
  760. {
  761. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  762. .name = "Analog Bypass Switch",
  763. .info = wm_bypass_info,
  764. .get = wm_bypass_get,
  765. .put = wm_bypass_put,
  766. },
  767. {
  768. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  769. .name = "Swap Output Channels",
  770. .info = wm_chswap_info,
  771. .get = wm_chswap_get,
  772. .put = wm_chswap_put,
  773. },
  774. {
  775. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  776. .name = "Analog Capture Source",
  777. .info = wm_adc_mux_enum_info,
  778. .get = wm_adc_mux_enum_get,
  779. .put = wm_adc_mux_enum_put,
  780. },
  781. };
  782. /*
  783. * WM codec registers
  784. */
  785. static void wm_proc_regs_write(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  786. {
  787. struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
  788. char line[64];
  789. unsigned int reg, val;
  790. mutex_lock(&ice->gpio_mutex);
  791. while (!snd_info_get_line(buffer, line, sizeof(line))) {
  792. if (sscanf(line, "%x %x", &reg, &val) != 2)
  793. continue;
  794. if (reg <= 0x17 && val <= 0xffff)
  795. wm_put(ice, reg, val);
  796. }
  797. mutex_unlock(&ice->gpio_mutex);
  798. }
  799. static void wm_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  800. {
  801. struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
  802. int reg, val;
  803. mutex_lock(&ice->gpio_mutex);
  804. for (reg = 0; reg <= 0x17; reg++) {
  805. val = wm_get(ice, reg);
  806. snd_iprintf(buffer, "%02x = %04x\n", reg, val);
  807. }
  808. mutex_unlock(&ice->gpio_mutex);
  809. }
  810. static void wm_proc_init(struct snd_ice1712 *ice)
  811. {
  812. struct snd_info_entry *entry;
  813. if (! snd_card_proc_new(ice->card, "wm_codec", &entry)) {
  814. snd_info_set_text_ops(entry, ice, wm_proc_regs_read);
  815. entry->mode |= S_IWUSR;
  816. entry->c.text.write = wm_proc_regs_write;
  817. }
  818. }
  819. static int __devinit prodigy_hifi_add_controls(struct snd_ice1712 *ice)
  820. {
  821. unsigned int i;
  822. int err;
  823. for (i = 0; i < ARRAY_SIZE(prodigy_hifi_controls); i++) {
  824. err = snd_ctl_add(ice->card, snd_ctl_new1(&prodigy_hifi_controls[i], ice));
  825. if (err < 0)
  826. return err;
  827. }
  828. wm_proc_init(ice);
  829. return 0;
  830. }
  831. static int __devinit prodigy_hd2_add_controls(struct snd_ice1712 *ice)
  832. {
  833. unsigned int i;
  834. int err;
  835. for (i = 0; i < ARRAY_SIZE(prodigy_hd2_controls); i++) {
  836. err = snd_ctl_add(ice->card, snd_ctl_new1(&prodigy_hd2_controls[i], ice));
  837. if (err < 0)
  838. return err;
  839. }
  840. wm_proc_init(ice);
  841. return 0;
  842. }
  843. /*
  844. * initialize the chip
  845. */
  846. static int __devinit prodigy_hifi_init(struct snd_ice1712 *ice)
  847. {
  848. static unsigned short wm_inits[] = {
  849. /* These come first to reduce init pop noise */
  850. WM_ADC_MUX, 0x0003, /* ADC mute */
  851. /* 0x00c0 replaced by 0x0003 */
  852. WM_DAC_MUTE, 0x0001, /* DAC softmute */
  853. WM_DAC_CTRL1, 0x0000, /* DAC mute */
  854. WM_POWERDOWN, 0x0008, /* All power-up except HP */
  855. WM_RESET, 0x0000, /* reset */
  856. };
  857. static unsigned short wm_inits2[] = {
  858. WM_MASTER_CTRL, 0x0022, /* 256fs, slave mode */
  859. WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */
  860. WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */
  861. WM_DAC_CTRL1, 0x0090, /* DAC L/R */
  862. WM_OUT_MUX, 0x0001, /* OUT DAC */
  863. WM_HP_ATTEN_L, 0x0179, /* HP 0dB */
  864. WM_HP_ATTEN_R, 0x0179, /* HP 0dB */
  865. WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */
  866. WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */
  867. WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */
  868. WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */
  869. WM_PHASE_SWAP, 0x0000, /* phase normal */
  870. #if 0
  871. WM_DAC_MASTER, 0x0100, /* DAC master muted */
  872. #endif
  873. WM_DAC_CTRL2, 0x0000, /* no deemphasis, no ZFLG */
  874. WM_ADC_ATTEN_L, 0x0000, /* ADC muted */
  875. WM_ADC_ATTEN_R, 0x0000, /* ADC muted */
  876. #if 1
  877. WM_ALC_CTRL1, 0x007b, /* */
  878. WM_ALC_CTRL2, 0x0000, /* */
  879. WM_ALC_CTRL3, 0x0000, /* */
  880. WM_NOISE_GATE, 0x0000, /* */
  881. #endif
  882. WM_DAC_MUTE, 0x0000, /* DAC unmute */
  883. WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */
  884. };
  885. static unsigned short wm8766_inits[] = {
  886. WM8766_RESET, 0x0000,
  887. WM8766_DAC_CTRL, 0x0120,
  888. WM8766_INT_CTRL, 0x0022, /* I2S Normal Mode, 24 bit */
  889. WM8766_DAC_CTRL2, 0x0001,
  890. WM8766_DAC_CTRL3, 0x0080,
  891. WM8766_LDA1, 0x0100,
  892. WM8766_LDA2, 0x0100,
  893. WM8766_LDA3, 0x0100,
  894. WM8766_RDA1, 0x0100,
  895. WM8766_RDA2, 0x0100,
  896. WM8766_RDA3, 0x0100,
  897. WM8766_MUTE1, 0x0000,
  898. WM8766_MUTE2, 0x0000,
  899. };
  900. unsigned int i;
  901. ice->vt1720 = 0;
  902. ice->vt1724 = 1;
  903. ice->num_total_dacs = 8;
  904. ice->num_total_adcs = 1;
  905. ice->akm_codecs = 2;
  906. /* HACK - use this as the SPDIF source.
  907. * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
  908. */
  909. ice->gpio.saved[0] = 0;
  910. /* to remeber the register values */
  911. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  912. if (! ice->akm)
  913. return -ENOMEM;
  914. ice->akm_codecs = 1;
  915. /* initialize WM8776 codec */
  916. for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2)
  917. wm_put(ice, wm_inits[i], wm_inits[i+1]);
  918. schedule_timeout_uninterruptible(1);
  919. for (i = 0; i < ARRAY_SIZE(wm_inits2); i += 2)
  920. wm_put(ice, wm_inits2[i], wm_inits2[i+1]);
  921. /* initialize WM8766 codec */
  922. for (i = 0; i < ARRAY_SIZE(wm8766_inits); i += 2)
  923. wm8766_spi_write(ice, wm8766_inits[i], wm8766_inits[i+1]);
  924. return 0;
  925. }
  926. /*
  927. * initialize the chip
  928. */
  929. static int __devinit prodigy_hd2_init(struct snd_ice1712 *ice)
  930. {
  931. static unsigned short ak4396_inits[] = {
  932. AK4396_CTRL1, 0x87, /* I2S Normal Mode, 24 bit */
  933. AK4396_CTRL2, 0x02,
  934. AK4396_CTRL3, 0x00,
  935. AK4396_LCH_ATT, 0x00,
  936. AK4396_RCH_ATT, 0x00,
  937. };
  938. unsigned int i;
  939. ice->vt1720 = 0;
  940. ice->vt1724 = 1;
  941. ice->num_total_dacs = 1;
  942. ice->num_total_adcs = 1;
  943. ice->akm_codecs = 1;
  944. /* HACK - use this as the SPDIF source.
  945. * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
  946. */
  947. ice->gpio.saved[0] = 0;
  948. /* to remeber the register values */
  949. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  950. if (! ice->akm)
  951. return -ENOMEM;
  952. ice->akm_codecs = 1;
  953. /* initialize ak4396 codec */
  954. /* reset codec */
  955. ak4396_write(ice, AK4396_CTRL1, 0x86);
  956. msleep(100);
  957. ak4396_write(ice, AK4396_CTRL1, 0x87);
  958. for (i = 0; i < ARRAY_SIZE(ak4396_inits); i += 2)
  959. ak4396_write(ice, ak4396_inits[i], ak4396_inits[i+1]);
  960. return 0;
  961. }
  962. static unsigned char prodigy71hifi_eeprom[] __devinitdata = {
  963. 0x4b, /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */
  964. 0x80, /* ACLINK: I2S */
  965. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  966. 0xc3, /* SPDIF: out-en, out-int, spdif-in */
  967. 0xff, /* GPIO_DIR */
  968. 0xff, /* GPIO_DIR1 */
  969. 0x5f, /* GPIO_DIR2 */
  970. 0x00, /* GPIO_MASK */
  971. 0x00, /* GPIO_MASK1 */
  972. 0x00, /* GPIO_MASK2 */
  973. 0x00, /* GPIO_STATE */
  974. 0x00, /* GPIO_STATE1 */
  975. 0x00, /* GPIO_STATE2 */
  976. };
  977. static unsigned char prodigyhd2_eeprom[] __devinitdata = {
  978. 0x4b, /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */
  979. 0x80, /* ACLINK: I2S */
  980. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  981. 0xc3, /* SPDIF: out-en, out-int, spdif-in */
  982. 0xff, /* GPIO_DIR */
  983. 0xff, /* GPIO_DIR1 */
  984. 0x5f, /* GPIO_DIR2 */
  985. 0x00, /* GPIO_MASK */
  986. 0x00, /* GPIO_MASK1 */
  987. 0x00, /* GPIO_MASK2 */
  988. 0x00, /* GPIO_STATE */
  989. 0x00, /* GPIO_STATE1 */
  990. 0x00, /* GPIO_STATE2 */
  991. };
  992. static unsigned char fortissimo4_eeprom[] __devinitdata = {
  993. 0x43, /* SYSCONF: clock 512, ADC, 4DACs */
  994. 0x80, /* ACLINK: I2S */
  995. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  996. 0xc1, /* SPDIF: out-en, out-int */
  997. 0xff, /* GPIO_DIR */
  998. 0xff, /* GPIO_DIR1 */
  999. 0x5f, /* GPIO_DIR2 */
  1000. 0x00, /* GPIO_MASK */
  1001. 0x00, /* GPIO_MASK1 */
  1002. 0x00, /* GPIO_MASK2 */
  1003. 0x00, /* GPIO_STATE */
  1004. 0x00, /* GPIO_STATE1 */
  1005. 0x00, /* GPIO_STATE2 */
  1006. };
  1007. /* entry point */
  1008. struct snd_ice1712_card_info snd_vt1724_prodigy_hifi_cards[] __devinitdata = {
  1009. {
  1010. .subvendor = VT1724_SUBDEVICE_PRODIGY_HIFI,
  1011. .name = "Audiotrak Prodigy 7.1 HiFi",
  1012. .model = "prodigy71hifi",
  1013. .chip_init = prodigy_hifi_init,
  1014. .build_controls = prodigy_hifi_add_controls,
  1015. .eeprom_size = sizeof(prodigy71hifi_eeprom),
  1016. .eeprom_data = prodigy71hifi_eeprom,
  1017. .driver = "Prodigy71HIFI",
  1018. },
  1019. {
  1020. .subvendor = VT1724_SUBDEVICE_PRODIGY_HD2,
  1021. .name = "Audiotrak Prodigy HD2",
  1022. .model = "prodigyhd2",
  1023. .chip_init = prodigy_hd2_init,
  1024. .build_controls = prodigy_hd2_add_controls,
  1025. .eeprom_size = sizeof(prodigyhd2_eeprom),
  1026. .eeprom_data = prodigyhd2_eeprom,
  1027. .driver = "Prodigy71HD2",
  1028. },
  1029. {
  1030. .subvendor = VT1724_SUBDEVICE_FORTISSIMO4,
  1031. .name = "Hercules Fortissimo IV",
  1032. .model = "fortissimo4",
  1033. .chip_init = prodigy_hifi_init,
  1034. .build_controls = prodigy_hifi_add_controls,
  1035. .eeprom_size = sizeof(fortissimo4_eeprom),
  1036. .eeprom_data = fortissimo4_eeprom,
  1037. .driver = "Fortissimo4",
  1038. },
  1039. { } /* terminator */
  1040. };