hpwdt.c 19 KB

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  1. /*
  2. * HP WatchDog Driver
  3. * based on
  4. *
  5. * SoftDog 0.05: A Software Watchdog Device
  6. *
  7. * (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
  8. * Thomas Mingarelli <thomas.mingarelli@hp.com>
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License
  12. * version 2 as published by the Free Software Foundation
  13. *
  14. */
  15. #include <linux/device.h>
  16. #include <linux/fs.h>
  17. #include <linux/init.h>
  18. #include <linux/io.h>
  19. #include <linux/bitops.h>
  20. #include <linux/kernel.h>
  21. #include <linux/miscdevice.h>
  22. #include <linux/module.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/pci.h>
  25. #include <linux/pci_ids.h>
  26. #include <linux/types.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/watchdog.h>
  29. #include <linux/dmi.h>
  30. #include <linux/spinlock.h>
  31. #include <linux/nmi.h>
  32. #include <linux/kdebug.h>
  33. #include <linux/notifier.h>
  34. #include <asm/cacheflush.h>
  35. #define HPWDT_VERSION "1.1.1"
  36. #define DEFAULT_MARGIN 30
  37. static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
  38. static unsigned int reload; /* the computed soft_margin */
  39. static int nowayout = WATCHDOG_NOWAYOUT;
  40. static char expect_release;
  41. static unsigned long hpwdt_is_open;
  42. static void __iomem *pci_mem_addr; /* the PCI-memory address */
  43. static unsigned long __iomem *hpwdt_timer_reg;
  44. static unsigned long __iomem *hpwdt_timer_con;
  45. static struct pci_device_id hpwdt_devices[] = {
  46. { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */
  47. { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */
  48. {0}, /* terminate list */
  49. };
  50. MODULE_DEVICE_TABLE(pci, hpwdt_devices);
  51. #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
  52. #define CRU_BIOS_SIGNATURE_VALUE 0x55524324
  53. #define PCI_BIOS32_PARAGRAPH_LEN 16
  54. #define PCI_ROM_BASE1 0x000F0000
  55. #define ROM_SIZE 0x10000
  56. struct bios32_service_dir {
  57. u32 signature;
  58. u32 entry_point;
  59. u8 revision;
  60. u8 length;
  61. u8 checksum;
  62. u8 reserved[5];
  63. };
  64. /* type 212 */
  65. struct smbios_cru64_info {
  66. u8 type;
  67. u8 byte_length;
  68. u16 handle;
  69. u32 signature;
  70. u64 physical_address;
  71. u32 double_length;
  72. u32 double_offset;
  73. };
  74. #define SMBIOS_CRU64_INFORMATION 212
  75. struct cmn_registers {
  76. union {
  77. struct {
  78. u8 ral;
  79. u8 rah;
  80. u16 rea2;
  81. };
  82. u32 reax;
  83. } u1;
  84. union {
  85. struct {
  86. u8 rbl;
  87. u8 rbh;
  88. u8 reb2l;
  89. u8 reb2h;
  90. };
  91. u32 rebx;
  92. } u2;
  93. union {
  94. struct {
  95. u8 rcl;
  96. u8 rch;
  97. u16 rec2;
  98. };
  99. u32 recx;
  100. } u3;
  101. union {
  102. struct {
  103. u8 rdl;
  104. u8 rdh;
  105. u16 red2;
  106. };
  107. u32 redx;
  108. } u4;
  109. u32 resi;
  110. u32 redi;
  111. u16 rds;
  112. u16 res;
  113. u32 reflags;
  114. } __attribute__((packed));
  115. static unsigned int hpwdt_nmi_sourcing;
  116. static unsigned int allow_kdump;
  117. static unsigned int priority; /* hpwdt at end of die_notify list */
  118. static DEFINE_SPINLOCK(rom_lock);
  119. static void *cru_rom_addr;
  120. static struct cmn_registers cmn_regs;
  121. extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
  122. unsigned long *pRomEntry);
  123. #ifdef CONFIG_X86_32
  124. /* --32 Bit Bios------------------------------------------------------------ */
  125. #define HPWDT_ARCH 32
  126. asm(".text \n\t"
  127. ".align 4 \n"
  128. "asminline_call: \n\t"
  129. "pushl %ebp \n\t"
  130. "movl %esp, %ebp \n\t"
  131. "pusha \n\t"
  132. "pushf \n\t"
  133. "push %es \n\t"
  134. "push %ds \n\t"
  135. "pop %es \n\t"
  136. "movl 8(%ebp),%eax \n\t"
  137. "movl 4(%eax),%ebx \n\t"
  138. "movl 8(%eax),%ecx \n\t"
  139. "movl 12(%eax),%edx \n\t"
  140. "movl 16(%eax),%esi \n\t"
  141. "movl 20(%eax),%edi \n\t"
  142. "movl (%eax),%eax \n\t"
  143. "push %cs \n\t"
  144. "call *12(%ebp) \n\t"
  145. "pushf \n\t"
  146. "pushl %eax \n\t"
  147. "movl 8(%ebp),%eax \n\t"
  148. "movl %ebx,4(%eax) \n\t"
  149. "movl %ecx,8(%eax) \n\t"
  150. "movl %edx,12(%eax) \n\t"
  151. "movl %esi,16(%eax) \n\t"
  152. "movl %edi,20(%eax) \n\t"
  153. "movw %ds,24(%eax) \n\t"
  154. "movw %es,26(%eax) \n\t"
  155. "popl %ebx \n\t"
  156. "movl %ebx,(%eax) \n\t"
  157. "popl %ebx \n\t"
  158. "movl %ebx,28(%eax) \n\t"
  159. "pop %es \n\t"
  160. "popf \n\t"
  161. "popa \n\t"
  162. "leave \n\t"
  163. "ret \n\t"
  164. ".previous");
  165. /*
  166. * cru_detect
  167. *
  168. * Routine Description:
  169. * This function uses the 32-bit BIOS Service Directory record to
  170. * search for a $CRU record.
  171. *
  172. * Return Value:
  173. * 0 : SUCCESS
  174. * <0 : FAILURE
  175. */
  176. static int __devinit cru_detect(unsigned long map_entry,
  177. unsigned long map_offset)
  178. {
  179. void *bios32_map;
  180. unsigned long *bios32_entrypoint;
  181. unsigned long cru_physical_address;
  182. unsigned long cru_length;
  183. unsigned long physical_bios_base = 0;
  184. unsigned long physical_bios_offset = 0;
  185. int retval = -ENODEV;
  186. bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
  187. if (bios32_map == NULL)
  188. return -ENODEV;
  189. bios32_entrypoint = bios32_map + map_offset;
  190. cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
  191. asminline_call(&cmn_regs, bios32_entrypoint);
  192. if (cmn_regs.u1.ral != 0) {
  193. printk(KERN_WARNING
  194. "hpwdt: Call succeeded but with an error: 0x%x\n",
  195. cmn_regs.u1.ral);
  196. } else {
  197. physical_bios_base = cmn_regs.u2.rebx;
  198. physical_bios_offset = cmn_regs.u4.redx;
  199. cru_length = cmn_regs.u3.recx;
  200. cru_physical_address =
  201. physical_bios_base + physical_bios_offset;
  202. /* If the values look OK, then map it in. */
  203. if ((physical_bios_base + physical_bios_offset)) {
  204. cru_rom_addr =
  205. ioremap(cru_physical_address, cru_length);
  206. if (cru_rom_addr)
  207. retval = 0;
  208. }
  209. printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n",
  210. physical_bios_base);
  211. printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
  212. physical_bios_offset);
  213. printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n",
  214. cru_length);
  215. printk(KERN_DEBUG "hpwdt: CRU Mapped Address: %p\n",
  216. &cru_rom_addr);
  217. }
  218. iounmap(bios32_map);
  219. return retval;
  220. }
  221. /*
  222. * bios_checksum
  223. */
  224. static int __devinit bios_checksum(const char __iomem *ptr, int len)
  225. {
  226. char sum = 0;
  227. int i;
  228. /*
  229. * calculate checksum of size bytes. This should add up
  230. * to zero if we have a valid header.
  231. */
  232. for (i = 0; i < len; i++)
  233. sum += ptr[i];
  234. return ((sum == 0) && (len > 0));
  235. }
  236. /*
  237. * bios32_present
  238. *
  239. * Routine Description:
  240. * This function finds the 32-bit BIOS Service Directory
  241. *
  242. * Return Value:
  243. * 0 : SUCCESS
  244. * <0 : FAILURE
  245. */
  246. static int __devinit bios32_present(const char __iomem *p)
  247. {
  248. struct bios32_service_dir *bios_32_ptr;
  249. int length;
  250. unsigned long map_entry, map_offset;
  251. bios_32_ptr = (struct bios32_service_dir *) p;
  252. /*
  253. * Search for signature by checking equal to the swizzled value
  254. * instead of calling another routine to perform a strcmp.
  255. */
  256. if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
  257. length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
  258. if (bios_checksum(p, length)) {
  259. /*
  260. * According to the spec, we're looking for the
  261. * first 4KB-aligned address below the entrypoint
  262. * listed in the header. The Service Directory code
  263. * is guaranteed to occupy no more than 2 4KB pages.
  264. */
  265. map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
  266. map_offset = bios_32_ptr->entry_point - map_entry;
  267. return cru_detect(map_entry, map_offset);
  268. }
  269. }
  270. return -ENODEV;
  271. }
  272. static int __devinit detect_cru_service(void)
  273. {
  274. char __iomem *p, *q;
  275. int rc = -1;
  276. /*
  277. * Search from 0x0f0000 through 0x0fffff, inclusive.
  278. */
  279. p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
  280. if (p == NULL)
  281. return -ENOMEM;
  282. for (q = p; q < p + ROM_SIZE; q += 16) {
  283. rc = bios32_present(q);
  284. if (!rc)
  285. break;
  286. }
  287. iounmap(p);
  288. return rc;
  289. }
  290. /* ------------------------------------------------------------------------- */
  291. #endif /* CONFIG_X86_32 */
  292. #ifdef CONFIG_X86_64
  293. /* --64 Bit Bios------------------------------------------------------------ */
  294. #define HPWDT_ARCH 64
  295. asm(".text \n\t"
  296. ".align 4 \n"
  297. "asminline_call: \n\t"
  298. "pushq %rbp \n\t"
  299. "movq %rsp, %rbp \n\t"
  300. "pushq %rax \n\t"
  301. "pushq %rbx \n\t"
  302. "pushq %rdx \n\t"
  303. "pushq %r12 \n\t"
  304. "pushq %r9 \n\t"
  305. "movq %rsi, %r12 \n\t"
  306. "movq %rdi, %r9 \n\t"
  307. "movl 4(%r9),%ebx \n\t"
  308. "movl 8(%r9),%ecx \n\t"
  309. "movl 12(%r9),%edx \n\t"
  310. "movl 16(%r9),%esi \n\t"
  311. "movl 20(%r9),%edi \n\t"
  312. "movl (%r9),%eax \n\t"
  313. "call *%r12 \n\t"
  314. "pushfq \n\t"
  315. "popq %r12 \n\t"
  316. "movl %eax, (%r9) \n\t"
  317. "movl %ebx, 4(%r9) \n\t"
  318. "movl %ecx, 8(%r9) \n\t"
  319. "movl %edx, 12(%r9) \n\t"
  320. "movl %esi, 16(%r9) \n\t"
  321. "movl %edi, 20(%r9) \n\t"
  322. "movq %r12, %rax \n\t"
  323. "movl %eax, 28(%r9) \n\t"
  324. "popq %r9 \n\t"
  325. "popq %r12 \n\t"
  326. "popq %rdx \n\t"
  327. "popq %rbx \n\t"
  328. "popq %rax \n\t"
  329. "leave \n\t"
  330. "ret \n\t"
  331. ".previous");
  332. /*
  333. * dmi_find_cru
  334. *
  335. * Routine Description:
  336. * This function checks whether or not a SMBIOS/DMI record is
  337. * the 64bit CRU info or not
  338. */
  339. static void __devinit dmi_find_cru(const struct dmi_header *dm, void *dummy)
  340. {
  341. struct smbios_cru64_info *smbios_cru64_ptr;
  342. unsigned long cru_physical_address;
  343. if (dm->type == SMBIOS_CRU64_INFORMATION) {
  344. smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
  345. if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
  346. cru_physical_address =
  347. smbios_cru64_ptr->physical_address +
  348. smbios_cru64_ptr->double_offset;
  349. cru_rom_addr = ioremap(cru_physical_address,
  350. smbios_cru64_ptr->double_length);
  351. set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
  352. smbios_cru64_ptr->double_length >> PAGE_SHIFT);
  353. }
  354. }
  355. }
  356. static int __devinit detect_cru_service(void)
  357. {
  358. cru_rom_addr = NULL;
  359. dmi_walk(dmi_find_cru, NULL);
  360. /* if cru_rom_addr has been set then we found a CRU service */
  361. return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
  362. }
  363. /* ------------------------------------------------------------------------- */
  364. #endif /* CONFIG_X86_64 */
  365. /*
  366. * Watchdog operations
  367. */
  368. static void hpwdt_start(void)
  369. {
  370. reload = (soft_margin * 1000) / 128;
  371. iowrite16(reload, hpwdt_timer_reg);
  372. iowrite16(0x85, hpwdt_timer_con);
  373. }
  374. static void hpwdt_stop(void)
  375. {
  376. unsigned long data;
  377. data = ioread16(hpwdt_timer_con);
  378. data &= 0xFE;
  379. iowrite16(data, hpwdt_timer_con);
  380. }
  381. static void hpwdt_ping(void)
  382. {
  383. iowrite16(reload, hpwdt_timer_reg);
  384. }
  385. static int hpwdt_change_timer(int new_margin)
  386. {
  387. /* Arbitrary, can't find the card's limits */
  388. if (new_margin < 5 || new_margin > 600) {
  389. printk(KERN_WARNING
  390. "hpwdt: New value passed in is invalid: %d seconds.\n",
  391. new_margin);
  392. return -EINVAL;
  393. }
  394. soft_margin = new_margin;
  395. printk(KERN_DEBUG
  396. "hpwdt: New timer passed in is %d seconds.\n",
  397. new_margin);
  398. reload = (soft_margin * 1000) / 128;
  399. return 0;
  400. }
  401. /*
  402. * NMI Handler
  403. */
  404. static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
  405. void *data)
  406. {
  407. unsigned long rom_pl;
  408. static int die_nmi_called;
  409. if (ulReason != DIE_NMI && ulReason != DIE_NMI_IPI)
  410. return NOTIFY_OK;
  411. if (hpwdt_nmi_sourcing) {
  412. spin_lock_irqsave(&rom_lock, rom_pl);
  413. if (!die_nmi_called)
  414. asminline_call(&cmn_regs, cru_rom_addr);
  415. die_nmi_called = 1;
  416. spin_unlock_irqrestore(&rom_lock, rom_pl);
  417. if (cmn_regs.u1.ral == 0) {
  418. printk(KERN_WARNING "hpwdt: An NMI occurred, "
  419. "but unable to determine source.\n");
  420. } else {
  421. if (allow_kdump)
  422. hpwdt_stop();
  423. panic("An NMI occurred, please see the Integrated "
  424. "Management Log for details.\n");
  425. }
  426. }
  427. return NOTIFY_OK;
  428. }
  429. /*
  430. * /dev/watchdog handling
  431. */
  432. static int hpwdt_open(struct inode *inode, struct file *file)
  433. {
  434. /* /dev/watchdog can only be opened once */
  435. if (test_and_set_bit(0, &hpwdt_is_open))
  436. return -EBUSY;
  437. /* Start the watchdog */
  438. hpwdt_start();
  439. hpwdt_ping();
  440. return nonseekable_open(inode, file);
  441. }
  442. static int hpwdt_release(struct inode *inode, struct file *file)
  443. {
  444. /* Stop the watchdog */
  445. if (expect_release == 42) {
  446. hpwdt_stop();
  447. } else {
  448. printk(KERN_CRIT
  449. "hpwdt: Unexpected close, not stopping watchdog!\n");
  450. hpwdt_ping();
  451. }
  452. expect_release = 0;
  453. /* /dev/watchdog is being closed, make sure it can be re-opened */
  454. clear_bit(0, &hpwdt_is_open);
  455. return 0;
  456. }
  457. static ssize_t hpwdt_write(struct file *file, const char __user *data,
  458. size_t len, loff_t *ppos)
  459. {
  460. /* See if we got the magic character 'V' and reload the timer */
  461. if (len) {
  462. if (!nowayout) {
  463. size_t i;
  464. /* note: just in case someone wrote the magic character
  465. * five months ago... */
  466. expect_release = 0;
  467. /* scan to see whether or not we got the magic char. */
  468. for (i = 0; i != len; i++) {
  469. char c;
  470. if (get_user(c, data + i))
  471. return -EFAULT;
  472. if (c == 'V')
  473. expect_release = 42;
  474. }
  475. }
  476. /* someone wrote to us, we should reload the timer */
  477. hpwdt_ping();
  478. }
  479. return len;
  480. }
  481. static const struct watchdog_info ident = {
  482. .options = WDIOF_SETTIMEOUT |
  483. WDIOF_KEEPALIVEPING |
  484. WDIOF_MAGICCLOSE,
  485. .identity = "HP iLO2+ HW Watchdog Timer",
  486. };
  487. static long hpwdt_ioctl(struct file *file, unsigned int cmd,
  488. unsigned long arg)
  489. {
  490. void __user *argp = (void __user *)arg;
  491. int __user *p = argp;
  492. int new_margin;
  493. int ret = -ENOTTY;
  494. switch (cmd) {
  495. case WDIOC_GETSUPPORT:
  496. ret = 0;
  497. if (copy_to_user(argp, &ident, sizeof(ident)))
  498. ret = -EFAULT;
  499. break;
  500. case WDIOC_GETSTATUS:
  501. case WDIOC_GETBOOTSTATUS:
  502. ret = put_user(0, p);
  503. break;
  504. case WDIOC_KEEPALIVE:
  505. hpwdt_ping();
  506. ret = 0;
  507. break;
  508. case WDIOC_SETTIMEOUT:
  509. ret = get_user(new_margin, p);
  510. if (ret)
  511. break;
  512. ret = hpwdt_change_timer(new_margin);
  513. if (ret)
  514. break;
  515. hpwdt_ping();
  516. /* Fall */
  517. case WDIOC_GETTIMEOUT:
  518. ret = put_user(soft_margin, p);
  519. break;
  520. }
  521. return ret;
  522. }
  523. /*
  524. * Kernel interfaces
  525. */
  526. static const struct file_operations hpwdt_fops = {
  527. .owner = THIS_MODULE,
  528. .llseek = no_llseek,
  529. .write = hpwdt_write,
  530. .unlocked_ioctl = hpwdt_ioctl,
  531. .open = hpwdt_open,
  532. .release = hpwdt_release,
  533. };
  534. static struct miscdevice hpwdt_miscdev = {
  535. .minor = WATCHDOG_MINOR,
  536. .name = "watchdog",
  537. .fops = &hpwdt_fops,
  538. };
  539. static struct notifier_block die_notifier = {
  540. .notifier_call = hpwdt_pretimeout,
  541. .priority = 0,
  542. };
  543. /*
  544. * Init & Exit
  545. */
  546. #ifdef ARCH_HAS_NMI_WATCHDOG
  547. static void __devinit hpwdt_check_nmi_sourcing(struct pci_dev *dev)
  548. {
  549. /*
  550. * If nmi_watchdog is turned off then we can turn on
  551. * our nmi sourcing capability.
  552. */
  553. if (!nmi_watchdog_active())
  554. hpwdt_nmi_sourcing = 1;
  555. else
  556. dev_warn(&dev->dev, "NMI sourcing is disabled. To enable this "
  557. "functionality you must reboot with nmi_watchdog=0 "
  558. "and load the hpwdt driver with priority=1.\n");
  559. }
  560. #else
  561. static void __devinit hpwdt_check_nmi_sourcing(struct pci_dev *dev)
  562. {
  563. dev_warn(&dev->dev, "NMI sourcing is disabled. "
  564. "Your kernel does not support a NMI Watchdog.\n");
  565. }
  566. #endif
  567. static int __devinit hpwdt_init_one(struct pci_dev *dev,
  568. const struct pci_device_id *ent)
  569. {
  570. int retval;
  571. /*
  572. * Check if we can do NMI sourcing or not
  573. */
  574. hpwdt_check_nmi_sourcing(dev);
  575. /*
  576. * First let's find out if we are on an iLO2+ server. We will
  577. * not run on a legacy ASM box.
  578. * So we only support the G5 ProLiant servers and higher.
  579. */
  580. if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
  581. dev_warn(&dev->dev,
  582. "This server does not have an iLO2+ ASIC.\n");
  583. return -ENODEV;
  584. }
  585. if (pci_enable_device(dev)) {
  586. dev_warn(&dev->dev,
  587. "Not possible to enable PCI Device: 0x%x:0x%x.\n",
  588. ent->vendor, ent->device);
  589. return -ENODEV;
  590. }
  591. pci_mem_addr = pci_iomap(dev, 1, 0x80);
  592. if (!pci_mem_addr) {
  593. dev_warn(&dev->dev,
  594. "Unable to detect the iLO2+ server memory.\n");
  595. retval = -ENOMEM;
  596. goto error_pci_iomap;
  597. }
  598. hpwdt_timer_reg = pci_mem_addr + 0x70;
  599. hpwdt_timer_con = pci_mem_addr + 0x72;
  600. /* Make sure that we have a valid soft_margin */
  601. if (hpwdt_change_timer(soft_margin))
  602. hpwdt_change_timer(DEFAULT_MARGIN);
  603. /*
  604. * We need to map the ROM to get the CRU service.
  605. * For 32 bit Operating Systems we need to go through the 32 Bit
  606. * BIOS Service Directory
  607. * For 64 bit Operating Systems we get that service through SMBIOS.
  608. */
  609. retval = detect_cru_service();
  610. if (retval < 0) {
  611. dev_warn(&dev->dev,
  612. "Unable to detect the %d Bit CRU Service.\n",
  613. HPWDT_ARCH);
  614. goto error_get_cru;
  615. }
  616. /*
  617. * We know this is the only CRU call we need to make so lets keep as
  618. * few instructions as possible once the NMI comes in.
  619. */
  620. cmn_regs.u1.rah = 0x0D;
  621. cmn_regs.u1.ral = 0x02;
  622. /*
  623. * If the priority is set to 1, then we will be put first on the
  624. * die notify list to handle a critical NMI. The default is to
  625. * be last so other users of the NMI signal can function.
  626. */
  627. if (priority)
  628. die_notifier.priority = 0x7FFFFFFF;
  629. retval = register_die_notifier(&die_notifier);
  630. if (retval != 0) {
  631. dev_warn(&dev->dev,
  632. "Unable to register a die notifier (err=%d).\n",
  633. retval);
  634. goto error_die_notifier;
  635. }
  636. retval = misc_register(&hpwdt_miscdev);
  637. if (retval < 0) {
  638. dev_warn(&dev->dev,
  639. "Unable to register miscdev on minor=%d (err=%d).\n",
  640. WATCHDOG_MINOR, retval);
  641. goto error_misc_register;
  642. }
  643. printk(KERN_INFO
  644. "hp Watchdog Timer Driver: %s"
  645. ", timer margin: %d seconds (nowayout=%d)"
  646. ", allow kernel dump: %s (default = 0/OFF)"
  647. ", priority: %s (default = 0/LAST).\n",
  648. HPWDT_VERSION, soft_margin, nowayout,
  649. (allow_kdump == 0) ? "OFF" : "ON",
  650. (priority == 0) ? "LAST" : "FIRST");
  651. return 0;
  652. error_misc_register:
  653. unregister_die_notifier(&die_notifier);
  654. error_die_notifier:
  655. if (cru_rom_addr)
  656. iounmap(cru_rom_addr);
  657. error_get_cru:
  658. pci_iounmap(dev, pci_mem_addr);
  659. error_pci_iomap:
  660. pci_disable_device(dev);
  661. return retval;
  662. }
  663. static void __devexit hpwdt_exit(struct pci_dev *dev)
  664. {
  665. if (!nowayout)
  666. hpwdt_stop();
  667. misc_deregister(&hpwdt_miscdev);
  668. unregister_die_notifier(&die_notifier);
  669. if (cru_rom_addr)
  670. iounmap(cru_rom_addr);
  671. pci_iounmap(dev, pci_mem_addr);
  672. pci_disable_device(dev);
  673. }
  674. static struct pci_driver hpwdt_driver = {
  675. .name = "hpwdt",
  676. .id_table = hpwdt_devices,
  677. .probe = hpwdt_init_one,
  678. .remove = __devexit_p(hpwdt_exit),
  679. };
  680. static void __exit hpwdt_cleanup(void)
  681. {
  682. pci_unregister_driver(&hpwdt_driver);
  683. }
  684. static int __init hpwdt_init(void)
  685. {
  686. return pci_register_driver(&hpwdt_driver);
  687. }
  688. MODULE_AUTHOR("Tom Mingarelli");
  689. MODULE_DESCRIPTION("hp watchdog driver");
  690. MODULE_LICENSE("GPL");
  691. MODULE_VERSION(HPWDT_VERSION);
  692. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  693. module_param(soft_margin, int, 0);
  694. MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
  695. module_param(nowayout, int, 0);
  696. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  697. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  698. module_param(allow_kdump, int, 0);
  699. MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
  700. module_param(priority, int, 0);
  701. MODULE_PARM_DESC(priority, "The hpwdt driver handles NMIs first or last"
  702. " (default = 0/Last)\n");
  703. module_init(hpwdt_init);
  704. module_exit(hpwdt_cleanup);