smu.c 25 KB

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  1. /*
  2. * PowerMac G5 SMU driver
  3. *
  4. * Copyright 2004 J. Mayer <l_indien@magic.fr>
  5. * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
  6. *
  7. * Released under the term of the GNU GPL v2.
  8. */
  9. /*
  10. * TODO:
  11. * - maybe add timeout to commands ?
  12. * - blocking version of time functions
  13. * - polling version of i2c commands (including timer that works with
  14. * interrutps off)
  15. * - maybe avoid some data copies with i2c by directly using the smu cmd
  16. * buffer and a lower level internal interface
  17. * - understand SMU -> CPU events and implement reception of them via
  18. * the userland interface
  19. */
  20. #include <linux/config.h>
  21. #include <linux/types.h>
  22. #include <linux/kernel.h>
  23. #include <linux/device.h>
  24. #include <linux/dmapool.h>
  25. #include <linux/bootmem.h>
  26. #include <linux/vmalloc.h>
  27. #include <linux/highmem.h>
  28. #include <linux/jiffies.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/rtc.h>
  31. #include <linux/completion.h>
  32. #include <linux/miscdevice.h>
  33. #include <linux/delay.h>
  34. #include <linux/sysdev.h>
  35. #include <linux/poll.h>
  36. #include <asm/byteorder.h>
  37. #include <asm/io.h>
  38. #include <asm/prom.h>
  39. #include <asm/machdep.h>
  40. #include <asm/pmac_feature.h>
  41. #include <asm/smu.h>
  42. #include <asm/sections.h>
  43. #include <asm/abs_addr.h>
  44. #include <asm/uaccess.h>
  45. #include <asm/of_device.h>
  46. #define VERSION "0.6"
  47. #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
  48. #undef DEBUG_SMU
  49. #ifdef DEBUG_SMU
  50. #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
  51. #else
  52. #define DPRINTK(fmt, args...) do { } while (0)
  53. #endif
  54. /*
  55. * This is the command buffer passed to the SMU hardware
  56. */
  57. #define SMU_MAX_DATA 254
  58. struct smu_cmd_buf {
  59. u8 cmd;
  60. u8 length;
  61. u8 data[SMU_MAX_DATA];
  62. };
  63. struct smu_device {
  64. spinlock_t lock;
  65. struct device_node *of_node;
  66. struct of_device *of_dev;
  67. int doorbell; /* doorbell gpio */
  68. u32 __iomem *db_buf; /* doorbell buffer */
  69. int db_irq;
  70. int msg;
  71. int msg_irq;
  72. struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
  73. u32 cmd_buf_abs; /* command buffer absolute */
  74. struct list_head cmd_list;
  75. struct smu_cmd *cmd_cur; /* pending command */
  76. struct list_head cmd_i2c_list;
  77. struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
  78. struct timer_list i2c_timer;
  79. };
  80. /*
  81. * I don't think there will ever be more than one SMU, so
  82. * for now, just hard code that
  83. */
  84. static struct smu_device *smu;
  85. /*
  86. * SMU driver low level stuff
  87. */
  88. static void smu_start_cmd(void)
  89. {
  90. unsigned long faddr, fend;
  91. struct smu_cmd *cmd;
  92. if (list_empty(&smu->cmd_list))
  93. return;
  94. /* Fetch first command in queue */
  95. cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
  96. smu->cmd_cur = cmd;
  97. list_del(&cmd->link);
  98. DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
  99. cmd->data_len);
  100. DPRINTK("SMU: data buffer: %02x %02x %02x %02x ...\n",
  101. ((u8 *)cmd->data_buf)[0], ((u8 *)cmd->data_buf)[1],
  102. ((u8 *)cmd->data_buf)[2], ((u8 *)cmd->data_buf)[3]);
  103. /* Fill the SMU command buffer */
  104. smu->cmd_buf->cmd = cmd->cmd;
  105. smu->cmd_buf->length = cmd->data_len;
  106. memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
  107. /* Flush command and data to RAM */
  108. faddr = (unsigned long)smu->cmd_buf;
  109. fend = faddr + smu->cmd_buf->length + 2;
  110. flush_inval_dcache_range(faddr, fend);
  111. /* This isn't exactly a DMA mapping here, I suspect
  112. * the SMU is actually communicating with us via i2c to the
  113. * northbridge or the CPU to access RAM.
  114. */
  115. writel(smu->cmd_buf_abs, smu->db_buf);
  116. /* Ring the SMU doorbell */
  117. pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
  118. }
  119. static irqreturn_t smu_db_intr(int irq, void *arg, struct pt_regs *regs)
  120. {
  121. unsigned long flags;
  122. struct smu_cmd *cmd;
  123. void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
  124. void *misc = NULL;
  125. u8 gpio;
  126. int rc = 0;
  127. /* SMU completed the command, well, we hope, let's make sure
  128. * of it
  129. */
  130. spin_lock_irqsave(&smu->lock, flags);
  131. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  132. if ((gpio & 7) != 7)
  133. return IRQ_HANDLED;
  134. cmd = smu->cmd_cur;
  135. smu->cmd_cur = NULL;
  136. if (cmd == NULL)
  137. goto bail;
  138. if (rc == 0) {
  139. unsigned long faddr;
  140. int reply_len;
  141. u8 ack;
  142. /* CPU might have brought back the cache line, so we need
  143. * to flush again before peeking at the SMU response. We
  144. * flush the entire buffer for now as we haven't read the
  145. * reply lenght (it's only 2 cache lines anyway)
  146. */
  147. faddr = (unsigned long)smu->cmd_buf;
  148. flush_inval_dcache_range(faddr, faddr + 256);
  149. /* Now check ack */
  150. ack = (~cmd->cmd) & 0xff;
  151. if (ack != smu->cmd_buf->cmd) {
  152. DPRINTK("SMU: incorrect ack, want %x got %x\n",
  153. ack, smu->cmd_buf->cmd);
  154. rc = -EIO;
  155. }
  156. reply_len = rc == 0 ? smu->cmd_buf->length : 0;
  157. DPRINTK("SMU: reply len: %d\n", reply_len);
  158. if (reply_len > cmd->reply_len) {
  159. printk(KERN_WARNING "SMU: reply buffer too small,"
  160. "got %d bytes for a %d bytes buffer\n",
  161. reply_len, cmd->reply_len);
  162. reply_len = cmd->reply_len;
  163. }
  164. cmd->reply_len = reply_len;
  165. if (cmd->reply_buf && reply_len)
  166. memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
  167. }
  168. /* Now complete the command. Write status last in order as we lost
  169. * ownership of the command structure as soon as it's no longer -1
  170. */
  171. done = cmd->done;
  172. misc = cmd->misc;
  173. mb();
  174. cmd->status = rc;
  175. bail:
  176. /* Start next command if any */
  177. smu_start_cmd();
  178. spin_unlock_irqrestore(&smu->lock, flags);
  179. /* Call command completion handler if any */
  180. if (done)
  181. done(cmd, misc);
  182. /* It's an edge interrupt, nothing to do */
  183. return IRQ_HANDLED;
  184. }
  185. static irqreturn_t smu_msg_intr(int irq, void *arg, struct pt_regs *regs)
  186. {
  187. /* I don't quite know what to do with this one, we seem to never
  188. * receive it, so I suspect we have to arm it someway in the SMU
  189. * to start getting events that way.
  190. */
  191. printk(KERN_INFO "SMU: message interrupt !\n");
  192. /* It's an edge interrupt, nothing to do */
  193. return IRQ_HANDLED;
  194. }
  195. /*
  196. * Queued command management.
  197. *
  198. */
  199. int smu_queue_cmd(struct smu_cmd *cmd)
  200. {
  201. unsigned long flags;
  202. if (smu == NULL)
  203. return -ENODEV;
  204. if (cmd->data_len > SMU_MAX_DATA ||
  205. cmd->reply_len > SMU_MAX_DATA)
  206. return -EINVAL;
  207. cmd->status = 1;
  208. spin_lock_irqsave(&smu->lock, flags);
  209. list_add_tail(&cmd->link, &smu->cmd_list);
  210. if (smu->cmd_cur == NULL)
  211. smu_start_cmd();
  212. spin_unlock_irqrestore(&smu->lock, flags);
  213. return 0;
  214. }
  215. EXPORT_SYMBOL(smu_queue_cmd);
  216. int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
  217. unsigned int data_len,
  218. void (*done)(struct smu_cmd *cmd, void *misc),
  219. void *misc, ...)
  220. {
  221. struct smu_cmd *cmd = &scmd->cmd;
  222. va_list list;
  223. int i;
  224. if (data_len > sizeof(scmd->buffer))
  225. return -EINVAL;
  226. memset(scmd, 0, sizeof(*scmd));
  227. cmd->cmd = command;
  228. cmd->data_len = data_len;
  229. cmd->data_buf = scmd->buffer;
  230. cmd->reply_len = sizeof(scmd->buffer);
  231. cmd->reply_buf = scmd->buffer;
  232. cmd->done = done;
  233. cmd->misc = misc;
  234. va_start(list, misc);
  235. for (i = 0; i < data_len; ++i)
  236. scmd->buffer[i] = (u8)va_arg(list, int);
  237. va_end(list);
  238. return smu_queue_cmd(cmd);
  239. }
  240. EXPORT_SYMBOL(smu_queue_simple);
  241. void smu_poll(void)
  242. {
  243. u8 gpio;
  244. if (smu == NULL)
  245. return;
  246. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  247. if ((gpio & 7) == 7)
  248. smu_db_intr(smu->db_irq, smu, NULL);
  249. }
  250. EXPORT_SYMBOL(smu_poll);
  251. void smu_done_complete(struct smu_cmd *cmd, void *misc)
  252. {
  253. struct completion *comp = misc;
  254. complete(comp);
  255. }
  256. EXPORT_SYMBOL(smu_done_complete);
  257. void smu_spinwait_cmd(struct smu_cmd *cmd)
  258. {
  259. while(cmd->status == 1)
  260. smu_poll();
  261. }
  262. EXPORT_SYMBOL(smu_spinwait_cmd);
  263. /* RTC low level commands */
  264. static inline int bcd2hex (int n)
  265. {
  266. return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
  267. }
  268. static inline int hex2bcd (int n)
  269. {
  270. return ((n / 10) << 4) + (n % 10);
  271. }
  272. static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
  273. struct rtc_time *time)
  274. {
  275. cmd_buf->cmd = 0x8e;
  276. cmd_buf->length = 8;
  277. cmd_buf->data[0] = 0x80;
  278. cmd_buf->data[1] = hex2bcd(time->tm_sec);
  279. cmd_buf->data[2] = hex2bcd(time->tm_min);
  280. cmd_buf->data[3] = hex2bcd(time->tm_hour);
  281. cmd_buf->data[4] = time->tm_wday;
  282. cmd_buf->data[5] = hex2bcd(time->tm_mday);
  283. cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
  284. cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
  285. }
  286. int smu_get_rtc_time(struct rtc_time *time, int spinwait)
  287. {
  288. struct smu_simple_cmd cmd;
  289. int rc;
  290. if (smu == NULL)
  291. return -ENODEV;
  292. memset(time, 0, sizeof(struct rtc_time));
  293. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
  294. SMU_CMD_RTC_GET_DATETIME);
  295. if (rc)
  296. return rc;
  297. smu_spinwait_simple(&cmd);
  298. time->tm_sec = bcd2hex(cmd.buffer[0]);
  299. time->tm_min = bcd2hex(cmd.buffer[1]);
  300. time->tm_hour = bcd2hex(cmd.buffer[2]);
  301. time->tm_wday = bcd2hex(cmd.buffer[3]);
  302. time->tm_mday = bcd2hex(cmd.buffer[4]);
  303. time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
  304. time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
  305. return 0;
  306. }
  307. int smu_set_rtc_time(struct rtc_time *time, int spinwait)
  308. {
  309. struct smu_simple_cmd cmd;
  310. int rc;
  311. if (smu == NULL)
  312. return -ENODEV;
  313. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
  314. SMU_CMD_RTC_SET_DATETIME,
  315. hex2bcd(time->tm_sec),
  316. hex2bcd(time->tm_min),
  317. hex2bcd(time->tm_hour),
  318. time->tm_wday,
  319. hex2bcd(time->tm_mday),
  320. hex2bcd(time->tm_mon) + 1,
  321. hex2bcd(time->tm_year - 100));
  322. if (rc)
  323. return rc;
  324. smu_spinwait_simple(&cmd);
  325. return 0;
  326. }
  327. void smu_shutdown(void)
  328. {
  329. struct smu_simple_cmd cmd;
  330. if (smu == NULL)
  331. return;
  332. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
  333. 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
  334. return;
  335. smu_spinwait_simple(&cmd);
  336. for (;;)
  337. ;
  338. }
  339. void smu_restart(void)
  340. {
  341. struct smu_simple_cmd cmd;
  342. if (smu == NULL)
  343. return;
  344. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
  345. 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
  346. return;
  347. smu_spinwait_simple(&cmd);
  348. for (;;)
  349. ;
  350. }
  351. int smu_present(void)
  352. {
  353. return smu != NULL;
  354. }
  355. EXPORT_SYMBOL(smu_present);
  356. int smu_init (void)
  357. {
  358. struct device_node *np;
  359. u32 *data;
  360. np = of_find_node_by_type(NULL, "smu");
  361. if (np == NULL)
  362. return -ENODEV;
  363. printk(KERN_INFO "SMU driver %s %s\n", VERSION, AUTHOR);
  364. if (smu_cmdbuf_abs == 0) {
  365. printk(KERN_ERR "SMU: Command buffer not allocated !\n");
  366. return -EINVAL;
  367. }
  368. smu = alloc_bootmem(sizeof(struct smu_device));
  369. if (smu == NULL)
  370. return -ENOMEM;
  371. memset(smu, 0, sizeof(*smu));
  372. spin_lock_init(&smu->lock);
  373. INIT_LIST_HEAD(&smu->cmd_list);
  374. INIT_LIST_HEAD(&smu->cmd_i2c_list);
  375. smu->of_node = np;
  376. smu->db_irq = NO_IRQ;
  377. smu->msg_irq = NO_IRQ;
  378. init_timer(&smu->i2c_timer);
  379. /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
  380. * 32 bits value safely
  381. */
  382. smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
  383. smu->cmd_buf = (struct smu_cmd_buf *)abs_to_virt(smu_cmdbuf_abs);
  384. np = of_find_node_by_name(NULL, "smu-doorbell");
  385. if (np == NULL) {
  386. printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
  387. goto fail;
  388. }
  389. data = (u32 *)get_property(np, "reg", NULL);
  390. if (data == NULL) {
  391. of_node_put(np);
  392. printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
  393. goto fail;
  394. }
  395. /* Current setup has one doorbell GPIO that does both doorbell
  396. * and ack. GPIOs are at 0x50, best would be to find that out
  397. * in the device-tree though.
  398. */
  399. smu->doorbell = *data;
  400. if (smu->doorbell < 0x50)
  401. smu->doorbell += 0x50;
  402. if (np->n_intrs > 0)
  403. smu->db_irq = np->intrs[0].line;
  404. of_node_put(np);
  405. /* Now look for the smu-interrupt GPIO */
  406. do {
  407. np = of_find_node_by_name(NULL, "smu-interrupt");
  408. if (np == NULL)
  409. break;
  410. data = (u32 *)get_property(np, "reg", NULL);
  411. if (data == NULL) {
  412. of_node_put(np);
  413. break;
  414. }
  415. smu->msg = *data;
  416. if (smu->msg < 0x50)
  417. smu->msg += 0x50;
  418. if (np->n_intrs > 0)
  419. smu->msg_irq = np->intrs[0].line;
  420. of_node_put(np);
  421. } while(0);
  422. /* Doorbell buffer is currently hard-coded, I didn't find a proper
  423. * device-tree entry giving the address. Best would probably to use
  424. * an offset for K2 base though, but let's do it that way for now.
  425. */
  426. smu->db_buf = ioremap(0x8000860c, 0x1000);
  427. if (smu->db_buf == NULL) {
  428. printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
  429. goto fail;
  430. }
  431. sys_ctrler = SYS_CTRLER_SMU;
  432. return 0;
  433. fail:
  434. smu = NULL;
  435. return -ENXIO;
  436. }
  437. static int smu_late_init(void)
  438. {
  439. if (!smu)
  440. return 0;
  441. /*
  442. * Try to request the interrupts
  443. */
  444. if (smu->db_irq != NO_IRQ) {
  445. if (request_irq(smu->db_irq, smu_db_intr,
  446. SA_SHIRQ, "SMU doorbell", smu) < 0) {
  447. printk(KERN_WARNING "SMU: can't "
  448. "request interrupt %d\n",
  449. smu->db_irq);
  450. smu->db_irq = NO_IRQ;
  451. }
  452. }
  453. if (smu->msg_irq != NO_IRQ) {
  454. if (request_irq(smu->msg_irq, smu_msg_intr,
  455. SA_SHIRQ, "SMU message", smu) < 0) {
  456. printk(KERN_WARNING "SMU: can't "
  457. "request interrupt %d\n",
  458. smu->msg_irq);
  459. smu->msg_irq = NO_IRQ;
  460. }
  461. }
  462. return 0;
  463. }
  464. arch_initcall(smu_late_init);
  465. /*
  466. * sysfs visibility
  467. */
  468. static void smu_expose_childs(void *unused)
  469. {
  470. struct device_node *np;
  471. for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;) {
  472. if (device_is_compatible(np, "smu-i2c")) {
  473. char name[32];
  474. u32 *reg = (u32 *)get_property(np, "reg", NULL);
  475. if (reg == NULL)
  476. continue;
  477. sprintf(name, "smu-i2c-%02x", *reg);
  478. of_platform_device_create(np, name, &smu->of_dev->dev);
  479. }
  480. }
  481. }
  482. static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs, NULL);
  483. static int smu_platform_probe(struct of_device* dev,
  484. const struct of_device_id *match)
  485. {
  486. if (!smu)
  487. return -ENODEV;
  488. smu->of_dev = dev;
  489. /*
  490. * Ok, we are matched, now expose all i2c busses. We have to defer
  491. * that unfortunately or it would deadlock inside the device model
  492. */
  493. schedule_work(&smu_expose_childs_work);
  494. return 0;
  495. }
  496. static struct of_device_id smu_platform_match[] =
  497. {
  498. {
  499. .type = "smu",
  500. },
  501. {},
  502. };
  503. static struct of_platform_driver smu_of_platform_driver =
  504. {
  505. .name = "smu",
  506. .match_table = smu_platform_match,
  507. .probe = smu_platform_probe,
  508. };
  509. static int __init smu_init_sysfs(void)
  510. {
  511. int rc;
  512. /*
  513. * Due to sysfs bogosity, a sysdev is not a real device, so
  514. * we should in fact create both if we want sysdev semantics
  515. * for power management.
  516. * For now, we don't power manage machines with an SMU chip,
  517. * I'm a bit too far from figuring out how that works with those
  518. * new chipsets, but that will come back and bite us
  519. */
  520. rc = of_register_driver(&smu_of_platform_driver);
  521. return 0;
  522. }
  523. device_initcall(smu_init_sysfs);
  524. struct of_device *smu_get_ofdev(void)
  525. {
  526. if (!smu)
  527. return NULL;
  528. return smu->of_dev;
  529. }
  530. EXPORT_SYMBOL_GPL(smu_get_ofdev);
  531. /*
  532. * i2c interface
  533. */
  534. static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
  535. {
  536. void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
  537. void *misc = cmd->misc;
  538. unsigned long flags;
  539. /* Check for read case */
  540. if (!fail && cmd->read) {
  541. if (cmd->pdata[0] < 1)
  542. fail = 1;
  543. else
  544. memcpy(cmd->info.data, &cmd->pdata[1],
  545. cmd->info.datalen);
  546. }
  547. DPRINTK("SMU: completing, success: %d\n", !fail);
  548. /* Update status and mark no pending i2c command with lock
  549. * held so nobody comes in while we dequeue an eventual
  550. * pending next i2c command
  551. */
  552. spin_lock_irqsave(&smu->lock, flags);
  553. smu->cmd_i2c_cur = NULL;
  554. wmb();
  555. cmd->status = fail ? -EIO : 0;
  556. /* Is there another i2c command waiting ? */
  557. if (!list_empty(&smu->cmd_i2c_list)) {
  558. struct smu_i2c_cmd *newcmd;
  559. /* Fetch it, new current, remove from list */
  560. newcmd = list_entry(smu->cmd_i2c_list.next,
  561. struct smu_i2c_cmd, link);
  562. smu->cmd_i2c_cur = newcmd;
  563. list_del(&cmd->link);
  564. /* Queue with low level smu */
  565. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  566. if (smu->cmd_cur == NULL)
  567. smu_start_cmd();
  568. }
  569. spin_unlock_irqrestore(&smu->lock, flags);
  570. /* Call command completion handler if any */
  571. if (done)
  572. done(cmd, misc);
  573. }
  574. static void smu_i2c_retry(unsigned long data)
  575. {
  576. struct smu_i2c_cmd *cmd = (struct smu_i2c_cmd *)data;
  577. DPRINTK("SMU: i2c failure, requeuing...\n");
  578. /* requeue command simply by resetting reply_len */
  579. cmd->pdata[0] = 0xff;
  580. cmd->scmd.reply_len = 0x10;
  581. smu_queue_cmd(&cmd->scmd);
  582. }
  583. static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
  584. {
  585. struct smu_i2c_cmd *cmd = misc;
  586. int fail = 0;
  587. DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
  588. cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
  589. /* Check for possible status */
  590. if (scmd->status < 0)
  591. fail = 1;
  592. else if (cmd->read) {
  593. if (cmd->stage == 0)
  594. fail = cmd->pdata[0] != 0;
  595. else
  596. fail = cmd->pdata[0] >= 0x80;
  597. } else {
  598. fail = cmd->pdata[0] != 0;
  599. }
  600. /* Handle failures by requeuing command, after 5ms interval
  601. */
  602. if (fail && --cmd->retries > 0) {
  603. DPRINTK("SMU: i2c failure, starting timer...\n");
  604. smu->i2c_timer.function = smu_i2c_retry;
  605. smu->i2c_timer.data = (unsigned long)cmd;
  606. smu->i2c_timer.expires = jiffies + msecs_to_jiffies(5);
  607. add_timer(&smu->i2c_timer);
  608. return;
  609. }
  610. /* If failure or stage 1, command is complete */
  611. if (fail || cmd->stage != 0) {
  612. smu_i2c_complete_command(cmd, fail);
  613. return;
  614. }
  615. DPRINTK("SMU: going to stage 1\n");
  616. /* Ok, initial command complete, now poll status */
  617. scmd->reply_buf = cmd->pdata;
  618. scmd->reply_len = 0x10;
  619. scmd->data_buf = cmd->pdata;
  620. scmd->data_len = 1;
  621. cmd->pdata[0] = 0;
  622. cmd->stage = 1;
  623. cmd->retries = 20;
  624. smu_queue_cmd(scmd);
  625. }
  626. int smu_queue_i2c(struct smu_i2c_cmd *cmd)
  627. {
  628. unsigned long flags;
  629. if (smu == NULL)
  630. return -ENODEV;
  631. /* Fill most fields of scmd */
  632. cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
  633. cmd->scmd.done = smu_i2c_low_completion;
  634. cmd->scmd.misc = cmd;
  635. cmd->scmd.reply_buf = cmd->pdata;
  636. cmd->scmd.reply_len = 0x10;
  637. cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
  638. cmd->scmd.status = 1;
  639. cmd->stage = 0;
  640. cmd->pdata[0] = 0xff;
  641. cmd->retries = 20;
  642. cmd->status = 1;
  643. /* Check transfer type, sanitize some "info" fields
  644. * based on transfer type and do more checking
  645. */
  646. cmd->info.caddr = cmd->info.devaddr;
  647. cmd->read = cmd->info.devaddr & 0x01;
  648. switch(cmd->info.type) {
  649. case SMU_I2C_TRANSFER_SIMPLE:
  650. memset(&cmd->info.sublen, 0, 4);
  651. break;
  652. case SMU_I2C_TRANSFER_COMBINED:
  653. cmd->info.devaddr &= 0xfe;
  654. case SMU_I2C_TRANSFER_STDSUB:
  655. if (cmd->info.sublen > 3)
  656. return -EINVAL;
  657. break;
  658. default:
  659. return -EINVAL;
  660. }
  661. /* Finish setting up command based on transfer direction
  662. */
  663. if (cmd->read) {
  664. if (cmd->info.datalen > SMU_I2C_READ_MAX)
  665. return -EINVAL;
  666. memset(cmd->info.data, 0xff, cmd->info.datalen);
  667. cmd->scmd.data_len = 9;
  668. } else {
  669. if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
  670. return -EINVAL;
  671. cmd->scmd.data_len = 9 + cmd->info.datalen;
  672. }
  673. DPRINTK("SMU: i2c enqueuing command\n");
  674. DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
  675. cmd->read ? "read" : "write", cmd->info.datalen,
  676. cmd->info.bus, cmd->info.caddr,
  677. cmd->info.subaddr[0], cmd->info.type);
  678. /* Enqueue command in i2c list, and if empty, enqueue also in
  679. * main command list
  680. */
  681. spin_lock_irqsave(&smu->lock, flags);
  682. if (smu->cmd_i2c_cur == NULL) {
  683. smu->cmd_i2c_cur = cmd;
  684. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  685. if (smu->cmd_cur == NULL)
  686. smu_start_cmd();
  687. } else
  688. list_add_tail(&cmd->link, &smu->cmd_i2c_list);
  689. spin_unlock_irqrestore(&smu->lock, flags);
  690. return 0;
  691. }
  692. /*
  693. * Userland driver interface
  694. */
  695. static LIST_HEAD(smu_clist);
  696. static DEFINE_SPINLOCK(smu_clist_lock);
  697. enum smu_file_mode {
  698. smu_file_commands,
  699. smu_file_events,
  700. smu_file_closing
  701. };
  702. struct smu_private
  703. {
  704. struct list_head list;
  705. enum smu_file_mode mode;
  706. int busy;
  707. struct smu_cmd cmd;
  708. spinlock_t lock;
  709. wait_queue_head_t wait;
  710. u8 buffer[SMU_MAX_DATA];
  711. };
  712. static int smu_open(struct inode *inode, struct file *file)
  713. {
  714. struct smu_private *pp;
  715. unsigned long flags;
  716. pp = kmalloc(sizeof(struct smu_private), GFP_KERNEL);
  717. if (pp == 0)
  718. return -ENOMEM;
  719. memset(pp, 0, sizeof(struct smu_private));
  720. spin_lock_init(&pp->lock);
  721. pp->mode = smu_file_commands;
  722. init_waitqueue_head(&pp->wait);
  723. spin_lock_irqsave(&smu_clist_lock, flags);
  724. list_add(&pp->list, &smu_clist);
  725. spin_unlock_irqrestore(&smu_clist_lock, flags);
  726. file->private_data = pp;
  727. return 0;
  728. }
  729. static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
  730. {
  731. struct smu_private *pp = misc;
  732. wake_up_all(&pp->wait);
  733. }
  734. static ssize_t smu_write(struct file *file, const char __user *buf,
  735. size_t count, loff_t *ppos)
  736. {
  737. struct smu_private *pp = file->private_data;
  738. unsigned long flags;
  739. struct smu_user_cmd_hdr hdr;
  740. int rc = 0;
  741. if (pp->busy)
  742. return -EBUSY;
  743. else if (copy_from_user(&hdr, buf, sizeof(hdr)))
  744. return -EFAULT;
  745. else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
  746. pp->mode = smu_file_events;
  747. return 0;
  748. } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
  749. return -EINVAL;
  750. else if (pp->mode != smu_file_commands)
  751. return -EBADFD;
  752. else if (hdr.data_len > SMU_MAX_DATA)
  753. return -EINVAL;
  754. spin_lock_irqsave(&pp->lock, flags);
  755. if (pp->busy) {
  756. spin_unlock_irqrestore(&pp->lock, flags);
  757. return -EBUSY;
  758. }
  759. pp->busy = 1;
  760. pp->cmd.status = 1;
  761. spin_unlock_irqrestore(&pp->lock, flags);
  762. if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
  763. pp->busy = 0;
  764. return -EFAULT;
  765. }
  766. pp->cmd.cmd = hdr.cmd;
  767. pp->cmd.data_len = hdr.data_len;
  768. pp->cmd.reply_len = SMU_MAX_DATA;
  769. pp->cmd.data_buf = pp->buffer;
  770. pp->cmd.reply_buf = pp->buffer;
  771. pp->cmd.done = smu_user_cmd_done;
  772. pp->cmd.misc = pp;
  773. rc = smu_queue_cmd(&pp->cmd);
  774. if (rc < 0)
  775. return rc;
  776. return count;
  777. }
  778. static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
  779. char __user *buf, size_t count)
  780. {
  781. DECLARE_WAITQUEUE(wait, current);
  782. struct smu_user_reply_hdr hdr;
  783. unsigned long flags;
  784. int size, rc = 0;
  785. if (!pp->busy)
  786. return 0;
  787. if (count < sizeof(struct smu_user_reply_hdr))
  788. return -EOVERFLOW;
  789. spin_lock_irqsave(&pp->lock, flags);
  790. if (pp->cmd.status == 1) {
  791. if (file->f_flags & O_NONBLOCK)
  792. return -EAGAIN;
  793. add_wait_queue(&pp->wait, &wait);
  794. for (;;) {
  795. set_current_state(TASK_INTERRUPTIBLE);
  796. rc = 0;
  797. if (pp->cmd.status != 1)
  798. break;
  799. rc = -ERESTARTSYS;
  800. if (signal_pending(current))
  801. break;
  802. spin_unlock_irqrestore(&pp->lock, flags);
  803. schedule();
  804. spin_lock_irqsave(&pp->lock, flags);
  805. }
  806. set_current_state(TASK_RUNNING);
  807. remove_wait_queue(&pp->wait, &wait);
  808. }
  809. spin_unlock_irqrestore(&pp->lock, flags);
  810. if (rc)
  811. return rc;
  812. if (pp->cmd.status != 0)
  813. pp->cmd.reply_len = 0;
  814. size = sizeof(hdr) + pp->cmd.reply_len;
  815. if (count < size)
  816. size = count;
  817. rc = size;
  818. hdr.status = pp->cmd.status;
  819. hdr.reply_len = pp->cmd.reply_len;
  820. if (copy_to_user(buf, &hdr, sizeof(hdr)))
  821. return -EFAULT;
  822. size -= sizeof(hdr);
  823. if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
  824. return -EFAULT;
  825. pp->busy = 0;
  826. return rc;
  827. }
  828. static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
  829. char __user *buf, size_t count)
  830. {
  831. /* Not implemented */
  832. msleep_interruptible(1000);
  833. return 0;
  834. }
  835. static ssize_t smu_read(struct file *file, char __user *buf,
  836. size_t count, loff_t *ppos)
  837. {
  838. struct smu_private *pp = file->private_data;
  839. if (pp->mode == smu_file_commands)
  840. return smu_read_command(file, pp, buf, count);
  841. if (pp->mode == smu_file_events)
  842. return smu_read_events(file, pp, buf, count);
  843. return -EBADFD;
  844. }
  845. static unsigned int smu_fpoll(struct file *file, poll_table *wait)
  846. {
  847. struct smu_private *pp = file->private_data;
  848. unsigned int mask = 0;
  849. unsigned long flags;
  850. if (pp == 0)
  851. return 0;
  852. if (pp->mode == smu_file_commands) {
  853. poll_wait(file, &pp->wait, wait);
  854. spin_lock_irqsave(&pp->lock, flags);
  855. if (pp->busy && pp->cmd.status != 1)
  856. mask |= POLLIN;
  857. spin_unlock_irqrestore(&pp->lock, flags);
  858. } if (pp->mode == smu_file_events) {
  859. /* Not yet implemented */
  860. }
  861. return mask;
  862. }
  863. static int smu_release(struct inode *inode, struct file *file)
  864. {
  865. struct smu_private *pp = file->private_data;
  866. unsigned long flags;
  867. unsigned int busy;
  868. if (pp == 0)
  869. return 0;
  870. file->private_data = NULL;
  871. /* Mark file as closing to avoid races with new request */
  872. spin_lock_irqsave(&pp->lock, flags);
  873. pp->mode = smu_file_closing;
  874. busy = pp->busy;
  875. /* Wait for any pending request to complete */
  876. if (busy && pp->cmd.status == 1) {
  877. DECLARE_WAITQUEUE(wait, current);
  878. add_wait_queue(&pp->wait, &wait);
  879. for (;;) {
  880. set_current_state(TASK_UNINTERRUPTIBLE);
  881. if (pp->cmd.status != 1)
  882. break;
  883. spin_lock_irqsave(&pp->lock, flags);
  884. schedule();
  885. spin_unlock_irqrestore(&pp->lock, flags);
  886. }
  887. set_current_state(TASK_RUNNING);
  888. remove_wait_queue(&pp->wait, &wait);
  889. }
  890. spin_unlock_irqrestore(&pp->lock, flags);
  891. spin_lock_irqsave(&smu_clist_lock, flags);
  892. list_del(&pp->list);
  893. spin_unlock_irqrestore(&smu_clist_lock, flags);
  894. kfree(pp);
  895. return 0;
  896. }
  897. static struct file_operations smu_device_fops = {
  898. .llseek = no_llseek,
  899. .read = smu_read,
  900. .write = smu_write,
  901. .poll = smu_fpoll,
  902. .open = smu_open,
  903. .release = smu_release,
  904. };
  905. static struct miscdevice pmu_device = {
  906. MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
  907. };
  908. static int smu_device_init(void)
  909. {
  910. if (!smu)
  911. return -ENODEV;
  912. if (misc_register(&pmu_device) < 0)
  913. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  914. return 0;
  915. }
  916. device_initcall(smu_device_init);