mxser.c 73 KB

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  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
  5. * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
  6. *
  7. * This code is loosely based on the 1.8 moxa driver which is based on
  8. * Linux serial driver, written by Linus Torvalds, Theodore T'so and
  9. * others.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  17. * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
  18. * - Fixed x86_64 cleanness
  19. * - Fixed sleep with spinlock held in mxser_send_break
  20. */
  21. #include <linux/module.h>
  22. #include <linux/errno.h>
  23. #include <linux/signal.h>
  24. #include <linux/sched.h>
  25. #include <linux/timer.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/tty.h>
  28. #include <linux/tty_flip.h>
  29. #include <linux/serial.h>
  30. #include <linux/serial_reg.h>
  31. #include <linux/major.h>
  32. #include <linux/string.h>
  33. #include <linux/fcntl.h>
  34. #include <linux/ptrace.h>
  35. #include <linux/gfp.h>
  36. #include <linux/ioport.h>
  37. #include <linux/mm.h>
  38. #include <linux/delay.h>
  39. #include <linux/pci.h>
  40. #include <linux/bitops.h>
  41. #include <asm/system.h>
  42. #include <asm/io.h>
  43. #include <asm/irq.h>
  44. #include <asm/uaccess.h>
  45. #include "mxser.h"
  46. #define MXSER_VERSION "2.0.4" /* 1.12 */
  47. #define MXSERMAJOR 174
  48. #define MXSERCUMAJOR 175
  49. #define MXSER_BOARDS 4 /* Max. boards */
  50. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  51. #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
  52. #define MXSER_ISR_PASS_LIMIT 100
  53. #define MXSER_ERR_IOADDR -1
  54. #define MXSER_ERR_IRQ -2
  55. #define MXSER_ERR_IRQ_CONFLIT -3
  56. #define MXSER_ERR_VECTOR -4
  57. /*CheckIsMoxaMust return value*/
  58. #define MOXA_OTHER_UART 0x00
  59. #define MOXA_MUST_MU150_HWID 0x01
  60. #define MOXA_MUST_MU860_HWID 0x02
  61. #define WAKEUP_CHARS 256
  62. #define UART_MCR_AFE 0x20
  63. #define UART_LSR_SPECIAL 0x1E
  64. #define PCI_DEVICE_ID_POS104UL 0x1044
  65. #define PCI_DEVICE_ID_CB108 0x1080
  66. #define PCI_DEVICE_ID_CP102UF 0x1023
  67. #define PCI_DEVICE_ID_CB114 0x1142
  68. #define PCI_DEVICE_ID_CP114UL 0x1143
  69. #define PCI_DEVICE_ID_CB134I 0x1341
  70. #define PCI_DEVICE_ID_CP138U 0x1380
  71. #define C168_ASIC_ID 1
  72. #define C104_ASIC_ID 2
  73. #define C102_ASIC_ID 0xB
  74. #define CI132_ASIC_ID 4
  75. #define CI134_ASIC_ID 3
  76. #define CI104J_ASIC_ID 5
  77. #define MXSER_HIGHBAUD 1
  78. #define MXSER_HAS2 2
  79. /* This is only for PCI */
  80. static const struct {
  81. int type;
  82. int tx_fifo;
  83. int rx_fifo;
  84. int xmit_fifo_size;
  85. int rx_high_water;
  86. int rx_trigger;
  87. int rx_low_water;
  88. long max_baud;
  89. } Gpci_uart_info[] = {
  90. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  91. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  92. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  93. };
  94. #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
  95. struct mxser_cardinfo {
  96. char *name;
  97. unsigned int nports;
  98. unsigned int flags;
  99. };
  100. static const struct mxser_cardinfo mxser_cards[] = {
  101. /* 0*/ { "C168 series", 8, },
  102. { "C104 series", 4, },
  103. { "CI-104J series", 4, },
  104. { "C168H/PCI series", 8, },
  105. { "C104H/PCI series", 4, },
  106. /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
  107. { "CI-132 series", 4, MXSER_HAS2 },
  108. { "CI-134 series", 4, },
  109. { "CP-132 series", 2, },
  110. { "CP-114 series", 4, },
  111. /*10*/ { "CT-114 series", 4, },
  112. { "CP-102 series", 2, MXSER_HIGHBAUD },
  113. { "CP-104U series", 4, },
  114. { "CP-168U series", 8, },
  115. { "CP-132U series", 2, },
  116. /*15*/ { "CP-134U series", 4, },
  117. { "CP-104JU series", 4, },
  118. { "Moxa UC7000 Serial", 8, }, /* RC7000 */
  119. { "CP-118U series", 8, },
  120. { "CP-102UL series", 2, },
  121. /*20*/ { "CP-102U series", 2, },
  122. { "CP-118EL series", 8, },
  123. { "CP-168EL series", 8, },
  124. { "CP-104EL series", 4, },
  125. { "CB-108 series", 8, },
  126. /*25*/ { "CB-114 series", 4, },
  127. { "CB-134I series", 4, },
  128. { "CP-138U series", 8, },
  129. { "POS-104UL series", 4, },
  130. { "CP-114UL series", 4, },
  131. /*30*/ { "CP-102UF series", 2, }
  132. };
  133. /* driver_data correspond to the lines in the structure above
  134. see also ISA probe function before you change something */
  135. static struct pci_device_id mxser_pcibrds[] = {
  136. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
  137. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
  138. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
  139. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
  140. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
  141. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
  142. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
  143. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
  144. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
  145. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
  146. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
  147. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
  148. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
  149. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
  150. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
  151. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
  152. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
  153. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
  154. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
  155. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
  156. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
  157. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
  158. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
  159. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
  160. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
  161. { }
  162. };
  163. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  164. static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
  165. static int ttymajor = MXSERMAJOR;
  166. /* Variables for insmod */
  167. MODULE_AUTHOR("Casper Yang");
  168. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  169. module_param_array(ioaddr, int, NULL, 0);
  170. module_param(ttymajor, int, 0);
  171. MODULE_LICENSE("GPL");
  172. struct mxser_log {
  173. int tick;
  174. unsigned long rxcnt[MXSER_PORTS];
  175. unsigned long txcnt[MXSER_PORTS];
  176. };
  177. struct mxser_mon {
  178. unsigned long rxcnt;
  179. unsigned long txcnt;
  180. unsigned long up_rxcnt;
  181. unsigned long up_txcnt;
  182. int modem_status;
  183. unsigned char hold_reason;
  184. };
  185. struct mxser_mon_ext {
  186. unsigned long rx_cnt[32];
  187. unsigned long tx_cnt[32];
  188. unsigned long up_rxcnt[32];
  189. unsigned long up_txcnt[32];
  190. int modem_status[32];
  191. long baudrate[32];
  192. int databits[32];
  193. int stopbits[32];
  194. int parity[32];
  195. int flowctrl[32];
  196. int fifo[32];
  197. int iftype[32];
  198. };
  199. struct mxser_board;
  200. struct mxser_port {
  201. struct tty_port port;
  202. struct mxser_board *board;
  203. unsigned long ioaddr;
  204. unsigned long opmode_ioaddr;
  205. int max_baud;
  206. int rx_high_water;
  207. int rx_trigger; /* Rx fifo trigger level */
  208. int rx_low_water;
  209. int baud_base; /* max. speed */
  210. int type; /* UART type */
  211. int x_char; /* xon/xoff character */
  212. int IER; /* Interrupt Enable Register */
  213. int MCR; /* Modem control register */
  214. unsigned char stop_rx;
  215. unsigned char ldisc_stop_rx;
  216. int custom_divisor;
  217. unsigned char err_shadow;
  218. struct async_icount icount; /* kernel counters for 4 input interrupts */
  219. int timeout;
  220. int read_status_mask;
  221. int ignore_status_mask;
  222. int xmit_fifo_size;
  223. int xmit_head;
  224. int xmit_tail;
  225. int xmit_cnt;
  226. struct ktermios normal_termios;
  227. struct mxser_mon mon_data;
  228. spinlock_t slock;
  229. wait_queue_head_t delta_msr_wait;
  230. };
  231. struct mxser_board {
  232. unsigned int idx;
  233. int irq;
  234. const struct mxser_cardinfo *info;
  235. unsigned long vector;
  236. unsigned long vector_mask;
  237. int chip_flag;
  238. int uart_type;
  239. struct mxser_port ports[MXSER_PORTS_PER_BOARD];
  240. };
  241. struct mxser_mstatus {
  242. tcflag_t cflag;
  243. int cts;
  244. int dsr;
  245. int ri;
  246. int dcd;
  247. };
  248. static struct mxser_mstatus GMStatus[MXSER_PORTS];
  249. static int mxserBoardCAP[MXSER_BOARDS] = {
  250. 0, 0, 0, 0
  251. /* 0x180, 0x280, 0x200, 0x320 */
  252. };
  253. static struct mxser_board mxser_boards[MXSER_BOARDS];
  254. static struct tty_driver *mxvar_sdriver;
  255. static struct mxser_log mxvar_log;
  256. static int mxvar_diagflag;
  257. static unsigned char mxser_msr[MXSER_PORTS + 1];
  258. static struct mxser_mon_ext mon_data_ext;
  259. static int mxser_set_baud_method[MXSER_PORTS + 1];
  260. static void mxser_enable_must_enchance_mode(unsigned long baseio)
  261. {
  262. u8 oldlcr;
  263. u8 efr;
  264. oldlcr = inb(baseio + UART_LCR);
  265. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  266. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  267. efr |= MOXA_MUST_EFR_EFRB_ENABLE;
  268. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  269. outb(oldlcr, baseio + UART_LCR);
  270. }
  271. static void mxser_disable_must_enchance_mode(unsigned long baseio)
  272. {
  273. u8 oldlcr;
  274. u8 efr;
  275. oldlcr = inb(baseio + UART_LCR);
  276. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  277. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  278. efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
  279. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  280. outb(oldlcr, baseio + UART_LCR);
  281. }
  282. static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
  283. {
  284. u8 oldlcr;
  285. u8 efr;
  286. oldlcr = inb(baseio + UART_LCR);
  287. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  288. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  289. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  290. efr |= MOXA_MUST_EFR_BANK0;
  291. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  292. outb(value, baseio + MOXA_MUST_XON1_REGISTER);
  293. outb(oldlcr, baseio + UART_LCR);
  294. }
  295. static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
  296. {
  297. u8 oldlcr;
  298. u8 efr;
  299. oldlcr = inb(baseio + UART_LCR);
  300. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  301. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  302. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  303. efr |= MOXA_MUST_EFR_BANK0;
  304. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  305. outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
  306. outb(oldlcr, baseio + UART_LCR);
  307. }
  308. static void mxser_set_must_fifo_value(struct mxser_port *info)
  309. {
  310. u8 oldlcr;
  311. u8 efr;
  312. oldlcr = inb(info->ioaddr + UART_LCR);
  313. outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
  314. efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
  315. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  316. efr |= MOXA_MUST_EFR_BANK1;
  317. outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
  318. outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
  319. outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
  320. outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
  321. outb(oldlcr, info->ioaddr + UART_LCR);
  322. }
  323. static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
  324. {
  325. u8 oldlcr;
  326. u8 efr;
  327. oldlcr = inb(baseio + UART_LCR);
  328. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  329. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  330. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  331. efr |= MOXA_MUST_EFR_BANK2;
  332. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  333. outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
  334. outb(oldlcr, baseio + UART_LCR);
  335. }
  336. static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
  337. {
  338. u8 oldlcr;
  339. u8 efr;
  340. oldlcr = inb(baseio + UART_LCR);
  341. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  342. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  343. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  344. efr |= MOXA_MUST_EFR_BANK2;
  345. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  346. *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
  347. outb(oldlcr, baseio + UART_LCR);
  348. }
  349. static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
  350. {
  351. u8 oldlcr;
  352. u8 efr;
  353. oldlcr = inb(baseio + UART_LCR);
  354. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  355. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  356. efr &= ~MOXA_MUST_EFR_SF_MASK;
  357. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  358. outb(oldlcr, baseio + UART_LCR);
  359. }
  360. static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
  361. {
  362. u8 oldlcr;
  363. u8 efr;
  364. oldlcr = inb(baseio + UART_LCR);
  365. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  366. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  367. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  368. efr |= MOXA_MUST_EFR_SF_TX1;
  369. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  370. outb(oldlcr, baseio + UART_LCR);
  371. }
  372. static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
  373. {
  374. u8 oldlcr;
  375. u8 efr;
  376. oldlcr = inb(baseio + UART_LCR);
  377. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  378. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  379. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  380. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  381. outb(oldlcr, baseio + UART_LCR);
  382. }
  383. static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
  384. {
  385. u8 oldlcr;
  386. u8 efr;
  387. oldlcr = inb(baseio + UART_LCR);
  388. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  389. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  390. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  391. efr |= MOXA_MUST_EFR_SF_RX1;
  392. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  393. outb(oldlcr, baseio + UART_LCR);
  394. }
  395. static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
  396. {
  397. u8 oldlcr;
  398. u8 efr;
  399. oldlcr = inb(baseio + UART_LCR);
  400. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  401. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  402. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  403. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  404. outb(oldlcr, baseio + UART_LCR);
  405. }
  406. #ifdef CONFIG_PCI
  407. static int __devinit CheckIsMoxaMust(unsigned long io)
  408. {
  409. u8 oldmcr, hwid;
  410. int i;
  411. outb(0, io + UART_LCR);
  412. mxser_disable_must_enchance_mode(io);
  413. oldmcr = inb(io + UART_MCR);
  414. outb(0, io + UART_MCR);
  415. mxser_set_must_xon1_value(io, 0x11);
  416. if ((hwid = inb(io + UART_MCR)) != 0) {
  417. outb(oldmcr, io + UART_MCR);
  418. return MOXA_OTHER_UART;
  419. }
  420. mxser_get_must_hardware_id(io, &hwid);
  421. for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
  422. if (hwid == Gpci_uart_info[i].type)
  423. return (int)hwid;
  424. }
  425. return MOXA_OTHER_UART;
  426. }
  427. #endif
  428. static void process_txrx_fifo(struct mxser_port *info)
  429. {
  430. int i;
  431. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  432. info->rx_trigger = 1;
  433. info->rx_high_water = 1;
  434. info->rx_low_water = 1;
  435. info->xmit_fifo_size = 1;
  436. } else
  437. for (i = 0; i < UART_INFO_NUM; i++)
  438. if (info->board->chip_flag == Gpci_uart_info[i].type) {
  439. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  440. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  441. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  442. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  443. break;
  444. }
  445. }
  446. static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
  447. {
  448. unsigned char status = 0;
  449. status = inb(baseaddr + UART_MSR);
  450. mxser_msr[port] &= 0x0F;
  451. mxser_msr[port] |= status;
  452. status = mxser_msr[port];
  453. if (mode)
  454. mxser_msr[port] = 0;
  455. return status;
  456. }
  457. static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
  458. struct mxser_port *port)
  459. {
  460. DECLARE_WAITQUEUE(wait, current);
  461. int retval;
  462. int do_clocal = 0;
  463. unsigned long flags;
  464. /*
  465. * If non-blocking mode is set, or the port is not enabled,
  466. * then make the check up front and then exit.
  467. */
  468. if ((filp->f_flags & O_NONBLOCK) ||
  469. test_bit(TTY_IO_ERROR, &tty->flags)) {
  470. port->port.flags |= ASYNC_NORMAL_ACTIVE;
  471. return 0;
  472. }
  473. if (tty->termios->c_cflag & CLOCAL)
  474. do_clocal = 1;
  475. /*
  476. * Block waiting for the carrier detect and the line to become
  477. * free (i.e., not in use by the callout). While we are in
  478. * this loop, port->port.count is dropped by one, so that
  479. * mxser_close() knows when to free things. We restore it upon
  480. * exit, either normal or abnormal.
  481. */
  482. retval = 0;
  483. add_wait_queue(&port->port.open_wait, &wait);
  484. spin_lock_irqsave(&port->slock, flags);
  485. if (!tty_hung_up_p(filp))
  486. port->port.count--;
  487. spin_unlock_irqrestore(&port->slock, flags);
  488. port->port.blocked_open++;
  489. while (1) {
  490. spin_lock_irqsave(&port->slock, flags);
  491. outb(inb(port->ioaddr + UART_MCR) |
  492. UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
  493. spin_unlock_irqrestore(&port->slock, flags);
  494. set_current_state(TASK_INTERRUPTIBLE);
  495. if (tty_hung_up_p(filp) || !(port->port.flags & ASYNC_INITIALIZED)) {
  496. if (port->port.flags & ASYNC_HUP_NOTIFY)
  497. retval = -EAGAIN;
  498. else
  499. retval = -ERESTARTSYS;
  500. break;
  501. }
  502. if (!(port->port.flags & ASYNC_CLOSING) &&
  503. (do_clocal ||
  504. (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
  505. break;
  506. if (signal_pending(current)) {
  507. retval = -ERESTARTSYS;
  508. break;
  509. }
  510. schedule();
  511. }
  512. set_current_state(TASK_RUNNING);
  513. remove_wait_queue(&port->port.open_wait, &wait);
  514. if (!tty_hung_up_p(filp))
  515. port->port.count++;
  516. port->port.blocked_open--;
  517. if (retval)
  518. return retval;
  519. port->port.flags |= ASYNC_NORMAL_ACTIVE;
  520. return 0;
  521. }
  522. static int mxser_set_baud(struct mxser_port *info, long newspd)
  523. {
  524. int quot = 0, baud;
  525. unsigned char cval;
  526. if (!info->port.tty || !info->port.tty->termios)
  527. return -1;
  528. if (!(info->ioaddr))
  529. return -1;
  530. if (newspd > info->max_baud)
  531. return -1;
  532. if (newspd == 134) {
  533. quot = 2 * info->baud_base / 269;
  534. tty_encode_baud_rate(info->port.tty, 134, 134);
  535. } else if (newspd) {
  536. quot = info->baud_base / newspd;
  537. if (quot == 0)
  538. quot = 1;
  539. baud = info->baud_base/quot;
  540. tty_encode_baud_rate(info->port.tty, baud, baud);
  541. } else {
  542. quot = 0;
  543. }
  544. info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
  545. info->timeout += HZ / 50; /* Add .02 seconds of slop */
  546. if (quot) {
  547. info->MCR |= UART_MCR_DTR;
  548. outb(info->MCR, info->ioaddr + UART_MCR);
  549. } else {
  550. info->MCR &= ~UART_MCR_DTR;
  551. outb(info->MCR, info->ioaddr + UART_MCR);
  552. return 0;
  553. }
  554. cval = inb(info->ioaddr + UART_LCR);
  555. outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
  556. outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
  557. outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
  558. outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
  559. #ifdef BOTHER
  560. if (C_BAUD(info->port.tty) == BOTHER) {
  561. quot = info->baud_base % newspd;
  562. quot *= 8;
  563. if (quot % newspd > newspd / 2) {
  564. quot /= newspd;
  565. quot++;
  566. } else
  567. quot /= newspd;
  568. mxser_set_must_enum_value(info->ioaddr, quot);
  569. } else
  570. #endif
  571. mxser_set_must_enum_value(info->ioaddr, 0);
  572. return 0;
  573. }
  574. /*
  575. * This routine is called to set the UART divisor registers to match
  576. * the specified baud rate for a serial port.
  577. */
  578. static int mxser_change_speed(struct mxser_port *info,
  579. struct ktermios *old_termios)
  580. {
  581. unsigned cflag, cval, fcr;
  582. int ret = 0;
  583. unsigned char status;
  584. if (!info->port.tty || !info->port.tty->termios)
  585. return ret;
  586. cflag = info->port.tty->termios->c_cflag;
  587. if (!(info->ioaddr))
  588. return ret;
  589. if (mxser_set_baud_method[info->port.tty->index] == 0)
  590. mxser_set_baud(info, tty_get_baud_rate(info->port.tty));
  591. /* byte size and parity */
  592. switch (cflag & CSIZE) {
  593. case CS5:
  594. cval = 0x00;
  595. break;
  596. case CS6:
  597. cval = 0x01;
  598. break;
  599. case CS7:
  600. cval = 0x02;
  601. break;
  602. case CS8:
  603. cval = 0x03;
  604. break;
  605. default:
  606. cval = 0x00;
  607. break; /* too keep GCC shut... */
  608. }
  609. if (cflag & CSTOPB)
  610. cval |= 0x04;
  611. if (cflag & PARENB)
  612. cval |= UART_LCR_PARITY;
  613. if (!(cflag & PARODD))
  614. cval |= UART_LCR_EPAR;
  615. if (cflag & CMSPAR)
  616. cval |= UART_LCR_SPAR;
  617. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  618. if (info->board->chip_flag) {
  619. fcr = UART_FCR_ENABLE_FIFO;
  620. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  621. mxser_set_must_fifo_value(info);
  622. } else
  623. fcr = 0;
  624. } else {
  625. fcr = UART_FCR_ENABLE_FIFO;
  626. if (info->board->chip_flag) {
  627. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  628. mxser_set_must_fifo_value(info);
  629. } else {
  630. switch (info->rx_trigger) {
  631. case 1:
  632. fcr |= UART_FCR_TRIGGER_1;
  633. break;
  634. case 4:
  635. fcr |= UART_FCR_TRIGGER_4;
  636. break;
  637. case 8:
  638. fcr |= UART_FCR_TRIGGER_8;
  639. break;
  640. default:
  641. fcr |= UART_FCR_TRIGGER_14;
  642. break;
  643. }
  644. }
  645. }
  646. /* CTS flow control flag and modem status interrupts */
  647. info->IER &= ~UART_IER_MSI;
  648. info->MCR &= ~UART_MCR_AFE;
  649. if (cflag & CRTSCTS) {
  650. info->port.flags |= ASYNC_CTS_FLOW;
  651. info->IER |= UART_IER_MSI;
  652. if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
  653. info->MCR |= UART_MCR_AFE;
  654. } else {
  655. status = inb(info->ioaddr + UART_MSR);
  656. if (info->port.tty->hw_stopped) {
  657. if (status & UART_MSR_CTS) {
  658. info->port.tty->hw_stopped = 0;
  659. if (info->type != PORT_16550A &&
  660. !info->board->chip_flag) {
  661. outb(info->IER & ~UART_IER_THRI,
  662. info->ioaddr +
  663. UART_IER);
  664. info->IER |= UART_IER_THRI;
  665. outb(info->IER, info->ioaddr +
  666. UART_IER);
  667. }
  668. tty_wakeup(info->port.tty);
  669. }
  670. } else {
  671. if (!(status & UART_MSR_CTS)) {
  672. info->port.tty->hw_stopped = 1;
  673. if ((info->type != PORT_16550A) &&
  674. (!info->board->chip_flag)) {
  675. info->IER &= ~UART_IER_THRI;
  676. outb(info->IER, info->ioaddr +
  677. UART_IER);
  678. }
  679. }
  680. }
  681. }
  682. } else {
  683. info->port.flags &= ~ASYNC_CTS_FLOW;
  684. }
  685. outb(info->MCR, info->ioaddr + UART_MCR);
  686. if (cflag & CLOCAL) {
  687. info->port.flags &= ~ASYNC_CHECK_CD;
  688. } else {
  689. info->port.flags |= ASYNC_CHECK_CD;
  690. info->IER |= UART_IER_MSI;
  691. }
  692. outb(info->IER, info->ioaddr + UART_IER);
  693. /*
  694. * Set up parity check flag
  695. */
  696. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  697. if (I_INPCK(info->port.tty))
  698. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  699. if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
  700. info->read_status_mask |= UART_LSR_BI;
  701. info->ignore_status_mask = 0;
  702. if (I_IGNBRK(info->port.tty)) {
  703. info->ignore_status_mask |= UART_LSR_BI;
  704. info->read_status_mask |= UART_LSR_BI;
  705. /*
  706. * If we're ignore parity and break indicators, ignore
  707. * overruns too. (For real raw support).
  708. */
  709. if (I_IGNPAR(info->port.tty)) {
  710. info->ignore_status_mask |=
  711. UART_LSR_OE |
  712. UART_LSR_PE |
  713. UART_LSR_FE;
  714. info->read_status_mask |=
  715. UART_LSR_OE |
  716. UART_LSR_PE |
  717. UART_LSR_FE;
  718. }
  719. }
  720. if (info->board->chip_flag) {
  721. mxser_set_must_xon1_value(info->ioaddr, START_CHAR(info->port.tty));
  722. mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(info->port.tty));
  723. if (I_IXON(info->port.tty)) {
  724. mxser_enable_must_rx_software_flow_control(
  725. info->ioaddr);
  726. } else {
  727. mxser_disable_must_rx_software_flow_control(
  728. info->ioaddr);
  729. }
  730. if (I_IXOFF(info->port.tty)) {
  731. mxser_enable_must_tx_software_flow_control(
  732. info->ioaddr);
  733. } else {
  734. mxser_disable_must_tx_software_flow_control(
  735. info->ioaddr);
  736. }
  737. }
  738. outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
  739. outb(cval, info->ioaddr + UART_LCR);
  740. return ret;
  741. }
  742. static void mxser_check_modem_status(struct mxser_port *port, int status)
  743. {
  744. /* update input line counters */
  745. if (status & UART_MSR_TERI)
  746. port->icount.rng++;
  747. if (status & UART_MSR_DDSR)
  748. port->icount.dsr++;
  749. if (status & UART_MSR_DDCD)
  750. port->icount.dcd++;
  751. if (status & UART_MSR_DCTS)
  752. port->icount.cts++;
  753. port->mon_data.modem_status = status;
  754. wake_up_interruptible(&port->delta_msr_wait);
  755. if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  756. if (status & UART_MSR_DCD)
  757. wake_up_interruptible(&port->port.open_wait);
  758. }
  759. if (port->port.flags & ASYNC_CTS_FLOW) {
  760. if (port->port.tty->hw_stopped) {
  761. if (status & UART_MSR_CTS) {
  762. port->port.tty->hw_stopped = 0;
  763. if ((port->type != PORT_16550A) &&
  764. (!port->board->chip_flag)) {
  765. outb(port->IER & ~UART_IER_THRI,
  766. port->ioaddr + UART_IER);
  767. port->IER |= UART_IER_THRI;
  768. outb(port->IER, port->ioaddr +
  769. UART_IER);
  770. }
  771. tty_wakeup(port->port.tty);
  772. }
  773. } else {
  774. if (!(status & UART_MSR_CTS)) {
  775. port->port.tty->hw_stopped = 1;
  776. if (port->type != PORT_16550A &&
  777. !port->board->chip_flag) {
  778. port->IER &= ~UART_IER_THRI;
  779. outb(port->IER, port->ioaddr +
  780. UART_IER);
  781. }
  782. }
  783. }
  784. }
  785. }
  786. static int mxser_startup(struct mxser_port *info)
  787. {
  788. unsigned long page;
  789. unsigned long flags;
  790. page = __get_free_page(GFP_KERNEL);
  791. if (!page)
  792. return -ENOMEM;
  793. spin_lock_irqsave(&info->slock, flags);
  794. if (info->port.flags & ASYNC_INITIALIZED) {
  795. free_page(page);
  796. spin_unlock_irqrestore(&info->slock, flags);
  797. return 0;
  798. }
  799. if (!info->ioaddr || !info->type) {
  800. if (info->port.tty)
  801. set_bit(TTY_IO_ERROR, &info->port.tty->flags);
  802. free_page(page);
  803. spin_unlock_irqrestore(&info->slock, flags);
  804. return 0;
  805. }
  806. if (info->port.xmit_buf)
  807. free_page(page);
  808. else
  809. info->port.xmit_buf = (unsigned char *) page;
  810. /*
  811. * Clear the FIFO buffers and disable them
  812. * (they will be reenabled in mxser_change_speed())
  813. */
  814. if (info->board->chip_flag)
  815. outb((UART_FCR_CLEAR_RCVR |
  816. UART_FCR_CLEAR_XMIT |
  817. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
  818. else
  819. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  820. info->ioaddr + UART_FCR);
  821. /*
  822. * At this point there's no way the LSR could still be 0xFF;
  823. * if it is, then bail out, because there's likely no UART
  824. * here.
  825. */
  826. if (inb(info->ioaddr + UART_LSR) == 0xff) {
  827. spin_unlock_irqrestore(&info->slock, flags);
  828. if (capable(CAP_SYS_ADMIN)) {
  829. if (info->port.tty)
  830. set_bit(TTY_IO_ERROR, &info->port.tty->flags);
  831. return 0;
  832. } else
  833. return -ENODEV;
  834. }
  835. /*
  836. * Clear the interrupt registers.
  837. */
  838. (void) inb(info->ioaddr + UART_LSR);
  839. (void) inb(info->ioaddr + UART_RX);
  840. (void) inb(info->ioaddr + UART_IIR);
  841. (void) inb(info->ioaddr + UART_MSR);
  842. /*
  843. * Now, initialize the UART
  844. */
  845. outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
  846. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  847. outb(info->MCR, info->ioaddr + UART_MCR);
  848. /*
  849. * Finally, enable interrupts
  850. */
  851. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  852. if (info->board->chip_flag)
  853. info->IER |= MOXA_MUST_IER_EGDAI;
  854. outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
  855. /*
  856. * And clear the interrupt registers again for luck.
  857. */
  858. (void) inb(info->ioaddr + UART_LSR);
  859. (void) inb(info->ioaddr + UART_RX);
  860. (void) inb(info->ioaddr + UART_IIR);
  861. (void) inb(info->ioaddr + UART_MSR);
  862. if (info->port.tty)
  863. clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
  864. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  865. /*
  866. * and set the speed of the serial port
  867. */
  868. mxser_change_speed(info, NULL);
  869. info->port.flags |= ASYNC_INITIALIZED;
  870. spin_unlock_irqrestore(&info->slock, flags);
  871. return 0;
  872. }
  873. /*
  874. * This routine will shutdown a serial port; interrupts maybe disabled, and
  875. * DTR is dropped if the hangup on close termio flag is on.
  876. */
  877. static void mxser_shutdown(struct mxser_port *info)
  878. {
  879. unsigned long flags;
  880. if (!(info->port.flags & ASYNC_INITIALIZED))
  881. return;
  882. spin_lock_irqsave(&info->slock, flags);
  883. /*
  884. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  885. * here so the queue might never be waken up
  886. */
  887. wake_up_interruptible(&info->delta_msr_wait);
  888. /*
  889. * Free the IRQ, if necessary
  890. */
  891. if (info->port.xmit_buf) {
  892. free_page((unsigned long) info->port.xmit_buf);
  893. info->port.xmit_buf = NULL;
  894. }
  895. info->IER = 0;
  896. outb(0x00, info->ioaddr + UART_IER);
  897. if (!info->port.tty || (info->port.tty->termios->c_cflag & HUPCL))
  898. info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
  899. outb(info->MCR, info->ioaddr + UART_MCR);
  900. /* clear Rx/Tx FIFO's */
  901. if (info->board->chip_flag)
  902. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
  903. MOXA_MUST_FCR_GDA_MODE_ENABLE,
  904. info->ioaddr + UART_FCR);
  905. else
  906. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
  907. info->ioaddr + UART_FCR);
  908. /* read data port to reset things */
  909. (void) inb(info->ioaddr + UART_RX);
  910. if (info->port.tty)
  911. set_bit(TTY_IO_ERROR, &info->port.tty->flags);
  912. info->port.flags &= ~ASYNC_INITIALIZED;
  913. if (info->board->chip_flag)
  914. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  915. spin_unlock_irqrestore(&info->slock, flags);
  916. }
  917. /*
  918. * This routine is called whenever a serial port is opened. It
  919. * enables interrupts for a serial port, linking in its async structure into
  920. * the IRQ chain. It also performs the serial-specific
  921. * initialization for the tty structure.
  922. */
  923. static int mxser_open(struct tty_struct *tty, struct file *filp)
  924. {
  925. struct mxser_port *info;
  926. unsigned long flags;
  927. int retval, line;
  928. line = tty->index;
  929. if (line == MXSER_PORTS)
  930. return 0;
  931. if (line < 0 || line > MXSER_PORTS)
  932. return -ENODEV;
  933. info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
  934. if (!info->ioaddr)
  935. return -ENODEV;
  936. tty->driver_data = info;
  937. info->port.tty = tty;
  938. /*
  939. * Start up serial port
  940. */
  941. spin_lock_irqsave(&info->slock, flags);
  942. info->port.count++;
  943. spin_unlock_irqrestore(&info->slock, flags);
  944. retval = mxser_startup(info);
  945. if (retval)
  946. return retval;
  947. retval = mxser_block_til_ready(tty, filp, info);
  948. if (retval)
  949. return retval;
  950. /* unmark here for very high baud rate (ex. 921600 bps) used */
  951. tty->low_latency = 1;
  952. return 0;
  953. }
  954. static void mxser_flush_buffer(struct tty_struct *tty)
  955. {
  956. struct mxser_port *info = tty->driver_data;
  957. char fcr;
  958. unsigned long flags;
  959. spin_lock_irqsave(&info->slock, flags);
  960. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  961. fcr = inb(info->ioaddr + UART_FCR);
  962. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  963. info->ioaddr + UART_FCR);
  964. outb(fcr, info->ioaddr + UART_FCR);
  965. spin_unlock_irqrestore(&info->slock, flags);
  966. tty_wakeup(tty);
  967. }
  968. /*
  969. * This routine is called when the serial port gets closed. First, we
  970. * wait for the last remaining data to be sent. Then, we unlink its
  971. * async structure from the interrupt chain if necessary, and we free
  972. * that IRQ if nothing is left in the chain.
  973. */
  974. static void mxser_close(struct tty_struct *tty, struct file *filp)
  975. {
  976. struct mxser_port *info = tty->driver_data;
  977. unsigned long timeout;
  978. unsigned long flags;
  979. if (tty->index == MXSER_PORTS)
  980. return;
  981. if (!info)
  982. return;
  983. spin_lock_irqsave(&info->slock, flags);
  984. if (tty_hung_up_p(filp)) {
  985. spin_unlock_irqrestore(&info->slock, flags);
  986. return;
  987. }
  988. if ((tty->count == 1) && (info->port.count != 1)) {
  989. /*
  990. * Uh, oh. tty->count is 1, which means that the tty
  991. * structure will be freed. Info->port.count should always
  992. * be one in these conditions. If it's greater than
  993. * one, we've got real problems, since it means the
  994. * serial port won't be shutdown.
  995. */
  996. printk(KERN_ERR "mxser_close: bad serial port count; "
  997. "tty->count is 1, info->port.count is %d\n", info->port.count);
  998. info->port.count = 1;
  999. }
  1000. if (--info->port.count < 0) {
  1001. printk(KERN_ERR "mxser_close: bad serial port count for "
  1002. "ttys%d: %d\n", tty->index, info->port.count);
  1003. info->port.count = 0;
  1004. }
  1005. if (info->port.count) {
  1006. spin_unlock_irqrestore(&info->slock, flags);
  1007. return;
  1008. }
  1009. info->port.flags |= ASYNC_CLOSING;
  1010. spin_unlock_irqrestore(&info->slock, flags);
  1011. /*
  1012. * Save the termios structure, since this port may have
  1013. * separate termios for callout and dialin.
  1014. */
  1015. if (info->port.flags & ASYNC_NORMAL_ACTIVE)
  1016. info->normal_termios = *tty->termios;
  1017. /*
  1018. * Now we wait for the transmit buffer to clear; and we notify
  1019. * the line discipline to only process XON/XOFF characters.
  1020. */
  1021. tty->closing = 1;
  1022. if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE)
  1023. tty_wait_until_sent(tty, info->port.closing_wait);
  1024. /*
  1025. * At this point we stop accepting input. To do this, we
  1026. * disable the receive line status interrupts, and tell the
  1027. * interrupt driver to stop checking the data ready bit in the
  1028. * line status register.
  1029. */
  1030. info->IER &= ~UART_IER_RLSI;
  1031. if (info->board->chip_flag)
  1032. info->IER &= ~MOXA_MUST_RECV_ISR;
  1033. if (info->port.flags & ASYNC_INITIALIZED) {
  1034. outb(info->IER, info->ioaddr + UART_IER);
  1035. /*
  1036. * Before we drop DTR, make sure the UART transmitter
  1037. * has completely drained; this is especially
  1038. * important if there is a transmit FIFO!
  1039. */
  1040. timeout = jiffies + HZ;
  1041. while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
  1042. schedule_timeout_interruptible(5);
  1043. if (time_after(jiffies, timeout))
  1044. break;
  1045. }
  1046. }
  1047. mxser_shutdown(info);
  1048. mxser_flush_buffer(tty);
  1049. tty_ldisc_flush(tty);
  1050. tty->closing = 0;
  1051. info->port.tty = NULL;
  1052. if (info->port.blocked_open) {
  1053. if (info->port.close_delay)
  1054. schedule_timeout_interruptible(info->port.close_delay);
  1055. wake_up_interruptible(&info->port.open_wait);
  1056. }
  1057. info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
  1058. }
  1059. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  1060. {
  1061. int c, total = 0;
  1062. struct mxser_port *info = tty->driver_data;
  1063. unsigned long flags;
  1064. if (!info->port.xmit_buf)
  1065. return 0;
  1066. while (1) {
  1067. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  1068. SERIAL_XMIT_SIZE - info->xmit_head));
  1069. if (c <= 0)
  1070. break;
  1071. memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
  1072. spin_lock_irqsave(&info->slock, flags);
  1073. info->xmit_head = (info->xmit_head + c) &
  1074. (SERIAL_XMIT_SIZE - 1);
  1075. info->xmit_cnt += c;
  1076. spin_unlock_irqrestore(&info->slock, flags);
  1077. buf += c;
  1078. count -= c;
  1079. total += c;
  1080. }
  1081. if (info->xmit_cnt && !tty->stopped) {
  1082. if (!tty->hw_stopped ||
  1083. (info->type == PORT_16550A) ||
  1084. (info->board->chip_flag)) {
  1085. spin_lock_irqsave(&info->slock, flags);
  1086. outb(info->IER & ~UART_IER_THRI, info->ioaddr +
  1087. UART_IER);
  1088. info->IER |= UART_IER_THRI;
  1089. outb(info->IER, info->ioaddr + UART_IER);
  1090. spin_unlock_irqrestore(&info->slock, flags);
  1091. }
  1092. }
  1093. return total;
  1094. }
  1095. static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
  1096. {
  1097. struct mxser_port *info = tty->driver_data;
  1098. unsigned long flags;
  1099. if (!info->port.xmit_buf)
  1100. return 0;
  1101. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  1102. return 0;
  1103. spin_lock_irqsave(&info->slock, flags);
  1104. info->port.xmit_buf[info->xmit_head++] = ch;
  1105. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  1106. info->xmit_cnt++;
  1107. spin_unlock_irqrestore(&info->slock, flags);
  1108. if (!tty->stopped) {
  1109. if (!tty->hw_stopped ||
  1110. (info->type == PORT_16550A) ||
  1111. info->board->chip_flag) {
  1112. spin_lock_irqsave(&info->slock, flags);
  1113. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1114. info->IER |= UART_IER_THRI;
  1115. outb(info->IER, info->ioaddr + UART_IER);
  1116. spin_unlock_irqrestore(&info->slock, flags);
  1117. }
  1118. }
  1119. return 1;
  1120. }
  1121. static void mxser_flush_chars(struct tty_struct *tty)
  1122. {
  1123. struct mxser_port *info = tty->driver_data;
  1124. unsigned long flags;
  1125. if (info->xmit_cnt <= 0 ||
  1126. tty->stopped ||
  1127. !info->port.xmit_buf ||
  1128. (tty->hw_stopped &&
  1129. (info->type != PORT_16550A) &&
  1130. (!info->board->chip_flag)
  1131. ))
  1132. return;
  1133. spin_lock_irqsave(&info->slock, flags);
  1134. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1135. info->IER |= UART_IER_THRI;
  1136. outb(info->IER, info->ioaddr + UART_IER);
  1137. spin_unlock_irqrestore(&info->slock, flags);
  1138. }
  1139. static int mxser_write_room(struct tty_struct *tty)
  1140. {
  1141. struct mxser_port *info = tty->driver_data;
  1142. int ret;
  1143. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1144. if (ret < 0)
  1145. ret = 0;
  1146. return ret;
  1147. }
  1148. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1149. {
  1150. struct mxser_port *info = tty->driver_data;
  1151. return info->xmit_cnt;
  1152. }
  1153. /*
  1154. * ------------------------------------------------------------
  1155. * friends of mxser_ioctl()
  1156. * ------------------------------------------------------------
  1157. */
  1158. static int mxser_get_serial_info(struct mxser_port *info,
  1159. struct serial_struct __user *retinfo)
  1160. {
  1161. struct serial_struct tmp = {
  1162. .type = info->type,
  1163. .line = info->port.tty->index,
  1164. .port = info->ioaddr,
  1165. .irq = info->board->irq,
  1166. .flags = info->port.flags,
  1167. .baud_base = info->baud_base,
  1168. .close_delay = info->port.close_delay,
  1169. .closing_wait = info->port.closing_wait,
  1170. .custom_divisor = info->custom_divisor,
  1171. .hub6 = 0
  1172. };
  1173. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  1174. return -EFAULT;
  1175. return 0;
  1176. }
  1177. static int mxser_set_serial_info(struct mxser_port *info,
  1178. struct serial_struct __user *new_info)
  1179. {
  1180. struct serial_struct new_serial;
  1181. speed_t baud;
  1182. unsigned long sl_flags;
  1183. unsigned int flags;
  1184. int retval = 0;
  1185. if (!new_info || !info->ioaddr)
  1186. return -ENODEV;
  1187. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  1188. return -EFAULT;
  1189. if (new_serial.irq != info->board->irq ||
  1190. new_serial.port != info->ioaddr)
  1191. return -EINVAL;
  1192. flags = info->port.flags & ASYNC_SPD_MASK;
  1193. if (!capable(CAP_SYS_ADMIN)) {
  1194. if ((new_serial.baud_base != info->baud_base) ||
  1195. (new_serial.close_delay != info->port.close_delay) ||
  1196. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
  1197. return -EPERM;
  1198. info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
  1199. (new_serial.flags & ASYNC_USR_MASK));
  1200. } else {
  1201. /*
  1202. * OK, past this point, all the error checking has been done.
  1203. * At this point, we start making changes.....
  1204. */
  1205. info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
  1206. (new_serial.flags & ASYNC_FLAGS));
  1207. info->port.close_delay = new_serial.close_delay * HZ / 100;
  1208. info->port.closing_wait = new_serial.closing_wait * HZ / 100;
  1209. info->port.tty->low_latency =
  1210. (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  1211. if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
  1212. (new_serial.baud_base != info->baud_base ||
  1213. new_serial.custom_divisor !=
  1214. info->custom_divisor)) {
  1215. baud = new_serial.baud_base / new_serial.custom_divisor;
  1216. tty_encode_baud_rate(info->port.tty, baud, baud);
  1217. }
  1218. }
  1219. info->type = new_serial.type;
  1220. process_txrx_fifo(info);
  1221. if (info->port.flags & ASYNC_INITIALIZED) {
  1222. if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
  1223. spin_lock_irqsave(&info->slock, sl_flags);
  1224. mxser_change_speed(info, NULL);
  1225. spin_unlock_irqrestore(&info->slock, sl_flags);
  1226. }
  1227. } else
  1228. retval = mxser_startup(info);
  1229. return retval;
  1230. }
  1231. /*
  1232. * mxser_get_lsr_info - get line status register info
  1233. *
  1234. * Purpose: Let user call ioctl() to get info when the UART physically
  1235. * is emptied. On bus types like RS485, the transmitter must
  1236. * release the bus after transmitting. This must be done when
  1237. * the transmit shift register is empty, not be done when the
  1238. * transmit holding register is empty. This functionality
  1239. * allows an RS485 driver to be written in user space.
  1240. */
  1241. static int mxser_get_lsr_info(struct mxser_port *info,
  1242. unsigned int __user *value)
  1243. {
  1244. unsigned char status;
  1245. unsigned int result;
  1246. unsigned long flags;
  1247. spin_lock_irqsave(&info->slock, flags);
  1248. status = inb(info->ioaddr + UART_LSR);
  1249. spin_unlock_irqrestore(&info->slock, flags);
  1250. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1251. return put_user(result, value);
  1252. }
  1253. static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
  1254. {
  1255. struct mxser_port *info = tty->driver_data;
  1256. unsigned char control, status;
  1257. unsigned long flags;
  1258. if (tty->index == MXSER_PORTS)
  1259. return -ENOIOCTLCMD;
  1260. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1261. return -EIO;
  1262. control = info->MCR;
  1263. spin_lock_irqsave(&info->slock, flags);
  1264. status = inb(info->ioaddr + UART_MSR);
  1265. if (status & UART_MSR_ANY_DELTA)
  1266. mxser_check_modem_status(info, status);
  1267. spin_unlock_irqrestore(&info->slock, flags);
  1268. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  1269. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  1270. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  1271. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  1272. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  1273. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1274. }
  1275. static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
  1276. unsigned int set, unsigned int clear)
  1277. {
  1278. struct mxser_port *info = tty->driver_data;
  1279. unsigned long flags;
  1280. if (tty->index == MXSER_PORTS)
  1281. return -ENOIOCTLCMD;
  1282. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1283. return -EIO;
  1284. spin_lock_irqsave(&info->slock, flags);
  1285. if (set & TIOCM_RTS)
  1286. info->MCR |= UART_MCR_RTS;
  1287. if (set & TIOCM_DTR)
  1288. info->MCR |= UART_MCR_DTR;
  1289. if (clear & TIOCM_RTS)
  1290. info->MCR &= ~UART_MCR_RTS;
  1291. if (clear & TIOCM_DTR)
  1292. info->MCR &= ~UART_MCR_DTR;
  1293. outb(info->MCR, info->ioaddr + UART_MCR);
  1294. spin_unlock_irqrestore(&info->slock, flags);
  1295. return 0;
  1296. }
  1297. static int __init mxser_program_mode(int port)
  1298. {
  1299. int id, i, j, n;
  1300. outb(0, port);
  1301. outb(0, port);
  1302. outb(0, port);
  1303. (void)inb(port);
  1304. (void)inb(port);
  1305. outb(0, port);
  1306. (void)inb(port);
  1307. id = inb(port + 1) & 0x1F;
  1308. if ((id != C168_ASIC_ID) &&
  1309. (id != C104_ASIC_ID) &&
  1310. (id != C102_ASIC_ID) &&
  1311. (id != CI132_ASIC_ID) &&
  1312. (id != CI134_ASIC_ID) &&
  1313. (id != CI104J_ASIC_ID))
  1314. return -1;
  1315. for (i = 0, j = 0; i < 4; i++) {
  1316. n = inb(port + 2);
  1317. if (n == 'M') {
  1318. j = 1;
  1319. } else if ((j == 1) && (n == 1)) {
  1320. j = 2;
  1321. break;
  1322. } else
  1323. j = 0;
  1324. }
  1325. if (j != 2)
  1326. id = -2;
  1327. return id;
  1328. }
  1329. static void __init mxser_normal_mode(int port)
  1330. {
  1331. int i, n;
  1332. outb(0xA5, port + 1);
  1333. outb(0x80, port + 3);
  1334. outb(12, port + 0); /* 9600 bps */
  1335. outb(0, port + 1);
  1336. outb(0x03, port + 3); /* 8 data bits */
  1337. outb(0x13, port + 4); /* loop back mode */
  1338. for (i = 0; i < 16; i++) {
  1339. n = inb(port + 5);
  1340. if ((n & 0x61) == 0x60)
  1341. break;
  1342. if ((n & 1) == 1)
  1343. (void)inb(port);
  1344. }
  1345. outb(0x00, port + 4);
  1346. }
  1347. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  1348. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  1349. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  1350. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  1351. #define EN_CCMD 0x000 /* Chip's command register */
  1352. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  1353. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  1354. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  1355. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  1356. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  1357. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  1358. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  1359. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  1360. static int __init mxser_read_register(int port, unsigned short *regs)
  1361. {
  1362. int i, k, value, id;
  1363. unsigned int j;
  1364. id = mxser_program_mode(port);
  1365. if (id < 0)
  1366. return id;
  1367. for (i = 0; i < 14; i++) {
  1368. k = (i & 0x3F) | 0x180;
  1369. for (j = 0x100; j > 0; j >>= 1) {
  1370. outb(CHIP_CS, port);
  1371. if (k & j) {
  1372. outb(CHIP_CS | CHIP_DO, port);
  1373. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  1374. } else {
  1375. outb(CHIP_CS, port);
  1376. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  1377. }
  1378. }
  1379. (void)inb(port);
  1380. value = 0;
  1381. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  1382. outb(CHIP_CS, port);
  1383. outb(CHIP_CS | CHIP_SK, port);
  1384. if (inb(port) & CHIP_DI)
  1385. value |= j;
  1386. }
  1387. regs[i] = value;
  1388. outb(0, port);
  1389. }
  1390. mxser_normal_mode(port);
  1391. return id;
  1392. }
  1393. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1394. {
  1395. struct mxser_port *port;
  1396. int result, status;
  1397. unsigned int i, j;
  1398. int ret = 0;
  1399. switch (cmd) {
  1400. case MOXA_GET_MAJOR:
  1401. return put_user(ttymajor, (int __user *)argp);
  1402. case MOXA_CHKPORTENABLE:
  1403. result = 0;
  1404. lock_kernel();
  1405. for (i = 0; i < MXSER_BOARDS; i++)
  1406. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
  1407. if (mxser_boards[i].ports[j].ioaddr)
  1408. result |= (1 << i);
  1409. unlock_kernel();
  1410. return put_user(result, (unsigned long __user *)argp);
  1411. case MOXA_GETDATACOUNT:
  1412. lock_kernel();
  1413. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1414. ret = -EFAULT;
  1415. unlock_kernel();
  1416. return ret;
  1417. case MOXA_GETMSTATUS:
  1418. lock_kernel();
  1419. for (i = 0; i < MXSER_BOARDS; i++)
  1420. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1421. port = &mxser_boards[i].ports[j];
  1422. GMStatus[i].ri = 0;
  1423. if (!port->ioaddr) {
  1424. GMStatus[i].dcd = 0;
  1425. GMStatus[i].dsr = 0;
  1426. GMStatus[i].cts = 0;
  1427. continue;
  1428. }
  1429. if (!port->port.tty || !port->port.tty->termios)
  1430. GMStatus[i].cflag =
  1431. port->normal_termios.c_cflag;
  1432. else
  1433. GMStatus[i].cflag =
  1434. port->port.tty->termios->c_cflag;
  1435. status = inb(port->ioaddr + UART_MSR);
  1436. if (status & 0x80 /*UART_MSR_DCD */ )
  1437. GMStatus[i].dcd = 1;
  1438. else
  1439. GMStatus[i].dcd = 0;
  1440. if (status & 0x20 /*UART_MSR_DSR */ )
  1441. GMStatus[i].dsr = 1;
  1442. else
  1443. GMStatus[i].dsr = 0;
  1444. if (status & 0x10 /*UART_MSR_CTS */ )
  1445. GMStatus[i].cts = 1;
  1446. else
  1447. GMStatus[i].cts = 0;
  1448. }
  1449. unlock_kernel();
  1450. if (copy_to_user(argp, GMStatus,
  1451. sizeof(struct mxser_mstatus) * MXSER_PORTS))
  1452. return -EFAULT;
  1453. return 0;
  1454. case MOXA_ASPP_MON_EXT: {
  1455. int p, shiftbit;
  1456. unsigned long opmode;
  1457. unsigned cflag, iflag;
  1458. lock_kernel();
  1459. for (i = 0; i < MXSER_BOARDS; i++) {
  1460. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1461. port = &mxser_boards[i].ports[j];
  1462. if (!port->ioaddr)
  1463. continue;
  1464. status = mxser_get_msr(port->ioaddr, 0, i);
  1465. if (status & UART_MSR_TERI)
  1466. port->icount.rng++;
  1467. if (status & UART_MSR_DDSR)
  1468. port->icount.dsr++;
  1469. if (status & UART_MSR_DDCD)
  1470. port->icount.dcd++;
  1471. if (status & UART_MSR_DCTS)
  1472. port->icount.cts++;
  1473. port->mon_data.modem_status = status;
  1474. mon_data_ext.rx_cnt[i] = port->mon_data.rxcnt;
  1475. mon_data_ext.tx_cnt[i] = port->mon_data.txcnt;
  1476. mon_data_ext.up_rxcnt[i] =
  1477. port->mon_data.up_rxcnt;
  1478. mon_data_ext.up_txcnt[i] =
  1479. port->mon_data.up_txcnt;
  1480. mon_data_ext.modem_status[i] =
  1481. port->mon_data.modem_status;
  1482. mon_data_ext.baudrate[i] =
  1483. tty_get_baud_rate(port->port.tty);
  1484. if (!port->port.tty || !port->port.tty->termios) {
  1485. cflag = port->normal_termios.c_cflag;
  1486. iflag = port->normal_termios.c_iflag;
  1487. } else {
  1488. cflag = port->port.tty->termios->c_cflag;
  1489. iflag = port->port.tty->termios->c_iflag;
  1490. }
  1491. mon_data_ext.databits[i] = cflag & CSIZE;
  1492. mon_data_ext.stopbits[i] = cflag & CSTOPB;
  1493. mon_data_ext.parity[i] =
  1494. cflag & (PARENB | PARODD | CMSPAR);
  1495. mon_data_ext.flowctrl[i] = 0x00;
  1496. if (cflag & CRTSCTS)
  1497. mon_data_ext.flowctrl[i] |= 0x03;
  1498. if (iflag & (IXON | IXOFF))
  1499. mon_data_ext.flowctrl[i] |= 0x0C;
  1500. if (port->type == PORT_16550A)
  1501. mon_data_ext.fifo[i] = 1;
  1502. else
  1503. mon_data_ext.fifo[i] = 0;
  1504. p = i % 4;
  1505. shiftbit = p * 2;
  1506. opmode = inb(port->opmode_ioaddr) >> shiftbit;
  1507. opmode &= OP_MODE_MASK;
  1508. mon_data_ext.iftype[i] = opmode;
  1509. }
  1510. }
  1511. unlock_kernel();
  1512. if (copy_to_user(argp, &mon_data_ext,
  1513. sizeof(mon_data_ext)))
  1514. return -EFAULT;
  1515. return 0;
  1516. }
  1517. default:
  1518. return -ENOIOCTLCMD;
  1519. }
  1520. return 0;
  1521. }
  1522. static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
  1523. struct async_icount *cprev)
  1524. {
  1525. struct async_icount cnow;
  1526. unsigned long flags;
  1527. int ret;
  1528. spin_lock_irqsave(&info->slock, flags);
  1529. cnow = info->icount; /* atomic copy */
  1530. spin_unlock_irqrestore(&info->slock, flags);
  1531. ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
  1532. ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
  1533. ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
  1534. ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
  1535. *cprev = cnow;
  1536. return ret;
  1537. }
  1538. static int mxser_ioctl(struct tty_struct *tty, struct file *file,
  1539. unsigned int cmd, unsigned long arg)
  1540. {
  1541. struct mxser_port *info = tty->driver_data;
  1542. struct async_icount cnow;
  1543. struct serial_icounter_struct __user *p_cuser;
  1544. unsigned long flags;
  1545. void __user *argp = (void __user *)arg;
  1546. int retval;
  1547. if (tty->index == MXSER_PORTS)
  1548. return mxser_ioctl_special(cmd, argp);
  1549. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1550. int p;
  1551. unsigned long opmode;
  1552. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1553. int shiftbit;
  1554. unsigned char val, mask;
  1555. p = tty->index % 4;
  1556. if (cmd == MOXA_SET_OP_MODE) {
  1557. if (get_user(opmode, (int __user *) argp))
  1558. return -EFAULT;
  1559. if (opmode != RS232_MODE &&
  1560. opmode != RS485_2WIRE_MODE &&
  1561. opmode != RS422_MODE &&
  1562. opmode != RS485_4WIRE_MODE)
  1563. return -EFAULT;
  1564. lock_kernel();
  1565. mask = ModeMask[p];
  1566. shiftbit = p * 2;
  1567. val = inb(info->opmode_ioaddr);
  1568. val &= mask;
  1569. val |= (opmode << shiftbit);
  1570. outb(val, info->opmode_ioaddr);
  1571. unlock_kernel();
  1572. } else {
  1573. lock_kernel();
  1574. shiftbit = p * 2;
  1575. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1576. opmode &= OP_MODE_MASK;
  1577. unlock_kernel();
  1578. if (put_user(opmode, (int __user *)argp))
  1579. return -EFAULT;
  1580. }
  1581. return 0;
  1582. }
  1583. if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
  1584. test_bit(TTY_IO_ERROR, &tty->flags))
  1585. return -EIO;
  1586. switch (cmd) {
  1587. case TIOCGSERIAL:
  1588. lock_kernel();
  1589. retval = mxser_get_serial_info(info, argp);
  1590. unlock_kernel();
  1591. return retval;
  1592. case TIOCSSERIAL:
  1593. lock_kernel();
  1594. retval = mxser_set_serial_info(info, argp);
  1595. unlock_kernel();
  1596. return retval;
  1597. case TIOCSERGETLSR: /* Get line status register */
  1598. return mxser_get_lsr_info(info, argp);
  1599. /*
  1600. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1601. * - mask passed in arg for lines of interest
  1602. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1603. * Caller should use TIOCGICOUNT to see which one it was
  1604. */
  1605. case TIOCMIWAIT:
  1606. spin_lock_irqsave(&info->slock, flags);
  1607. cnow = info->icount; /* note the counters on entry */
  1608. spin_unlock_irqrestore(&info->slock, flags);
  1609. return wait_event_interruptible(info->delta_msr_wait,
  1610. mxser_cflags_changed(info, arg, &cnow));
  1611. /*
  1612. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1613. * Return: write counters to the user passed counter struct
  1614. * NB: both 1->0 and 0->1 transitions are counted except for
  1615. * RI where only 0->1 is counted.
  1616. */
  1617. case TIOCGICOUNT:
  1618. spin_lock_irqsave(&info->slock, flags);
  1619. cnow = info->icount;
  1620. spin_unlock_irqrestore(&info->slock, flags);
  1621. p_cuser = argp;
  1622. if (put_user(cnow.frame, &p_cuser->frame))
  1623. return -EFAULT;
  1624. if (put_user(cnow.brk, &p_cuser->brk))
  1625. return -EFAULT;
  1626. if (put_user(cnow.overrun, &p_cuser->overrun))
  1627. return -EFAULT;
  1628. if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
  1629. return -EFAULT;
  1630. if (put_user(cnow.parity, &p_cuser->parity))
  1631. return -EFAULT;
  1632. if (put_user(cnow.rx, &p_cuser->rx))
  1633. return -EFAULT;
  1634. if (put_user(cnow.tx, &p_cuser->tx))
  1635. return -EFAULT;
  1636. put_user(cnow.cts, &p_cuser->cts);
  1637. put_user(cnow.dsr, &p_cuser->dsr);
  1638. put_user(cnow.rng, &p_cuser->rng);
  1639. put_user(cnow.dcd, &p_cuser->dcd);
  1640. return 0;
  1641. case MOXA_HighSpeedOn:
  1642. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1643. case MOXA_SDS_RSTICOUNTER:
  1644. lock_kernel();
  1645. info->mon_data.rxcnt = 0;
  1646. info->mon_data.txcnt = 0;
  1647. unlock_kernel();
  1648. return 0;
  1649. case MOXA_ASPP_OQUEUE:{
  1650. int len, lsr;
  1651. lock_kernel();
  1652. len = mxser_chars_in_buffer(tty);
  1653. lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
  1654. len += (lsr ? 0 : 1);
  1655. unlock_kernel();
  1656. return put_user(len, (int __user *)argp);
  1657. }
  1658. case MOXA_ASPP_MON: {
  1659. int mcr, status;
  1660. lock_kernel();
  1661. status = mxser_get_msr(info->ioaddr, 1, tty->index);
  1662. mxser_check_modem_status(info, status);
  1663. mcr = inb(info->ioaddr + UART_MCR);
  1664. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1665. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1666. else
  1667. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1668. if (mcr & MOXA_MUST_MCR_TX_XON)
  1669. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1670. else
  1671. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1672. if (info->port.tty->hw_stopped)
  1673. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1674. else
  1675. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1676. unlock_kernel();
  1677. if (copy_to_user(argp, &info->mon_data,
  1678. sizeof(struct mxser_mon)))
  1679. return -EFAULT;
  1680. return 0;
  1681. }
  1682. case MOXA_ASPP_LSTATUS: {
  1683. if (put_user(info->err_shadow, (unsigned char __user *)argp))
  1684. return -EFAULT;
  1685. info->err_shadow = 0;
  1686. return 0;
  1687. }
  1688. case MOXA_SET_BAUD_METHOD: {
  1689. int method;
  1690. if (get_user(method, (int __user *)argp))
  1691. return -EFAULT;
  1692. mxser_set_baud_method[tty->index] = method;
  1693. return put_user(method, (int __user *)argp);
  1694. }
  1695. default:
  1696. return -ENOIOCTLCMD;
  1697. }
  1698. return 0;
  1699. }
  1700. static void mxser_stoprx(struct tty_struct *tty)
  1701. {
  1702. struct mxser_port *info = tty->driver_data;
  1703. info->ldisc_stop_rx = 1;
  1704. if (I_IXOFF(tty)) {
  1705. if (info->board->chip_flag) {
  1706. info->IER &= ~MOXA_MUST_RECV_ISR;
  1707. outb(info->IER, info->ioaddr + UART_IER);
  1708. } else {
  1709. info->x_char = STOP_CHAR(tty);
  1710. outb(0, info->ioaddr + UART_IER);
  1711. info->IER |= UART_IER_THRI;
  1712. outb(info->IER, info->ioaddr + UART_IER);
  1713. }
  1714. }
  1715. if (info->port.tty->termios->c_cflag & CRTSCTS) {
  1716. info->MCR &= ~UART_MCR_RTS;
  1717. outb(info->MCR, info->ioaddr + UART_MCR);
  1718. }
  1719. }
  1720. /*
  1721. * This routine is called by the upper-layer tty layer to signal that
  1722. * incoming characters should be throttled.
  1723. */
  1724. static void mxser_throttle(struct tty_struct *tty)
  1725. {
  1726. mxser_stoprx(tty);
  1727. }
  1728. static void mxser_unthrottle(struct tty_struct *tty)
  1729. {
  1730. struct mxser_port *info = tty->driver_data;
  1731. /* startrx */
  1732. info->ldisc_stop_rx = 0;
  1733. if (I_IXOFF(tty)) {
  1734. if (info->x_char)
  1735. info->x_char = 0;
  1736. else {
  1737. if (info->board->chip_flag) {
  1738. info->IER |= MOXA_MUST_RECV_ISR;
  1739. outb(info->IER, info->ioaddr + UART_IER);
  1740. } else {
  1741. info->x_char = START_CHAR(tty);
  1742. outb(0, info->ioaddr + UART_IER);
  1743. info->IER |= UART_IER_THRI;
  1744. outb(info->IER, info->ioaddr + UART_IER);
  1745. }
  1746. }
  1747. }
  1748. if (info->port.tty->termios->c_cflag & CRTSCTS) {
  1749. info->MCR |= UART_MCR_RTS;
  1750. outb(info->MCR, info->ioaddr + UART_MCR);
  1751. }
  1752. }
  1753. /*
  1754. * mxser_stop() and mxser_start()
  1755. *
  1756. * This routines are called before setting or resetting tty->stopped.
  1757. * They enable or disable transmitter interrupts, as necessary.
  1758. */
  1759. static void mxser_stop(struct tty_struct *tty)
  1760. {
  1761. struct mxser_port *info = tty->driver_data;
  1762. unsigned long flags;
  1763. spin_lock_irqsave(&info->slock, flags);
  1764. if (info->IER & UART_IER_THRI) {
  1765. info->IER &= ~UART_IER_THRI;
  1766. outb(info->IER, info->ioaddr + UART_IER);
  1767. }
  1768. spin_unlock_irqrestore(&info->slock, flags);
  1769. }
  1770. static void mxser_start(struct tty_struct *tty)
  1771. {
  1772. struct mxser_port *info = tty->driver_data;
  1773. unsigned long flags;
  1774. spin_lock_irqsave(&info->slock, flags);
  1775. if (info->xmit_cnt && info->port.xmit_buf) {
  1776. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1777. info->IER |= UART_IER_THRI;
  1778. outb(info->IER, info->ioaddr + UART_IER);
  1779. }
  1780. spin_unlock_irqrestore(&info->slock, flags);
  1781. }
  1782. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1783. {
  1784. struct mxser_port *info = tty->driver_data;
  1785. unsigned long flags;
  1786. spin_lock_irqsave(&info->slock, flags);
  1787. mxser_change_speed(info, old_termios);
  1788. spin_unlock_irqrestore(&info->slock, flags);
  1789. if ((old_termios->c_cflag & CRTSCTS) &&
  1790. !(tty->termios->c_cflag & CRTSCTS)) {
  1791. tty->hw_stopped = 0;
  1792. mxser_start(tty);
  1793. }
  1794. /* Handle sw stopped */
  1795. if ((old_termios->c_iflag & IXON) &&
  1796. !(tty->termios->c_iflag & IXON)) {
  1797. tty->stopped = 0;
  1798. if (info->board->chip_flag) {
  1799. spin_lock_irqsave(&info->slock, flags);
  1800. mxser_disable_must_rx_software_flow_control(
  1801. info->ioaddr);
  1802. spin_unlock_irqrestore(&info->slock, flags);
  1803. }
  1804. mxser_start(tty);
  1805. }
  1806. }
  1807. /*
  1808. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1809. */
  1810. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1811. {
  1812. struct mxser_port *info = tty->driver_data;
  1813. unsigned long orig_jiffies, char_time;
  1814. int lsr;
  1815. if (info->type == PORT_UNKNOWN)
  1816. return;
  1817. if (info->xmit_fifo_size == 0)
  1818. return; /* Just in case.... */
  1819. orig_jiffies = jiffies;
  1820. /*
  1821. * Set the check interval to be 1/5 of the estimated time to
  1822. * send a single character, and make it at least 1. The check
  1823. * interval should also be less than the timeout.
  1824. *
  1825. * Note: we have to use pretty tight timings here to satisfy
  1826. * the NIST-PCTS.
  1827. */
  1828. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1829. char_time = char_time / 5;
  1830. if (char_time == 0)
  1831. char_time = 1;
  1832. if (timeout && timeout < char_time)
  1833. char_time = timeout;
  1834. /*
  1835. * If the transmitter hasn't cleared in twice the approximate
  1836. * amount of time to send the entire FIFO, it probably won't
  1837. * ever clear. This assumes the UART isn't doing flow
  1838. * control, which is currently the case. Hence, if it ever
  1839. * takes longer than info->timeout, this is probably due to a
  1840. * UART bug of some kind. So, we clamp the timeout parameter at
  1841. * 2*info->timeout.
  1842. */
  1843. if (!timeout || timeout > 2 * info->timeout)
  1844. timeout = 2 * info->timeout;
  1845. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1846. printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
  1847. timeout, char_time);
  1848. printk("jiff=%lu...", jiffies);
  1849. #endif
  1850. lock_kernel();
  1851. while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
  1852. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1853. printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
  1854. #endif
  1855. schedule_timeout_interruptible(char_time);
  1856. if (signal_pending(current))
  1857. break;
  1858. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1859. break;
  1860. }
  1861. set_current_state(TASK_RUNNING);
  1862. unlock_kernel();
  1863. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1864. printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
  1865. #endif
  1866. }
  1867. /*
  1868. * This routine is called by tty_hangup() when a hangup is signaled.
  1869. */
  1870. static void mxser_hangup(struct tty_struct *tty)
  1871. {
  1872. struct mxser_port *info = tty->driver_data;
  1873. mxser_flush_buffer(tty);
  1874. mxser_shutdown(info);
  1875. info->port.count = 0;
  1876. info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
  1877. info->port.tty = NULL;
  1878. wake_up_interruptible(&info->port.open_wait);
  1879. }
  1880. /*
  1881. * mxser_rs_break() --- routine which turns the break handling on or off
  1882. */
  1883. static int mxser_rs_break(struct tty_struct *tty, int break_state)
  1884. {
  1885. struct mxser_port *info = tty->driver_data;
  1886. unsigned long flags;
  1887. spin_lock_irqsave(&info->slock, flags);
  1888. if (break_state == -1)
  1889. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1890. info->ioaddr + UART_LCR);
  1891. else
  1892. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1893. info->ioaddr + UART_LCR);
  1894. spin_unlock_irqrestore(&info->slock, flags);
  1895. return 0;
  1896. }
  1897. static void mxser_receive_chars(struct mxser_port *port, int *status)
  1898. {
  1899. struct tty_struct *tty = port->port.tty;
  1900. unsigned char ch, gdl;
  1901. int ignored = 0;
  1902. int cnt = 0;
  1903. int recv_room;
  1904. int max = 256;
  1905. recv_room = tty->receive_room;
  1906. if ((recv_room == 0) && (!port->ldisc_stop_rx))
  1907. mxser_stoprx(tty);
  1908. if (port->board->chip_flag != MOXA_OTHER_UART) {
  1909. if (*status & UART_LSR_SPECIAL)
  1910. goto intr_old;
  1911. if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
  1912. (*status & MOXA_MUST_LSR_RERR))
  1913. goto intr_old;
  1914. if (*status & MOXA_MUST_LSR_RERR)
  1915. goto intr_old;
  1916. gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
  1917. if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
  1918. gdl &= MOXA_MUST_GDL_MASK;
  1919. if (gdl >= recv_room) {
  1920. if (!port->ldisc_stop_rx)
  1921. mxser_stoprx(tty);
  1922. }
  1923. while (gdl--) {
  1924. ch = inb(port->ioaddr + UART_RX);
  1925. tty_insert_flip_char(tty, ch, 0);
  1926. cnt++;
  1927. }
  1928. goto end_intr;
  1929. }
  1930. intr_old:
  1931. do {
  1932. if (max-- < 0)
  1933. break;
  1934. ch = inb(port->ioaddr + UART_RX);
  1935. if (port->board->chip_flag && (*status & UART_LSR_OE))
  1936. outb(0x23, port->ioaddr + UART_FCR);
  1937. *status &= port->read_status_mask;
  1938. if (*status & port->ignore_status_mask) {
  1939. if (++ignored > 100)
  1940. break;
  1941. } else {
  1942. char flag = 0;
  1943. if (*status & UART_LSR_SPECIAL) {
  1944. if (*status & UART_LSR_BI) {
  1945. flag = TTY_BREAK;
  1946. port->icount.brk++;
  1947. if (port->port.flags & ASYNC_SAK)
  1948. do_SAK(tty);
  1949. } else if (*status & UART_LSR_PE) {
  1950. flag = TTY_PARITY;
  1951. port->icount.parity++;
  1952. } else if (*status & UART_LSR_FE) {
  1953. flag = TTY_FRAME;
  1954. port->icount.frame++;
  1955. } else if (*status & UART_LSR_OE) {
  1956. flag = TTY_OVERRUN;
  1957. port->icount.overrun++;
  1958. } else
  1959. flag = TTY_BREAK;
  1960. }
  1961. tty_insert_flip_char(tty, ch, flag);
  1962. cnt++;
  1963. if (cnt >= recv_room) {
  1964. if (!port->ldisc_stop_rx)
  1965. mxser_stoprx(tty);
  1966. break;
  1967. }
  1968. }
  1969. if (port->board->chip_flag)
  1970. break;
  1971. *status = inb(port->ioaddr + UART_LSR);
  1972. } while (*status & UART_LSR_DR);
  1973. end_intr:
  1974. mxvar_log.rxcnt[port->port.tty->index] += cnt;
  1975. port->mon_data.rxcnt += cnt;
  1976. port->mon_data.up_rxcnt += cnt;
  1977. /*
  1978. * We are called from an interrupt context with &port->slock
  1979. * being held. Drop it temporarily in order to prevent
  1980. * recursive locking.
  1981. */
  1982. spin_unlock(&port->slock);
  1983. tty_flip_buffer_push(tty);
  1984. spin_lock(&port->slock);
  1985. }
  1986. static void mxser_transmit_chars(struct mxser_port *port)
  1987. {
  1988. int count, cnt;
  1989. if (port->x_char) {
  1990. outb(port->x_char, port->ioaddr + UART_TX);
  1991. port->x_char = 0;
  1992. mxvar_log.txcnt[port->port.tty->index]++;
  1993. port->mon_data.txcnt++;
  1994. port->mon_data.up_txcnt++;
  1995. port->icount.tx++;
  1996. return;
  1997. }
  1998. if (port->port.xmit_buf == NULL)
  1999. return;
  2000. if ((port->xmit_cnt <= 0) || port->port.tty->stopped ||
  2001. (port->port.tty->hw_stopped &&
  2002. (port->type != PORT_16550A) &&
  2003. (!port->board->chip_flag))) {
  2004. port->IER &= ~UART_IER_THRI;
  2005. outb(port->IER, port->ioaddr + UART_IER);
  2006. return;
  2007. }
  2008. cnt = port->xmit_cnt;
  2009. count = port->xmit_fifo_size;
  2010. do {
  2011. outb(port->port.xmit_buf[port->xmit_tail++],
  2012. port->ioaddr + UART_TX);
  2013. port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  2014. if (--port->xmit_cnt <= 0)
  2015. break;
  2016. } while (--count > 0);
  2017. mxvar_log.txcnt[port->port.tty->index] += (cnt - port->xmit_cnt);
  2018. port->mon_data.txcnt += (cnt - port->xmit_cnt);
  2019. port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
  2020. port->icount.tx += (cnt - port->xmit_cnt);
  2021. if (port->xmit_cnt < WAKEUP_CHARS)
  2022. tty_wakeup(port->port.tty);
  2023. if (port->xmit_cnt <= 0) {
  2024. port->IER &= ~UART_IER_THRI;
  2025. outb(port->IER, port->ioaddr + UART_IER);
  2026. }
  2027. }
  2028. /*
  2029. * This is the serial driver's generic interrupt routine
  2030. */
  2031. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  2032. {
  2033. int status, iir, i;
  2034. struct mxser_board *brd = NULL;
  2035. struct mxser_port *port;
  2036. int max, irqbits, bits, msr;
  2037. unsigned int int_cnt, pass_counter = 0;
  2038. int handled = IRQ_NONE;
  2039. for (i = 0; i < MXSER_BOARDS; i++)
  2040. if (dev_id == &mxser_boards[i]) {
  2041. brd = dev_id;
  2042. break;
  2043. }
  2044. if (i == MXSER_BOARDS)
  2045. goto irq_stop;
  2046. if (brd == NULL)
  2047. goto irq_stop;
  2048. max = brd->info->nports;
  2049. while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
  2050. irqbits = inb(brd->vector) & brd->vector_mask;
  2051. if (irqbits == brd->vector_mask)
  2052. break;
  2053. handled = IRQ_HANDLED;
  2054. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  2055. if (irqbits == brd->vector_mask)
  2056. break;
  2057. if (bits & irqbits)
  2058. continue;
  2059. port = &brd->ports[i];
  2060. int_cnt = 0;
  2061. spin_lock(&port->slock);
  2062. do {
  2063. iir = inb(port->ioaddr + UART_IIR);
  2064. if (iir & UART_IIR_NO_INT)
  2065. break;
  2066. iir &= MOXA_MUST_IIR_MASK;
  2067. if (!port->port.tty ||
  2068. (port->port.flags & ASYNC_CLOSING) ||
  2069. !(port->port.flags &
  2070. ASYNC_INITIALIZED)) {
  2071. status = inb(port->ioaddr + UART_LSR);
  2072. outb(0x27, port->ioaddr + UART_FCR);
  2073. inb(port->ioaddr + UART_MSR);
  2074. break;
  2075. }
  2076. status = inb(port->ioaddr + UART_LSR);
  2077. if (status & UART_LSR_PE)
  2078. port->err_shadow |= NPPI_NOTIFY_PARITY;
  2079. if (status & UART_LSR_FE)
  2080. port->err_shadow |= NPPI_NOTIFY_FRAMING;
  2081. if (status & UART_LSR_OE)
  2082. port->err_shadow |=
  2083. NPPI_NOTIFY_HW_OVERRUN;
  2084. if (status & UART_LSR_BI)
  2085. port->err_shadow |= NPPI_NOTIFY_BREAK;
  2086. if (port->board->chip_flag) {
  2087. if (iir == MOXA_MUST_IIR_GDA ||
  2088. iir == MOXA_MUST_IIR_RDA ||
  2089. iir == MOXA_MUST_IIR_RTO ||
  2090. iir == MOXA_MUST_IIR_LSR)
  2091. mxser_receive_chars(port,
  2092. &status);
  2093. } else {
  2094. status &= port->read_status_mask;
  2095. if (status & UART_LSR_DR)
  2096. mxser_receive_chars(port,
  2097. &status);
  2098. }
  2099. msr = inb(port->ioaddr + UART_MSR);
  2100. if (msr & UART_MSR_ANY_DELTA)
  2101. mxser_check_modem_status(port, msr);
  2102. if (port->board->chip_flag) {
  2103. if (iir == 0x02 && (status &
  2104. UART_LSR_THRE))
  2105. mxser_transmit_chars(port);
  2106. } else {
  2107. if (status & UART_LSR_THRE)
  2108. mxser_transmit_chars(port);
  2109. }
  2110. } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
  2111. spin_unlock(&port->slock);
  2112. }
  2113. }
  2114. irq_stop:
  2115. return handled;
  2116. }
  2117. static const struct tty_operations mxser_ops = {
  2118. .open = mxser_open,
  2119. .close = mxser_close,
  2120. .write = mxser_write,
  2121. .put_char = mxser_put_char,
  2122. .flush_chars = mxser_flush_chars,
  2123. .write_room = mxser_write_room,
  2124. .chars_in_buffer = mxser_chars_in_buffer,
  2125. .flush_buffer = mxser_flush_buffer,
  2126. .ioctl = mxser_ioctl,
  2127. .throttle = mxser_throttle,
  2128. .unthrottle = mxser_unthrottle,
  2129. .set_termios = mxser_set_termios,
  2130. .stop = mxser_stop,
  2131. .start = mxser_start,
  2132. .hangup = mxser_hangup,
  2133. .break_ctl = mxser_rs_break,
  2134. .wait_until_sent = mxser_wait_until_sent,
  2135. .tiocmget = mxser_tiocmget,
  2136. .tiocmset = mxser_tiocmset,
  2137. };
  2138. /*
  2139. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  2140. */
  2141. static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
  2142. unsigned int irq)
  2143. {
  2144. if (irq)
  2145. free_irq(brd->irq, brd);
  2146. if (pdev != NULL) { /* PCI */
  2147. #ifdef CONFIG_PCI
  2148. pci_release_region(pdev, 2);
  2149. pci_release_region(pdev, 3);
  2150. #endif
  2151. } else {
  2152. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2153. release_region(brd->vector, 1);
  2154. }
  2155. }
  2156. static int __devinit mxser_initbrd(struct mxser_board *brd,
  2157. struct pci_dev *pdev)
  2158. {
  2159. struct mxser_port *info;
  2160. unsigned int i;
  2161. int retval;
  2162. printk(KERN_INFO "max. baud rate = %d bps.\n", brd->ports[0].max_baud);
  2163. for (i = 0; i < brd->info->nports; i++) {
  2164. info = &brd->ports[i];
  2165. tty_port_init(&info->port);
  2166. info->board = brd;
  2167. info->stop_rx = 0;
  2168. info->ldisc_stop_rx = 0;
  2169. /* Enhance mode enabled here */
  2170. if (brd->chip_flag != MOXA_OTHER_UART)
  2171. mxser_enable_must_enchance_mode(info->ioaddr);
  2172. info->port.flags = ASYNC_SHARE_IRQ;
  2173. info->type = brd->uart_type;
  2174. process_txrx_fifo(info);
  2175. info->custom_divisor = info->baud_base * 16;
  2176. info->port.close_delay = 5 * HZ / 10;
  2177. info->port.closing_wait = 30 * HZ;
  2178. info->normal_termios = mxvar_sdriver->init_termios;
  2179. init_waitqueue_head(&info->delta_msr_wait);
  2180. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  2181. info->err_shadow = 0;
  2182. spin_lock_init(&info->slock);
  2183. /* before set INT ISR, disable all int */
  2184. outb(inb(info->ioaddr + UART_IER) & 0xf0,
  2185. info->ioaddr + UART_IER);
  2186. }
  2187. retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
  2188. brd);
  2189. if (retval) {
  2190. printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
  2191. "conflict with another device.\n",
  2192. brd->info->name, brd->irq);
  2193. /* We hold resources, we need to release them. */
  2194. mxser_release_res(brd, pdev, 0);
  2195. }
  2196. return retval;
  2197. }
  2198. static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
  2199. {
  2200. int id, i, bits;
  2201. unsigned short regs[16], irq;
  2202. unsigned char scratch, scratch2;
  2203. brd->chip_flag = MOXA_OTHER_UART;
  2204. id = mxser_read_register(cap, regs);
  2205. switch (id) {
  2206. case C168_ASIC_ID:
  2207. brd->info = &mxser_cards[0];
  2208. break;
  2209. case C104_ASIC_ID:
  2210. brd->info = &mxser_cards[1];
  2211. break;
  2212. case CI104J_ASIC_ID:
  2213. brd->info = &mxser_cards[2];
  2214. break;
  2215. case C102_ASIC_ID:
  2216. brd->info = &mxser_cards[5];
  2217. break;
  2218. case CI132_ASIC_ID:
  2219. brd->info = &mxser_cards[6];
  2220. break;
  2221. case CI134_ASIC_ID:
  2222. brd->info = &mxser_cards[7];
  2223. break;
  2224. default:
  2225. return 0;
  2226. }
  2227. irq = 0;
  2228. /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
  2229. Flag-hack checks if configuration should be read as 2-port here. */
  2230. if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
  2231. irq = regs[9] & 0xF000;
  2232. irq = irq | (irq >> 4);
  2233. if (irq != (regs[9] & 0xFF00))
  2234. return MXSER_ERR_IRQ_CONFLIT;
  2235. } else if (brd->info->nports == 4) {
  2236. irq = regs[9] & 0xF000;
  2237. irq = irq | (irq >> 4);
  2238. irq = irq | (irq >> 8);
  2239. if (irq != regs[9])
  2240. return MXSER_ERR_IRQ_CONFLIT;
  2241. } else if (brd->info->nports == 8) {
  2242. irq = regs[9] & 0xF000;
  2243. irq = irq | (irq >> 4);
  2244. irq = irq | (irq >> 8);
  2245. if ((irq != regs[9]) || (irq != regs[10]))
  2246. return MXSER_ERR_IRQ_CONFLIT;
  2247. }
  2248. if (!irq)
  2249. return MXSER_ERR_IRQ;
  2250. brd->irq = ((int)(irq & 0xF000) >> 12);
  2251. for (i = 0; i < 8; i++)
  2252. brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
  2253. if ((regs[12] & 0x80) == 0)
  2254. return MXSER_ERR_VECTOR;
  2255. brd->vector = (int)regs[11]; /* interrupt vector */
  2256. if (id == 1)
  2257. brd->vector_mask = 0x00FF;
  2258. else
  2259. brd->vector_mask = 0x000F;
  2260. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2261. if (regs[12] & bits) {
  2262. brd->ports[i].baud_base = 921600;
  2263. brd->ports[i].max_baud = 921600;
  2264. } else {
  2265. brd->ports[i].baud_base = 115200;
  2266. brd->ports[i].max_baud = 115200;
  2267. }
  2268. }
  2269. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2270. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2271. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2272. outb(scratch2, cap + UART_LCR);
  2273. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2274. scratch = inb(cap + UART_IIR);
  2275. if (scratch & 0xC0)
  2276. brd->uart_type = PORT_16550A;
  2277. else
  2278. brd->uart_type = PORT_16450;
  2279. if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
  2280. "mxser(IO)"))
  2281. return MXSER_ERR_IOADDR;
  2282. if (!request_region(brd->vector, 1, "mxser(vector)")) {
  2283. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2284. return MXSER_ERR_VECTOR;
  2285. }
  2286. return brd->info->nports;
  2287. }
  2288. static int __devinit mxser_probe(struct pci_dev *pdev,
  2289. const struct pci_device_id *ent)
  2290. {
  2291. #ifdef CONFIG_PCI
  2292. struct mxser_board *brd;
  2293. unsigned int i, j;
  2294. unsigned long ioaddress;
  2295. int retval = -EINVAL;
  2296. for (i = 0; i < MXSER_BOARDS; i++)
  2297. if (mxser_boards[i].info == NULL)
  2298. break;
  2299. if (i >= MXSER_BOARDS) {
  2300. printk(KERN_ERR "Too many Smartio/Industio family boards found "
  2301. "(maximum %d), board not configured\n", MXSER_BOARDS);
  2302. goto err;
  2303. }
  2304. brd = &mxser_boards[i];
  2305. brd->idx = i * MXSER_PORTS_PER_BOARD;
  2306. printk(KERN_INFO "Found MOXA %s board (BusNo=%d, DevNo=%d)\n",
  2307. mxser_cards[ent->driver_data].name,
  2308. pdev->bus->number, PCI_SLOT(pdev->devfn));
  2309. retval = pci_enable_device(pdev);
  2310. if (retval) {
  2311. printk(KERN_ERR "Moxa SmartI/O PCI enable fail !\n");
  2312. goto err;
  2313. }
  2314. /* io address */
  2315. ioaddress = pci_resource_start(pdev, 2);
  2316. retval = pci_request_region(pdev, 2, "mxser(IO)");
  2317. if (retval)
  2318. goto err;
  2319. brd->info = &mxser_cards[ent->driver_data];
  2320. for (i = 0; i < brd->info->nports; i++)
  2321. brd->ports[i].ioaddr = ioaddress + 8 * i;
  2322. /* vector */
  2323. ioaddress = pci_resource_start(pdev, 3);
  2324. retval = pci_request_region(pdev, 3, "mxser(vector)");
  2325. if (retval)
  2326. goto err_relio;
  2327. brd->vector = ioaddress;
  2328. /* irq */
  2329. brd->irq = pdev->irq;
  2330. brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
  2331. brd->uart_type = PORT_16550A;
  2332. brd->vector_mask = 0;
  2333. for (i = 0; i < brd->info->nports; i++) {
  2334. for (j = 0; j < UART_INFO_NUM; j++) {
  2335. if (Gpci_uart_info[j].type == brd->chip_flag) {
  2336. brd->ports[i].max_baud =
  2337. Gpci_uart_info[j].max_baud;
  2338. /* exception....CP-102 */
  2339. if (brd->info->flags & MXSER_HIGHBAUD)
  2340. brd->ports[i].max_baud = 921600;
  2341. break;
  2342. }
  2343. }
  2344. }
  2345. if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
  2346. for (i = 0; i < brd->info->nports; i++) {
  2347. if (i < 4)
  2348. brd->ports[i].opmode_ioaddr = ioaddress + 4;
  2349. else
  2350. brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
  2351. }
  2352. outb(0, ioaddress + 4); /* default set to RS232 mode */
  2353. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  2354. }
  2355. for (i = 0; i < brd->info->nports; i++) {
  2356. brd->vector_mask |= (1 << i);
  2357. brd->ports[i].baud_base = 921600;
  2358. }
  2359. /* mxser_initbrd will hook ISR. */
  2360. retval = mxser_initbrd(brd, pdev);
  2361. if (retval)
  2362. goto err_null;
  2363. for (i = 0; i < brd->info->nports; i++)
  2364. tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
  2365. pci_set_drvdata(pdev, brd);
  2366. return 0;
  2367. err_relio:
  2368. pci_release_region(pdev, 2);
  2369. err_null:
  2370. brd->info = NULL;
  2371. err:
  2372. return retval;
  2373. #else
  2374. return -ENODEV;
  2375. #endif
  2376. }
  2377. static void __devexit mxser_remove(struct pci_dev *pdev)
  2378. {
  2379. struct mxser_board *brd = pci_get_drvdata(pdev);
  2380. unsigned int i;
  2381. for (i = 0; i < brd->info->nports; i++)
  2382. tty_unregister_device(mxvar_sdriver, brd->idx + i);
  2383. mxser_release_res(brd, pdev, 1);
  2384. brd->info = NULL;
  2385. }
  2386. static struct pci_driver mxser_driver = {
  2387. .name = "mxser",
  2388. .id_table = mxser_pcibrds,
  2389. .probe = mxser_probe,
  2390. .remove = __devexit_p(mxser_remove)
  2391. };
  2392. static int __init mxser_module_init(void)
  2393. {
  2394. struct mxser_board *brd;
  2395. unsigned long cap;
  2396. unsigned int i, m, isaloop;
  2397. int retval, b;
  2398. pr_debug("Loading module mxser ...\n");
  2399. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  2400. if (!mxvar_sdriver)
  2401. return -ENOMEM;
  2402. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  2403. MXSER_VERSION);
  2404. /* Initialize the tty_driver structure */
  2405. mxvar_sdriver->owner = THIS_MODULE;
  2406. mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
  2407. mxvar_sdriver->name = "ttyMI";
  2408. mxvar_sdriver->major = ttymajor;
  2409. mxvar_sdriver->minor_start = 0;
  2410. mxvar_sdriver->num = MXSER_PORTS + 1;
  2411. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  2412. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  2413. mxvar_sdriver->init_termios = tty_std_termios;
  2414. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  2415. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
  2416. tty_set_operations(mxvar_sdriver, &mxser_ops);
  2417. retval = tty_register_driver(mxvar_sdriver);
  2418. if (retval) {
  2419. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
  2420. "tty driver !\n");
  2421. goto err_put;
  2422. }
  2423. mxvar_diagflag = 0;
  2424. m = 0;
  2425. /* Start finding ISA boards here */
  2426. for (isaloop = 0; isaloop < 2; isaloop++)
  2427. for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
  2428. if (!isaloop)
  2429. cap = mxserBoardCAP[b]; /* predefined */
  2430. else
  2431. cap = ioaddr[b]; /* module param */
  2432. if (!cap)
  2433. continue;
  2434. brd = &mxser_boards[m];
  2435. retval = mxser_get_ISA_conf(cap, brd);
  2436. if (retval != 0)
  2437. printk(KERN_INFO "Found MOXA %s board "
  2438. "(CAP=0x%x)\n",
  2439. brd->info->name, ioaddr[b]);
  2440. if (retval <= 0) {
  2441. if (retval == MXSER_ERR_IRQ)
  2442. printk(KERN_ERR "Invalid interrupt "
  2443. "number, board not "
  2444. "configured\n");
  2445. else if (retval == MXSER_ERR_IRQ_CONFLIT)
  2446. printk(KERN_ERR "Invalid interrupt "
  2447. "number, board not "
  2448. "configured\n");
  2449. else if (retval == MXSER_ERR_VECTOR)
  2450. printk(KERN_ERR "Invalid interrupt "
  2451. "vector, board not "
  2452. "configured\n");
  2453. else if (retval == MXSER_ERR_IOADDR)
  2454. printk(KERN_ERR "Invalid I/O address, "
  2455. "board not configured\n");
  2456. brd->info = NULL;
  2457. continue;
  2458. }
  2459. /* mxser_initbrd will hook ISR. */
  2460. if (mxser_initbrd(brd, NULL) < 0) {
  2461. brd->info = NULL;
  2462. continue;
  2463. }
  2464. brd->idx = m * MXSER_PORTS_PER_BOARD;
  2465. for (i = 0; i < brd->info->nports; i++)
  2466. tty_register_device(mxvar_sdriver, brd->idx + i,
  2467. NULL);
  2468. m++;
  2469. }
  2470. retval = pci_register_driver(&mxser_driver);
  2471. if (retval) {
  2472. printk(KERN_ERR "Can't register pci driver\n");
  2473. if (!m) {
  2474. retval = -ENODEV;
  2475. goto err_unr;
  2476. } /* else: we have some ISA cards under control */
  2477. }
  2478. pr_debug("Done.\n");
  2479. return 0;
  2480. err_unr:
  2481. tty_unregister_driver(mxvar_sdriver);
  2482. err_put:
  2483. put_tty_driver(mxvar_sdriver);
  2484. return retval;
  2485. }
  2486. static void __exit mxser_module_exit(void)
  2487. {
  2488. unsigned int i, j;
  2489. pr_debug("Unloading module mxser ...\n");
  2490. pci_unregister_driver(&mxser_driver);
  2491. for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
  2492. if (mxser_boards[i].info != NULL)
  2493. for (j = 0; j < mxser_boards[i].info->nports; j++)
  2494. tty_unregister_device(mxvar_sdriver,
  2495. mxser_boards[i].idx + j);
  2496. tty_unregister_driver(mxvar_sdriver);
  2497. put_tty_driver(mxvar_sdriver);
  2498. for (i = 0; i < MXSER_BOARDS; i++)
  2499. if (mxser_boards[i].info != NULL)
  2500. mxser_release_res(&mxser_boards[i], NULL, 1);
  2501. pr_debug("Done.\n");
  2502. }
  2503. module_init(mxser_module_init);
  2504. module_exit(mxser_module_exit);