cm-x270.c 17 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/cm-x270.c
  3. *
  4. * Copyright (C) 2007, 2008 CompuLab, Ltd.
  5. * Mike Rapoport <mike@compulab.co.il>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/platform_device.h>
  12. #include <linux/sysdev.h>
  13. #include <linux/irq.h>
  14. #include <linux/gpio.h>
  15. #include <linux/dm9000.h>
  16. #include <linux/rtc-v3020.h>
  17. #include <video/mbxfb.h>
  18. #include <linux/leds.h>
  19. #include <asm/mach/arch.h>
  20. #include <asm/mach-types.h>
  21. #include <asm/mach/map.h>
  22. #include <asm/arch/pxa2xx-regs.h>
  23. #include <asm/arch/mfp-pxa27x.h>
  24. #include <asm/arch/pxa-regs.h>
  25. #include <asm/arch/audio.h>
  26. #include <asm/arch/pxafb.h>
  27. #include <asm/arch/ohci.h>
  28. #include <asm/arch/mmc.h>
  29. #include <asm/arch/bitfield.h>
  30. #include <asm/hardware/it8152.h>
  31. #include "generic.h"
  32. #include "cm-x270-pci.h"
  33. /* virtual addresses for statically mapped regions */
  34. #define CMX270_VIRT_BASE (0xe8000000)
  35. #define CMX270_IT8152_VIRT (CMX270_VIRT_BASE)
  36. #define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22))
  37. #define DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
  38. /* GPIO IRQ usage */
  39. #define GPIO10_ETHIRQ (10)
  40. #define GPIO22_IT8152_IRQ (22)
  41. #define GPIO83_MMC_IRQ (83)
  42. #define GPIO95_GFXIRQ (95)
  43. #define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ)
  44. #define CMX270_IT8152_IRQ IRQ_GPIO(GPIO22_IT8152_IRQ)
  45. #define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ)
  46. #define CMX270_GFXIRQ IRQ_GPIO(GPIO95_GFXIRQ)
  47. /* MMC power enable */
  48. #define GPIO105_MMC_POWER (105)
  49. static unsigned long cmx270_pin_config[] = {
  50. /* AC'97 */
  51. GPIO28_AC97_BITCLK,
  52. GPIO29_AC97_SDATA_IN_0,
  53. GPIO30_AC97_SDATA_OUT,
  54. GPIO31_AC97_SYNC,
  55. GPIO98_AC97_SYSCLK,
  56. GPIO113_AC97_nRESET,
  57. /* BTUART */
  58. GPIO42_BTUART_RXD,
  59. GPIO43_BTUART_TXD,
  60. GPIO44_BTUART_CTS,
  61. GPIO45_BTUART_RTS,
  62. /* STUART */
  63. GPIO46_STUART_RXD,
  64. GPIO47_STUART_TXD,
  65. /* MCI controller */
  66. GPIO32_MMC_CLK,
  67. GPIO112_MMC_CMD,
  68. GPIO92_MMC_DAT_0,
  69. GPIO109_MMC_DAT_1,
  70. GPIO110_MMC_DAT_2,
  71. GPIO111_MMC_DAT_3,
  72. /* LCD */
  73. GPIO58_LCD_LDD_0,
  74. GPIO59_LCD_LDD_1,
  75. GPIO60_LCD_LDD_2,
  76. GPIO61_LCD_LDD_3,
  77. GPIO62_LCD_LDD_4,
  78. GPIO63_LCD_LDD_5,
  79. GPIO64_LCD_LDD_6,
  80. GPIO65_LCD_LDD_7,
  81. GPIO66_LCD_LDD_8,
  82. GPIO67_LCD_LDD_9,
  83. GPIO68_LCD_LDD_10,
  84. GPIO69_LCD_LDD_11,
  85. GPIO70_LCD_LDD_12,
  86. GPIO71_LCD_LDD_13,
  87. GPIO72_LCD_LDD_14,
  88. GPIO73_LCD_LDD_15,
  89. GPIO74_LCD_FCLK,
  90. GPIO75_LCD_LCLK,
  91. GPIO76_LCD_PCLK,
  92. GPIO77_LCD_BIAS,
  93. /* I2C */
  94. GPIO117_I2C_SCL,
  95. GPIO118_I2C_SDA,
  96. /* SSP1 */
  97. GPIO23_SSP1_SCLK,
  98. GPIO24_SSP1_SFRM,
  99. GPIO25_SSP1_TXD,
  100. GPIO26_SSP1_RXD,
  101. /* SSP2 */
  102. GPIO19_SSP2_SCLK,
  103. GPIO14_SSP2_SFRM,
  104. GPIO87_SSP2_TXD,
  105. GPIO88_SSP2_RXD,
  106. /* PC Card */
  107. GPIO48_nPOE,
  108. GPIO49_nPWE,
  109. GPIO50_nPIOR,
  110. GPIO51_nPIOW,
  111. GPIO85_nPCE_1,
  112. GPIO54_nPCE_2,
  113. GPIO55_nPREG,
  114. GPIO56_nPWAIT,
  115. GPIO57_nIOIS16,
  116. /* SDRAM and local bus */
  117. GPIO15_nCS_1,
  118. GPIO78_nCS_2,
  119. GPIO79_nCS_3,
  120. GPIO80_nCS_4,
  121. GPIO33_nCS_5,
  122. GPIO49_nPWE,
  123. GPIO18_RDY,
  124. /* GPIO */
  125. GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH,
  126. GPIO105_GPIO | MFP_LPM_DRIVE_HIGH, /* MMC/SD power */
  127. GPIO53_GPIO, /* PC card reset */
  128. /* NAND controls */
  129. GPIO11_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */
  130. GPIO89_GPIO, /* NAND Ready/Busy */
  131. /* interrupts */
  132. GPIO10_GPIO, /* DM9000 interrupt */
  133. GPIO83_GPIO, /* MMC card detect */
  134. };
  135. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  136. static struct resource cmx270_dm9000_resource[] = {
  137. [0] = {
  138. .start = DM9000_PHYS_BASE,
  139. .end = DM9000_PHYS_BASE + 4,
  140. .flags = IORESOURCE_MEM,
  141. },
  142. [1] = {
  143. .start = DM9000_PHYS_BASE + 8,
  144. .end = DM9000_PHYS_BASE + 8 + 500,
  145. .flags = IORESOURCE_MEM,
  146. },
  147. [2] = {
  148. .start = CMX270_ETHIRQ,
  149. .end = CMX270_ETHIRQ,
  150. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  151. }
  152. };
  153. static struct dm9000_plat_data cmx270_dm9000_platdata = {
  154. .flags = DM9000_PLATF_32BITONLY,
  155. };
  156. static struct platform_device cmx270_dm9000_device = {
  157. .name = "dm9000",
  158. .id = 0,
  159. .num_resources = ARRAY_SIZE(cmx270_dm9000_resource),
  160. .resource = cmx270_dm9000_resource,
  161. .dev = {
  162. .platform_data = &cmx270_dm9000_platdata,
  163. }
  164. };
  165. static void __init cmx270_init_dm9000(void)
  166. {
  167. platform_device_register(&cmx270_dm9000_device);
  168. }
  169. #else
  170. static inline void cmx270_init_dm9000(void) {}
  171. #endif
  172. /* UCB1400 touchscreen controller */
  173. #if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
  174. static struct platform_device cmx270_ts_device = {
  175. .name = "ucb1400_ts",
  176. .id = -1,
  177. };
  178. static void __init cmx270_init_touchscreen(void)
  179. {
  180. platform_device_register(&cmx270_ts_device);
  181. }
  182. #else
  183. static inline void cmx270_init_touchscreen(void) {}
  184. #endif
  185. /* V3020 RTC */
  186. #if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
  187. static struct resource cmx270_v3020_resource[] = {
  188. [0] = {
  189. .start = RTC_PHYS_BASE,
  190. .end = RTC_PHYS_BASE + 4,
  191. .flags = IORESOURCE_MEM,
  192. },
  193. };
  194. struct v3020_platform_data cmx270_v3020_pdata = {
  195. .leftshift = 16,
  196. };
  197. static struct platform_device cmx270_rtc_device = {
  198. .name = "v3020",
  199. .num_resources = ARRAY_SIZE(cmx270_v3020_resource),
  200. .resource = cmx270_v3020_resource,
  201. .id = -1,
  202. .dev = {
  203. .platform_data = &cmx270_v3020_pdata,
  204. }
  205. };
  206. static void __init cmx270_init_rtc(void)
  207. {
  208. platform_device_register(&cmx270_rtc_device);
  209. }
  210. #else
  211. static inline void cmx270_init_rtc(void) {}
  212. #endif
  213. /* CM-X270 LEDs */
  214. #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
  215. static struct gpio_led cmx270_leds[] = {
  216. [0] = {
  217. .name = "cm-x270:red",
  218. .default_trigger = "nand-disk",
  219. .gpio = 93,
  220. .active_low = 1,
  221. },
  222. [1] = {
  223. .name = "cm-x270:green",
  224. .default_trigger = "heartbeat",
  225. .gpio = 94,
  226. .active_low = 1,
  227. },
  228. };
  229. static struct gpio_led_platform_data cmx270_gpio_led_pdata = {
  230. .num_leds = ARRAY_SIZE(cmx270_leds),
  231. .leds = cmx270_leds,
  232. };
  233. static struct platform_device cmx270_led_device = {
  234. .name = "leds-gpio",
  235. .id = -1,
  236. .dev = {
  237. .platform_data = &cmx270_gpio_led_pdata,
  238. },
  239. };
  240. static void __init cmx270_init_leds(void)
  241. {
  242. platform_device_register(&cmx270_led_device);
  243. }
  244. #else
  245. static inline void cmx270_init_leds(void) {}
  246. #endif
  247. /* 2700G graphics */
  248. #if defined(CONFIG_FB_MBX) || defined(CONFIG_FB_MBX_MODULE)
  249. static u64 fb_dma_mask = ~(u64)0;
  250. static struct resource cmx270_2700G_resource[] = {
  251. /* frame buffer memory including ODFB and External SDRAM */
  252. [0] = {
  253. .start = PXA_CS2_PHYS,
  254. .end = PXA_CS2_PHYS + 0x01ffffff,
  255. .flags = IORESOURCE_MEM,
  256. },
  257. /* Marathon registers */
  258. [1] = {
  259. .start = PXA_CS2_PHYS + 0x03fe0000,
  260. .end = PXA_CS2_PHYS + 0x03ffffff,
  261. .flags = IORESOURCE_MEM,
  262. },
  263. };
  264. static unsigned long save_lcd_regs[10];
  265. static int cmx270_marathon_probe(struct fb_info *fb)
  266. {
  267. /* save PXA-270 pin settings before enabling 2700G */
  268. save_lcd_regs[0] = GPDR1;
  269. save_lcd_regs[1] = GPDR2;
  270. save_lcd_regs[2] = GAFR1_U;
  271. save_lcd_regs[3] = GAFR2_L;
  272. save_lcd_regs[4] = GAFR2_U;
  273. /* Disable PXA-270 on-chip controller driving pins */
  274. GPDR1 &= ~(0xfc000000);
  275. GPDR2 &= ~(0x00c03fff);
  276. GAFR1_U &= ~(0xfff00000);
  277. GAFR2_L &= ~(0x0fffffff);
  278. GAFR2_U &= ~(0x0000f000);
  279. return 0;
  280. }
  281. static int cmx270_marathon_remove(struct fb_info *fb)
  282. {
  283. GPDR1 = save_lcd_regs[0];
  284. GPDR2 = save_lcd_regs[1];
  285. GAFR1_U = save_lcd_regs[2];
  286. GAFR2_L = save_lcd_regs[3];
  287. GAFR2_U = save_lcd_regs[4];
  288. return 0;
  289. }
  290. static struct mbxfb_platform_data cmx270_2700G_data = {
  291. .xres = {
  292. .min = 240,
  293. .max = 1200,
  294. .defval = 640,
  295. },
  296. .yres = {
  297. .min = 240,
  298. .max = 1200,
  299. .defval = 480,
  300. },
  301. .bpp = {
  302. .min = 16,
  303. .max = 32,
  304. .defval = 16,
  305. },
  306. .memsize = 8*1024*1024,
  307. .probe = cmx270_marathon_probe,
  308. .remove = cmx270_marathon_remove,
  309. };
  310. static struct platform_device cmx270_2700G = {
  311. .name = "mbx-fb",
  312. .dev = {
  313. .platform_data = &cmx270_2700G_data,
  314. .dma_mask = &fb_dma_mask,
  315. .coherent_dma_mask = 0xffffffff,
  316. },
  317. .num_resources = ARRAY_SIZE(cmx270_2700G_resource),
  318. .resource = cmx270_2700G_resource,
  319. .id = -1,
  320. };
  321. static void __init cmx270_init_2700G(void)
  322. {
  323. platform_device_register(&cmx270_2700G);
  324. }
  325. #else
  326. static inline void cmx270_init_2700G(void) {}
  327. #endif
  328. #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
  329. /*
  330. Display definitions
  331. keep these for backwards compatibility, although symbolic names (as
  332. e.g. in lpd270.c) looks better
  333. */
  334. #define MTYPE_STN320x240 0
  335. #define MTYPE_TFT640x480 1
  336. #define MTYPE_CRT640x480 2
  337. #define MTYPE_CRT800x600 3
  338. #define MTYPE_TFT320x240 6
  339. #define MTYPE_STN640x480 7
  340. static struct pxafb_mode_info generic_stn_320x240_mode = {
  341. .pixclock = 76923,
  342. .bpp = 8,
  343. .xres = 320,
  344. .yres = 240,
  345. .hsync_len = 3,
  346. .vsync_len = 2,
  347. .left_margin = 3,
  348. .upper_margin = 0,
  349. .right_margin = 3,
  350. .lower_margin = 0,
  351. .sync = (FB_SYNC_HOR_HIGH_ACT |
  352. FB_SYNC_VERT_HIGH_ACT),
  353. .cmap_greyscale = 0,
  354. };
  355. static struct pxafb_mach_info generic_stn_320x240 = {
  356. .modes = &generic_stn_320x240_mode,
  357. .num_modes = 1,
  358. .lccr0 = 0,
  359. .lccr3 = (LCCR3_PixClkDiv(0x03) |
  360. LCCR3_Acb(0xff) |
  361. LCCR3_PCP),
  362. .cmap_inverse = 0,
  363. .cmap_static = 0,
  364. };
  365. static struct pxafb_mode_info generic_tft_640x480_mode = {
  366. .pixclock = 38461,
  367. .bpp = 8,
  368. .xres = 640,
  369. .yres = 480,
  370. .hsync_len = 60,
  371. .vsync_len = 2,
  372. .left_margin = 70,
  373. .upper_margin = 10,
  374. .right_margin = 70,
  375. .lower_margin = 5,
  376. .sync = 0,
  377. .cmap_greyscale = 0,
  378. };
  379. static struct pxafb_mach_info generic_tft_640x480 = {
  380. .modes = &generic_tft_640x480_mode,
  381. .num_modes = 1,
  382. .lccr0 = (LCCR0_PAS),
  383. .lccr3 = (LCCR3_PixClkDiv(0x01) |
  384. LCCR3_Acb(0xff) |
  385. LCCR3_PCP),
  386. .cmap_inverse = 0,
  387. .cmap_static = 0,
  388. };
  389. static struct pxafb_mode_info generic_crt_640x480_mode = {
  390. .pixclock = 38461,
  391. .bpp = 8,
  392. .xres = 640,
  393. .yres = 480,
  394. .hsync_len = 63,
  395. .vsync_len = 2,
  396. .left_margin = 81,
  397. .upper_margin = 33,
  398. .right_margin = 16,
  399. .lower_margin = 10,
  400. .sync = (FB_SYNC_HOR_HIGH_ACT |
  401. FB_SYNC_VERT_HIGH_ACT),
  402. .cmap_greyscale = 0,
  403. };
  404. static struct pxafb_mach_info generic_crt_640x480 = {
  405. .modes = &generic_crt_640x480_mode,
  406. .num_modes = 1,
  407. .lccr0 = (LCCR0_PAS),
  408. .lccr3 = (LCCR3_PixClkDiv(0x01) |
  409. LCCR3_Acb(0xff)),
  410. .cmap_inverse = 0,
  411. .cmap_static = 0,
  412. };
  413. static struct pxafb_mode_info generic_crt_800x600_mode = {
  414. .pixclock = 28846,
  415. .bpp = 8,
  416. .xres = 800,
  417. .yres = 600,
  418. .hsync_len = 63,
  419. .vsync_len = 2,
  420. .left_margin = 26,
  421. .upper_margin = 21,
  422. .right_margin = 26,
  423. .lower_margin = 11,
  424. .sync = (FB_SYNC_HOR_HIGH_ACT |
  425. FB_SYNC_VERT_HIGH_ACT),
  426. .cmap_greyscale = 0,
  427. };
  428. static struct pxafb_mach_info generic_crt_800x600 = {
  429. .modes = &generic_crt_800x600_mode,
  430. .num_modes = 1,
  431. .lccr0 = (LCCR0_PAS),
  432. .lccr3 = (LCCR3_PixClkDiv(0x02) |
  433. LCCR3_Acb(0xff)),
  434. .cmap_inverse = 0,
  435. .cmap_static = 0,
  436. };
  437. static struct pxafb_mode_info generic_tft_320x240_mode = {
  438. .pixclock = 134615,
  439. .bpp = 16,
  440. .xres = 320,
  441. .yres = 240,
  442. .hsync_len = 63,
  443. .vsync_len = 7,
  444. .left_margin = 75,
  445. .upper_margin = 0,
  446. .right_margin = 15,
  447. .lower_margin = 15,
  448. .sync = 0,
  449. .cmap_greyscale = 0,
  450. };
  451. static struct pxafb_mach_info generic_tft_320x240 = {
  452. .modes = &generic_tft_320x240_mode,
  453. .num_modes = 1,
  454. .lccr0 = (LCCR0_PAS),
  455. .lccr3 = (LCCR3_PixClkDiv(0x06) |
  456. LCCR3_Acb(0xff) |
  457. LCCR3_PCP),
  458. .cmap_inverse = 0,
  459. .cmap_static = 0,
  460. };
  461. static struct pxafb_mode_info generic_stn_640x480_mode = {
  462. .pixclock = 57692,
  463. .bpp = 8,
  464. .xres = 640,
  465. .yres = 480,
  466. .hsync_len = 4,
  467. .vsync_len = 2,
  468. .left_margin = 10,
  469. .upper_margin = 5,
  470. .right_margin = 10,
  471. .lower_margin = 5,
  472. .sync = (FB_SYNC_HOR_HIGH_ACT |
  473. FB_SYNC_VERT_HIGH_ACT),
  474. .cmap_greyscale = 0,
  475. };
  476. static struct pxafb_mach_info generic_stn_640x480 = {
  477. .modes = &generic_stn_640x480_mode,
  478. .num_modes = 1,
  479. .lccr0 = 0,
  480. .lccr3 = (LCCR3_PixClkDiv(0x02) |
  481. LCCR3_Acb(0xff)),
  482. .cmap_inverse = 0,
  483. .cmap_static = 0,
  484. };
  485. static struct pxafb_mach_info *cmx270_display = &generic_crt_640x480;
  486. static int __init cmx270_set_display(char *str)
  487. {
  488. int disp_type = simple_strtol(str, NULL, 0);
  489. switch (disp_type) {
  490. case MTYPE_STN320x240:
  491. cmx270_display = &generic_stn_320x240;
  492. break;
  493. case MTYPE_TFT640x480:
  494. cmx270_display = &generic_tft_640x480;
  495. break;
  496. case MTYPE_CRT640x480:
  497. cmx270_display = &generic_crt_640x480;
  498. break;
  499. case MTYPE_CRT800x600:
  500. cmx270_display = &generic_crt_800x600;
  501. break;
  502. case MTYPE_TFT320x240:
  503. cmx270_display = &generic_tft_320x240;
  504. break;
  505. case MTYPE_STN640x480:
  506. cmx270_display = &generic_stn_640x480;
  507. break;
  508. default: /* fallback to CRT 640x480 */
  509. cmx270_display = &generic_crt_640x480;
  510. break;
  511. }
  512. return 1;
  513. }
  514. /*
  515. This should be done really early to get proper configuration for
  516. frame buffer.
  517. Indeed, pxafb parameters can be used istead, but CM-X270 bootloader
  518. has limitied line length for kernel command line, and also it will
  519. break compatibitlty with proprietary releases already in field.
  520. */
  521. __setup("monitor=", cmx270_set_display);
  522. static void __init cmx270_init_display(void)
  523. {
  524. set_pxa_fb_info(cmx270_display);
  525. }
  526. #else
  527. static inline void cmx270_init_display(void) {}
  528. #endif
  529. /* PXA27x OHCI controller setup */
  530. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  531. static int cmx270_ohci_init(struct device *dev)
  532. {
  533. /* Set the Power Control Polarity Low */
  534. UHCHR = (UHCHR | UHCHR_PCPL) &
  535. ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
  536. return 0;
  537. }
  538. static struct pxaohci_platform_data cmx270_ohci_platform_data = {
  539. .port_mode = PMM_PERPORT_MODE,
  540. .init = cmx270_ohci_init,
  541. };
  542. static void __init cmx270_init_ohci(void)
  543. {
  544. pxa_set_ohci_info(&cmx270_ohci_platform_data);
  545. }
  546. #else
  547. static inline void cmx270_init_ohci(void) {}
  548. #endif
  549. #if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
  550. static int cmx270_mci_init(struct device *dev,
  551. irq_handler_t cmx270_detect_int,
  552. void *data)
  553. {
  554. int err;
  555. err = gpio_request(GPIO105_MMC_POWER, "MMC/SD power");
  556. if (err) {
  557. dev_warn(dev, "power gpio unavailable\n");
  558. return err;
  559. }
  560. gpio_direction_output(GPIO105_MMC_POWER, 0);
  561. err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int,
  562. IRQF_DISABLED | IRQF_TRIGGER_FALLING,
  563. "MMC card detect", data);
  564. if (err) {
  565. gpio_free(GPIO105_MMC_POWER);
  566. dev_err(dev, "cmx270_mci_init: MMC/SD: can't"
  567. " request MMC card detect IRQ\n");
  568. }
  569. return err;
  570. }
  571. static void cmx270_mci_setpower(struct device *dev, unsigned int vdd)
  572. {
  573. struct pxamci_platform_data *p_d = dev->platform_data;
  574. if ((1 << vdd) & p_d->ocr_mask) {
  575. dev_dbg(dev, "power on\n");
  576. gpio_set_value(GPIO105_MMC_POWER, 0);
  577. } else {
  578. gpio_set_value(GPIO105_MMC_POWER, 1);
  579. dev_dbg(dev, "power off\n");
  580. }
  581. }
  582. static void cmx270_mci_exit(struct device *dev, void *data)
  583. {
  584. free_irq(CMX270_MMC_IRQ, data);
  585. gpio_free(GPIO105_MMC_POWER);
  586. }
  587. static struct pxamci_platform_data cmx270_mci_platform_data = {
  588. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  589. .init = cmx270_mci_init,
  590. .setpower = cmx270_mci_setpower,
  591. .exit = cmx270_mci_exit,
  592. };
  593. static void __init cmx270_init_mmc(void)
  594. {
  595. pxa_set_mci_info(&cmx270_mci_platform_data);
  596. }
  597. #else
  598. static inline void cmx270_init_mmc(void) {}
  599. #endif
  600. #ifdef CONFIG_PM
  601. static unsigned long sleep_save_msc[10];
  602. static int cmx270_suspend(struct sys_device *dev, pm_message_t state)
  603. {
  604. cmx270_pci_suspend();
  605. /* save MSC registers */
  606. sleep_save_msc[0] = MSC0;
  607. sleep_save_msc[1] = MSC1;
  608. sleep_save_msc[2] = MSC2;
  609. /* setup power saving mode registers */
  610. PCFR = 0x0;
  611. PSLR = 0xff400000;
  612. PMCR = 0x00000005;
  613. PWER = 0x80000000;
  614. PFER = 0x00000000;
  615. PRER = 0x00000000;
  616. PGSR0 = 0xC0018800;
  617. PGSR1 = 0x004F0002;
  618. PGSR2 = 0x6021C000;
  619. PGSR3 = 0x00020000;
  620. return 0;
  621. }
  622. static int cmx270_resume(struct sys_device *dev)
  623. {
  624. cmx270_pci_resume();
  625. /* restore MSC registers */
  626. MSC0 = sleep_save_msc[0];
  627. MSC1 = sleep_save_msc[1];
  628. MSC2 = sleep_save_msc[2];
  629. return 0;
  630. }
  631. static struct sysdev_class cmx270_pm_sysclass = {
  632. .name = "pm",
  633. .resume = cmx270_resume,
  634. .suspend = cmx270_suspend,
  635. };
  636. static struct sys_device cmx270_pm_device = {
  637. .cls = &cmx270_pm_sysclass,
  638. };
  639. static int __init cmx270_pm_init(void)
  640. {
  641. int error;
  642. error = sysdev_class_register(&cmx270_pm_sysclass);
  643. if (error == 0)
  644. error = sysdev_register(&cmx270_pm_device);
  645. return error;
  646. }
  647. #else
  648. static int __init cmx270_pm_init(void) { return 0; }
  649. #endif
  650. #if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
  651. static void __init cmx270_init_ac97(void)
  652. {
  653. pxa_set_ac97_info(NULL);
  654. }
  655. #else
  656. static inline void cmx270_init_ac97(void) {}
  657. #endif
  658. static void __init cmx270_init(void)
  659. {
  660. cmx270_pm_init();
  661. pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config));
  662. cmx270_init_dm9000();
  663. cmx270_init_rtc();
  664. cmx270_init_display();
  665. cmx270_init_mmc();
  666. cmx270_init_ohci();
  667. cmx270_init_ac97();
  668. cmx270_init_touchscreen();
  669. cmx270_init_leds();
  670. cmx270_init_2700G();
  671. }
  672. static void __init cmx270_init_irq(void)
  673. {
  674. pxa27x_init_irq();
  675. cmx270_pci_init_irq(GPIO22_IT8152_IRQ);
  676. }
  677. #ifdef CONFIG_PCI
  678. /* Map PCI companion statically */
  679. static struct map_desc cmx270_io_desc[] __initdata = {
  680. [0] = { /* PCI bridge */
  681. .virtual = CMX270_IT8152_VIRT,
  682. .pfn = __phys_to_pfn(PXA_CS4_PHYS),
  683. .length = SZ_64M,
  684. .type = MT_DEVICE
  685. },
  686. };
  687. static void __init cmx270_map_io(void)
  688. {
  689. pxa_map_io();
  690. iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
  691. it8152_base_address = CMX270_IT8152_VIRT;
  692. }
  693. #else
  694. static void __init cmx270_map_io(void)
  695. {
  696. pxa_map_io();
  697. }
  698. #endif
  699. MACHINE_START(ARMCORE, "Compulab CM-x270")
  700. .boot_params = 0xa0000100,
  701. .phys_io = 0x40000000,
  702. .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
  703. .map_io = cmx270_map_io,
  704. .init_irq = cmx270_init_irq,
  705. .timer = &pxa_timer,
  706. .init_machine = cmx270_init,
  707. MACHINE_END