pci-sysfs.c 38 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include "pci.h"
  31. static int sysfs_initialized; /* = 0 */
  32. /* show configuration fields */
  33. #define pci_config_attr(field, format_string) \
  34. static ssize_t \
  35. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  36. { \
  37. struct pci_dev *pdev; \
  38. \
  39. pdev = to_pci_dev (dev); \
  40. return sprintf (buf, format_string, pdev->field); \
  41. }
  42. pci_config_attr(vendor, "0x%04x\n");
  43. pci_config_attr(device, "0x%04x\n");
  44. pci_config_attr(subsystem_vendor, "0x%04x\n");
  45. pci_config_attr(subsystem_device, "0x%04x\n");
  46. pci_config_attr(class, "0x%06x\n");
  47. pci_config_attr(irq, "%u\n");
  48. static ssize_t broken_parity_status_show(struct device *dev,
  49. struct device_attribute *attr,
  50. char *buf)
  51. {
  52. struct pci_dev *pdev = to_pci_dev(dev);
  53. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  54. }
  55. static ssize_t broken_parity_status_store(struct device *dev,
  56. struct device_attribute *attr,
  57. const char *buf, size_t count)
  58. {
  59. struct pci_dev *pdev = to_pci_dev(dev);
  60. unsigned long val;
  61. if (strict_strtoul(buf, 0, &val) < 0)
  62. return -EINVAL;
  63. pdev->broken_parity_status = !!val;
  64. return count;
  65. }
  66. static ssize_t local_cpus_show(struct device *dev,
  67. struct device_attribute *attr, char *buf)
  68. {
  69. const struct cpumask *mask;
  70. int len;
  71. #ifdef CONFIG_NUMA
  72. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  73. cpumask_of_node(dev_to_node(dev));
  74. #else
  75. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  76. #endif
  77. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  78. buf[len++] = '\n';
  79. buf[len] = '\0';
  80. return len;
  81. }
  82. static ssize_t local_cpulist_show(struct device *dev,
  83. struct device_attribute *attr, char *buf)
  84. {
  85. const struct cpumask *mask;
  86. int len;
  87. #ifdef CONFIG_NUMA
  88. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  89. cpumask_of_node(dev_to_node(dev));
  90. #else
  91. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  92. #endif
  93. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  94. buf[len++] = '\n';
  95. buf[len] = '\0';
  96. return len;
  97. }
  98. /*
  99. * PCI Bus Class Devices
  100. */
  101. static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
  102. int type,
  103. struct device_attribute *attr,
  104. char *buf)
  105. {
  106. int ret;
  107. const struct cpumask *cpumask;
  108. cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  109. ret = type ?
  110. cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
  111. cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
  112. buf[ret++] = '\n';
  113. buf[ret] = '\0';
  114. return ret;
  115. }
  116. static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
  117. struct device_attribute *attr,
  118. char *buf)
  119. {
  120. return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
  121. }
  122. static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
  123. struct device_attribute *attr,
  124. char *buf)
  125. {
  126. return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
  127. }
  128. /* show resources */
  129. static ssize_t
  130. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  131. {
  132. struct pci_dev * pci_dev = to_pci_dev(dev);
  133. char * str = buf;
  134. int i;
  135. int max;
  136. resource_size_t start, end;
  137. if (pci_dev->subordinate)
  138. max = DEVICE_COUNT_RESOURCE;
  139. else
  140. max = PCI_BRIDGE_RESOURCES;
  141. for (i = 0; i < max; i++) {
  142. struct resource *res = &pci_dev->resource[i];
  143. pci_resource_to_user(pci_dev, i, res, &start, &end);
  144. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  145. (unsigned long long)start,
  146. (unsigned long long)end,
  147. (unsigned long long)res->flags);
  148. }
  149. return (str - buf);
  150. }
  151. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  152. {
  153. struct pci_dev *pci_dev = to_pci_dev(dev);
  154. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  155. pci_dev->vendor, pci_dev->device,
  156. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  157. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  158. (u8)(pci_dev->class));
  159. }
  160. static ssize_t is_enabled_store(struct device *dev,
  161. struct device_attribute *attr, const char *buf,
  162. size_t count)
  163. {
  164. struct pci_dev *pdev = to_pci_dev(dev);
  165. unsigned long val;
  166. ssize_t result = strict_strtoul(buf, 0, &val);
  167. if (result < 0)
  168. return result;
  169. /* this can crash the machine when done on the "wrong" device */
  170. if (!capable(CAP_SYS_ADMIN))
  171. return -EPERM;
  172. if (!val) {
  173. if (pci_is_enabled(pdev))
  174. pci_disable_device(pdev);
  175. else
  176. result = -EIO;
  177. } else
  178. result = pci_enable_device(pdev);
  179. return result < 0 ? result : count;
  180. }
  181. static ssize_t is_enabled_show(struct device *dev,
  182. struct device_attribute *attr, char *buf)
  183. {
  184. struct pci_dev *pdev;
  185. pdev = to_pci_dev (dev);
  186. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  187. }
  188. #ifdef CONFIG_NUMA
  189. static ssize_t
  190. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  191. {
  192. return sprintf (buf, "%d\n", dev->numa_node);
  193. }
  194. #endif
  195. static ssize_t
  196. dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
  197. {
  198. struct pci_dev *pdev = to_pci_dev(dev);
  199. return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
  200. }
  201. static ssize_t
  202. consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
  203. char *buf)
  204. {
  205. return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
  206. }
  207. static ssize_t
  208. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  209. {
  210. struct pci_dev *pdev = to_pci_dev(dev);
  211. if (!pdev->subordinate)
  212. return 0;
  213. return sprintf (buf, "%u\n",
  214. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  215. }
  216. static ssize_t
  217. msi_bus_store(struct device *dev, struct device_attribute *attr,
  218. const char *buf, size_t count)
  219. {
  220. struct pci_dev *pdev = to_pci_dev(dev);
  221. unsigned long val;
  222. if (strict_strtoul(buf, 0, &val) < 0)
  223. return -EINVAL;
  224. /* bad things may happen if the no_msi flag is changed
  225. * while some drivers are loaded */
  226. if (!capable(CAP_SYS_ADMIN))
  227. return -EPERM;
  228. /* Maybe pci devices without subordinate busses shouldn't even have this
  229. * attribute in the first place? */
  230. if (!pdev->subordinate)
  231. return count;
  232. /* Is the flag going to change, or keep the value it already had? */
  233. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  234. !!val) {
  235. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  236. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  237. " bad things could happen\n", val ? "" : " not");
  238. }
  239. return count;
  240. }
  241. #ifdef CONFIG_HOTPLUG
  242. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  243. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  244. size_t count)
  245. {
  246. unsigned long val;
  247. struct pci_bus *b = NULL;
  248. if (strict_strtoul(buf, 0, &val) < 0)
  249. return -EINVAL;
  250. if (val) {
  251. mutex_lock(&pci_remove_rescan_mutex);
  252. while ((b = pci_find_next_bus(b)) != NULL)
  253. pci_rescan_bus(b);
  254. mutex_unlock(&pci_remove_rescan_mutex);
  255. }
  256. return count;
  257. }
  258. struct bus_attribute pci_bus_attrs[] = {
  259. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
  260. __ATTR_NULL
  261. };
  262. static ssize_t
  263. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  264. const char *buf, size_t count)
  265. {
  266. unsigned long val;
  267. struct pci_dev *pdev = to_pci_dev(dev);
  268. if (strict_strtoul(buf, 0, &val) < 0)
  269. return -EINVAL;
  270. if (val) {
  271. mutex_lock(&pci_remove_rescan_mutex);
  272. pci_rescan_bus(pdev->bus);
  273. mutex_unlock(&pci_remove_rescan_mutex);
  274. }
  275. return count;
  276. }
  277. static void remove_callback(struct device *dev)
  278. {
  279. struct pci_dev *pdev = to_pci_dev(dev);
  280. mutex_lock(&pci_remove_rescan_mutex);
  281. pci_stop_and_remove_bus_device(pdev);
  282. mutex_unlock(&pci_remove_rescan_mutex);
  283. }
  284. static ssize_t
  285. remove_store(struct device *dev, struct device_attribute *dummy,
  286. const char *buf, size_t count)
  287. {
  288. int ret = 0;
  289. unsigned long val;
  290. if (strict_strtoul(buf, 0, &val) < 0)
  291. return -EINVAL;
  292. /* An attribute cannot be unregistered by one of its own methods,
  293. * so we have to use this roundabout approach.
  294. */
  295. if (val)
  296. ret = device_schedule_callback(dev, remove_callback);
  297. if (ret)
  298. count = ret;
  299. return count;
  300. }
  301. static ssize_t
  302. dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
  303. const char *buf, size_t count)
  304. {
  305. unsigned long val;
  306. struct pci_bus *bus = to_pci_bus(dev);
  307. if (strict_strtoul(buf, 0, &val) < 0)
  308. return -EINVAL;
  309. if (val) {
  310. mutex_lock(&pci_remove_rescan_mutex);
  311. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  312. pci_rescan_bus_bridge_resize(bus->self);
  313. else
  314. pci_rescan_bus(bus);
  315. mutex_unlock(&pci_remove_rescan_mutex);
  316. }
  317. return count;
  318. }
  319. #endif
  320. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  321. static ssize_t d3cold_allowed_store(struct device *dev,
  322. struct device_attribute *attr,
  323. const char *buf, size_t count)
  324. {
  325. struct pci_dev *pdev = to_pci_dev(dev);
  326. unsigned long val;
  327. if (strict_strtoul(buf, 0, &val) < 0)
  328. return -EINVAL;
  329. pdev->d3cold_allowed = !!val;
  330. pm_runtime_resume(dev);
  331. return count;
  332. }
  333. static ssize_t d3cold_allowed_show(struct device *dev,
  334. struct device_attribute *attr, char *buf)
  335. {
  336. struct pci_dev *pdev = to_pci_dev(dev);
  337. return sprintf (buf, "%u\n", pdev->d3cold_allowed);
  338. }
  339. #endif
  340. #ifdef CONFIG_PCI_IOV
  341. static ssize_t sriov_totalvfs_show(struct device *dev,
  342. struct device_attribute *attr,
  343. char *buf)
  344. {
  345. struct pci_dev *pdev = to_pci_dev(dev);
  346. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  347. }
  348. static ssize_t sriov_numvfs_show(struct device *dev,
  349. struct device_attribute *attr,
  350. char *buf)
  351. {
  352. struct pci_dev *pdev = to_pci_dev(dev);
  353. return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
  354. }
  355. /*
  356. * num_vfs > 0; number of vfs to enable
  357. * num_vfs = 0; disable all vfs
  358. *
  359. * Note: SRIOV spec doesn't allow partial VF
  360. * disable, so its all or none.
  361. */
  362. static ssize_t sriov_numvfs_store(struct device *dev,
  363. struct device_attribute *attr,
  364. const char *buf, size_t count)
  365. {
  366. struct pci_dev *pdev = to_pci_dev(dev);
  367. int num_vfs_enabled = 0;
  368. int num_vfs;
  369. int ret = 0;
  370. u16 total;
  371. if (kstrtoint(buf, 0, &num_vfs) < 0)
  372. return -EINVAL;
  373. /* is PF driver loaded w/callback */
  374. if (!pdev->driver || !pdev->driver->sriov_configure) {
  375. dev_info(&pdev->dev,
  376. "Driver doesn't support SRIOV configuration via sysfs\n");
  377. return -ENOSYS;
  378. }
  379. /* if enabling vf's ... */
  380. total = pci_sriov_get_totalvfs(pdev);
  381. /* Requested VFs to enable < totalvfs and none enabled already */
  382. if ((num_vfs > 0) && (num_vfs <= total)) {
  383. if (pdev->sriov->num_VFs == 0) {
  384. num_vfs_enabled =
  385. pdev->driver->sriov_configure(pdev, num_vfs);
  386. if ((num_vfs_enabled >= 0) &&
  387. (num_vfs_enabled != num_vfs)) {
  388. dev_warn(&pdev->dev,
  389. "Only %d VFs enabled\n",
  390. num_vfs_enabled);
  391. return count;
  392. } else if (num_vfs_enabled < 0)
  393. /* error code from driver callback */
  394. return num_vfs_enabled;
  395. } else if (num_vfs == pdev->sriov->num_VFs) {
  396. dev_warn(&pdev->dev,
  397. "%d VFs already enabled; no enable action taken\n",
  398. num_vfs);
  399. return count;
  400. } else {
  401. dev_warn(&pdev->dev,
  402. "%d VFs already enabled. Disable before enabling %d VFs\n",
  403. pdev->sriov->num_VFs, num_vfs);
  404. return -EINVAL;
  405. }
  406. }
  407. /* disable vfs */
  408. if (num_vfs == 0) {
  409. if (pdev->sriov->num_VFs != 0) {
  410. ret = pdev->driver->sriov_configure(pdev, 0);
  411. return ret ? ret : count;
  412. } else {
  413. dev_warn(&pdev->dev,
  414. "All VFs disabled; no disable action taken\n");
  415. return count;
  416. }
  417. }
  418. dev_err(&pdev->dev,
  419. "Invalid value for number of VFs to enable: %d\n", num_vfs);
  420. return -EINVAL;
  421. }
  422. static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
  423. static struct device_attribute sriov_numvfs_attr =
  424. __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
  425. sriov_numvfs_show, sriov_numvfs_store);
  426. #endif /* CONFIG_PCI_IOV */
  427. struct device_attribute pci_dev_attrs[] = {
  428. __ATTR_RO(resource),
  429. __ATTR_RO(vendor),
  430. __ATTR_RO(device),
  431. __ATTR_RO(subsystem_vendor),
  432. __ATTR_RO(subsystem_device),
  433. __ATTR_RO(class),
  434. __ATTR_RO(irq),
  435. __ATTR_RO(local_cpus),
  436. __ATTR_RO(local_cpulist),
  437. __ATTR_RO(modalias),
  438. #ifdef CONFIG_NUMA
  439. __ATTR_RO(numa_node),
  440. #endif
  441. __ATTR_RO(dma_mask_bits),
  442. __ATTR_RO(consistent_dma_mask_bits),
  443. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  444. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  445. broken_parity_status_show,broken_parity_status_store),
  446. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  447. #ifdef CONFIG_HOTPLUG
  448. __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
  449. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
  450. #endif
  451. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  452. __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store),
  453. #endif
  454. __ATTR_NULL,
  455. };
  456. struct device_attribute pcibus_dev_attrs[] = {
  457. #ifdef CONFIG_HOTPLUG
  458. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
  459. #endif
  460. __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
  461. __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
  462. __ATTR_NULL,
  463. };
  464. static ssize_t
  465. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  466. {
  467. struct pci_dev *pdev = to_pci_dev(dev);
  468. struct pci_dev *vga_dev = vga_default_device();
  469. if (vga_dev)
  470. return sprintf(buf, "%u\n", (pdev == vga_dev));
  471. return sprintf(buf, "%u\n",
  472. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  473. IORESOURCE_ROM_SHADOW));
  474. }
  475. struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  476. static void
  477. pci_config_pm_runtime_get(struct pci_dev *pdev)
  478. {
  479. struct device *dev = &pdev->dev;
  480. struct device *parent = dev->parent;
  481. if (parent)
  482. pm_runtime_get_sync(parent);
  483. pm_runtime_get_noresume(dev);
  484. /*
  485. * pdev->current_state is set to PCI_D3cold during suspending,
  486. * so wait until suspending completes
  487. */
  488. pm_runtime_barrier(dev);
  489. /*
  490. * Only need to resume devices in D3cold, because config
  491. * registers are still accessible for devices suspended but
  492. * not in D3cold.
  493. */
  494. if (pdev->current_state == PCI_D3cold)
  495. pm_runtime_resume(dev);
  496. }
  497. static void
  498. pci_config_pm_runtime_put(struct pci_dev *pdev)
  499. {
  500. struct device *dev = &pdev->dev;
  501. struct device *parent = dev->parent;
  502. pm_runtime_put(dev);
  503. if (parent)
  504. pm_runtime_put_sync(parent);
  505. }
  506. static ssize_t
  507. pci_read_config(struct file *filp, struct kobject *kobj,
  508. struct bin_attribute *bin_attr,
  509. char *buf, loff_t off, size_t count)
  510. {
  511. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  512. unsigned int size = 64;
  513. loff_t init_off = off;
  514. u8 *data = (u8*) buf;
  515. /* Several chips lock up trying to read undefined config space */
  516. if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
  517. size = dev->cfg_size;
  518. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  519. size = 128;
  520. }
  521. if (off > size)
  522. return 0;
  523. if (off + count > size) {
  524. size -= off;
  525. count = size;
  526. } else {
  527. size = count;
  528. }
  529. pci_config_pm_runtime_get(dev);
  530. if ((off & 1) && size) {
  531. u8 val;
  532. pci_user_read_config_byte(dev, off, &val);
  533. data[off - init_off] = val;
  534. off++;
  535. size--;
  536. }
  537. if ((off & 3) && size > 2) {
  538. u16 val;
  539. pci_user_read_config_word(dev, off, &val);
  540. data[off - init_off] = val & 0xff;
  541. data[off - init_off + 1] = (val >> 8) & 0xff;
  542. off += 2;
  543. size -= 2;
  544. }
  545. while (size > 3) {
  546. u32 val;
  547. pci_user_read_config_dword(dev, off, &val);
  548. data[off - init_off] = val & 0xff;
  549. data[off - init_off + 1] = (val >> 8) & 0xff;
  550. data[off - init_off + 2] = (val >> 16) & 0xff;
  551. data[off - init_off + 3] = (val >> 24) & 0xff;
  552. off += 4;
  553. size -= 4;
  554. }
  555. if (size >= 2) {
  556. u16 val;
  557. pci_user_read_config_word(dev, off, &val);
  558. data[off - init_off] = val & 0xff;
  559. data[off - init_off + 1] = (val >> 8) & 0xff;
  560. off += 2;
  561. size -= 2;
  562. }
  563. if (size > 0) {
  564. u8 val;
  565. pci_user_read_config_byte(dev, off, &val);
  566. data[off - init_off] = val;
  567. off++;
  568. --size;
  569. }
  570. pci_config_pm_runtime_put(dev);
  571. return count;
  572. }
  573. static ssize_t
  574. pci_write_config(struct file* filp, struct kobject *kobj,
  575. struct bin_attribute *bin_attr,
  576. char *buf, loff_t off, size_t count)
  577. {
  578. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  579. unsigned int size = count;
  580. loff_t init_off = off;
  581. u8 *data = (u8*) buf;
  582. if (off > dev->cfg_size)
  583. return 0;
  584. if (off + count > dev->cfg_size) {
  585. size = dev->cfg_size - off;
  586. count = size;
  587. }
  588. pci_config_pm_runtime_get(dev);
  589. if ((off & 1) && size) {
  590. pci_user_write_config_byte(dev, off, data[off - init_off]);
  591. off++;
  592. size--;
  593. }
  594. if ((off & 3) && size > 2) {
  595. u16 val = data[off - init_off];
  596. val |= (u16) data[off - init_off + 1] << 8;
  597. pci_user_write_config_word(dev, off, val);
  598. off += 2;
  599. size -= 2;
  600. }
  601. while (size > 3) {
  602. u32 val = data[off - init_off];
  603. val |= (u32) data[off - init_off + 1] << 8;
  604. val |= (u32) data[off - init_off + 2] << 16;
  605. val |= (u32) data[off - init_off + 3] << 24;
  606. pci_user_write_config_dword(dev, off, val);
  607. off += 4;
  608. size -= 4;
  609. }
  610. if (size >= 2) {
  611. u16 val = data[off - init_off];
  612. val |= (u16) data[off - init_off + 1] << 8;
  613. pci_user_write_config_word(dev, off, val);
  614. off += 2;
  615. size -= 2;
  616. }
  617. if (size) {
  618. pci_user_write_config_byte(dev, off, data[off - init_off]);
  619. off++;
  620. --size;
  621. }
  622. pci_config_pm_runtime_put(dev);
  623. return count;
  624. }
  625. static ssize_t
  626. read_vpd_attr(struct file *filp, struct kobject *kobj,
  627. struct bin_attribute *bin_attr,
  628. char *buf, loff_t off, size_t count)
  629. {
  630. struct pci_dev *dev =
  631. to_pci_dev(container_of(kobj, struct device, kobj));
  632. if (off > bin_attr->size)
  633. count = 0;
  634. else if (count > bin_attr->size - off)
  635. count = bin_attr->size - off;
  636. return pci_read_vpd(dev, off, count, buf);
  637. }
  638. static ssize_t
  639. write_vpd_attr(struct file *filp, struct kobject *kobj,
  640. struct bin_attribute *bin_attr,
  641. char *buf, loff_t off, size_t count)
  642. {
  643. struct pci_dev *dev =
  644. to_pci_dev(container_of(kobj, struct device, kobj));
  645. if (off > bin_attr->size)
  646. count = 0;
  647. else if (count > bin_attr->size - off)
  648. count = bin_attr->size - off;
  649. return pci_write_vpd(dev, off, count, buf);
  650. }
  651. #ifdef HAVE_PCI_LEGACY
  652. /**
  653. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  654. * @filp: open sysfs file
  655. * @kobj: kobject corresponding to file to read from
  656. * @bin_attr: struct bin_attribute for this file
  657. * @buf: buffer to store results
  658. * @off: offset into legacy I/O port space
  659. * @count: number of bytes to read
  660. *
  661. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  662. * callback routine (pci_legacy_read).
  663. */
  664. static ssize_t
  665. pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  666. struct bin_attribute *bin_attr,
  667. char *buf, loff_t off, size_t count)
  668. {
  669. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  670. struct device,
  671. kobj));
  672. /* Only support 1, 2 or 4 byte accesses */
  673. if (count != 1 && count != 2 && count != 4)
  674. return -EINVAL;
  675. return pci_legacy_read(bus, off, (u32 *)buf, count);
  676. }
  677. /**
  678. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  679. * @filp: open sysfs file
  680. * @kobj: kobject corresponding to file to read from
  681. * @bin_attr: struct bin_attribute for this file
  682. * @buf: buffer containing value to be written
  683. * @off: offset into legacy I/O port space
  684. * @count: number of bytes to write
  685. *
  686. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  687. * callback routine (pci_legacy_write).
  688. */
  689. static ssize_t
  690. pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  691. struct bin_attribute *bin_attr,
  692. char *buf, loff_t off, size_t count)
  693. {
  694. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  695. struct device,
  696. kobj));
  697. /* Only support 1, 2 or 4 byte accesses */
  698. if (count != 1 && count != 2 && count != 4)
  699. return -EINVAL;
  700. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  701. }
  702. /**
  703. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  704. * @filp: open sysfs file
  705. * @kobj: kobject corresponding to device to be mapped
  706. * @attr: struct bin_attribute for this file
  707. * @vma: struct vm_area_struct passed to mmap
  708. *
  709. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  710. * legacy memory space (first meg of bus space) into application virtual
  711. * memory space.
  712. */
  713. static int
  714. pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  715. struct bin_attribute *attr,
  716. struct vm_area_struct *vma)
  717. {
  718. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  719. struct device,
  720. kobj));
  721. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  722. }
  723. /**
  724. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  725. * @filp: open sysfs file
  726. * @kobj: kobject corresponding to device to be mapped
  727. * @attr: struct bin_attribute for this file
  728. * @vma: struct vm_area_struct passed to mmap
  729. *
  730. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  731. * legacy IO space (first meg of bus space) into application virtual
  732. * memory space. Returns -ENOSYS if the operation isn't supported
  733. */
  734. static int
  735. pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  736. struct bin_attribute *attr,
  737. struct vm_area_struct *vma)
  738. {
  739. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  740. struct device,
  741. kobj));
  742. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  743. }
  744. /**
  745. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  746. * @b: bus to create files under
  747. * @mmap_type: I/O port or memory
  748. *
  749. * Stub implementation. Can be overridden by arch if necessary.
  750. */
  751. void __weak
  752. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  753. {
  754. return;
  755. }
  756. /**
  757. * pci_create_legacy_files - create legacy I/O port and memory files
  758. * @b: bus to create files under
  759. *
  760. * Some platforms allow access to legacy I/O port and ISA memory space on
  761. * a per-bus basis. This routine creates the files and ties them into
  762. * their associated read, write and mmap files from pci-sysfs.c
  763. *
  764. * On error unwind, but don't propagate the error to the caller
  765. * as it is ok to set up the PCI bus without these files.
  766. */
  767. void pci_create_legacy_files(struct pci_bus *b)
  768. {
  769. int error;
  770. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  771. GFP_ATOMIC);
  772. if (!b->legacy_io)
  773. goto kzalloc_err;
  774. sysfs_bin_attr_init(b->legacy_io);
  775. b->legacy_io->attr.name = "legacy_io";
  776. b->legacy_io->size = 0xffff;
  777. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  778. b->legacy_io->read = pci_read_legacy_io;
  779. b->legacy_io->write = pci_write_legacy_io;
  780. b->legacy_io->mmap = pci_mmap_legacy_io;
  781. pci_adjust_legacy_attr(b, pci_mmap_io);
  782. error = device_create_bin_file(&b->dev, b->legacy_io);
  783. if (error)
  784. goto legacy_io_err;
  785. /* Allocated above after the legacy_io struct */
  786. b->legacy_mem = b->legacy_io + 1;
  787. sysfs_bin_attr_init(b->legacy_mem);
  788. b->legacy_mem->attr.name = "legacy_mem";
  789. b->legacy_mem->size = 1024*1024;
  790. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  791. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  792. pci_adjust_legacy_attr(b, pci_mmap_mem);
  793. error = device_create_bin_file(&b->dev, b->legacy_mem);
  794. if (error)
  795. goto legacy_mem_err;
  796. return;
  797. legacy_mem_err:
  798. device_remove_bin_file(&b->dev, b->legacy_io);
  799. legacy_io_err:
  800. kfree(b->legacy_io);
  801. b->legacy_io = NULL;
  802. kzalloc_err:
  803. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  804. "and ISA memory resources to sysfs\n");
  805. return;
  806. }
  807. void pci_remove_legacy_files(struct pci_bus *b)
  808. {
  809. if (b->legacy_io) {
  810. device_remove_bin_file(&b->dev, b->legacy_io);
  811. device_remove_bin_file(&b->dev, b->legacy_mem);
  812. kfree(b->legacy_io); /* both are allocated here */
  813. }
  814. }
  815. #endif /* HAVE_PCI_LEGACY */
  816. #ifdef HAVE_PCI_MMAP
  817. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  818. enum pci_mmap_api mmap_api)
  819. {
  820. unsigned long nr, start, size, pci_start;
  821. if (pci_resource_len(pdev, resno) == 0)
  822. return 0;
  823. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  824. start = vma->vm_pgoff;
  825. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  826. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  827. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  828. if (start >= pci_start && start < pci_start + size &&
  829. start + nr <= pci_start + size)
  830. return 1;
  831. return 0;
  832. }
  833. /**
  834. * pci_mmap_resource - map a PCI resource into user memory space
  835. * @kobj: kobject for mapping
  836. * @attr: struct bin_attribute for the file being mapped
  837. * @vma: struct vm_area_struct passed into the mmap
  838. * @write_combine: 1 for write_combine mapping
  839. *
  840. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  841. */
  842. static int
  843. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  844. struct vm_area_struct *vma, int write_combine)
  845. {
  846. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  847. struct device, kobj));
  848. struct resource *res = attr->private;
  849. enum pci_mmap_state mmap_type;
  850. resource_size_t start, end;
  851. int i;
  852. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  853. if (res == &pdev->resource[i])
  854. break;
  855. if (i >= PCI_ROM_RESOURCE)
  856. return -ENODEV;
  857. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  858. WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
  859. "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  860. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  861. pci_name(pdev), i,
  862. (u64)pci_resource_start(pdev, i),
  863. (u64)pci_resource_len(pdev, i));
  864. return -EINVAL;
  865. }
  866. /* pci_mmap_page_range() expects the same kind of entry as coming
  867. * from /proc/bus/pci/ which is a "user visible" value. If this is
  868. * different from the resource itself, arch will do necessary fixup.
  869. */
  870. pci_resource_to_user(pdev, i, res, &start, &end);
  871. vma->vm_pgoff += start >> PAGE_SHIFT;
  872. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  873. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  874. return -EINVAL;
  875. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  876. }
  877. static int
  878. pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  879. struct bin_attribute *attr,
  880. struct vm_area_struct *vma)
  881. {
  882. return pci_mmap_resource(kobj, attr, vma, 0);
  883. }
  884. static int
  885. pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  886. struct bin_attribute *attr,
  887. struct vm_area_struct *vma)
  888. {
  889. return pci_mmap_resource(kobj, attr, vma, 1);
  890. }
  891. static ssize_t
  892. pci_resource_io(struct file *filp, struct kobject *kobj,
  893. struct bin_attribute *attr, char *buf,
  894. loff_t off, size_t count, bool write)
  895. {
  896. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  897. struct device, kobj));
  898. struct resource *res = attr->private;
  899. unsigned long port = off;
  900. int i;
  901. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  902. if (res == &pdev->resource[i])
  903. break;
  904. if (i >= PCI_ROM_RESOURCE)
  905. return -ENODEV;
  906. port += pci_resource_start(pdev, i);
  907. if (port > pci_resource_end(pdev, i))
  908. return 0;
  909. if (port + count - 1 > pci_resource_end(pdev, i))
  910. return -EINVAL;
  911. switch (count) {
  912. case 1:
  913. if (write)
  914. outb(*(u8 *)buf, port);
  915. else
  916. *(u8 *)buf = inb(port);
  917. return 1;
  918. case 2:
  919. if (write)
  920. outw(*(u16 *)buf, port);
  921. else
  922. *(u16 *)buf = inw(port);
  923. return 2;
  924. case 4:
  925. if (write)
  926. outl(*(u32 *)buf, port);
  927. else
  928. *(u32 *)buf = inl(port);
  929. return 4;
  930. }
  931. return -EINVAL;
  932. }
  933. static ssize_t
  934. pci_read_resource_io(struct file *filp, struct kobject *kobj,
  935. struct bin_attribute *attr, char *buf,
  936. loff_t off, size_t count)
  937. {
  938. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  939. }
  940. static ssize_t
  941. pci_write_resource_io(struct file *filp, struct kobject *kobj,
  942. struct bin_attribute *attr, char *buf,
  943. loff_t off, size_t count)
  944. {
  945. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  946. }
  947. /**
  948. * pci_remove_resource_files - cleanup resource files
  949. * @pdev: dev to cleanup
  950. *
  951. * If we created resource files for @pdev, remove them from sysfs and
  952. * free their resources.
  953. */
  954. static void
  955. pci_remove_resource_files(struct pci_dev *pdev)
  956. {
  957. int i;
  958. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  959. struct bin_attribute *res_attr;
  960. res_attr = pdev->res_attr[i];
  961. if (res_attr) {
  962. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  963. kfree(res_attr);
  964. }
  965. res_attr = pdev->res_attr_wc[i];
  966. if (res_attr) {
  967. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  968. kfree(res_attr);
  969. }
  970. }
  971. }
  972. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  973. {
  974. /* allocate attribute structure, piggyback attribute name */
  975. int name_len = write_combine ? 13 : 10;
  976. struct bin_attribute *res_attr;
  977. int retval;
  978. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  979. if (res_attr) {
  980. char *res_attr_name = (char *)(res_attr + 1);
  981. sysfs_bin_attr_init(res_attr);
  982. if (write_combine) {
  983. pdev->res_attr_wc[num] = res_attr;
  984. sprintf(res_attr_name, "resource%d_wc", num);
  985. res_attr->mmap = pci_mmap_resource_wc;
  986. } else {
  987. pdev->res_attr[num] = res_attr;
  988. sprintf(res_attr_name, "resource%d", num);
  989. res_attr->mmap = pci_mmap_resource_uc;
  990. }
  991. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  992. res_attr->read = pci_read_resource_io;
  993. res_attr->write = pci_write_resource_io;
  994. }
  995. res_attr->attr.name = res_attr_name;
  996. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  997. res_attr->size = pci_resource_len(pdev, num);
  998. res_attr->private = &pdev->resource[num];
  999. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  1000. } else
  1001. retval = -ENOMEM;
  1002. return retval;
  1003. }
  1004. /**
  1005. * pci_create_resource_files - create resource files in sysfs for @dev
  1006. * @pdev: dev in question
  1007. *
  1008. * Walk the resources in @pdev creating files for each resource available.
  1009. */
  1010. static int pci_create_resource_files(struct pci_dev *pdev)
  1011. {
  1012. int i;
  1013. int retval;
  1014. /* Expose the PCI resources from this device as files */
  1015. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  1016. /* skip empty resources */
  1017. if (!pci_resource_len(pdev, i))
  1018. continue;
  1019. retval = pci_create_attr(pdev, i, 0);
  1020. /* for prefetchable resources, create a WC mappable file */
  1021. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  1022. retval = pci_create_attr(pdev, i, 1);
  1023. if (retval) {
  1024. pci_remove_resource_files(pdev);
  1025. return retval;
  1026. }
  1027. }
  1028. return 0;
  1029. }
  1030. #else /* !HAVE_PCI_MMAP */
  1031. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  1032. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  1033. #endif /* HAVE_PCI_MMAP */
  1034. /**
  1035. * pci_write_rom - used to enable access to the PCI ROM display
  1036. * @filp: sysfs file
  1037. * @kobj: kernel object handle
  1038. * @bin_attr: struct bin_attribute for this file
  1039. * @buf: user input
  1040. * @off: file offset
  1041. * @count: number of byte in input
  1042. *
  1043. * writing anything except 0 enables it
  1044. */
  1045. static ssize_t
  1046. pci_write_rom(struct file *filp, struct kobject *kobj,
  1047. struct bin_attribute *bin_attr,
  1048. char *buf, loff_t off, size_t count)
  1049. {
  1050. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1051. if ((off == 0) && (*buf == '0') && (count == 2))
  1052. pdev->rom_attr_enabled = 0;
  1053. else
  1054. pdev->rom_attr_enabled = 1;
  1055. return count;
  1056. }
  1057. /**
  1058. * pci_read_rom - read a PCI ROM
  1059. * @filp: sysfs file
  1060. * @kobj: kernel object handle
  1061. * @bin_attr: struct bin_attribute for this file
  1062. * @buf: where to put the data we read from the ROM
  1063. * @off: file offset
  1064. * @count: number of bytes to read
  1065. *
  1066. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1067. * device corresponding to @kobj.
  1068. */
  1069. static ssize_t
  1070. pci_read_rom(struct file *filp, struct kobject *kobj,
  1071. struct bin_attribute *bin_attr,
  1072. char *buf, loff_t off, size_t count)
  1073. {
  1074. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1075. void __iomem *rom;
  1076. size_t size;
  1077. if (!pdev->rom_attr_enabled)
  1078. return -EINVAL;
  1079. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1080. if (!rom || !size)
  1081. return -EIO;
  1082. if (off >= size)
  1083. count = 0;
  1084. else {
  1085. if (off + count > size)
  1086. count = size - off;
  1087. memcpy_fromio(buf, rom + off, count);
  1088. }
  1089. pci_unmap_rom(pdev, rom);
  1090. return count;
  1091. }
  1092. static struct bin_attribute pci_config_attr = {
  1093. .attr = {
  1094. .name = "config",
  1095. .mode = S_IRUGO | S_IWUSR,
  1096. },
  1097. .size = PCI_CFG_SPACE_SIZE,
  1098. .read = pci_read_config,
  1099. .write = pci_write_config,
  1100. };
  1101. static struct bin_attribute pcie_config_attr = {
  1102. .attr = {
  1103. .name = "config",
  1104. .mode = S_IRUGO | S_IWUSR,
  1105. },
  1106. .size = PCI_CFG_SPACE_EXP_SIZE,
  1107. .read = pci_read_config,
  1108. .write = pci_write_config,
  1109. };
  1110. int __weak pcibios_add_platform_entries(struct pci_dev *dev)
  1111. {
  1112. return 0;
  1113. }
  1114. static ssize_t reset_store(struct device *dev,
  1115. struct device_attribute *attr, const char *buf,
  1116. size_t count)
  1117. {
  1118. struct pci_dev *pdev = to_pci_dev(dev);
  1119. unsigned long val;
  1120. ssize_t result = strict_strtoul(buf, 0, &val);
  1121. if (result < 0)
  1122. return result;
  1123. if (val != 1)
  1124. return -EINVAL;
  1125. result = pci_reset_function(pdev);
  1126. if (result < 0)
  1127. return result;
  1128. return count;
  1129. }
  1130. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1131. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1132. {
  1133. int retval;
  1134. struct bin_attribute *attr;
  1135. /* If the device has VPD, try to expose it in sysfs. */
  1136. if (dev->vpd) {
  1137. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1138. if (!attr)
  1139. return -ENOMEM;
  1140. sysfs_bin_attr_init(attr);
  1141. attr->size = dev->vpd->len;
  1142. attr->attr.name = "vpd";
  1143. attr->attr.mode = S_IRUSR | S_IWUSR;
  1144. attr->read = read_vpd_attr;
  1145. attr->write = write_vpd_attr;
  1146. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1147. if (retval) {
  1148. kfree(attr);
  1149. return retval;
  1150. }
  1151. dev->vpd->attr = attr;
  1152. }
  1153. /* Active State Power Management */
  1154. pcie_aspm_create_sysfs_dev_files(dev);
  1155. if (!pci_probe_reset_function(dev)) {
  1156. retval = device_create_file(&dev->dev, &reset_attr);
  1157. if (retval)
  1158. goto error;
  1159. dev->reset_fn = 1;
  1160. }
  1161. return 0;
  1162. error:
  1163. pcie_aspm_remove_sysfs_dev_files(dev);
  1164. if (dev->vpd && dev->vpd->attr) {
  1165. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1166. kfree(dev->vpd->attr);
  1167. }
  1168. return retval;
  1169. }
  1170. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  1171. {
  1172. int retval;
  1173. int rom_size = 0;
  1174. struct bin_attribute *attr;
  1175. if (!sysfs_initialized)
  1176. return -EACCES;
  1177. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1178. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1179. else
  1180. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1181. if (retval)
  1182. goto err;
  1183. retval = pci_create_resource_files(pdev);
  1184. if (retval)
  1185. goto err_config_file;
  1186. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1187. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1188. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1189. rom_size = 0x20000;
  1190. /* If the device has a ROM, try to expose it in sysfs. */
  1191. if (rom_size) {
  1192. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1193. if (!attr) {
  1194. retval = -ENOMEM;
  1195. goto err_resource_files;
  1196. }
  1197. sysfs_bin_attr_init(attr);
  1198. attr->size = rom_size;
  1199. attr->attr.name = "rom";
  1200. attr->attr.mode = S_IRUSR | S_IWUSR;
  1201. attr->read = pci_read_rom;
  1202. attr->write = pci_write_rom;
  1203. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1204. if (retval) {
  1205. kfree(attr);
  1206. goto err_resource_files;
  1207. }
  1208. pdev->rom_attr = attr;
  1209. }
  1210. /* add platform-specific attributes */
  1211. retval = pcibios_add_platform_entries(pdev);
  1212. if (retval)
  1213. goto err_rom_file;
  1214. /* add sysfs entries for various capabilities */
  1215. retval = pci_create_capabilities_sysfs(pdev);
  1216. if (retval)
  1217. goto err_rom_file;
  1218. pci_create_firmware_label_files(pdev);
  1219. return 0;
  1220. err_rom_file:
  1221. if (rom_size) {
  1222. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1223. kfree(pdev->rom_attr);
  1224. pdev->rom_attr = NULL;
  1225. }
  1226. err_resource_files:
  1227. pci_remove_resource_files(pdev);
  1228. err_config_file:
  1229. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1230. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1231. else
  1232. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1233. err:
  1234. return retval;
  1235. }
  1236. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1237. {
  1238. if (dev->vpd && dev->vpd->attr) {
  1239. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1240. kfree(dev->vpd->attr);
  1241. }
  1242. pcie_aspm_remove_sysfs_dev_files(dev);
  1243. if (dev->reset_fn) {
  1244. device_remove_file(&dev->dev, &reset_attr);
  1245. dev->reset_fn = 0;
  1246. }
  1247. }
  1248. /**
  1249. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1250. * @pdev: device whose entries we should free
  1251. *
  1252. * Cleanup when @pdev is removed from sysfs.
  1253. */
  1254. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1255. {
  1256. int rom_size = 0;
  1257. if (!sysfs_initialized)
  1258. return;
  1259. pci_remove_capabilities_sysfs(pdev);
  1260. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1261. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1262. else
  1263. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1264. pci_remove_resource_files(pdev);
  1265. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1266. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1267. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1268. rom_size = 0x20000;
  1269. if (rom_size && pdev->rom_attr) {
  1270. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1271. kfree(pdev->rom_attr);
  1272. }
  1273. pci_remove_firmware_label_files(pdev);
  1274. }
  1275. static int __init pci_sysfs_init(void)
  1276. {
  1277. struct pci_dev *pdev = NULL;
  1278. int retval;
  1279. sysfs_initialized = 1;
  1280. for_each_pci_dev(pdev) {
  1281. retval = pci_create_sysfs_dev_files(pdev);
  1282. if (retval) {
  1283. pci_dev_put(pdev);
  1284. return retval;
  1285. }
  1286. }
  1287. return 0;
  1288. }
  1289. late_initcall(pci_sysfs_init);
  1290. static struct attribute *pci_dev_dev_attrs[] = {
  1291. &vga_attr.attr,
  1292. NULL,
  1293. };
  1294. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1295. struct attribute *a, int n)
  1296. {
  1297. struct device *dev = container_of(kobj, struct device, kobj);
  1298. struct pci_dev *pdev = to_pci_dev(dev);
  1299. if (a == &vga_attr.attr)
  1300. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1301. return 0;
  1302. return a->mode;
  1303. }
  1304. #ifdef CONFIG_PCI_IOV
  1305. static struct attribute *sriov_dev_attrs[] = {
  1306. &sriov_totalvfs_attr.attr,
  1307. &sriov_numvfs_attr.attr,
  1308. NULL,
  1309. };
  1310. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  1311. struct attribute *a, int n)
  1312. {
  1313. struct device *dev = container_of(kobj, struct device, kobj);
  1314. if (!dev_is_pf(dev))
  1315. return 0;
  1316. return a->mode;
  1317. }
  1318. static struct attribute_group sriov_dev_attr_group = {
  1319. .attrs = sriov_dev_attrs,
  1320. .is_visible = sriov_attrs_are_visible,
  1321. };
  1322. #endif /* CONFIG_PCI_IOV */
  1323. static struct attribute_group pci_dev_attr_group = {
  1324. .attrs = pci_dev_dev_attrs,
  1325. .is_visible = pci_dev_attrs_are_visible,
  1326. };
  1327. static const struct attribute_group *pci_dev_attr_groups[] = {
  1328. &pci_dev_attr_group,
  1329. #ifdef CONFIG_PCI_IOV
  1330. &sriov_dev_attr_group,
  1331. #endif
  1332. NULL,
  1333. };
  1334. struct device_type pci_dev_type = {
  1335. .groups = pci_dev_attr_groups,
  1336. };