neponset.c 7.7 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/neponset.c
  3. *
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/init.h>
  7. #include <linux/tty.h>
  8. #include <linux/ioport.h>
  9. #include <linux/serial_core.h>
  10. #include <linux/platform_device.h>
  11. #include <mach/hardware.h>
  12. #include <asm/mach-types.h>
  13. #include <asm/irq.h>
  14. #include <asm/mach/map.h>
  15. #include <asm/mach/irq.h>
  16. #include <asm/mach/serial_sa1100.h>
  17. #include <mach/assabet.h>
  18. #include <mach/neponset.h>
  19. #include <asm/hardware/sa1111.h>
  20. #include <asm/sizes.h>
  21. void neponset_ncr_frob(unsigned int mask, unsigned int val)
  22. {
  23. unsigned long flags;
  24. local_irq_save(flags);
  25. NCR_0 = (NCR_0 & ~mask) | val;
  26. local_irq_restore(flags);
  27. }
  28. /*
  29. * Install handler for Neponset IRQ. Note that we have to loop here
  30. * since the ETHERNET and USAR IRQs are level based, and we need to
  31. * ensure that the IRQ signal is deasserted before returning. This
  32. * is rather unfortunate.
  33. */
  34. static void
  35. neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
  36. {
  37. unsigned int irr;
  38. while (1) {
  39. /*
  40. * Acknowledge the parent IRQ.
  41. */
  42. desc->irq_data.chip->irq_ack(&desc->irq_data);
  43. /*
  44. * Read the interrupt reason register. Let's have all
  45. * active IRQ bits high. Note: there is a typo in the
  46. * Neponset user's guide for the SA1111 IRR level.
  47. */
  48. irr = IRR ^ (IRR_ETHERNET | IRR_USAR);
  49. if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0)
  50. break;
  51. /*
  52. * Since there is no individual mask, we have to
  53. * mask the parent IRQ. This is safe, since we'll
  54. * recheck the register for any pending IRQs.
  55. */
  56. if (irr & (IRR_ETHERNET | IRR_USAR)) {
  57. desc->irq_data.chip->irq_mask(&desc->irq_data);
  58. /*
  59. * Ack the interrupt now to prevent re-entering
  60. * this neponset handler. Again, this is safe
  61. * since we'll check the IRR register prior to
  62. * leaving.
  63. */
  64. desc->irq_data.chip->irq_ack(&desc->irq_data);
  65. if (irr & IRR_ETHERNET) {
  66. generic_handle_irq(IRQ_NEPONSET_SMC9196);
  67. }
  68. if (irr & IRR_USAR) {
  69. generic_handle_irq(IRQ_NEPONSET_USAR);
  70. }
  71. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  72. }
  73. if (irr & IRR_SA1111) {
  74. generic_handle_irq(IRQ_NEPONSET_SA1111);
  75. }
  76. }
  77. }
  78. static void neponset_set_mctrl(struct uart_port *port, u_int mctrl)
  79. {
  80. u_int mdm_ctl0 = MDM_CTL_0;
  81. if (port->mapbase == _Ser1UTCR0) {
  82. if (mctrl & TIOCM_RTS)
  83. mdm_ctl0 &= ~MDM_CTL0_RTS2;
  84. else
  85. mdm_ctl0 |= MDM_CTL0_RTS2;
  86. if (mctrl & TIOCM_DTR)
  87. mdm_ctl0 &= ~MDM_CTL0_DTR2;
  88. else
  89. mdm_ctl0 |= MDM_CTL0_DTR2;
  90. } else if (port->mapbase == _Ser3UTCR0) {
  91. if (mctrl & TIOCM_RTS)
  92. mdm_ctl0 &= ~MDM_CTL0_RTS1;
  93. else
  94. mdm_ctl0 |= MDM_CTL0_RTS1;
  95. if (mctrl & TIOCM_DTR)
  96. mdm_ctl0 &= ~MDM_CTL0_DTR1;
  97. else
  98. mdm_ctl0 |= MDM_CTL0_DTR1;
  99. }
  100. MDM_CTL_0 = mdm_ctl0;
  101. }
  102. static u_int neponset_get_mctrl(struct uart_port *port)
  103. {
  104. u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
  105. u_int mdm_ctl1 = MDM_CTL_1;
  106. if (port->mapbase == _Ser1UTCR0) {
  107. if (mdm_ctl1 & MDM_CTL1_DCD2)
  108. ret &= ~TIOCM_CD;
  109. if (mdm_ctl1 & MDM_CTL1_CTS2)
  110. ret &= ~TIOCM_CTS;
  111. if (mdm_ctl1 & MDM_CTL1_DSR2)
  112. ret &= ~TIOCM_DSR;
  113. } else if (port->mapbase == _Ser3UTCR0) {
  114. if (mdm_ctl1 & MDM_CTL1_DCD1)
  115. ret &= ~TIOCM_CD;
  116. if (mdm_ctl1 & MDM_CTL1_CTS1)
  117. ret &= ~TIOCM_CTS;
  118. if (mdm_ctl1 & MDM_CTL1_DSR1)
  119. ret &= ~TIOCM_DSR;
  120. }
  121. return ret;
  122. }
  123. static struct sa1100_port_fns neponset_port_fns __devinitdata = {
  124. .set_mctrl = neponset_set_mctrl,
  125. .get_mctrl = neponset_get_mctrl,
  126. };
  127. /*
  128. * Yes, we really do not have any kind of masking or unmasking
  129. */
  130. static void nochip_noop(struct irq_data *irq)
  131. {
  132. }
  133. static struct irq_chip nochip = {
  134. .name = "neponset",
  135. .irq_ack = nochip_noop,
  136. .irq_mask = nochip_noop,
  137. .irq_unmask = nochip_noop,
  138. };
  139. static int __devinit neponset_probe(struct platform_device *dev)
  140. {
  141. sa1100_register_uart_fns(&neponset_port_fns);
  142. /*
  143. * Install handler for GPIO25.
  144. */
  145. irq_set_irq_type(IRQ_GPIO25, IRQ_TYPE_EDGE_RISING);
  146. irq_set_chained_handler(IRQ_GPIO25, neponset_irq_handler);
  147. /*
  148. * We would set IRQ_GPIO25 to be a wake-up IRQ, but
  149. * unfortunately something on the Neponset activates
  150. * this IRQ on sleep (ethernet?)
  151. */
  152. #if 0
  153. enable_irq_wake(IRQ_GPIO25);
  154. #endif
  155. /*
  156. * Setup other Neponset IRQs. SA1111 will be done by the
  157. * generic SA1111 code.
  158. */
  159. irq_set_chip_and_handler(IRQ_NEPONSET_SMC9196, &nochip,
  160. handle_simple_irq);
  161. set_irq_flags(IRQ_NEPONSET_SMC9196, IRQF_VALID | IRQF_PROBE);
  162. irq_set_chip_and_handler(IRQ_NEPONSET_USAR, &nochip,
  163. handle_simple_irq);
  164. set_irq_flags(IRQ_NEPONSET_USAR, IRQF_VALID | IRQF_PROBE);
  165. irq_set_chip(IRQ_NEPONSET_SA1111, &nochip);
  166. /*
  167. * Disable GPIO 0/1 drivers so the buttons work on the module.
  168. */
  169. NCR_0 = NCR_GP01_OFF;
  170. return 0;
  171. }
  172. #ifdef CONFIG_PM
  173. /*
  174. * LDM power management.
  175. */
  176. static unsigned int neponset_saved_state;
  177. static int neponset_suspend(struct platform_device *dev, pm_message_t state)
  178. {
  179. /*
  180. * Save state.
  181. */
  182. neponset_saved_state = NCR_0;
  183. return 0;
  184. }
  185. static int neponset_resume(struct platform_device *dev)
  186. {
  187. NCR_0 = neponset_saved_state;
  188. return 0;
  189. }
  190. #else
  191. #define neponset_suspend NULL
  192. #define neponset_resume NULL
  193. #endif
  194. static struct platform_driver neponset_device_driver = {
  195. .probe = neponset_probe,
  196. .suspend = neponset_suspend,
  197. .resume = neponset_resume,
  198. .driver = {
  199. .name = "neponset",
  200. },
  201. };
  202. static struct resource neponset_resources[] = {
  203. [0] = DEFINE_RES_MEM(0x10000000, 0x08000000),
  204. };
  205. static struct platform_device neponset_device = {
  206. .name = "neponset",
  207. .id = 0,
  208. .num_resources = ARRAY_SIZE(neponset_resources),
  209. .resource = neponset_resources,
  210. };
  211. static struct resource sa1111_resources[] = {
  212. [0] = DEFINE_RES_MEM(0x40000000, SZ_8K),
  213. [1] = DEFINE_RES_IRQ(IRQ_NEPONSET_SA1111),
  214. };
  215. static struct sa1111_platform_data sa1111_info = {
  216. .irq_base = IRQ_BOARD_END,
  217. };
  218. static u64 sa1111_dmamask = 0xffffffffUL;
  219. static struct platform_device sa1111_device = {
  220. .name = "sa1111",
  221. .id = 0,
  222. .dev = {
  223. .dma_mask = &sa1111_dmamask,
  224. .coherent_dma_mask = 0xffffffff,
  225. .platform_data = &sa1111_info,
  226. },
  227. .num_resources = ARRAY_SIZE(sa1111_resources),
  228. .resource = sa1111_resources,
  229. };
  230. static struct resource smc91x_resources[] = {
  231. [0] = DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS, 0x02000000, "smc91x-regs"),
  232. [1] = DEFINE_RES_IRQ(IRQ_NEPONSET_SMC9196),
  233. [2] = DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS + 0x02000000,
  234. 0x02000000, "smc91x-attrib"),
  235. };
  236. static struct platform_device smc91x_device = {
  237. .name = "smc91x",
  238. .id = 0,
  239. .num_resources = ARRAY_SIZE(smc91x_resources),
  240. .resource = smc91x_resources,
  241. };
  242. static struct platform_device *devices[] __initdata = {
  243. &neponset_device,
  244. &sa1111_device,
  245. &smc91x_device,
  246. };
  247. extern void sa1110_mb_disable(void);
  248. static int __init neponset_init(void)
  249. {
  250. platform_driver_register(&neponset_device_driver);
  251. /*
  252. * The Neponset is only present on the Assabet machine type.
  253. */
  254. if (!machine_is_assabet())
  255. return -ENODEV;
  256. /*
  257. * Ensure that the memory bus request/grant signals are setup,
  258. * and the grant is held in its inactive state, whether or not
  259. * we actually have a Neponset attached.
  260. */
  261. sa1110_mb_disable();
  262. if (!machine_has_neponset()) {
  263. printk(KERN_DEBUG "Neponset expansion board not present\n");
  264. return -ENODEV;
  265. }
  266. if (WHOAMI != 0x11) {
  267. printk(KERN_WARNING "Neponset board detected, but "
  268. "wrong ID: %02x\n", WHOAMI);
  269. return -ENODEV;
  270. }
  271. return platform_add_devices(devices, ARRAY_SIZE(devices));
  272. }
  273. subsys_initcall(neponset_init);
  274. static struct map_desc neponset_io_desc[] __initdata = {
  275. { /* System Registers */
  276. .virtual = 0xf3000000,
  277. .pfn = __phys_to_pfn(0x10000000),
  278. .length = SZ_1M,
  279. .type = MT_DEVICE
  280. }, { /* SA-1111 */
  281. .virtual = 0xf4000000,
  282. .pfn = __phys_to_pfn(0x40000000),
  283. .length = SZ_1M,
  284. .type = MT_DEVICE
  285. }
  286. };
  287. void __init neponset_map_io(void)
  288. {
  289. iotable_init(neponset_io_desc, ARRAY_SIZE(neponset_io_desc));
  290. }