vmwgfx_drm.h 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791
  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #ifndef __VMWGFX_DRM_H__
  28. #define __VMWGFX_DRM_H__
  29. #define DRM_VMW_MAX_SURFACE_FACES 6
  30. #define DRM_VMW_MAX_MIP_LEVELS 24
  31. #define DRM_VMW_GET_PARAM 0
  32. #define DRM_VMW_ALLOC_DMABUF 1
  33. #define DRM_VMW_UNREF_DMABUF 2
  34. #define DRM_VMW_CURSOR_BYPASS 3
  35. /* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/
  36. #define DRM_VMW_CONTROL_STREAM 4
  37. #define DRM_VMW_CLAIM_STREAM 5
  38. #define DRM_VMW_UNREF_STREAM 6
  39. /* guarded by DRM_VMW_PARAM_3D == 1 */
  40. #define DRM_VMW_CREATE_CONTEXT 7
  41. #define DRM_VMW_UNREF_CONTEXT 8
  42. #define DRM_VMW_CREATE_SURFACE 9
  43. #define DRM_VMW_UNREF_SURFACE 10
  44. #define DRM_VMW_REF_SURFACE 11
  45. #define DRM_VMW_EXECBUF 12
  46. #define DRM_VMW_GET_3D_CAP 13
  47. #define DRM_VMW_FENCE_WAIT 14
  48. #define DRM_VMW_FENCE_SIGNALED 15
  49. #define DRM_VMW_FENCE_UNREF 16
  50. #define DRM_VMW_FENCE_EVENT 17
  51. #define DRM_VMW_PRESENT 18
  52. #define DRM_VMW_PRESENT_READBACK 19
  53. /*************************************************************************/
  54. /**
  55. * DRM_VMW_GET_PARAM - get device information.
  56. *
  57. * DRM_VMW_PARAM_FIFO_OFFSET:
  58. * Offset to use to map the first page of the FIFO read-only.
  59. * The fifo is mapped using the mmap() system call on the drm device.
  60. *
  61. * DRM_VMW_PARAM_OVERLAY_IOCTL:
  62. * Does the driver support the overlay ioctl.
  63. */
  64. #define DRM_VMW_PARAM_NUM_STREAMS 0
  65. #define DRM_VMW_PARAM_NUM_FREE_STREAMS 1
  66. #define DRM_VMW_PARAM_3D 2
  67. #define DRM_VMW_PARAM_HW_CAPS 3
  68. #define DRM_VMW_PARAM_FIFO_CAPS 4
  69. #define DRM_VMW_PARAM_MAX_FB_SIZE 5
  70. #define DRM_VMW_PARAM_FIFO_HW_VERSION 6
  71. /**
  72. * struct drm_vmw_getparam_arg
  73. *
  74. * @value: Returned value. //Out
  75. * @param: Parameter to query. //In.
  76. *
  77. * Argument to the DRM_VMW_GET_PARAM Ioctl.
  78. */
  79. struct drm_vmw_getparam_arg {
  80. uint64_t value;
  81. uint32_t param;
  82. uint32_t pad64;
  83. };
  84. /*************************************************************************/
  85. /**
  86. * DRM_VMW_CREATE_CONTEXT - Create a host context.
  87. *
  88. * Allocates a device unique context id, and queues a create context command
  89. * for the host. Does not wait for host completion.
  90. */
  91. /**
  92. * struct drm_vmw_context_arg
  93. *
  94. * @cid: Device unique context ID.
  95. *
  96. * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
  97. * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
  98. */
  99. struct drm_vmw_context_arg {
  100. int32_t cid;
  101. uint32_t pad64;
  102. };
  103. /*************************************************************************/
  104. /**
  105. * DRM_VMW_UNREF_CONTEXT - Create a host context.
  106. *
  107. * Frees a global context id, and queues a destroy host command for the host.
  108. * Does not wait for host completion. The context ID can be used directly
  109. * in the command stream and shows up as the same context ID on the host.
  110. */
  111. /*************************************************************************/
  112. /**
  113. * DRM_VMW_CREATE_SURFACE - Create a host suface.
  114. *
  115. * Allocates a device unique surface id, and queues a create surface command
  116. * for the host. Does not wait for host completion. The surface ID can be
  117. * used directly in the command stream and shows up as the same surface
  118. * ID on the host.
  119. */
  120. /**
  121. * struct drm_wmv_surface_create_req
  122. *
  123. * @flags: Surface flags as understood by the host.
  124. * @format: Surface format as understood by the host.
  125. * @mip_levels: Number of mip levels for each face.
  126. * An unused face should have 0 encoded.
  127. * @size_addr: Address of a user-space array of sruct drm_vmw_size
  128. * cast to an uint64_t for 32-64 bit compatibility.
  129. * The size of the array should equal the total number of mipmap levels.
  130. * @shareable: Boolean whether other clients (as identified by file descriptors)
  131. * may reference this surface.
  132. * @scanout: Boolean whether the surface is intended to be used as a
  133. * scanout.
  134. *
  135. * Input data to the DRM_VMW_CREATE_SURFACE Ioctl.
  136. * Output data from the DRM_VMW_REF_SURFACE Ioctl.
  137. */
  138. struct drm_vmw_surface_create_req {
  139. uint32_t flags;
  140. uint32_t format;
  141. uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
  142. uint64_t size_addr;
  143. int32_t shareable;
  144. int32_t scanout;
  145. };
  146. /**
  147. * struct drm_wmv_surface_arg
  148. *
  149. * @sid: Surface id of created surface or surface to destroy or reference.
  150. *
  151. * Output data from the DRM_VMW_CREATE_SURFACE Ioctl.
  152. * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl.
  153. * Input argument to the DRM_VMW_REF_SURFACE Ioctl.
  154. */
  155. struct drm_vmw_surface_arg {
  156. int32_t sid;
  157. uint32_t pad64;
  158. };
  159. /**
  160. * struct drm_vmw_size ioctl.
  161. *
  162. * @width - mip level width
  163. * @height - mip level height
  164. * @depth - mip level depth
  165. *
  166. * Description of a mip level.
  167. * Input data to the DRM_WMW_CREATE_SURFACE Ioctl.
  168. */
  169. struct drm_vmw_size {
  170. uint32_t width;
  171. uint32_t height;
  172. uint32_t depth;
  173. uint32_t pad64;
  174. };
  175. /**
  176. * union drm_vmw_surface_create_arg
  177. *
  178. * @rep: Output data as described above.
  179. * @req: Input data as described above.
  180. *
  181. * Argument to the DRM_VMW_CREATE_SURFACE Ioctl.
  182. */
  183. union drm_vmw_surface_create_arg {
  184. struct drm_vmw_surface_arg rep;
  185. struct drm_vmw_surface_create_req req;
  186. };
  187. /*************************************************************************/
  188. /**
  189. * DRM_VMW_REF_SURFACE - Reference a host surface.
  190. *
  191. * Puts a reference on a host surface with a give sid, as previously
  192. * returned by the DRM_VMW_CREATE_SURFACE ioctl.
  193. * A reference will make sure the surface isn't destroyed while we hold
  194. * it and will allow the calling client to use the surface ID in the command
  195. * stream.
  196. *
  197. * On successful return, the Ioctl returns the surface information given
  198. * in the DRM_VMW_CREATE_SURFACE ioctl.
  199. */
  200. /**
  201. * union drm_vmw_surface_reference_arg
  202. *
  203. * @rep: Output data as described above.
  204. * @req: Input data as described above.
  205. *
  206. * Argument to the DRM_VMW_REF_SURFACE Ioctl.
  207. */
  208. union drm_vmw_surface_reference_arg {
  209. struct drm_vmw_surface_create_req rep;
  210. struct drm_vmw_surface_arg req;
  211. };
  212. /*************************************************************************/
  213. /**
  214. * DRM_VMW_UNREF_SURFACE - Unreference a host surface.
  215. *
  216. * Clear a reference previously put on a host surface.
  217. * When all references are gone, including the one implicitly placed
  218. * on creation,
  219. * a destroy surface command will be queued for the host.
  220. * Does not wait for completion.
  221. */
  222. /*************************************************************************/
  223. /**
  224. * DRM_VMW_EXECBUF
  225. *
  226. * Submit a command buffer for execution on the host, and return a
  227. * fence seqno that when signaled, indicates that the command buffer has
  228. * executed.
  229. */
  230. /**
  231. * struct drm_vmw_execbuf_arg
  232. *
  233. * @commands: User-space address of a command buffer cast to an uint64_t.
  234. * @command-size: Size in bytes of the command buffer.
  235. * @throttle-us: Sleep until software is less than @throttle_us
  236. * microseconds ahead of hardware. The driver may round this value
  237. * to the nearest kernel tick.
  238. * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an
  239. * uint64_t.
  240. * @version: Allows expanding the execbuf ioctl parameters without breaking
  241. * backwards compatibility, since user-space will always tell the kernel
  242. * which version it uses.
  243. * @flags: Execbuf flags. None currently.
  244. *
  245. * Argument to the DRM_VMW_EXECBUF Ioctl.
  246. */
  247. #define DRM_VMW_EXECBUF_VERSION 1
  248. struct drm_vmw_execbuf_arg {
  249. uint64_t commands;
  250. uint32_t command_size;
  251. uint32_t throttle_us;
  252. uint64_t fence_rep;
  253. uint32_t version;
  254. uint32_t flags;
  255. };
  256. /**
  257. * struct drm_vmw_fence_rep
  258. *
  259. * @handle: Fence object handle for fence associated with a command submission.
  260. * @mask: Fence flags relevant for this fence object.
  261. * @seqno: Fence sequence number in fifo. A fence object with a lower
  262. * seqno will signal the EXEC flag before a fence object with a higher
  263. * seqno. This can be used by user-space to avoid kernel calls to determine
  264. * whether a fence has signaled the EXEC flag. Note that @seqno will
  265. * wrap at 32-bit.
  266. * @passed_seqno: The highest seqno number processed by the hardware
  267. * so far. This can be used to mark user-space fence objects as signaled, and
  268. * to determine whether a fence seqno might be stale.
  269. * @error: This member should've been set to -EFAULT on submission.
  270. * The following actions should be take on completion:
  271. * error == -EFAULT: Fence communication failed. The host is synchronized.
  272. * Use the last fence id read from the FIFO fence register.
  273. * error != 0 && error != -EFAULT:
  274. * Fence submission failed. The host is synchronized. Use the fence_seq member.
  275. * error == 0: All is OK, The host may not be synchronized.
  276. * Use the fence_seq member.
  277. *
  278. * Input / Output data to the DRM_VMW_EXECBUF Ioctl.
  279. */
  280. struct drm_vmw_fence_rep {
  281. uint32_t handle;
  282. uint32_t mask;
  283. uint32_t seqno;
  284. uint32_t passed_seqno;
  285. uint32_t pad64;
  286. int32_t error;
  287. };
  288. /*************************************************************************/
  289. /**
  290. * DRM_VMW_ALLOC_DMABUF
  291. *
  292. * Allocate a DMA buffer that is visible also to the host.
  293. * NOTE: The buffer is
  294. * identified by a handle and an offset, which are private to the guest, but
  295. * useable in the command stream. The guest kernel may translate these
  296. * and patch up the command stream accordingly. In the future, the offset may
  297. * be zero at all times, or it may disappear from the interface before it is
  298. * fixed.
  299. *
  300. * The DMA buffer may stay user-space mapped in the guest at all times,
  301. * and is thus suitable for sub-allocation.
  302. *
  303. * DMA buffers are mapped using the mmap() syscall on the drm device.
  304. */
  305. /**
  306. * struct drm_vmw_alloc_dmabuf_req
  307. *
  308. * @size: Required minimum size of the buffer.
  309. *
  310. * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl.
  311. */
  312. struct drm_vmw_alloc_dmabuf_req {
  313. uint32_t size;
  314. uint32_t pad64;
  315. };
  316. /**
  317. * struct drm_vmw_dmabuf_rep
  318. *
  319. * @map_handle: Offset to use in the mmap() call used to map the buffer.
  320. * @handle: Handle unique to this buffer. Used for unreferencing.
  321. * @cur_gmr_id: GMR id to use in the command stream when this buffer is
  322. * referenced. See not above.
  323. * @cur_gmr_offset: Offset to use in the command stream when this buffer is
  324. * referenced. See note above.
  325. *
  326. * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl.
  327. */
  328. struct drm_vmw_dmabuf_rep {
  329. uint64_t map_handle;
  330. uint32_t handle;
  331. uint32_t cur_gmr_id;
  332. uint32_t cur_gmr_offset;
  333. uint32_t pad64;
  334. };
  335. /**
  336. * union drm_vmw_dmabuf_arg
  337. *
  338. * @req: Input data as described above.
  339. * @rep: Output data as described above.
  340. *
  341. * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl.
  342. */
  343. union drm_vmw_alloc_dmabuf_arg {
  344. struct drm_vmw_alloc_dmabuf_req req;
  345. struct drm_vmw_dmabuf_rep rep;
  346. };
  347. /*************************************************************************/
  348. /**
  349. * DRM_VMW_UNREF_DMABUF - Free a DMA buffer.
  350. *
  351. */
  352. /**
  353. * struct drm_vmw_unref_dmabuf_arg
  354. *
  355. * @handle: Handle indicating what buffer to free. Obtained from the
  356. * DRM_VMW_ALLOC_DMABUF Ioctl.
  357. *
  358. * Argument to the DRM_VMW_UNREF_DMABUF Ioctl.
  359. */
  360. struct drm_vmw_unref_dmabuf_arg {
  361. uint32_t handle;
  362. uint32_t pad64;
  363. };
  364. /*************************************************************************/
  365. /**
  366. * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams.
  367. *
  368. * This IOCTL controls the overlay units of the svga device.
  369. * The SVGA overlay units does not work like regular hardware units in
  370. * that they do not automaticaly read back the contents of the given dma
  371. * buffer. But instead only read back for each call to this ioctl, and
  372. * at any point between this call being made and a following call that
  373. * either changes the buffer or disables the stream.
  374. */
  375. /**
  376. * struct drm_vmw_rect
  377. *
  378. * Defines a rectangle. Used in the overlay ioctl to define
  379. * source and destination rectangle.
  380. */
  381. struct drm_vmw_rect {
  382. int32_t x;
  383. int32_t y;
  384. uint32_t w;
  385. uint32_t h;
  386. };
  387. /**
  388. * struct drm_vmw_control_stream_arg
  389. *
  390. * @stream_id: Stearm to control
  391. * @enabled: If false all following arguments are ignored.
  392. * @handle: Handle to buffer for getting data from.
  393. * @format: Format of the overlay as understood by the host.
  394. * @width: Width of the overlay.
  395. * @height: Height of the overlay.
  396. * @size: Size of the overlay in bytes.
  397. * @pitch: Array of pitches, the two last are only used for YUV12 formats.
  398. * @offset: Offset from start of dma buffer to overlay.
  399. * @src: Source rect, must be within the defined area above.
  400. * @dst: Destination rect, x and y may be negative.
  401. *
  402. * Argument to the DRM_VMW_CONTROL_STREAM Ioctl.
  403. */
  404. struct drm_vmw_control_stream_arg {
  405. uint32_t stream_id;
  406. uint32_t enabled;
  407. uint32_t flags;
  408. uint32_t color_key;
  409. uint32_t handle;
  410. uint32_t offset;
  411. int32_t format;
  412. uint32_t size;
  413. uint32_t width;
  414. uint32_t height;
  415. uint32_t pitch[3];
  416. uint32_t pad64;
  417. struct drm_vmw_rect src;
  418. struct drm_vmw_rect dst;
  419. };
  420. /*************************************************************************/
  421. /**
  422. * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass.
  423. *
  424. */
  425. #define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0)
  426. #define DRM_VMW_CURSOR_BYPASS_FLAGS (1)
  427. /**
  428. * struct drm_vmw_cursor_bypass_arg
  429. *
  430. * @flags: Flags.
  431. * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed.
  432. * @xpos: X position of cursor.
  433. * @ypos: Y position of cursor.
  434. * @xhot: X hotspot.
  435. * @yhot: Y hotspot.
  436. *
  437. * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl.
  438. */
  439. struct drm_vmw_cursor_bypass_arg {
  440. uint32_t flags;
  441. uint32_t crtc_id;
  442. int32_t xpos;
  443. int32_t ypos;
  444. int32_t xhot;
  445. int32_t yhot;
  446. };
  447. /*************************************************************************/
  448. /**
  449. * DRM_VMW_CLAIM_STREAM - Claim a single stream.
  450. */
  451. /**
  452. * struct drm_vmw_context_arg
  453. *
  454. * @stream_id: Device unique context ID.
  455. *
  456. * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
  457. * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
  458. */
  459. struct drm_vmw_stream_arg {
  460. uint32_t stream_id;
  461. uint32_t pad64;
  462. };
  463. /*************************************************************************/
  464. /**
  465. * DRM_VMW_UNREF_STREAM - Unclaim a stream.
  466. *
  467. * Return a single stream that was claimed by this process. Also makes
  468. * sure that the stream has been stopped.
  469. */
  470. /*************************************************************************/
  471. /**
  472. * DRM_VMW_GET_3D_CAP
  473. *
  474. * Read 3D capabilities from the FIFO
  475. *
  476. */
  477. /**
  478. * struct drm_vmw_get_3d_cap_arg
  479. *
  480. * @buffer: Pointer to a buffer for capability data, cast to an uint64_t
  481. * @size: Max size to copy
  482. *
  483. * Input argument to the DRM_VMW_GET_3D_CAP_IOCTL
  484. * ioctls.
  485. */
  486. struct drm_vmw_get_3d_cap_arg {
  487. uint64_t buffer;
  488. uint32_t max_size;
  489. uint32_t pad64;
  490. };
  491. /*************************************************************************/
  492. /**
  493. * DRM_VMW_UPDATE_LAYOUT - Update layout
  494. *
  495. * Updates the preferred modes and connection status for connectors. The
  496. * command conisits of one drm_vmw_update_layout_arg pointing out a array
  497. * of num_outputs drm_vmw_rect's.
  498. */
  499. /**
  500. * struct drm_vmw_update_layout_arg
  501. *
  502. * @num_outputs: number of active
  503. * @rects: pointer to array of drm_vmw_rect
  504. *
  505. * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl.
  506. */
  507. struct drm_vmw_update_layout_arg {
  508. uint32_t num_outputs;
  509. uint32_t pad64;
  510. uint64_t rects;
  511. };
  512. /*************************************************************************/
  513. /**
  514. * DRM_VMW_FENCE_WAIT
  515. *
  516. * Waits for a fence object to signal. The wait is interruptible, so that
  517. * signals may be delivered during the interrupt. The wait may timeout,
  518. * in which case the calls returns -EBUSY. If the wait is restarted,
  519. * that is restarting without resetting @cookie_valid to zero,
  520. * the timeout is computed from the first call.
  521. *
  522. * The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait
  523. * on:
  524. * DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command
  525. * stream
  526. * have executed.
  527. * DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish
  528. * commands
  529. * in the buffer given to the EXECBUF ioctl returning the fence object handle
  530. * are available to user-space.
  531. *
  532. * DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the
  533. * fenc wait ioctl returns 0, the fence object has been unreferenced after
  534. * the wait.
  535. */
  536. #define DRM_VMW_FENCE_FLAG_EXEC (1 << 0)
  537. #define DRM_VMW_FENCE_FLAG_QUERY (1 << 1)
  538. #define DRM_VMW_WAIT_OPTION_UNREF (1 << 0)
  539. /**
  540. * struct drm_vmw_fence_wait_arg
  541. *
  542. * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
  543. * @cookie_valid: Must be reset to 0 on first call. Left alone on restart.
  544. * @kernel_cookie: Set to 0 on first call. Left alone on restart.
  545. * @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout.
  546. * @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick
  547. * before returning.
  548. * @flags: Fence flags to wait on.
  549. * @wait_options: Options that control the behaviour of the wait ioctl.
  550. *
  551. * Input argument to the DRM_VMW_FENCE_WAIT ioctl.
  552. */
  553. struct drm_vmw_fence_wait_arg {
  554. uint32_t handle;
  555. int32_t cookie_valid;
  556. uint64_t kernel_cookie;
  557. uint64_t timeout_us;
  558. int32_t lazy;
  559. int32_t flags;
  560. int32_t wait_options;
  561. int32_t pad64;
  562. };
  563. /*************************************************************************/
  564. /**
  565. * DRM_VMW_FENCE_SIGNALED
  566. *
  567. * Checks if a fence object is signaled..
  568. */
  569. /**
  570. * struct drm_vmw_fence_signaled_arg
  571. *
  572. * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
  573. * @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl
  574. * @signaled: Out: Flags signaled.
  575. * @sequence: Out: Highest sequence passed so far. Can be used to signal the
  576. * EXEC flag of user-space fence objects.
  577. *
  578. * Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF
  579. * ioctls.
  580. */
  581. struct drm_vmw_fence_signaled_arg {
  582. uint32_t handle;
  583. uint32_t flags;
  584. int32_t signaled;
  585. uint32_t passed_seqno;
  586. uint32_t signaled_flags;
  587. uint32_t pad64;
  588. };
  589. /*************************************************************************/
  590. /**
  591. * DRM_VMW_FENCE_UNREF
  592. *
  593. * Unreferences a fence object, and causes it to be destroyed if there are no
  594. * other references to it.
  595. *
  596. */
  597. /**
  598. * struct drm_vmw_fence_arg
  599. *
  600. * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
  601. *
  602. * Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl..
  603. */
  604. struct drm_vmw_fence_arg {
  605. uint32_t handle;
  606. uint32_t pad64;
  607. };
  608. /*************************************************************************/
  609. /**
  610. * DRM_VMW_FENCE_EVENT
  611. *
  612. * Queues an event on a fence to be delivered on the drm character device
  613. * when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag.
  614. * Optionally the approximate time when the fence signaled is
  615. * given by the event.
  616. */
  617. /*
  618. * The event type
  619. */
  620. #define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000
  621. struct drm_vmw_event_fence {
  622. struct drm_event base;
  623. uint64_t user_data;
  624. uint32_t tv_sec;
  625. uint32_t tv_usec;
  626. };
  627. /*
  628. * Flags that may be given to the command.
  629. */
  630. /* Request fence signaled time on the event. */
  631. #define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0)
  632. /**
  633. * struct drm_vmw_fence_event_arg
  634. *
  635. * @fence_rep: Pointer to fence_rep structure cast to uint64_t or 0 if
  636. * the fence is not supposed to be referenced by user-space.
  637. * @user_info: Info to be delivered with the event.
  638. * @handle: Attach the event to this fence only.
  639. * @flags: A set of flags as defined above.
  640. */
  641. struct drm_vmw_fence_event_arg {
  642. uint64_t fence_rep;
  643. uint64_t user_data;
  644. uint32_t handle;
  645. uint32_t flags;
  646. };
  647. /*************************************************************************/
  648. /**
  649. * DRM_VMW_PRESENT
  650. *
  651. * Executes an SVGA present on a given fb for a given surface. The surface
  652. * is placed on the framebuffer. Cliprects are given relative to the given
  653. * point (the point disignated by dest_{x|y}).
  654. *
  655. */
  656. /**
  657. * struct drm_vmw_present_arg
  658. * @fb_id: framebuffer id to present / read back from.
  659. * @sid: Surface id to present from.
  660. * @dest_x: X placement coordinate for surface.
  661. * @dest_y: Y placement coordinate for surface.
  662. * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
  663. * @num_clips: Number of cliprects given relative to the framebuffer origin,
  664. * in the same coordinate space as the frame buffer.
  665. * @pad64: Unused 64-bit padding.
  666. *
  667. * Input argument to the DRM_VMW_PRESENT ioctl.
  668. */
  669. struct drm_vmw_present_arg {
  670. uint32_t fb_id;
  671. uint32_t sid;
  672. int32_t dest_x;
  673. int32_t dest_y;
  674. uint64_t clips_ptr;
  675. uint32_t num_clips;
  676. uint32_t pad64;
  677. };
  678. /*************************************************************************/
  679. /**
  680. * DRM_VMW_PRESENT_READBACK
  681. *
  682. * Executes an SVGA present readback from a given fb to the dma buffer
  683. * currently bound as the fb. If there is no dma buffer bound to the fb,
  684. * an error will be returned.
  685. *
  686. */
  687. /**
  688. * struct drm_vmw_present_arg
  689. * @fb_id: fb_id to present / read back from.
  690. * @num_clips: Number of cliprects.
  691. * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
  692. * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an uint64_t.
  693. * If this member is NULL, then the ioctl should not return a fence.
  694. */
  695. struct drm_vmw_present_readback_arg {
  696. uint32_t fb_id;
  697. uint32_t num_clips;
  698. uint64_t clips_ptr;
  699. uint64_t fence_rep;
  700. };
  701. #endif