iwl3945-base.c 120 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/slab.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/sched.h>
  37. #include <linux/skbuff.h>
  38. #include <linux/netdevice.h>
  39. #include <linux/wireless.h>
  40. #include <linux/firmware.h>
  41. #include <linux/etherdevice.h>
  42. #include <linux/if_arp.h>
  43. #include <net/ieee80211_radiotap.h>
  44. #include <net/mac80211.h>
  45. #include <asm/div64.h>
  46. #define DRV_NAME "iwl3945"
  47. #include "iwl-fh.h"
  48. #include "iwl-3945-fh.h"
  49. #include "iwl-commands.h"
  50. #include "iwl-sta.h"
  51. #include "iwl-3945.h"
  52. #include "iwl-core.h"
  53. #include "iwl-helpers.h"
  54. #include "iwl-dev.h"
  55. #include "iwl-spectrum.h"
  56. /*
  57. * module name, copyright, version, etc.
  58. */
  59. #define DRV_DESCRIPTION \
  60. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  61. #ifdef CONFIG_IWLWIFI_DEBUG
  62. #define VD "d"
  63. #else
  64. #define VD
  65. #endif
  66. /*
  67. * add "s" to indicate spectrum measurement included.
  68. * we add it here to be consistent with previous releases in which
  69. * this was configurable.
  70. */
  71. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  72. #define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation"
  73. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  74. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  75. MODULE_VERSION(DRV_VERSION);
  76. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  77. MODULE_LICENSE("GPL");
  78. /* module parameters */
  79. struct iwl_mod_params iwl3945_mod_params = {
  80. .sw_crypto = 1,
  81. .restart_fw = 1,
  82. /* the rest are 0 by default */
  83. };
  84. /**
  85. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  86. * @priv: eeprom and antenna fields are used to determine antenna flags
  87. *
  88. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  89. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  90. *
  91. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  92. * IWL_ANTENNA_MAIN - Force MAIN antenna
  93. * IWL_ANTENNA_AUX - Force AUX antenna
  94. */
  95. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  96. {
  97. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  98. switch (iwl3945_mod_params.antenna) {
  99. case IWL_ANTENNA_DIVERSITY:
  100. return 0;
  101. case IWL_ANTENNA_MAIN:
  102. if (eeprom->antenna_switch_type)
  103. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  104. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  105. case IWL_ANTENNA_AUX:
  106. if (eeprom->antenna_switch_type)
  107. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  108. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  109. }
  110. /* bad antenna selector value */
  111. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  112. iwl3945_mod_params.antenna);
  113. return 0; /* "diversity" is default if error */
  114. }
  115. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  116. struct ieee80211_key_conf *keyconf,
  117. u8 sta_id)
  118. {
  119. unsigned long flags;
  120. __le16 key_flags = 0;
  121. int ret;
  122. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  123. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  124. if (sta_id == priv->hw_params.bcast_sta_id)
  125. key_flags |= STA_KEY_MULTICAST_MSK;
  126. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  127. keyconf->hw_key_idx = keyconf->keyidx;
  128. key_flags &= ~STA_KEY_FLG_INVALID;
  129. spin_lock_irqsave(&priv->sta_lock, flags);
  130. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  131. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  132. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  133. keyconf->keylen);
  134. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  135. keyconf->keylen);
  136. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  137. == STA_KEY_FLG_NO_ENC)
  138. priv->stations[sta_id].sta.key.key_offset =
  139. iwl_get_free_ucode_key_index(priv);
  140. /* else, we are overriding an existing key => no need to allocated room
  141. * in uCode. */
  142. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  143. "no space for a new key");
  144. priv->stations[sta_id].sta.key.key_flags = key_flags;
  145. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  146. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  147. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  148. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  149. spin_unlock_irqrestore(&priv->sta_lock, flags);
  150. return ret;
  151. }
  152. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  153. struct ieee80211_key_conf *keyconf,
  154. u8 sta_id)
  155. {
  156. return -EOPNOTSUPP;
  157. }
  158. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  159. struct ieee80211_key_conf *keyconf,
  160. u8 sta_id)
  161. {
  162. return -EOPNOTSUPP;
  163. }
  164. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  165. {
  166. unsigned long flags;
  167. struct iwl_addsta_cmd sta_cmd;
  168. spin_lock_irqsave(&priv->sta_lock, flags);
  169. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  170. memset(&priv->stations[sta_id].sta.key, 0,
  171. sizeof(struct iwl4965_keyinfo));
  172. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  173. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  174. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  175. memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_addsta_cmd));
  176. spin_unlock_irqrestore(&priv->sta_lock, flags);
  177. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  178. return iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC);
  179. }
  180. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  181. struct ieee80211_key_conf *keyconf, u8 sta_id)
  182. {
  183. int ret = 0;
  184. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  185. switch (keyconf->alg) {
  186. case ALG_CCMP:
  187. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  188. break;
  189. case ALG_TKIP:
  190. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  191. break;
  192. case ALG_WEP:
  193. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  194. break;
  195. default:
  196. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  197. ret = -EINVAL;
  198. }
  199. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  200. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  201. sta_id, ret);
  202. return ret;
  203. }
  204. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  205. {
  206. int ret = -EOPNOTSUPP;
  207. return ret;
  208. }
  209. static int iwl3945_set_static_key(struct iwl_priv *priv,
  210. struct ieee80211_key_conf *key)
  211. {
  212. if (key->alg == ALG_WEP)
  213. return -EOPNOTSUPP;
  214. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  215. return -EINVAL;
  216. }
  217. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  218. {
  219. struct list_head *element;
  220. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  221. priv->frames_count);
  222. while (!list_empty(&priv->free_frames)) {
  223. element = priv->free_frames.next;
  224. list_del(element);
  225. kfree(list_entry(element, struct iwl3945_frame, list));
  226. priv->frames_count--;
  227. }
  228. if (priv->frames_count) {
  229. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  230. priv->frames_count);
  231. priv->frames_count = 0;
  232. }
  233. }
  234. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  235. {
  236. struct iwl3945_frame *frame;
  237. struct list_head *element;
  238. if (list_empty(&priv->free_frames)) {
  239. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  240. if (!frame) {
  241. IWL_ERR(priv, "Could not allocate frame!\n");
  242. return NULL;
  243. }
  244. priv->frames_count++;
  245. return frame;
  246. }
  247. element = priv->free_frames.next;
  248. list_del(element);
  249. return list_entry(element, struct iwl3945_frame, list);
  250. }
  251. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  252. {
  253. memset(frame, 0, sizeof(*frame));
  254. list_add(&frame->list, &priv->free_frames);
  255. }
  256. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  257. struct ieee80211_hdr *hdr,
  258. int left)
  259. {
  260. if (!iwl_is_associated(priv) || !priv->ibss_beacon)
  261. return 0;
  262. if (priv->ibss_beacon->len > left)
  263. return 0;
  264. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  265. return priv->ibss_beacon->len;
  266. }
  267. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  268. {
  269. struct iwl3945_frame *frame;
  270. unsigned int frame_size;
  271. int rc;
  272. u8 rate;
  273. frame = iwl3945_get_free_frame(priv);
  274. if (!frame) {
  275. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  276. "command.\n");
  277. return -ENOMEM;
  278. }
  279. rate = iwl_rate_get_lowest_plcp(priv);
  280. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  281. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  282. &frame->u.cmd[0]);
  283. iwl3945_free_frame(priv, frame);
  284. return rc;
  285. }
  286. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  287. {
  288. if (priv->_3945.shared_virt)
  289. dma_free_coherent(&priv->pci_dev->dev,
  290. sizeof(struct iwl3945_shared),
  291. priv->_3945.shared_virt,
  292. priv->_3945.shared_phys);
  293. }
  294. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  295. struct ieee80211_tx_info *info,
  296. struct iwl_device_cmd *cmd,
  297. struct sk_buff *skb_frag,
  298. int sta_id)
  299. {
  300. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  301. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  302. switch (keyinfo->alg) {
  303. case ALG_CCMP:
  304. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  305. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  306. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  307. break;
  308. case ALG_TKIP:
  309. break;
  310. case ALG_WEP:
  311. tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
  312. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  313. if (keyinfo->keylen == 13)
  314. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  315. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  316. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  317. "with key %d\n", info->control.hw_key->hw_key_idx);
  318. break;
  319. default:
  320. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  321. break;
  322. }
  323. }
  324. /*
  325. * handle build REPLY_TX command notification.
  326. */
  327. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  328. struct iwl_device_cmd *cmd,
  329. struct ieee80211_tx_info *info,
  330. struct ieee80211_hdr *hdr, u8 std_id)
  331. {
  332. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  333. __le32 tx_flags = tx_cmd->tx_flags;
  334. __le16 fc = hdr->frame_control;
  335. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  336. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  337. tx_flags |= TX_CMD_FLG_ACK_MSK;
  338. if (ieee80211_is_mgmt(fc))
  339. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  340. if (ieee80211_is_probe_resp(fc) &&
  341. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  342. tx_flags |= TX_CMD_FLG_TSF_MSK;
  343. } else {
  344. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  345. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  346. }
  347. tx_cmd->sta_id = std_id;
  348. if (ieee80211_has_morefrags(fc))
  349. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  350. if (ieee80211_is_data_qos(fc)) {
  351. u8 *qc = ieee80211_get_qos_ctl(hdr);
  352. tx_cmd->tid_tspec = qc[0] & 0xf;
  353. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  354. } else {
  355. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  356. }
  357. priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
  358. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  359. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  360. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  361. if (ieee80211_is_mgmt(fc)) {
  362. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  363. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  364. else
  365. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  366. } else {
  367. tx_cmd->timeout.pm_frame_timeout = 0;
  368. }
  369. tx_cmd->driver_txop = 0;
  370. tx_cmd->tx_flags = tx_flags;
  371. tx_cmd->next_frame_len = 0;
  372. }
  373. /*
  374. * start REPLY_TX command process
  375. */
  376. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  377. {
  378. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  379. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  380. struct iwl3945_tx_cmd *tx_cmd;
  381. struct iwl_tx_queue *txq = NULL;
  382. struct iwl_queue *q = NULL;
  383. struct iwl_device_cmd *out_cmd;
  384. struct iwl_cmd_meta *out_meta;
  385. dma_addr_t phys_addr;
  386. dma_addr_t txcmd_phys;
  387. int txq_id = skb_get_queue_mapping(skb);
  388. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  389. u8 id;
  390. u8 unicast;
  391. u8 sta_id;
  392. u8 tid = 0;
  393. __le16 fc;
  394. u8 wait_write_ptr = 0;
  395. unsigned long flags;
  396. spin_lock_irqsave(&priv->lock, flags);
  397. if (iwl_is_rfkill(priv)) {
  398. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  399. goto drop_unlock;
  400. }
  401. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  402. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  403. goto drop_unlock;
  404. }
  405. unicast = !is_multicast_ether_addr(hdr->addr1);
  406. id = 0;
  407. fc = hdr->frame_control;
  408. #ifdef CONFIG_IWLWIFI_DEBUG
  409. if (ieee80211_is_auth(fc))
  410. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  411. else if (ieee80211_is_assoc_req(fc))
  412. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  413. else if (ieee80211_is_reassoc_req(fc))
  414. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  415. #endif
  416. spin_unlock_irqrestore(&priv->lock, flags);
  417. hdr_len = ieee80211_hdrlen(fc);
  418. /* Find index into station table for destination station */
  419. sta_id = iwl_sta_id_or_broadcast(priv, info->control.sta);
  420. if (sta_id == IWL_INVALID_STATION) {
  421. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  422. hdr->addr1);
  423. goto drop;
  424. }
  425. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  426. if (ieee80211_is_data_qos(fc)) {
  427. u8 *qc = ieee80211_get_qos_ctl(hdr);
  428. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  429. if (unlikely(tid >= MAX_TID_COUNT))
  430. goto drop;
  431. }
  432. /* Descriptor for chosen Tx queue */
  433. txq = &priv->txq[txq_id];
  434. q = &txq->q;
  435. if ((iwl_queue_space(q) < q->high_mark))
  436. goto drop;
  437. spin_lock_irqsave(&priv->lock, flags);
  438. idx = get_cmd_index(q, q->write_ptr, 0);
  439. /* Set up driver data for this TFD */
  440. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  441. txq->txb[q->write_ptr].skb = skb;
  442. /* Init first empty entry in queue's array of Tx/cmd buffers */
  443. out_cmd = txq->cmd[idx];
  444. out_meta = &txq->meta[idx];
  445. tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  446. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  447. memset(tx_cmd, 0, sizeof(*tx_cmd));
  448. /*
  449. * Set up the Tx-command (not MAC!) header.
  450. * Store the chosen Tx queue and TFD index within the sequence field;
  451. * after Tx, uCode's Tx response will return this value so driver can
  452. * locate the frame within the tx queue and do post-tx processing.
  453. */
  454. out_cmd->hdr.cmd = REPLY_TX;
  455. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  456. INDEX_TO_SEQ(q->write_ptr)));
  457. /* Copy MAC header from skb into command buffer */
  458. memcpy(tx_cmd->hdr, hdr, hdr_len);
  459. if (info->control.hw_key)
  460. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  461. /* TODO need this for burst mode later on */
  462. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  463. /* set is_hcca to 0; it probably will never be implemented */
  464. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  465. /* Total # bytes to be transmitted */
  466. len = (u16)skb->len;
  467. tx_cmd->len = cpu_to_le16(len);
  468. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  469. iwl_update_stats(priv, true, fc, len);
  470. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  471. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  472. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  473. txq->need_update = 1;
  474. } else {
  475. wait_write_ptr = 1;
  476. txq->need_update = 0;
  477. }
  478. IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
  479. le16_to_cpu(out_cmd->hdr.sequence));
  480. IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  481. iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  482. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
  483. ieee80211_hdrlen(fc));
  484. /*
  485. * Use the first empty entry in this queue's command buffer array
  486. * to contain the Tx command and MAC header concatenated together
  487. * (payload data will be in another buffer).
  488. * Size of this varies, due to varying MAC header length.
  489. * If end is not dword aligned, we'll have 2 extra bytes at the end
  490. * of the MAC header (device reads on dword boundaries).
  491. * We'll tell device about this padding later.
  492. */
  493. len = sizeof(struct iwl3945_tx_cmd) +
  494. sizeof(struct iwl_cmd_header) + hdr_len;
  495. len_org = len;
  496. len = (len + 3) & ~3;
  497. if (len_org != len)
  498. len_org = 1;
  499. else
  500. len_org = 0;
  501. /* Physical address of this Tx command's header (not MAC header!),
  502. * within command buffer array. */
  503. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  504. len, PCI_DMA_TODEVICE);
  505. /* we do not map meta data ... so we can safely access address to
  506. * provide to unmap command*/
  507. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  508. dma_unmap_len_set(out_meta, len, len);
  509. /* Add buffer containing Tx command and MAC(!) header to TFD's
  510. * first entry */
  511. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  512. txcmd_phys, len, 1, 0);
  513. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  514. * if any (802.11 null frames have no payload). */
  515. len = skb->len - hdr_len;
  516. if (len) {
  517. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  518. len, PCI_DMA_TODEVICE);
  519. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  520. phys_addr, len,
  521. 0, U32_PAD(len));
  522. }
  523. /* Tell device the write index *just past* this latest filled TFD */
  524. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  525. iwl_txq_update_write_ptr(priv, txq);
  526. spin_unlock_irqrestore(&priv->lock, flags);
  527. if ((iwl_queue_space(q) < q->high_mark)
  528. && priv->mac80211_registered) {
  529. if (wait_write_ptr) {
  530. spin_lock_irqsave(&priv->lock, flags);
  531. txq->need_update = 1;
  532. iwl_txq_update_write_ptr(priv, txq);
  533. spin_unlock_irqrestore(&priv->lock, flags);
  534. }
  535. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  536. }
  537. return 0;
  538. drop_unlock:
  539. spin_unlock_irqrestore(&priv->lock, flags);
  540. drop:
  541. return -1;
  542. }
  543. static int iwl3945_get_measurement(struct iwl_priv *priv,
  544. struct ieee80211_measurement_params *params,
  545. u8 type)
  546. {
  547. struct iwl_spectrum_cmd spectrum;
  548. struct iwl_rx_packet *pkt;
  549. struct iwl_host_cmd cmd = {
  550. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  551. .data = (void *)&spectrum,
  552. .flags = CMD_WANT_SKB,
  553. };
  554. u32 add_time = le64_to_cpu(params->start_time);
  555. int rc;
  556. int spectrum_resp_status;
  557. int duration = le16_to_cpu(params->duration);
  558. if (iwl_is_associated(priv))
  559. add_time = iwl_usecs_to_beacons(priv,
  560. le64_to_cpu(params->start_time) - priv->_3945.last_tsf,
  561. le16_to_cpu(priv->rxon_timing.beacon_interval));
  562. memset(&spectrum, 0, sizeof(spectrum));
  563. spectrum.channel_count = cpu_to_le16(1);
  564. spectrum.flags =
  565. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  566. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  567. cmd.len = sizeof(spectrum);
  568. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  569. if (iwl_is_associated(priv))
  570. spectrum.start_time =
  571. iwl_add_beacon_time(priv,
  572. priv->_3945.last_beacon_time, add_time,
  573. le16_to_cpu(priv->rxon_timing.beacon_interval));
  574. else
  575. spectrum.start_time = 0;
  576. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  577. spectrum.channels[0].channel = params->channel;
  578. spectrum.channels[0].type = type;
  579. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  580. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  581. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  582. rc = iwl_send_cmd_sync(priv, &cmd);
  583. if (rc)
  584. return rc;
  585. pkt = (struct iwl_rx_packet *)cmd.reply_page;
  586. if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
  587. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  588. rc = -EIO;
  589. }
  590. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  591. switch (spectrum_resp_status) {
  592. case 0: /* Command will be handled */
  593. if (pkt->u.spectrum.id != 0xff) {
  594. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  595. pkt->u.spectrum.id);
  596. priv->measurement_status &= ~MEASUREMENT_READY;
  597. }
  598. priv->measurement_status |= MEASUREMENT_ACTIVE;
  599. rc = 0;
  600. break;
  601. case 1: /* Command will not be handled */
  602. rc = -EAGAIN;
  603. break;
  604. }
  605. iwl_free_pages(priv, cmd.reply_page);
  606. return rc;
  607. }
  608. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  609. struct iwl_rx_mem_buffer *rxb)
  610. {
  611. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  612. struct iwl_alive_resp *palive;
  613. struct delayed_work *pwork;
  614. palive = &pkt->u.alive_frame;
  615. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  616. "0x%01X 0x%01X\n",
  617. palive->is_valid, palive->ver_type,
  618. palive->ver_subtype);
  619. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  620. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  621. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  622. sizeof(struct iwl_alive_resp));
  623. pwork = &priv->init_alive_start;
  624. } else {
  625. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  626. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  627. sizeof(struct iwl_alive_resp));
  628. pwork = &priv->alive_start;
  629. iwl3945_disable_events(priv);
  630. }
  631. /* We delay the ALIVE response by 5ms to
  632. * give the HW RF Kill time to activate... */
  633. if (palive->is_valid == UCODE_VALID_OK)
  634. queue_delayed_work(priv->workqueue, pwork,
  635. msecs_to_jiffies(5));
  636. else
  637. IWL_WARN(priv, "uCode did not respond OK.\n");
  638. }
  639. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  640. struct iwl_rx_mem_buffer *rxb)
  641. {
  642. #ifdef CONFIG_IWLWIFI_DEBUG
  643. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  644. #endif
  645. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  646. }
  647. static void iwl3945_bg_beacon_update(struct work_struct *work)
  648. {
  649. struct iwl_priv *priv =
  650. container_of(work, struct iwl_priv, beacon_update);
  651. struct sk_buff *beacon;
  652. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  653. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  654. if (!beacon) {
  655. IWL_ERR(priv, "update beacon failed\n");
  656. return;
  657. }
  658. mutex_lock(&priv->mutex);
  659. /* new beacon skb is allocated every time; dispose previous.*/
  660. if (priv->ibss_beacon)
  661. dev_kfree_skb(priv->ibss_beacon);
  662. priv->ibss_beacon = beacon;
  663. mutex_unlock(&priv->mutex);
  664. iwl3945_send_beacon_cmd(priv);
  665. }
  666. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  667. struct iwl_rx_mem_buffer *rxb)
  668. {
  669. #ifdef CONFIG_IWLWIFI_DEBUG
  670. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  671. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  672. u8 rate = beacon->beacon_notify_hdr.rate;
  673. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  674. "tsf %d %d rate %d\n",
  675. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  676. beacon->beacon_notify_hdr.failure_frame,
  677. le32_to_cpu(beacon->ibss_mgr_status),
  678. le32_to_cpu(beacon->high_tsf),
  679. le32_to_cpu(beacon->low_tsf), rate);
  680. #endif
  681. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  682. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  683. queue_work(priv->workqueue, &priv->beacon_update);
  684. }
  685. /* Handle notification from uCode that card's power state is changing
  686. * due to software, hardware, or critical temperature RFKILL */
  687. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  688. struct iwl_rx_mem_buffer *rxb)
  689. {
  690. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  691. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  692. unsigned long status = priv->status;
  693. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  694. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  695. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  696. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  697. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  698. if (flags & HW_CARD_DISABLED)
  699. set_bit(STATUS_RF_KILL_HW, &priv->status);
  700. else
  701. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  702. iwl_scan_cancel(priv);
  703. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  704. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  705. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  706. test_bit(STATUS_RF_KILL_HW, &priv->status));
  707. else
  708. wake_up_interruptible(&priv->wait_command_queue);
  709. }
  710. /**
  711. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  712. *
  713. * Setup the RX handlers for each of the reply types sent from the uCode
  714. * to the host.
  715. *
  716. * This function chains into the hardware specific files for them to setup
  717. * any hardware specific handlers as well.
  718. */
  719. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  720. {
  721. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  722. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  723. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  724. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  725. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  726. iwl_rx_spectrum_measure_notif;
  727. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  728. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  729. iwl_rx_pm_debug_statistics_notif;
  730. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  731. /*
  732. * The same handler is used for both the REPLY to a discrete
  733. * statistics request from the host as well as for the periodic
  734. * statistics notifications (after received beacons) from the uCode.
  735. */
  736. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_reply_statistics;
  737. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  738. iwl_setup_rx_scan_handlers(priv);
  739. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  740. /* Set up hardware specific Rx handlers */
  741. iwl3945_hw_rx_handler_setup(priv);
  742. }
  743. /************************** RX-FUNCTIONS ****************************/
  744. /*
  745. * Rx theory of operation
  746. *
  747. * The host allocates 32 DMA target addresses and passes the host address
  748. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  749. * 0 to 31
  750. *
  751. * Rx Queue Indexes
  752. * The host/firmware share two index registers for managing the Rx buffers.
  753. *
  754. * The READ index maps to the first position that the firmware may be writing
  755. * to -- the driver can read up to (but not including) this position and get
  756. * good data.
  757. * The READ index is managed by the firmware once the card is enabled.
  758. *
  759. * The WRITE index maps to the last position the driver has read from -- the
  760. * position preceding WRITE is the last slot the firmware can place a packet.
  761. *
  762. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  763. * WRITE = READ.
  764. *
  765. * During initialization, the host sets up the READ queue position to the first
  766. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  767. *
  768. * When the firmware places a packet in a buffer, it will advance the READ index
  769. * and fire the RX interrupt. The driver can then query the READ index and
  770. * process as many packets as possible, moving the WRITE index forward as it
  771. * resets the Rx queue buffers with new memory.
  772. *
  773. * The management in the driver is as follows:
  774. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  775. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  776. * to replenish the iwl->rxq->rx_free.
  777. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  778. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  779. * 'processed' and 'read' driver indexes as well)
  780. * + A received packet is processed and handed to the kernel network stack,
  781. * detached from the iwl->rxq. The driver 'processed' index is updated.
  782. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  783. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  784. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  785. * were enough free buffers and RX_STALLED is set it is cleared.
  786. *
  787. *
  788. * Driver sequence:
  789. *
  790. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  791. * iwl3945_rx_queue_restock
  792. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  793. * queue, updates firmware pointers, and updates
  794. * the WRITE index. If insufficient rx_free buffers
  795. * are available, schedules iwl3945_rx_replenish
  796. *
  797. * -- enable interrupts --
  798. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  799. * READ INDEX, detaching the SKB from the pool.
  800. * Moves the packet buffer from queue to rx_used.
  801. * Calls iwl3945_rx_queue_restock to refill any empty
  802. * slots.
  803. * ...
  804. *
  805. */
  806. /**
  807. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  808. */
  809. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  810. dma_addr_t dma_addr)
  811. {
  812. return cpu_to_le32((u32)dma_addr);
  813. }
  814. /**
  815. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  816. *
  817. * If there are slots in the RX queue that need to be restocked,
  818. * and we have free pre-allocated buffers, fill the ranks as much
  819. * as we can, pulling from rx_free.
  820. *
  821. * This moves the 'write' index forward to catch up with 'processed', and
  822. * also updates the memory address in the firmware to reference the new
  823. * target buffer.
  824. */
  825. static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
  826. {
  827. struct iwl_rx_queue *rxq = &priv->rxq;
  828. struct list_head *element;
  829. struct iwl_rx_mem_buffer *rxb;
  830. unsigned long flags;
  831. int write;
  832. spin_lock_irqsave(&rxq->lock, flags);
  833. write = rxq->write & ~0x7;
  834. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  835. /* Get next free Rx buffer, remove from free list */
  836. element = rxq->rx_free.next;
  837. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  838. list_del(element);
  839. /* Point to Rx buffer via next RBD in circular buffer */
  840. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
  841. rxq->queue[rxq->write] = rxb;
  842. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  843. rxq->free_count--;
  844. }
  845. spin_unlock_irqrestore(&rxq->lock, flags);
  846. /* If the pre-allocated buffer pool is dropping low, schedule to
  847. * refill it */
  848. if (rxq->free_count <= RX_LOW_WATERMARK)
  849. queue_work(priv->workqueue, &priv->rx_replenish);
  850. /* If we've added more space for the firmware to place data, tell it.
  851. * Increment device's write pointer in multiples of 8. */
  852. if ((rxq->write_actual != (rxq->write & ~0x7))
  853. || (abs(rxq->write - rxq->read) > 7)) {
  854. spin_lock_irqsave(&rxq->lock, flags);
  855. rxq->need_update = 1;
  856. spin_unlock_irqrestore(&rxq->lock, flags);
  857. iwl_rx_queue_update_write_ptr(priv, rxq);
  858. }
  859. }
  860. /**
  861. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  862. *
  863. * When moving to rx_free an SKB is allocated for the slot.
  864. *
  865. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  866. * This is called as a scheduled work item (except for during initialization)
  867. */
  868. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  869. {
  870. struct iwl_rx_queue *rxq = &priv->rxq;
  871. struct list_head *element;
  872. struct iwl_rx_mem_buffer *rxb;
  873. struct page *page;
  874. unsigned long flags;
  875. gfp_t gfp_mask = priority;
  876. while (1) {
  877. spin_lock_irqsave(&rxq->lock, flags);
  878. if (list_empty(&rxq->rx_used)) {
  879. spin_unlock_irqrestore(&rxq->lock, flags);
  880. return;
  881. }
  882. spin_unlock_irqrestore(&rxq->lock, flags);
  883. if (rxq->free_count > RX_LOW_WATERMARK)
  884. gfp_mask |= __GFP_NOWARN;
  885. if (priv->hw_params.rx_page_order > 0)
  886. gfp_mask |= __GFP_COMP;
  887. /* Alloc a new receive buffer */
  888. page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
  889. if (!page) {
  890. if (net_ratelimit())
  891. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  892. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  893. net_ratelimit())
  894. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  895. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  896. rxq->free_count);
  897. /* We don't reschedule replenish work here -- we will
  898. * call the restock method and if it still needs
  899. * more buffers it will schedule replenish */
  900. break;
  901. }
  902. spin_lock_irqsave(&rxq->lock, flags);
  903. if (list_empty(&rxq->rx_used)) {
  904. spin_unlock_irqrestore(&rxq->lock, flags);
  905. __free_pages(page, priv->hw_params.rx_page_order);
  906. return;
  907. }
  908. element = rxq->rx_used.next;
  909. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  910. list_del(element);
  911. spin_unlock_irqrestore(&rxq->lock, flags);
  912. rxb->page = page;
  913. /* Get physical address of RB/SKB */
  914. rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
  915. PAGE_SIZE << priv->hw_params.rx_page_order,
  916. PCI_DMA_FROMDEVICE);
  917. spin_lock_irqsave(&rxq->lock, flags);
  918. list_add_tail(&rxb->list, &rxq->rx_free);
  919. rxq->free_count++;
  920. priv->alloc_rxb_page++;
  921. spin_unlock_irqrestore(&rxq->lock, flags);
  922. }
  923. }
  924. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  925. {
  926. unsigned long flags;
  927. int i;
  928. spin_lock_irqsave(&rxq->lock, flags);
  929. INIT_LIST_HEAD(&rxq->rx_free);
  930. INIT_LIST_HEAD(&rxq->rx_used);
  931. /* Fill the rx_used queue with _all_ of the Rx buffers */
  932. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  933. /* In the reset function, these buffers may have been allocated
  934. * to an SKB, so we need to unmap and free potential storage */
  935. if (rxq->pool[i].page != NULL) {
  936. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  937. PAGE_SIZE << priv->hw_params.rx_page_order,
  938. PCI_DMA_FROMDEVICE);
  939. __iwl_free_pages(priv, rxq->pool[i].page);
  940. rxq->pool[i].page = NULL;
  941. }
  942. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  943. }
  944. /* Set us so that we have processed and used all buffers, but have
  945. * not restocked the Rx queue with fresh buffers */
  946. rxq->read = rxq->write = 0;
  947. rxq->write_actual = 0;
  948. rxq->free_count = 0;
  949. spin_unlock_irqrestore(&rxq->lock, flags);
  950. }
  951. void iwl3945_rx_replenish(void *data)
  952. {
  953. struct iwl_priv *priv = data;
  954. unsigned long flags;
  955. iwl3945_rx_allocate(priv, GFP_KERNEL);
  956. spin_lock_irqsave(&priv->lock, flags);
  957. iwl3945_rx_queue_restock(priv);
  958. spin_unlock_irqrestore(&priv->lock, flags);
  959. }
  960. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  961. {
  962. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  963. iwl3945_rx_queue_restock(priv);
  964. }
  965. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  966. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  967. * This free routine walks the list of POOL entries and if SKB is set to
  968. * non NULL it is unmapped and freed
  969. */
  970. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  971. {
  972. int i;
  973. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  974. if (rxq->pool[i].page != NULL) {
  975. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  976. PAGE_SIZE << priv->hw_params.rx_page_order,
  977. PCI_DMA_FROMDEVICE);
  978. __iwl_free_pages(priv, rxq->pool[i].page);
  979. rxq->pool[i].page = NULL;
  980. }
  981. }
  982. dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  983. rxq->bd_dma);
  984. dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
  985. rxq->rb_stts, rxq->rb_stts_dma);
  986. rxq->bd = NULL;
  987. rxq->rb_stts = NULL;
  988. }
  989. /* Convert linear signal-to-noise ratio into dB */
  990. static u8 ratio2dB[100] = {
  991. /* 0 1 2 3 4 5 6 7 8 9 */
  992. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  993. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  994. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  995. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  996. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  997. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  998. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  999. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1000. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1001. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1002. };
  1003. /* Calculates a relative dB value from a ratio of linear
  1004. * (i.e. not dB) signal levels.
  1005. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1006. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1007. {
  1008. /* 1000:1 or higher just report as 60 dB */
  1009. if (sig_ratio >= 1000)
  1010. return 60;
  1011. /* 100:1 or higher, divide by 10 and use table,
  1012. * add 20 dB to make up for divide by 10 */
  1013. if (sig_ratio >= 100)
  1014. return 20 + (int)ratio2dB[sig_ratio/10];
  1015. /* We shouldn't see this */
  1016. if (sig_ratio < 1)
  1017. return 0;
  1018. /* Use table for ratios 1:1 - 99:1 */
  1019. return (int)ratio2dB[sig_ratio];
  1020. }
  1021. /**
  1022. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1023. *
  1024. * Uses the priv->rx_handlers callback function array to invoke
  1025. * the appropriate handlers, including command responses,
  1026. * frame-received notifications, and other notifications.
  1027. */
  1028. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1029. {
  1030. struct iwl_rx_mem_buffer *rxb;
  1031. struct iwl_rx_packet *pkt;
  1032. struct iwl_rx_queue *rxq = &priv->rxq;
  1033. u32 r, i;
  1034. int reclaim;
  1035. unsigned long flags;
  1036. u8 fill_rx = 0;
  1037. u32 count = 8;
  1038. int total_empty = 0;
  1039. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1040. * buffer that the driver may process (last buffer filled by ucode). */
  1041. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1042. i = rxq->read;
  1043. /* calculate total frames need to be restock after handling RX */
  1044. total_empty = r - rxq->write_actual;
  1045. if (total_empty < 0)
  1046. total_empty += RX_QUEUE_SIZE;
  1047. if (total_empty > (RX_QUEUE_SIZE / 2))
  1048. fill_rx = 1;
  1049. /* Rx interrupt, but nothing sent from uCode */
  1050. if (i == r)
  1051. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1052. while (i != r) {
  1053. int len;
  1054. rxb = rxq->queue[i];
  1055. /* If an RXB doesn't have a Rx queue slot associated with it,
  1056. * then a bug has been introduced in the queue refilling
  1057. * routines -- catch it here */
  1058. BUG_ON(rxb == NULL);
  1059. rxq->queue[i] = NULL;
  1060. pci_unmap_page(priv->pci_dev, rxb->page_dma,
  1061. PAGE_SIZE << priv->hw_params.rx_page_order,
  1062. PCI_DMA_FROMDEVICE);
  1063. pkt = rxb_addr(rxb);
  1064. len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1065. len += sizeof(u32); /* account for status word */
  1066. trace_iwlwifi_dev_rx(priv, pkt, len);
  1067. /* Reclaim a command buffer only if this packet is a response
  1068. * to a (driver-originated) command.
  1069. * If the packet (e.g. Rx frame) originated from uCode,
  1070. * there is no command buffer to reclaim.
  1071. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1072. * but apparently a few don't get set; catch them here. */
  1073. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1074. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1075. (pkt->hdr.cmd != REPLY_TX);
  1076. /* Based on type of command response or notification,
  1077. * handle those that need handling via function in
  1078. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1079. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1080. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1081. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1082. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1083. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1084. } else {
  1085. /* No handling needed */
  1086. IWL_DEBUG_RX(priv,
  1087. "r %d i %d No handler needed for %s, 0x%02x\n",
  1088. r, i, get_cmd_string(pkt->hdr.cmd),
  1089. pkt->hdr.cmd);
  1090. }
  1091. /*
  1092. * XXX: After here, we should always check rxb->page
  1093. * against NULL before touching it or its virtual
  1094. * memory (pkt). Because some rx_handler might have
  1095. * already taken or freed the pages.
  1096. */
  1097. if (reclaim) {
  1098. /* Invoke any callbacks, transfer the buffer to caller,
  1099. * and fire off the (possibly) blocking iwl_send_cmd()
  1100. * as we reclaim the driver command queue */
  1101. if (rxb->page)
  1102. iwl_tx_cmd_complete(priv, rxb);
  1103. else
  1104. IWL_WARN(priv, "Claim null rxb?\n");
  1105. }
  1106. /* Reuse the page if possible. For notification packets and
  1107. * SKBs that fail to Rx correctly, add them back into the
  1108. * rx_free list for reuse later. */
  1109. spin_lock_irqsave(&rxq->lock, flags);
  1110. if (rxb->page != NULL) {
  1111. rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
  1112. 0, PAGE_SIZE << priv->hw_params.rx_page_order,
  1113. PCI_DMA_FROMDEVICE);
  1114. list_add_tail(&rxb->list, &rxq->rx_free);
  1115. rxq->free_count++;
  1116. } else
  1117. list_add_tail(&rxb->list, &rxq->rx_used);
  1118. spin_unlock_irqrestore(&rxq->lock, flags);
  1119. i = (i + 1) & RX_QUEUE_MASK;
  1120. /* If there are a lot of unused frames,
  1121. * restock the Rx queue so ucode won't assert. */
  1122. if (fill_rx) {
  1123. count++;
  1124. if (count >= 8) {
  1125. rxq->read = i;
  1126. iwl3945_rx_replenish_now(priv);
  1127. count = 0;
  1128. }
  1129. }
  1130. }
  1131. /* Backtrack one entry */
  1132. rxq->read = i;
  1133. if (fill_rx)
  1134. iwl3945_rx_replenish_now(priv);
  1135. else
  1136. iwl3945_rx_queue_restock(priv);
  1137. }
  1138. /* call this function to flush any scheduled tasklet */
  1139. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1140. {
  1141. /* wait to make sure we flush pending tasklet*/
  1142. synchronize_irq(priv->pci_dev->irq);
  1143. tasklet_kill(&priv->irq_tasklet);
  1144. }
  1145. static const char *desc_lookup(int i)
  1146. {
  1147. switch (i) {
  1148. case 1:
  1149. return "FAIL";
  1150. case 2:
  1151. return "BAD_PARAM";
  1152. case 3:
  1153. return "BAD_CHECKSUM";
  1154. case 4:
  1155. return "NMI_INTERRUPT";
  1156. case 5:
  1157. return "SYSASSERT";
  1158. case 6:
  1159. return "FATAL_ERROR";
  1160. }
  1161. return "UNKNOWN";
  1162. }
  1163. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1164. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1165. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1166. {
  1167. u32 i;
  1168. u32 desc, time, count, base, data1;
  1169. u32 blink1, blink2, ilink1, ilink2;
  1170. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1171. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1172. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1173. return;
  1174. }
  1175. count = iwl_read_targ_mem(priv, base);
  1176. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1177. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1178. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1179. priv->status, count);
  1180. }
  1181. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1182. "ilink1 nmiPC Line\n");
  1183. for (i = ERROR_START_OFFSET;
  1184. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1185. i += ERROR_ELEM_SIZE) {
  1186. desc = iwl_read_targ_mem(priv, base + i);
  1187. time =
  1188. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1189. blink1 =
  1190. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1191. blink2 =
  1192. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1193. ilink1 =
  1194. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1195. ilink2 =
  1196. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1197. data1 =
  1198. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1199. IWL_ERR(priv,
  1200. "%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1201. desc_lookup(desc), desc, time, blink1, blink2,
  1202. ilink1, ilink2, data1);
  1203. trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
  1204. 0, blink1, blink2, ilink1, ilink2);
  1205. }
  1206. }
  1207. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1208. /**
  1209. * iwl3945_print_event_log - Dump error event log to syslog
  1210. *
  1211. */
  1212. static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1213. u32 num_events, u32 mode,
  1214. int pos, char **buf, size_t bufsz)
  1215. {
  1216. u32 i;
  1217. u32 base; /* SRAM byte address of event log header */
  1218. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1219. u32 ptr; /* SRAM byte address of log data */
  1220. u32 ev, time, data; /* event log data */
  1221. unsigned long reg_flags;
  1222. if (num_events == 0)
  1223. return pos;
  1224. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1225. if (mode == 0)
  1226. event_size = 2 * sizeof(u32);
  1227. else
  1228. event_size = 3 * sizeof(u32);
  1229. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1230. /* Make sure device is powered up for SRAM reads */
  1231. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  1232. iwl_grab_nic_access(priv);
  1233. /* Set starting address; reads will auto-increment */
  1234. _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
  1235. rmb();
  1236. /* "time" is actually "data" for mode 0 (no timestamp).
  1237. * place event id # at far right for easier visual parsing. */
  1238. for (i = 0; i < num_events; i++) {
  1239. ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1240. time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1241. if (mode == 0) {
  1242. /* data, ev */
  1243. if (bufsz) {
  1244. pos += scnprintf(*buf + pos, bufsz - pos,
  1245. "0x%08x:%04u\n",
  1246. time, ev);
  1247. } else {
  1248. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1249. trace_iwlwifi_dev_ucode_event(priv, 0,
  1250. time, ev);
  1251. }
  1252. } else {
  1253. data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1254. if (bufsz) {
  1255. pos += scnprintf(*buf + pos, bufsz - pos,
  1256. "%010u:0x%08x:%04u\n",
  1257. time, data, ev);
  1258. } else {
  1259. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
  1260. time, data, ev);
  1261. trace_iwlwifi_dev_ucode_event(priv, time,
  1262. data, ev);
  1263. }
  1264. }
  1265. }
  1266. /* Allow device to power down */
  1267. iwl_release_nic_access(priv);
  1268. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  1269. return pos;
  1270. }
  1271. /**
  1272. * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
  1273. */
  1274. static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
  1275. u32 num_wraps, u32 next_entry,
  1276. u32 size, u32 mode,
  1277. int pos, char **buf, size_t bufsz)
  1278. {
  1279. /*
  1280. * display the newest DEFAULT_LOG_ENTRIES entries
  1281. * i.e the entries just before the next ont that uCode would fill.
  1282. */
  1283. if (num_wraps) {
  1284. if (next_entry < size) {
  1285. pos = iwl3945_print_event_log(priv,
  1286. capacity - (size - next_entry),
  1287. size - next_entry, mode,
  1288. pos, buf, bufsz);
  1289. pos = iwl3945_print_event_log(priv, 0,
  1290. next_entry, mode,
  1291. pos, buf, bufsz);
  1292. } else
  1293. pos = iwl3945_print_event_log(priv, next_entry - size,
  1294. size, mode,
  1295. pos, buf, bufsz);
  1296. } else {
  1297. if (next_entry < size)
  1298. pos = iwl3945_print_event_log(priv, 0,
  1299. next_entry, mode,
  1300. pos, buf, bufsz);
  1301. else
  1302. pos = iwl3945_print_event_log(priv, next_entry - size,
  1303. size, mode,
  1304. pos, buf, bufsz);
  1305. }
  1306. return pos;
  1307. }
  1308. #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
  1309. int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
  1310. char **buf, bool display)
  1311. {
  1312. u32 base; /* SRAM byte address of event log header */
  1313. u32 capacity; /* event log capacity in # entries */
  1314. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1315. u32 num_wraps; /* # times uCode wrapped to top of log */
  1316. u32 next_entry; /* index of next entry to be written by uCode */
  1317. u32 size; /* # entries that we'll print */
  1318. int pos = 0;
  1319. size_t bufsz = 0;
  1320. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1321. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1322. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1323. return -EINVAL;
  1324. }
  1325. /* event log header */
  1326. capacity = iwl_read_targ_mem(priv, base);
  1327. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1328. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1329. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1330. if (capacity > priv->cfg->max_event_log_size) {
  1331. IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
  1332. capacity, priv->cfg->max_event_log_size);
  1333. capacity = priv->cfg->max_event_log_size;
  1334. }
  1335. if (next_entry > priv->cfg->max_event_log_size) {
  1336. IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
  1337. next_entry, priv->cfg->max_event_log_size);
  1338. next_entry = priv->cfg->max_event_log_size;
  1339. }
  1340. size = num_wraps ? capacity : next_entry;
  1341. /* bail out if nothing in log */
  1342. if (size == 0) {
  1343. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1344. return pos;
  1345. }
  1346. #ifdef CONFIG_IWLWIFI_DEBUG
  1347. if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
  1348. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1349. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1350. #else
  1351. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1352. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1353. #endif
  1354. IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
  1355. size);
  1356. #ifdef CONFIG_IWLWIFI_DEBUG
  1357. if (display) {
  1358. if (full_log)
  1359. bufsz = capacity * 48;
  1360. else
  1361. bufsz = size * 48;
  1362. *buf = kmalloc(bufsz, GFP_KERNEL);
  1363. if (!*buf)
  1364. return -ENOMEM;
  1365. }
  1366. if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
  1367. /* if uCode has wrapped back to top of log,
  1368. * start at the oldest entry,
  1369. * i.e the next one that uCode would fill.
  1370. */
  1371. if (num_wraps)
  1372. pos = iwl3945_print_event_log(priv, next_entry,
  1373. capacity - next_entry, mode,
  1374. pos, buf, bufsz);
  1375. /* (then/else) start at top of log */
  1376. pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
  1377. pos, buf, bufsz);
  1378. } else
  1379. pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1380. next_entry, size, mode,
  1381. pos, buf, bufsz);
  1382. #else
  1383. pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1384. next_entry, size, mode,
  1385. pos, buf, bufsz);
  1386. #endif
  1387. return pos;
  1388. }
  1389. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1390. {
  1391. u32 inta, handled = 0;
  1392. u32 inta_fh;
  1393. unsigned long flags;
  1394. #ifdef CONFIG_IWLWIFI_DEBUG
  1395. u32 inta_mask;
  1396. #endif
  1397. spin_lock_irqsave(&priv->lock, flags);
  1398. /* Ack/clear/reset pending uCode interrupts.
  1399. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1400. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1401. inta = iwl_read32(priv, CSR_INT);
  1402. iwl_write32(priv, CSR_INT, inta);
  1403. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1404. * Any new interrupts that happen after this, either while we're
  1405. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1406. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1407. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1408. #ifdef CONFIG_IWLWIFI_DEBUG
  1409. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  1410. /* just for debug */
  1411. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1412. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1413. inta, inta_mask, inta_fh);
  1414. }
  1415. #endif
  1416. spin_unlock_irqrestore(&priv->lock, flags);
  1417. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1418. * atomic, make sure that inta covers all the interrupts that
  1419. * we've discovered, even if FH interrupt came in just after
  1420. * reading CSR_INT. */
  1421. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1422. inta |= CSR_INT_BIT_FH_RX;
  1423. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1424. inta |= CSR_INT_BIT_FH_TX;
  1425. /* Now service all interrupt bits discovered above. */
  1426. if (inta & CSR_INT_BIT_HW_ERR) {
  1427. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1428. /* Tell the device to stop sending interrupts */
  1429. iwl_disable_interrupts(priv);
  1430. priv->isr_stats.hw++;
  1431. iwl_irq_handle_error(priv);
  1432. handled |= CSR_INT_BIT_HW_ERR;
  1433. return;
  1434. }
  1435. #ifdef CONFIG_IWLWIFI_DEBUG
  1436. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1437. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1438. if (inta & CSR_INT_BIT_SCD) {
  1439. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1440. "the frame/frames.\n");
  1441. priv->isr_stats.sch++;
  1442. }
  1443. /* Alive notification via Rx interrupt will do the real work */
  1444. if (inta & CSR_INT_BIT_ALIVE) {
  1445. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1446. priv->isr_stats.alive++;
  1447. }
  1448. }
  1449. #endif
  1450. /* Safely ignore these bits for debug checks below */
  1451. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1452. /* Error detected by uCode */
  1453. if (inta & CSR_INT_BIT_SW_ERR) {
  1454. IWL_ERR(priv, "Microcode SW error detected. "
  1455. "Restarting 0x%X.\n", inta);
  1456. priv->isr_stats.sw++;
  1457. priv->isr_stats.sw_err = inta;
  1458. iwl_irq_handle_error(priv);
  1459. handled |= CSR_INT_BIT_SW_ERR;
  1460. }
  1461. /* uCode wakes up after power-down sleep */
  1462. if (inta & CSR_INT_BIT_WAKEUP) {
  1463. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1464. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1465. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1466. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1467. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1468. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1469. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1470. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1471. priv->isr_stats.wakeup++;
  1472. handled |= CSR_INT_BIT_WAKEUP;
  1473. }
  1474. /* All uCode command responses, including Tx command responses,
  1475. * Rx "responses" (frame-received notification), and other
  1476. * notifications from uCode come through here*/
  1477. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1478. iwl3945_rx_handle(priv);
  1479. priv->isr_stats.rx++;
  1480. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1481. }
  1482. if (inta & CSR_INT_BIT_FH_TX) {
  1483. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1484. priv->isr_stats.tx++;
  1485. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1486. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1487. (FH39_SRVC_CHNL), 0x0);
  1488. handled |= CSR_INT_BIT_FH_TX;
  1489. }
  1490. if (inta & ~handled) {
  1491. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1492. priv->isr_stats.unhandled++;
  1493. }
  1494. if (inta & ~priv->inta_mask) {
  1495. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1496. inta & ~priv->inta_mask);
  1497. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1498. }
  1499. /* Re-enable all interrupts */
  1500. /* only Re-enable if disabled by irq */
  1501. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1502. iwl_enable_interrupts(priv);
  1503. #ifdef CONFIG_IWLWIFI_DEBUG
  1504. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1505. inta = iwl_read32(priv, CSR_INT);
  1506. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1507. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1508. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1509. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1510. }
  1511. #endif
  1512. }
  1513. static int iwl3945_get_single_channel_for_scan(struct iwl_priv *priv,
  1514. struct ieee80211_vif *vif,
  1515. enum ieee80211_band band,
  1516. struct iwl3945_scan_channel *scan_ch)
  1517. {
  1518. const struct ieee80211_supported_band *sband;
  1519. u16 passive_dwell = 0;
  1520. u16 active_dwell = 0;
  1521. int added = 0;
  1522. u8 channel = 0;
  1523. sband = iwl_get_hw_mode(priv, band);
  1524. if (!sband) {
  1525. IWL_ERR(priv, "invalid band\n");
  1526. return added;
  1527. }
  1528. active_dwell = iwl_get_active_dwell_time(priv, band, 0);
  1529. passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
  1530. if (passive_dwell <= active_dwell)
  1531. passive_dwell = active_dwell + 1;
  1532. channel = iwl_get_single_channel_number(priv, band);
  1533. if (channel) {
  1534. scan_ch->channel = channel;
  1535. scan_ch->type = 0; /* passive */
  1536. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1537. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1538. /* Set txpower levels to defaults */
  1539. scan_ch->tpc.dsp_atten = 110;
  1540. if (band == IEEE80211_BAND_5GHZ)
  1541. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1542. else
  1543. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1544. added++;
  1545. } else
  1546. IWL_ERR(priv, "no valid channel found\n");
  1547. return added;
  1548. }
  1549. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1550. enum ieee80211_band band,
  1551. u8 is_active, u8 n_probes,
  1552. struct iwl3945_scan_channel *scan_ch,
  1553. struct ieee80211_vif *vif)
  1554. {
  1555. struct ieee80211_channel *chan;
  1556. const struct ieee80211_supported_band *sband;
  1557. const struct iwl_channel_info *ch_info;
  1558. u16 passive_dwell = 0;
  1559. u16 active_dwell = 0;
  1560. int added, i;
  1561. sband = iwl_get_hw_mode(priv, band);
  1562. if (!sband)
  1563. return 0;
  1564. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1565. passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
  1566. if (passive_dwell <= active_dwell)
  1567. passive_dwell = active_dwell + 1;
  1568. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1569. chan = priv->scan_request->channels[i];
  1570. if (chan->band != band)
  1571. continue;
  1572. scan_ch->channel = chan->hw_value;
  1573. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1574. if (!is_channel_valid(ch_info)) {
  1575. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1576. scan_ch->channel);
  1577. continue;
  1578. }
  1579. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1580. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1581. /* If passive , set up for auto-switch
  1582. * and use long active_dwell time.
  1583. */
  1584. if (!is_active || is_channel_passive(ch_info) ||
  1585. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1586. scan_ch->type = 0; /* passive */
  1587. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1588. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1589. } else {
  1590. scan_ch->type = 1; /* active */
  1591. }
  1592. /* Set direct probe bits. These may be used both for active
  1593. * scan channels (probes gets sent right away),
  1594. * or for passive channels (probes get se sent only after
  1595. * hearing clear Rx packet).*/
  1596. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1597. if (n_probes)
  1598. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1599. } else {
  1600. /* uCode v1 does not allow setting direct probe bits on
  1601. * passive channel. */
  1602. if ((scan_ch->type & 1) && n_probes)
  1603. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1604. }
  1605. /* Set txpower levels to defaults */
  1606. scan_ch->tpc.dsp_atten = 110;
  1607. /* scan_pwr_info->tpc.dsp_atten; */
  1608. /*scan_pwr_info->tpc.tx_gain; */
  1609. if (band == IEEE80211_BAND_5GHZ)
  1610. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1611. else {
  1612. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1613. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1614. * power level:
  1615. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1616. */
  1617. }
  1618. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1619. scan_ch->channel,
  1620. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1621. (scan_ch->type & 1) ?
  1622. active_dwell : passive_dwell);
  1623. scan_ch++;
  1624. added++;
  1625. }
  1626. IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
  1627. return added;
  1628. }
  1629. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1630. struct ieee80211_rate *rates)
  1631. {
  1632. int i;
  1633. for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
  1634. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1635. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1636. rates[i].hw_value_short = i;
  1637. rates[i].flags = 0;
  1638. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1639. /*
  1640. * If CCK != 1M then set short preamble rate flag.
  1641. */
  1642. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1643. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1644. }
  1645. }
  1646. }
  1647. /******************************************************************************
  1648. *
  1649. * uCode download functions
  1650. *
  1651. ******************************************************************************/
  1652. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1653. {
  1654. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1655. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1656. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1657. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1658. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1659. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1660. }
  1661. /**
  1662. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1663. * looking at all data.
  1664. */
  1665. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1666. {
  1667. u32 val;
  1668. u32 save_len = len;
  1669. int rc = 0;
  1670. u32 errcnt;
  1671. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1672. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1673. IWL39_RTC_INST_LOWER_BOUND);
  1674. errcnt = 0;
  1675. for (; len > 0; len -= sizeof(u32), image++) {
  1676. /* read data comes through single port, auto-incr addr */
  1677. /* NOTE: Use the debugless read so we don't flood kernel log
  1678. * if IWL_DL_IO is set */
  1679. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1680. if (val != le32_to_cpu(*image)) {
  1681. IWL_ERR(priv, "uCode INST section is invalid at "
  1682. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1683. save_len - len, val, le32_to_cpu(*image));
  1684. rc = -EIO;
  1685. errcnt++;
  1686. if (errcnt >= 20)
  1687. break;
  1688. }
  1689. }
  1690. if (!errcnt)
  1691. IWL_DEBUG_INFO(priv,
  1692. "ucode image in INSTRUCTION memory is good\n");
  1693. return rc;
  1694. }
  1695. /**
  1696. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1697. * using sample data 100 bytes apart. If these sample points are good,
  1698. * it's a pretty good bet that everything between them is good, too.
  1699. */
  1700. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1701. {
  1702. u32 val;
  1703. int rc = 0;
  1704. u32 errcnt = 0;
  1705. u32 i;
  1706. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1707. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1708. /* read data comes through single port, auto-incr addr */
  1709. /* NOTE: Use the debugless read so we don't flood kernel log
  1710. * if IWL_DL_IO is set */
  1711. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1712. i + IWL39_RTC_INST_LOWER_BOUND);
  1713. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1714. if (val != le32_to_cpu(*image)) {
  1715. #if 0 /* Enable this if you want to see details */
  1716. IWL_ERR(priv, "uCode INST section is invalid at "
  1717. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1718. i, val, *image);
  1719. #endif
  1720. rc = -EIO;
  1721. errcnt++;
  1722. if (errcnt >= 3)
  1723. break;
  1724. }
  1725. }
  1726. return rc;
  1727. }
  1728. /**
  1729. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1730. * and verify its contents
  1731. */
  1732. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1733. {
  1734. __le32 *image;
  1735. u32 len;
  1736. int rc = 0;
  1737. /* Try bootstrap */
  1738. image = (__le32 *)priv->ucode_boot.v_addr;
  1739. len = priv->ucode_boot.len;
  1740. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1741. if (rc == 0) {
  1742. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1743. return 0;
  1744. }
  1745. /* Try initialize */
  1746. image = (__le32 *)priv->ucode_init.v_addr;
  1747. len = priv->ucode_init.len;
  1748. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1749. if (rc == 0) {
  1750. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1751. return 0;
  1752. }
  1753. /* Try runtime/protocol */
  1754. image = (__le32 *)priv->ucode_code.v_addr;
  1755. len = priv->ucode_code.len;
  1756. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1757. if (rc == 0) {
  1758. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1759. return 0;
  1760. }
  1761. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1762. /* Since nothing seems to match, show first several data entries in
  1763. * instruction SRAM, so maybe visual inspection will give a clue.
  1764. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1765. image = (__le32 *)priv->ucode_boot.v_addr;
  1766. len = priv->ucode_boot.len;
  1767. rc = iwl3945_verify_inst_full(priv, image, len);
  1768. return rc;
  1769. }
  1770. static void iwl3945_nic_start(struct iwl_priv *priv)
  1771. {
  1772. /* Remove all resets to allow NIC to operate */
  1773. iwl_write32(priv, CSR_RESET, 0);
  1774. }
  1775. #define IWL3945_UCODE_GET(item) \
  1776. static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode)\
  1777. { \
  1778. return le32_to_cpu(ucode->u.v1.item); \
  1779. }
  1780. static u32 iwl3945_ucode_get_header_size(u32 api_ver)
  1781. {
  1782. return 24;
  1783. }
  1784. static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode)
  1785. {
  1786. return (u8 *) ucode->u.v1.data;
  1787. }
  1788. IWL3945_UCODE_GET(inst_size);
  1789. IWL3945_UCODE_GET(data_size);
  1790. IWL3945_UCODE_GET(init_size);
  1791. IWL3945_UCODE_GET(init_data_size);
  1792. IWL3945_UCODE_GET(boot_size);
  1793. /**
  1794. * iwl3945_read_ucode - Read uCode images from disk file.
  1795. *
  1796. * Copy into buffers for card to fetch via bus-mastering
  1797. */
  1798. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1799. {
  1800. const struct iwl_ucode_header *ucode;
  1801. int ret = -EINVAL, index;
  1802. const struct firmware *ucode_raw;
  1803. /* firmware file name contains uCode/driver compatibility version */
  1804. const char *name_pre = priv->cfg->fw_name_pre;
  1805. const unsigned int api_max = priv->cfg->ucode_api_max;
  1806. const unsigned int api_min = priv->cfg->ucode_api_min;
  1807. char buf[25];
  1808. u8 *src;
  1809. size_t len;
  1810. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1811. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1812. * request_firmware() is synchronous, file is in memory on return. */
  1813. for (index = api_max; index >= api_min; index--) {
  1814. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1815. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1816. if (ret < 0) {
  1817. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1818. buf, ret);
  1819. if (ret == -ENOENT)
  1820. continue;
  1821. else
  1822. goto error;
  1823. } else {
  1824. if (index < api_max)
  1825. IWL_ERR(priv, "Loaded firmware %s, "
  1826. "which is deprecated. "
  1827. " Please use API v%u instead.\n",
  1828. buf, api_max);
  1829. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1830. "(%zd bytes) from disk\n",
  1831. buf, ucode_raw->size);
  1832. break;
  1833. }
  1834. }
  1835. if (ret < 0)
  1836. goto error;
  1837. /* Make sure that we got at least our header! */
  1838. if (ucode_raw->size < iwl3945_ucode_get_header_size(1)) {
  1839. IWL_ERR(priv, "File size way too small!\n");
  1840. ret = -EINVAL;
  1841. goto err_release;
  1842. }
  1843. /* Data from ucode file: header followed by uCode images */
  1844. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1845. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1846. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1847. inst_size = iwl3945_ucode_get_inst_size(ucode);
  1848. data_size = iwl3945_ucode_get_data_size(ucode);
  1849. init_size = iwl3945_ucode_get_init_size(ucode);
  1850. init_data_size = iwl3945_ucode_get_init_data_size(ucode);
  1851. boot_size = iwl3945_ucode_get_boot_size(ucode);
  1852. src = iwl3945_ucode_get_data(ucode);
  1853. /* api_ver should match the api version forming part of the
  1854. * firmware filename ... but we don't check for that and only rely
  1855. * on the API version read from firmware header from here on forward */
  1856. if (api_ver < api_min || api_ver > api_max) {
  1857. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1858. "Driver supports v%u, firmware is v%u.\n",
  1859. api_max, api_ver);
  1860. priv->ucode_ver = 0;
  1861. ret = -EINVAL;
  1862. goto err_release;
  1863. }
  1864. if (api_ver != api_max)
  1865. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1866. "got %u. New firmware can be obtained "
  1867. "from http://www.intellinuxwireless.org.\n",
  1868. api_max, api_ver);
  1869. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1870. IWL_UCODE_MAJOR(priv->ucode_ver),
  1871. IWL_UCODE_MINOR(priv->ucode_ver),
  1872. IWL_UCODE_API(priv->ucode_ver),
  1873. IWL_UCODE_SERIAL(priv->ucode_ver));
  1874. snprintf(priv->hw->wiphy->fw_version,
  1875. sizeof(priv->hw->wiphy->fw_version),
  1876. "%u.%u.%u.%u",
  1877. IWL_UCODE_MAJOR(priv->ucode_ver),
  1878. IWL_UCODE_MINOR(priv->ucode_ver),
  1879. IWL_UCODE_API(priv->ucode_ver),
  1880. IWL_UCODE_SERIAL(priv->ucode_ver));
  1881. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1882. priv->ucode_ver);
  1883. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1884. inst_size);
  1885. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1886. data_size);
  1887. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1888. init_size);
  1889. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1890. init_data_size);
  1891. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1892. boot_size);
  1893. /* Verify size of file vs. image size info in file's header */
  1894. if (ucode_raw->size != iwl3945_ucode_get_header_size(api_ver) +
  1895. inst_size + data_size + init_size +
  1896. init_data_size + boot_size) {
  1897. IWL_DEBUG_INFO(priv,
  1898. "uCode file size %zd does not match expected size\n",
  1899. ucode_raw->size);
  1900. ret = -EINVAL;
  1901. goto err_release;
  1902. }
  1903. /* Verify that uCode images will fit in card's SRAM */
  1904. if (inst_size > IWL39_MAX_INST_SIZE) {
  1905. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1906. inst_size);
  1907. ret = -EINVAL;
  1908. goto err_release;
  1909. }
  1910. if (data_size > IWL39_MAX_DATA_SIZE) {
  1911. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1912. data_size);
  1913. ret = -EINVAL;
  1914. goto err_release;
  1915. }
  1916. if (init_size > IWL39_MAX_INST_SIZE) {
  1917. IWL_DEBUG_INFO(priv,
  1918. "uCode init instr len %d too large to fit in\n",
  1919. init_size);
  1920. ret = -EINVAL;
  1921. goto err_release;
  1922. }
  1923. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1924. IWL_DEBUG_INFO(priv,
  1925. "uCode init data len %d too large to fit in\n",
  1926. init_data_size);
  1927. ret = -EINVAL;
  1928. goto err_release;
  1929. }
  1930. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1931. IWL_DEBUG_INFO(priv,
  1932. "uCode boot instr len %d too large to fit in\n",
  1933. boot_size);
  1934. ret = -EINVAL;
  1935. goto err_release;
  1936. }
  1937. /* Allocate ucode buffers for card's bus-master loading ... */
  1938. /* Runtime instructions and 2 copies of data:
  1939. * 1) unmodified from disk
  1940. * 2) backup cache for save/restore during power-downs */
  1941. priv->ucode_code.len = inst_size;
  1942. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1943. priv->ucode_data.len = data_size;
  1944. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1945. priv->ucode_data_backup.len = data_size;
  1946. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1947. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1948. !priv->ucode_data_backup.v_addr)
  1949. goto err_pci_alloc;
  1950. /* Initialization instructions and data */
  1951. if (init_size && init_data_size) {
  1952. priv->ucode_init.len = init_size;
  1953. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1954. priv->ucode_init_data.len = init_data_size;
  1955. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1956. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1957. goto err_pci_alloc;
  1958. }
  1959. /* Bootstrap (instructions only, no data) */
  1960. if (boot_size) {
  1961. priv->ucode_boot.len = boot_size;
  1962. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1963. if (!priv->ucode_boot.v_addr)
  1964. goto err_pci_alloc;
  1965. }
  1966. /* Copy images into buffers for card's bus-master reads ... */
  1967. /* Runtime instructions (first block of data in file) */
  1968. len = inst_size;
  1969. IWL_DEBUG_INFO(priv,
  1970. "Copying (but not loading) uCode instr len %zd\n", len);
  1971. memcpy(priv->ucode_code.v_addr, src, len);
  1972. src += len;
  1973. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1974. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1975. /* Runtime data (2nd block)
  1976. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1977. len = data_size;
  1978. IWL_DEBUG_INFO(priv,
  1979. "Copying (but not loading) uCode data len %zd\n", len);
  1980. memcpy(priv->ucode_data.v_addr, src, len);
  1981. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1982. src += len;
  1983. /* Initialization instructions (3rd block) */
  1984. if (init_size) {
  1985. len = init_size;
  1986. IWL_DEBUG_INFO(priv,
  1987. "Copying (but not loading) init instr len %zd\n", len);
  1988. memcpy(priv->ucode_init.v_addr, src, len);
  1989. src += len;
  1990. }
  1991. /* Initialization data (4th block) */
  1992. if (init_data_size) {
  1993. len = init_data_size;
  1994. IWL_DEBUG_INFO(priv,
  1995. "Copying (but not loading) init data len %zd\n", len);
  1996. memcpy(priv->ucode_init_data.v_addr, src, len);
  1997. src += len;
  1998. }
  1999. /* Bootstrap instructions (5th block) */
  2000. len = boot_size;
  2001. IWL_DEBUG_INFO(priv,
  2002. "Copying (but not loading) boot instr len %zd\n", len);
  2003. memcpy(priv->ucode_boot.v_addr, src, len);
  2004. /* We have our copies now, allow OS release its copies */
  2005. release_firmware(ucode_raw);
  2006. return 0;
  2007. err_pci_alloc:
  2008. IWL_ERR(priv, "failed to allocate pci memory\n");
  2009. ret = -ENOMEM;
  2010. iwl3945_dealloc_ucode_pci(priv);
  2011. err_release:
  2012. release_firmware(ucode_raw);
  2013. error:
  2014. return ret;
  2015. }
  2016. /**
  2017. * iwl3945_set_ucode_ptrs - Set uCode address location
  2018. *
  2019. * Tell initialization uCode where to find runtime uCode.
  2020. *
  2021. * BSM registers initially contain pointers to initialization uCode.
  2022. * We need to replace them to load runtime uCode inst and data,
  2023. * and to save runtime data when powering down.
  2024. */
  2025. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  2026. {
  2027. dma_addr_t pinst;
  2028. dma_addr_t pdata;
  2029. /* bits 31:0 for 3945 */
  2030. pinst = priv->ucode_code.p_addr;
  2031. pdata = priv->ucode_data_backup.p_addr;
  2032. /* Tell bootstrap uCode where to find image to load */
  2033. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  2034. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  2035. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  2036. priv->ucode_data.len);
  2037. /* Inst byte count must be last to set up, bit 31 signals uCode
  2038. * that all new ptr/size info is in place */
  2039. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2040. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2041. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2042. return 0;
  2043. }
  2044. /**
  2045. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2046. *
  2047. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2048. *
  2049. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2050. */
  2051. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2052. {
  2053. /* Check alive response for "valid" sign from uCode */
  2054. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2055. /* We had an error bringing up the hardware, so take it
  2056. * all the way back down so we can try again */
  2057. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2058. goto restart;
  2059. }
  2060. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2061. * This is a paranoid check, because we would not have gotten the
  2062. * "initialize" alive if code weren't properly loaded. */
  2063. if (iwl3945_verify_ucode(priv)) {
  2064. /* Runtime instruction load was bad;
  2065. * take it all the way back down so we can try again */
  2066. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2067. goto restart;
  2068. }
  2069. /* Send pointers to protocol/runtime uCode image ... init code will
  2070. * load and launch runtime uCode, which will send us another "Alive"
  2071. * notification. */
  2072. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2073. if (iwl3945_set_ucode_ptrs(priv)) {
  2074. /* Runtime instruction load won't happen;
  2075. * take it all the way back down so we can try again */
  2076. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2077. goto restart;
  2078. }
  2079. return;
  2080. restart:
  2081. queue_work(priv->workqueue, &priv->restart);
  2082. }
  2083. /**
  2084. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2085. * from protocol/runtime uCode (initialization uCode's
  2086. * Alive gets handled by iwl3945_init_alive_start()).
  2087. */
  2088. static void iwl3945_alive_start(struct iwl_priv *priv)
  2089. {
  2090. int thermal_spin = 0;
  2091. u32 rfkill;
  2092. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2093. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2094. /* We had an error bringing up the hardware, so take it
  2095. * all the way back down so we can try again */
  2096. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2097. goto restart;
  2098. }
  2099. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2100. * This is a paranoid check, because we would not have gotten the
  2101. * "runtime" alive if code weren't properly loaded. */
  2102. if (iwl3945_verify_ucode(priv)) {
  2103. /* Runtime instruction load was bad;
  2104. * take it all the way back down so we can try again */
  2105. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2106. goto restart;
  2107. }
  2108. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2109. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2110. if (rfkill & 0x1) {
  2111. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2112. /* if RFKILL is not on, then wait for thermal
  2113. * sensor in adapter to kick in */
  2114. while (iwl3945_hw_get_temperature(priv) == 0) {
  2115. thermal_spin++;
  2116. udelay(10);
  2117. }
  2118. if (thermal_spin)
  2119. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2120. thermal_spin * 10);
  2121. } else
  2122. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2123. /* After the ALIVE response, we can send commands to 3945 uCode */
  2124. set_bit(STATUS_ALIVE, &priv->status);
  2125. if (priv->cfg->ops->lib->recover_from_tx_stall) {
  2126. /* Enable timer to monitor the driver queues */
  2127. mod_timer(&priv->monitor_recover,
  2128. jiffies +
  2129. msecs_to_jiffies(priv->cfg->monitor_recover_period));
  2130. }
  2131. if (iwl_is_rfkill(priv))
  2132. return;
  2133. ieee80211_wake_queues(priv->hw);
  2134. priv->active_rate = IWL_RATES_MASK;
  2135. iwl_power_update_mode(priv, true);
  2136. if (iwl_is_associated(priv)) {
  2137. struct iwl3945_rxon_cmd *active_rxon =
  2138. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2139. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2140. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2141. } else {
  2142. /* Initialize our rx_config data */
  2143. iwl_connection_init_rx_config(priv, NULL);
  2144. }
  2145. /* Configure Bluetooth device coexistence support */
  2146. priv->cfg->ops->hcmd->send_bt_config(priv);
  2147. /* Configure the adapter for unassociated operation */
  2148. iwlcore_commit_rxon(priv);
  2149. iwl3945_reg_txpower_periodic(priv);
  2150. iwl_leds_init(priv);
  2151. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2152. set_bit(STATUS_READY, &priv->status);
  2153. wake_up_interruptible(&priv->wait_command_queue);
  2154. return;
  2155. restart:
  2156. queue_work(priv->workqueue, &priv->restart);
  2157. }
  2158. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2159. static void __iwl3945_down(struct iwl_priv *priv)
  2160. {
  2161. unsigned long flags;
  2162. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2163. struct ieee80211_conf *conf = NULL;
  2164. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2165. conf = ieee80211_get_hw_conf(priv->hw);
  2166. if (!exit_pending)
  2167. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2168. /* Station information will now be cleared in device */
  2169. iwl_clear_ucode_stations(priv);
  2170. iwl_dealloc_bcast_station(priv);
  2171. iwl_clear_driver_stations(priv);
  2172. /* Unblock any waiting calls */
  2173. wake_up_interruptible_all(&priv->wait_command_queue);
  2174. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2175. * exiting the module */
  2176. if (!exit_pending)
  2177. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2178. /* stop and reset the on-board processor */
  2179. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2180. /* tell the device to stop sending interrupts */
  2181. spin_lock_irqsave(&priv->lock, flags);
  2182. iwl_disable_interrupts(priv);
  2183. spin_unlock_irqrestore(&priv->lock, flags);
  2184. iwl_synchronize_irq(priv);
  2185. if (priv->mac80211_registered)
  2186. ieee80211_stop_queues(priv->hw);
  2187. /* If we have not previously called iwl3945_init() then
  2188. * clear all bits but the RF Kill bits and return */
  2189. if (!iwl_is_init(priv)) {
  2190. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2191. STATUS_RF_KILL_HW |
  2192. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2193. STATUS_GEO_CONFIGURED |
  2194. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2195. STATUS_EXIT_PENDING;
  2196. goto exit;
  2197. }
  2198. /* ...otherwise clear out all the status bits but the RF Kill
  2199. * bit and continue taking the NIC down. */
  2200. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2201. STATUS_RF_KILL_HW |
  2202. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2203. STATUS_GEO_CONFIGURED |
  2204. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2205. STATUS_FW_ERROR |
  2206. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2207. STATUS_EXIT_PENDING;
  2208. iwl3945_hw_txq_ctx_stop(priv);
  2209. iwl3945_hw_rxq_stop(priv);
  2210. /* Power-down device's busmaster DMA clocks */
  2211. iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  2212. udelay(5);
  2213. /* Stop the device, and put it in low power state */
  2214. priv->cfg->ops->lib->apm_ops.stop(priv);
  2215. exit:
  2216. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2217. if (priv->ibss_beacon)
  2218. dev_kfree_skb(priv->ibss_beacon);
  2219. priv->ibss_beacon = NULL;
  2220. /* clear out any free frames */
  2221. iwl3945_clear_free_frames(priv);
  2222. }
  2223. static void iwl3945_down(struct iwl_priv *priv)
  2224. {
  2225. mutex_lock(&priv->mutex);
  2226. __iwl3945_down(priv);
  2227. mutex_unlock(&priv->mutex);
  2228. iwl3945_cancel_deferred_work(priv);
  2229. }
  2230. #define MAX_HW_RESTARTS 5
  2231. static int __iwl3945_up(struct iwl_priv *priv)
  2232. {
  2233. int rc, i;
  2234. rc = iwl_alloc_bcast_station(priv, false);
  2235. if (rc)
  2236. return rc;
  2237. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2238. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2239. return -EIO;
  2240. }
  2241. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2242. IWL_ERR(priv, "ucode not available for device bring up\n");
  2243. return -EIO;
  2244. }
  2245. /* If platform's RF_KILL switch is NOT set to KILL */
  2246. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2247. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2248. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2249. else {
  2250. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2251. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2252. return -ENODEV;
  2253. }
  2254. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2255. rc = iwl3945_hw_nic_init(priv);
  2256. if (rc) {
  2257. IWL_ERR(priv, "Unable to int nic\n");
  2258. return rc;
  2259. }
  2260. /* make sure rfkill handshake bits are cleared */
  2261. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2262. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2263. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2264. /* clear (again), then enable host interrupts */
  2265. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2266. iwl_enable_interrupts(priv);
  2267. /* really make sure rfkill handshake bits are cleared */
  2268. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2269. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2270. /* Copy original ucode data image from disk into backup cache.
  2271. * This will be used to initialize the on-board processor's
  2272. * data SRAM for a clean start when the runtime program first loads. */
  2273. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2274. priv->ucode_data.len);
  2275. /* We return success when we resume from suspend and rf_kill is on. */
  2276. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2277. return 0;
  2278. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2279. /* load bootstrap state machine,
  2280. * load bootstrap program into processor's memory,
  2281. * prepare to load the "initialize" uCode */
  2282. rc = priv->cfg->ops->lib->load_ucode(priv);
  2283. if (rc) {
  2284. IWL_ERR(priv,
  2285. "Unable to set up bootstrap uCode: %d\n", rc);
  2286. continue;
  2287. }
  2288. /* start card; "initialize" will load runtime ucode */
  2289. iwl3945_nic_start(priv);
  2290. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2291. return 0;
  2292. }
  2293. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2294. __iwl3945_down(priv);
  2295. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2296. /* tried to restart and config the device for as long as our
  2297. * patience could withstand */
  2298. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2299. return -EIO;
  2300. }
  2301. /*****************************************************************************
  2302. *
  2303. * Workqueue callbacks
  2304. *
  2305. *****************************************************************************/
  2306. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2307. {
  2308. struct iwl_priv *priv =
  2309. container_of(data, struct iwl_priv, init_alive_start.work);
  2310. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2311. return;
  2312. mutex_lock(&priv->mutex);
  2313. iwl3945_init_alive_start(priv);
  2314. mutex_unlock(&priv->mutex);
  2315. }
  2316. static void iwl3945_bg_alive_start(struct work_struct *data)
  2317. {
  2318. struct iwl_priv *priv =
  2319. container_of(data, struct iwl_priv, alive_start.work);
  2320. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2321. return;
  2322. mutex_lock(&priv->mutex);
  2323. iwl3945_alive_start(priv);
  2324. mutex_unlock(&priv->mutex);
  2325. }
  2326. /*
  2327. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2328. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2329. * *is* readable even when device has been SW_RESET into low power mode
  2330. * (e.g. during RF KILL).
  2331. */
  2332. static void iwl3945_rfkill_poll(struct work_struct *data)
  2333. {
  2334. struct iwl_priv *priv =
  2335. container_of(data, struct iwl_priv, _3945.rfkill_poll.work);
  2336. bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
  2337. bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
  2338. & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2339. if (new_rfkill != old_rfkill) {
  2340. if (new_rfkill)
  2341. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2342. else
  2343. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2344. wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
  2345. IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
  2346. new_rfkill ? "disable radio" : "enable radio");
  2347. }
  2348. /* Keep this running, even if radio now enabled. This will be
  2349. * cancelled in mac_start() if system decides to start again */
  2350. queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
  2351. round_jiffies_relative(2 * HZ));
  2352. }
  2353. void iwl3945_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
  2354. {
  2355. struct iwl_host_cmd cmd = {
  2356. .id = REPLY_SCAN_CMD,
  2357. .len = sizeof(struct iwl3945_scan_cmd),
  2358. .flags = CMD_SIZE_HUGE,
  2359. };
  2360. struct iwl3945_scan_cmd *scan;
  2361. struct ieee80211_conf *conf = NULL;
  2362. u8 n_probes = 0;
  2363. enum ieee80211_band band;
  2364. bool is_active = false;
  2365. conf = ieee80211_get_hw_conf(priv->hw);
  2366. cancel_delayed_work(&priv->scan_check);
  2367. if (!iwl_is_ready(priv)) {
  2368. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2369. goto done;
  2370. }
  2371. /* Make sure the scan wasn't canceled before this queued work
  2372. * was given the chance to run... */
  2373. if (!test_bit(STATUS_SCANNING, &priv->status))
  2374. goto done;
  2375. /* This should never be called or scheduled if there is currently
  2376. * a scan active in the hardware. */
  2377. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2378. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2379. "Ignoring second request.\n");
  2380. goto done;
  2381. }
  2382. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2383. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2384. goto done;
  2385. }
  2386. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2387. IWL_DEBUG_HC(priv,
  2388. "Scan request while abort pending. Queuing.\n");
  2389. goto done;
  2390. }
  2391. if (iwl_is_rfkill(priv)) {
  2392. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2393. goto done;
  2394. }
  2395. if (!test_bit(STATUS_READY, &priv->status)) {
  2396. IWL_DEBUG_HC(priv,
  2397. "Scan request while uninitialized. Queuing.\n");
  2398. goto done;
  2399. }
  2400. if (!priv->scan_cmd) {
  2401. priv->scan_cmd = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2402. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2403. if (!priv->scan_cmd) {
  2404. IWL_DEBUG_SCAN(priv, "Fail to allocate scan memory\n");
  2405. goto done;
  2406. }
  2407. }
  2408. scan = priv->scan_cmd;
  2409. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2410. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2411. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2412. if (iwl_is_associated(priv)) {
  2413. u16 interval = 0;
  2414. u32 extra;
  2415. u32 suspend_time = 100;
  2416. u32 scan_suspend_time = 100;
  2417. unsigned long flags;
  2418. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2419. spin_lock_irqsave(&priv->lock, flags);
  2420. interval = vif ? vif->bss_conf.beacon_int : 0;
  2421. spin_unlock_irqrestore(&priv->lock, flags);
  2422. scan->suspend_time = 0;
  2423. scan->max_out_time = cpu_to_le32(200 * 1024);
  2424. if (!interval)
  2425. interval = suspend_time;
  2426. /*
  2427. * suspend time format:
  2428. * 0-19: beacon interval in usec (time before exec.)
  2429. * 20-23: 0
  2430. * 24-31: number of beacons (suspend between channels)
  2431. */
  2432. extra = (suspend_time / interval) << 24;
  2433. scan_suspend_time = 0xFF0FFFFF &
  2434. (extra | ((suspend_time % interval) * 1024));
  2435. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2436. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2437. scan_suspend_time, interval);
  2438. }
  2439. if (priv->is_internal_short_scan) {
  2440. IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
  2441. } else if (priv->scan_request->n_ssids) {
  2442. int i, p = 0;
  2443. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2444. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2445. /* always does wildcard anyway */
  2446. if (!priv->scan_request->ssids[i].ssid_len)
  2447. continue;
  2448. scan->direct_scan[p].id = WLAN_EID_SSID;
  2449. scan->direct_scan[p].len =
  2450. priv->scan_request->ssids[i].ssid_len;
  2451. memcpy(scan->direct_scan[p].ssid,
  2452. priv->scan_request->ssids[i].ssid,
  2453. priv->scan_request->ssids[i].ssid_len);
  2454. n_probes++;
  2455. p++;
  2456. }
  2457. is_active = true;
  2458. } else
  2459. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2460. /* We don't build a direct scan probe request; the uCode will do
  2461. * that based on the direct_mask added to each channel entry */
  2462. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2463. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2464. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2465. /* flags + rate selection */
  2466. switch (priv->scan_band) {
  2467. case IEEE80211_BAND_2GHZ:
  2468. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2469. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2470. scan->good_CRC_th = 0;
  2471. band = IEEE80211_BAND_2GHZ;
  2472. break;
  2473. case IEEE80211_BAND_5GHZ:
  2474. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2475. /*
  2476. * If active scaning is requested but a certain channel
  2477. * is marked passive, we can do active scanning if we
  2478. * detect transmissions.
  2479. */
  2480. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
  2481. IWL_GOOD_CRC_TH_DISABLED;
  2482. band = IEEE80211_BAND_5GHZ;
  2483. break;
  2484. default:
  2485. IWL_WARN(priv, "Invalid scan band\n");
  2486. goto done;
  2487. }
  2488. if (!priv->is_internal_short_scan) {
  2489. scan->tx_cmd.len = cpu_to_le16(
  2490. iwl_fill_probe_req(priv,
  2491. (struct ieee80211_mgmt *)scan->data,
  2492. vif->addr,
  2493. priv->scan_request->ie,
  2494. priv->scan_request->ie_len,
  2495. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2496. } else {
  2497. /* use bcast addr, will not be transmitted but must be valid */
  2498. scan->tx_cmd.len = cpu_to_le16(
  2499. iwl_fill_probe_req(priv,
  2500. (struct ieee80211_mgmt *)scan->data,
  2501. iwl_bcast_addr, NULL, 0,
  2502. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2503. }
  2504. /* select Rx antennas */
  2505. scan->flags |= iwl3945_get_antenna_flags(priv);
  2506. if (priv->is_internal_short_scan) {
  2507. scan->channel_count =
  2508. iwl3945_get_single_channel_for_scan(priv, vif, band,
  2509. (void *)&scan->data[le16_to_cpu(
  2510. scan->tx_cmd.len)]);
  2511. } else {
  2512. scan->channel_count =
  2513. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2514. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)], vif);
  2515. }
  2516. if (scan->channel_count == 0) {
  2517. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2518. goto done;
  2519. }
  2520. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2521. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2522. cmd.data = scan;
  2523. scan->len = cpu_to_le16(cmd.len);
  2524. set_bit(STATUS_SCAN_HW, &priv->status);
  2525. if (iwl_send_cmd_sync(priv, &cmd))
  2526. goto done;
  2527. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2528. IWL_SCAN_CHECK_WATCHDOG);
  2529. return;
  2530. done:
  2531. /* can not perform scan make sure we clear scanning
  2532. * bits from status so next scan request can be performed.
  2533. * if we dont clear scanning status bit here all next scan
  2534. * will fail
  2535. */
  2536. clear_bit(STATUS_SCAN_HW, &priv->status);
  2537. clear_bit(STATUS_SCANNING, &priv->status);
  2538. /* inform mac80211 scan aborted */
  2539. queue_work(priv->workqueue, &priv->scan_completed);
  2540. }
  2541. static void iwl3945_bg_restart(struct work_struct *data)
  2542. {
  2543. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2544. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2545. return;
  2546. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2547. mutex_lock(&priv->mutex);
  2548. priv->vif = NULL;
  2549. priv->is_open = 0;
  2550. mutex_unlock(&priv->mutex);
  2551. iwl3945_down(priv);
  2552. ieee80211_restart_hw(priv->hw);
  2553. } else {
  2554. iwl3945_down(priv);
  2555. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2556. return;
  2557. mutex_lock(&priv->mutex);
  2558. __iwl3945_up(priv);
  2559. mutex_unlock(&priv->mutex);
  2560. }
  2561. }
  2562. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2563. {
  2564. struct iwl_priv *priv =
  2565. container_of(data, struct iwl_priv, rx_replenish);
  2566. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2567. return;
  2568. mutex_lock(&priv->mutex);
  2569. iwl3945_rx_replenish(priv);
  2570. mutex_unlock(&priv->mutex);
  2571. }
  2572. void iwl3945_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
  2573. {
  2574. int rc = 0;
  2575. struct ieee80211_conf *conf = NULL;
  2576. if (!vif || !priv->is_open)
  2577. return;
  2578. if (vif->type == NL80211_IFTYPE_AP) {
  2579. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2580. return;
  2581. }
  2582. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2583. vif->bss_conf.aid, priv->active_rxon.bssid_addr);
  2584. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2585. return;
  2586. iwl_scan_cancel_timeout(priv, 200);
  2587. conf = ieee80211_get_hw_conf(priv->hw);
  2588. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2589. iwlcore_commit_rxon(priv);
  2590. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2591. iwl_setup_rxon_timing(priv, vif);
  2592. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2593. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2594. if (rc)
  2595. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2596. "Attempting to continue.\n");
  2597. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2598. priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
  2599. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2600. vif->bss_conf.aid, vif->bss_conf.beacon_int);
  2601. if (vif->bss_conf.use_short_preamble)
  2602. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2603. else
  2604. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2605. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2606. if (vif->bss_conf.use_short_slot)
  2607. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2608. else
  2609. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2610. }
  2611. iwlcore_commit_rxon(priv);
  2612. switch (vif->type) {
  2613. case NL80211_IFTYPE_STATION:
  2614. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2615. break;
  2616. case NL80211_IFTYPE_ADHOC:
  2617. iwl3945_send_beacon_cmd(priv);
  2618. break;
  2619. default:
  2620. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2621. __func__, vif->type);
  2622. break;
  2623. }
  2624. }
  2625. /*****************************************************************************
  2626. *
  2627. * mac80211 entry point functions
  2628. *
  2629. *****************************************************************************/
  2630. #define UCODE_READY_TIMEOUT (2 * HZ)
  2631. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2632. {
  2633. struct iwl_priv *priv = hw->priv;
  2634. int ret;
  2635. IWL_DEBUG_MAC80211(priv, "enter\n");
  2636. /* we should be verifying the device is ready to be opened */
  2637. mutex_lock(&priv->mutex);
  2638. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2639. * ucode filename and max sizes are card-specific. */
  2640. if (!priv->ucode_code.len) {
  2641. ret = iwl3945_read_ucode(priv);
  2642. if (ret) {
  2643. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2644. mutex_unlock(&priv->mutex);
  2645. goto out_release_irq;
  2646. }
  2647. }
  2648. ret = __iwl3945_up(priv);
  2649. mutex_unlock(&priv->mutex);
  2650. if (ret)
  2651. goto out_release_irq;
  2652. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2653. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2654. * mac80211 will not be run successfully. */
  2655. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2656. test_bit(STATUS_READY, &priv->status),
  2657. UCODE_READY_TIMEOUT);
  2658. if (!ret) {
  2659. if (!test_bit(STATUS_READY, &priv->status)) {
  2660. IWL_ERR(priv,
  2661. "Wait for START_ALIVE timeout after %dms.\n",
  2662. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2663. ret = -ETIMEDOUT;
  2664. goto out_release_irq;
  2665. }
  2666. }
  2667. /* ucode is running and will send rfkill notifications,
  2668. * no need to poll the killswitch state anymore */
  2669. cancel_delayed_work(&priv->_3945.rfkill_poll);
  2670. iwl_led_start(priv);
  2671. priv->is_open = 1;
  2672. IWL_DEBUG_MAC80211(priv, "leave\n");
  2673. return 0;
  2674. out_release_irq:
  2675. priv->is_open = 0;
  2676. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2677. return ret;
  2678. }
  2679. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2680. {
  2681. struct iwl_priv *priv = hw->priv;
  2682. IWL_DEBUG_MAC80211(priv, "enter\n");
  2683. if (!priv->is_open) {
  2684. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2685. return;
  2686. }
  2687. priv->is_open = 0;
  2688. if (iwl_is_ready_rf(priv)) {
  2689. /* stop mac, cancel any scan request and clear
  2690. * RXON_FILTER_ASSOC_MSK BIT
  2691. */
  2692. mutex_lock(&priv->mutex);
  2693. iwl_scan_cancel_timeout(priv, 100);
  2694. mutex_unlock(&priv->mutex);
  2695. }
  2696. iwl3945_down(priv);
  2697. flush_workqueue(priv->workqueue);
  2698. /* start polling the killswitch state again */
  2699. queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
  2700. round_jiffies_relative(2 * HZ));
  2701. IWL_DEBUG_MAC80211(priv, "leave\n");
  2702. }
  2703. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2704. {
  2705. struct iwl_priv *priv = hw->priv;
  2706. IWL_DEBUG_MAC80211(priv, "enter\n");
  2707. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2708. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2709. if (iwl3945_tx_skb(priv, skb))
  2710. dev_kfree_skb_any(skb);
  2711. IWL_DEBUG_MAC80211(priv, "leave\n");
  2712. return NETDEV_TX_OK;
  2713. }
  2714. void iwl3945_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
  2715. {
  2716. int rc = 0;
  2717. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2718. return;
  2719. /* The following should be done only at AP bring up */
  2720. if (!(iwl_is_associated(priv))) {
  2721. /* RXON - unassoc (to set timing command) */
  2722. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2723. iwlcore_commit_rxon(priv);
  2724. /* RXON Timing */
  2725. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2726. iwl_setup_rxon_timing(priv, vif);
  2727. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2728. sizeof(priv->rxon_timing),
  2729. &priv->rxon_timing);
  2730. if (rc)
  2731. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2732. "Attempting to continue.\n");
  2733. priv->staging_rxon.assoc_id = 0;
  2734. if (vif->bss_conf.use_short_preamble)
  2735. priv->staging_rxon.flags |=
  2736. RXON_FLG_SHORT_PREAMBLE_MSK;
  2737. else
  2738. priv->staging_rxon.flags &=
  2739. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2740. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2741. if (vif->bss_conf.use_short_slot)
  2742. priv->staging_rxon.flags |=
  2743. RXON_FLG_SHORT_SLOT_MSK;
  2744. else
  2745. priv->staging_rxon.flags &=
  2746. ~RXON_FLG_SHORT_SLOT_MSK;
  2747. }
  2748. /* restore RXON assoc */
  2749. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2750. iwlcore_commit_rxon(priv);
  2751. }
  2752. iwl3945_send_beacon_cmd(priv);
  2753. /* FIXME - we need to add code here to detect a totally new
  2754. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2755. * clear sta table, add BCAST sta... */
  2756. }
  2757. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2758. struct ieee80211_vif *vif,
  2759. struct ieee80211_sta *sta,
  2760. struct ieee80211_key_conf *key)
  2761. {
  2762. struct iwl_priv *priv = hw->priv;
  2763. int ret = 0;
  2764. u8 sta_id = IWL_INVALID_STATION;
  2765. u8 static_key;
  2766. IWL_DEBUG_MAC80211(priv, "enter\n");
  2767. if (iwl3945_mod_params.sw_crypto) {
  2768. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2769. return -EOPNOTSUPP;
  2770. }
  2771. static_key = !iwl_is_associated(priv);
  2772. if (!static_key) {
  2773. sta_id = iwl_sta_id_or_broadcast(priv, sta);
  2774. if (sta_id == IWL_INVALID_STATION)
  2775. return -EINVAL;
  2776. }
  2777. mutex_lock(&priv->mutex);
  2778. iwl_scan_cancel_timeout(priv, 100);
  2779. switch (cmd) {
  2780. case SET_KEY:
  2781. if (static_key)
  2782. ret = iwl3945_set_static_key(priv, key);
  2783. else
  2784. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2785. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2786. break;
  2787. case DISABLE_KEY:
  2788. if (static_key)
  2789. ret = iwl3945_remove_static_key(priv);
  2790. else
  2791. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2792. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2793. break;
  2794. default:
  2795. ret = -EINVAL;
  2796. }
  2797. mutex_unlock(&priv->mutex);
  2798. IWL_DEBUG_MAC80211(priv, "leave\n");
  2799. return ret;
  2800. }
  2801. static int iwl3945_mac_sta_add(struct ieee80211_hw *hw,
  2802. struct ieee80211_vif *vif,
  2803. struct ieee80211_sta *sta)
  2804. {
  2805. struct iwl_priv *priv = hw->priv;
  2806. struct iwl3945_sta_priv *sta_priv = (void *)sta->drv_priv;
  2807. int ret;
  2808. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2809. u8 sta_id;
  2810. IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
  2811. sta->addr);
  2812. mutex_lock(&priv->mutex);
  2813. IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
  2814. sta->addr);
  2815. sta_priv->common.sta_id = IWL_INVALID_STATION;
  2816. ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
  2817. &sta_id);
  2818. if (ret) {
  2819. IWL_ERR(priv, "Unable to add station %pM (%d)\n",
  2820. sta->addr, ret);
  2821. /* Should we return success if return code is EEXIST ? */
  2822. mutex_unlock(&priv->mutex);
  2823. return ret;
  2824. }
  2825. sta_priv->common.sta_id = sta_id;
  2826. /* Initialize rate scaling */
  2827. IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
  2828. sta->addr);
  2829. iwl3945_rs_rate_init(priv, sta, sta_id);
  2830. mutex_unlock(&priv->mutex);
  2831. return 0;
  2832. }
  2833. /*****************************************************************************
  2834. *
  2835. * sysfs attributes
  2836. *
  2837. *****************************************************************************/
  2838. #ifdef CONFIG_IWLWIFI_DEBUG
  2839. /*
  2840. * The following adds a new attribute to the sysfs representation
  2841. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2842. * used for controlling the debug level.
  2843. *
  2844. * See the level definitions in iwl for details.
  2845. *
  2846. * The debug_level being managed using sysfs below is a per device debug
  2847. * level that is used instead of the global debug level if it (the per
  2848. * device debug level) is set.
  2849. */
  2850. static ssize_t show_debug_level(struct device *d,
  2851. struct device_attribute *attr, char *buf)
  2852. {
  2853. struct iwl_priv *priv = dev_get_drvdata(d);
  2854. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  2855. }
  2856. static ssize_t store_debug_level(struct device *d,
  2857. struct device_attribute *attr,
  2858. const char *buf, size_t count)
  2859. {
  2860. struct iwl_priv *priv = dev_get_drvdata(d);
  2861. unsigned long val;
  2862. int ret;
  2863. ret = strict_strtoul(buf, 0, &val);
  2864. if (ret)
  2865. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2866. else {
  2867. priv->debug_level = val;
  2868. if (iwl_alloc_traffic_mem(priv))
  2869. IWL_ERR(priv,
  2870. "Not enough memory to generate traffic log\n");
  2871. }
  2872. return strnlen(buf, count);
  2873. }
  2874. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2875. show_debug_level, store_debug_level);
  2876. #endif /* CONFIG_IWLWIFI_DEBUG */
  2877. static ssize_t show_temperature(struct device *d,
  2878. struct device_attribute *attr, char *buf)
  2879. {
  2880. struct iwl_priv *priv = dev_get_drvdata(d);
  2881. if (!iwl_is_alive(priv))
  2882. return -EAGAIN;
  2883. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2884. }
  2885. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2886. static ssize_t show_tx_power(struct device *d,
  2887. struct device_attribute *attr, char *buf)
  2888. {
  2889. struct iwl_priv *priv = dev_get_drvdata(d);
  2890. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2891. }
  2892. static ssize_t store_tx_power(struct device *d,
  2893. struct device_attribute *attr,
  2894. const char *buf, size_t count)
  2895. {
  2896. struct iwl_priv *priv = dev_get_drvdata(d);
  2897. char *p = (char *)buf;
  2898. u32 val;
  2899. val = simple_strtoul(p, &p, 10);
  2900. if (p == buf)
  2901. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2902. else
  2903. iwl3945_hw_reg_set_txpower(priv, val);
  2904. return count;
  2905. }
  2906. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2907. static ssize_t show_flags(struct device *d,
  2908. struct device_attribute *attr, char *buf)
  2909. {
  2910. struct iwl_priv *priv = dev_get_drvdata(d);
  2911. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2912. }
  2913. static ssize_t store_flags(struct device *d,
  2914. struct device_attribute *attr,
  2915. const char *buf, size_t count)
  2916. {
  2917. struct iwl_priv *priv = dev_get_drvdata(d);
  2918. u32 flags = simple_strtoul(buf, NULL, 0);
  2919. mutex_lock(&priv->mutex);
  2920. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2921. /* Cancel any currently running scans... */
  2922. if (iwl_scan_cancel_timeout(priv, 100))
  2923. IWL_WARN(priv, "Could not cancel scan.\n");
  2924. else {
  2925. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2926. flags);
  2927. priv->staging_rxon.flags = cpu_to_le32(flags);
  2928. iwlcore_commit_rxon(priv);
  2929. }
  2930. }
  2931. mutex_unlock(&priv->mutex);
  2932. return count;
  2933. }
  2934. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2935. static ssize_t show_filter_flags(struct device *d,
  2936. struct device_attribute *attr, char *buf)
  2937. {
  2938. struct iwl_priv *priv = dev_get_drvdata(d);
  2939. return sprintf(buf, "0x%04X\n",
  2940. le32_to_cpu(priv->active_rxon.filter_flags));
  2941. }
  2942. static ssize_t store_filter_flags(struct device *d,
  2943. struct device_attribute *attr,
  2944. const char *buf, size_t count)
  2945. {
  2946. struct iwl_priv *priv = dev_get_drvdata(d);
  2947. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2948. mutex_lock(&priv->mutex);
  2949. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2950. /* Cancel any currently running scans... */
  2951. if (iwl_scan_cancel_timeout(priv, 100))
  2952. IWL_WARN(priv, "Could not cancel scan.\n");
  2953. else {
  2954. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2955. "0x%04X\n", filter_flags);
  2956. priv->staging_rxon.filter_flags =
  2957. cpu_to_le32(filter_flags);
  2958. iwlcore_commit_rxon(priv);
  2959. }
  2960. }
  2961. mutex_unlock(&priv->mutex);
  2962. return count;
  2963. }
  2964. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2965. store_filter_flags);
  2966. static ssize_t show_measurement(struct device *d,
  2967. struct device_attribute *attr, char *buf)
  2968. {
  2969. struct iwl_priv *priv = dev_get_drvdata(d);
  2970. struct iwl_spectrum_notification measure_report;
  2971. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2972. u8 *data = (u8 *)&measure_report;
  2973. unsigned long flags;
  2974. spin_lock_irqsave(&priv->lock, flags);
  2975. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2976. spin_unlock_irqrestore(&priv->lock, flags);
  2977. return 0;
  2978. }
  2979. memcpy(&measure_report, &priv->measure_report, size);
  2980. priv->measurement_status = 0;
  2981. spin_unlock_irqrestore(&priv->lock, flags);
  2982. while (size && (PAGE_SIZE - len)) {
  2983. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2984. PAGE_SIZE - len, 1);
  2985. len = strlen(buf);
  2986. if (PAGE_SIZE - len)
  2987. buf[len++] = '\n';
  2988. ofs += 16;
  2989. size -= min(size, 16U);
  2990. }
  2991. return len;
  2992. }
  2993. static ssize_t store_measurement(struct device *d,
  2994. struct device_attribute *attr,
  2995. const char *buf, size_t count)
  2996. {
  2997. struct iwl_priv *priv = dev_get_drvdata(d);
  2998. struct ieee80211_measurement_params params = {
  2999. .channel = le16_to_cpu(priv->active_rxon.channel),
  3000. .start_time = cpu_to_le64(priv->_3945.last_tsf),
  3001. .duration = cpu_to_le16(1),
  3002. };
  3003. u8 type = IWL_MEASURE_BASIC;
  3004. u8 buffer[32];
  3005. u8 channel;
  3006. if (count) {
  3007. char *p = buffer;
  3008. strncpy(buffer, buf, min(sizeof(buffer), count));
  3009. channel = simple_strtoul(p, NULL, 0);
  3010. if (channel)
  3011. params.channel = channel;
  3012. p = buffer;
  3013. while (*p && *p != ' ')
  3014. p++;
  3015. if (*p)
  3016. type = simple_strtoul(p + 1, NULL, 0);
  3017. }
  3018. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  3019. "channel %d (for '%s')\n", type, params.channel, buf);
  3020. iwl3945_get_measurement(priv, &params, type);
  3021. return count;
  3022. }
  3023. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  3024. show_measurement, store_measurement);
  3025. static ssize_t store_retry_rate(struct device *d,
  3026. struct device_attribute *attr,
  3027. const char *buf, size_t count)
  3028. {
  3029. struct iwl_priv *priv = dev_get_drvdata(d);
  3030. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  3031. if (priv->retry_rate <= 0)
  3032. priv->retry_rate = 1;
  3033. return count;
  3034. }
  3035. static ssize_t show_retry_rate(struct device *d,
  3036. struct device_attribute *attr, char *buf)
  3037. {
  3038. struct iwl_priv *priv = dev_get_drvdata(d);
  3039. return sprintf(buf, "%d", priv->retry_rate);
  3040. }
  3041. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  3042. store_retry_rate);
  3043. static ssize_t show_channels(struct device *d,
  3044. struct device_attribute *attr, char *buf)
  3045. {
  3046. /* all this shit doesn't belong into sysfs anyway */
  3047. return 0;
  3048. }
  3049. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  3050. static ssize_t show_antenna(struct device *d,
  3051. struct device_attribute *attr, char *buf)
  3052. {
  3053. struct iwl_priv *priv = dev_get_drvdata(d);
  3054. if (!iwl_is_alive(priv))
  3055. return -EAGAIN;
  3056. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3057. }
  3058. static ssize_t store_antenna(struct device *d,
  3059. struct device_attribute *attr,
  3060. const char *buf, size_t count)
  3061. {
  3062. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3063. int ant;
  3064. if (count == 0)
  3065. return 0;
  3066. if (sscanf(buf, "%1i", &ant) != 1) {
  3067. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3068. return count;
  3069. }
  3070. if ((ant >= 0) && (ant <= 2)) {
  3071. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3072. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3073. } else
  3074. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3075. return count;
  3076. }
  3077. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3078. static ssize_t show_status(struct device *d,
  3079. struct device_attribute *attr, char *buf)
  3080. {
  3081. struct iwl_priv *priv = dev_get_drvdata(d);
  3082. if (!iwl_is_alive(priv))
  3083. return -EAGAIN;
  3084. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3085. }
  3086. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3087. static ssize_t dump_error_log(struct device *d,
  3088. struct device_attribute *attr,
  3089. const char *buf, size_t count)
  3090. {
  3091. struct iwl_priv *priv = dev_get_drvdata(d);
  3092. char *p = (char *)buf;
  3093. if (p[0] == '1')
  3094. iwl3945_dump_nic_error_log(priv);
  3095. return strnlen(buf, count);
  3096. }
  3097. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3098. /*****************************************************************************
  3099. *
  3100. * driver setup and tear down
  3101. *
  3102. *****************************************************************************/
  3103. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3104. {
  3105. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3106. init_waitqueue_head(&priv->wait_command_queue);
  3107. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3108. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3109. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3110. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3111. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3112. INIT_DELAYED_WORK(&priv->_3945.rfkill_poll, iwl3945_rfkill_poll);
  3113. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3114. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3115. INIT_WORK(&priv->start_internal_scan, iwl_bg_start_internal_scan);
  3116. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3117. iwl3945_hw_setup_deferred_work(priv);
  3118. if (priv->cfg->ops->lib->recover_from_tx_stall) {
  3119. init_timer(&priv->monitor_recover);
  3120. priv->monitor_recover.data = (unsigned long)priv;
  3121. priv->monitor_recover.function =
  3122. priv->cfg->ops->lib->recover_from_tx_stall;
  3123. }
  3124. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3125. iwl3945_irq_tasklet, (unsigned long)priv);
  3126. }
  3127. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3128. {
  3129. iwl3945_hw_cancel_deferred_work(priv);
  3130. cancel_delayed_work_sync(&priv->init_alive_start);
  3131. cancel_delayed_work(&priv->scan_check);
  3132. cancel_delayed_work(&priv->alive_start);
  3133. cancel_work_sync(&priv->start_internal_scan);
  3134. cancel_work_sync(&priv->beacon_update);
  3135. if (priv->cfg->ops->lib->recover_from_tx_stall)
  3136. del_timer_sync(&priv->monitor_recover);
  3137. }
  3138. static struct attribute *iwl3945_sysfs_entries[] = {
  3139. &dev_attr_antenna.attr,
  3140. &dev_attr_channels.attr,
  3141. &dev_attr_dump_errors.attr,
  3142. &dev_attr_flags.attr,
  3143. &dev_attr_filter_flags.attr,
  3144. &dev_attr_measurement.attr,
  3145. &dev_attr_retry_rate.attr,
  3146. &dev_attr_status.attr,
  3147. &dev_attr_temperature.attr,
  3148. &dev_attr_tx_power.attr,
  3149. #ifdef CONFIG_IWLWIFI_DEBUG
  3150. &dev_attr_debug_level.attr,
  3151. #endif
  3152. NULL
  3153. };
  3154. static struct attribute_group iwl3945_attribute_group = {
  3155. .name = NULL, /* put in device directory */
  3156. .attrs = iwl3945_sysfs_entries,
  3157. };
  3158. static struct ieee80211_ops iwl3945_hw_ops = {
  3159. .tx = iwl3945_mac_tx,
  3160. .start = iwl3945_mac_start,
  3161. .stop = iwl3945_mac_stop,
  3162. .add_interface = iwl_mac_add_interface,
  3163. .remove_interface = iwl_mac_remove_interface,
  3164. .config = iwl_mac_config,
  3165. .configure_filter = iwl_configure_filter,
  3166. .set_key = iwl3945_mac_set_key,
  3167. .conf_tx = iwl_mac_conf_tx,
  3168. .reset_tsf = iwl_mac_reset_tsf,
  3169. .bss_info_changed = iwl_bss_info_changed,
  3170. .hw_scan = iwl_mac_hw_scan,
  3171. .sta_add = iwl3945_mac_sta_add,
  3172. .sta_remove = iwl_mac_sta_remove,
  3173. };
  3174. static int iwl3945_init_drv(struct iwl_priv *priv)
  3175. {
  3176. int ret;
  3177. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3178. priv->retry_rate = 1;
  3179. priv->ibss_beacon = NULL;
  3180. spin_lock_init(&priv->sta_lock);
  3181. spin_lock_init(&priv->hcmd_lock);
  3182. INIT_LIST_HEAD(&priv->free_frames);
  3183. mutex_init(&priv->mutex);
  3184. mutex_init(&priv->sync_cmd_mutex);
  3185. priv->ieee_channels = NULL;
  3186. priv->ieee_rates = NULL;
  3187. priv->band = IEEE80211_BAND_2GHZ;
  3188. priv->iw_mode = NL80211_IFTYPE_STATION;
  3189. priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
  3190. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3191. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3192. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3193. eeprom->version);
  3194. ret = -EINVAL;
  3195. goto err;
  3196. }
  3197. ret = iwl_init_channel_map(priv);
  3198. if (ret) {
  3199. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3200. goto err;
  3201. }
  3202. /* Set up txpower settings in driver for all channels */
  3203. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3204. ret = -EIO;
  3205. goto err_free_channel_map;
  3206. }
  3207. ret = iwlcore_init_geos(priv);
  3208. if (ret) {
  3209. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3210. goto err_free_channel_map;
  3211. }
  3212. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3213. return 0;
  3214. err_free_channel_map:
  3215. iwl_free_channel_map(priv);
  3216. err:
  3217. return ret;
  3218. }
  3219. #define IWL3945_MAX_PROBE_REQUEST 200
  3220. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3221. {
  3222. int ret;
  3223. struct ieee80211_hw *hw = priv->hw;
  3224. hw->rate_control_algorithm = "iwl-3945-rs";
  3225. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3226. hw->vif_data_size = sizeof(struct iwl_vif_priv);
  3227. /* Tell mac80211 our characteristics */
  3228. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3229. IEEE80211_HW_SPECTRUM_MGMT;
  3230. if (!priv->cfg->broken_powersave)
  3231. hw->flags |= IEEE80211_HW_SUPPORTS_PS |
  3232. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  3233. hw->wiphy->interface_modes =
  3234. BIT(NL80211_IFTYPE_STATION) |
  3235. BIT(NL80211_IFTYPE_ADHOC);
  3236. hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
  3237. WIPHY_FLAG_DISABLE_BEACON_HINTS;
  3238. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3239. /* we create the 802.11 header and a zero-length SSID element */
  3240. hw->wiphy->max_scan_ie_len = IWL3945_MAX_PROBE_REQUEST - 24 - 2;
  3241. /* Default value; 4 EDCA QOS priorities */
  3242. hw->queues = 4;
  3243. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3244. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3245. &priv->bands[IEEE80211_BAND_2GHZ];
  3246. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3247. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3248. &priv->bands[IEEE80211_BAND_5GHZ];
  3249. ret = ieee80211_register_hw(priv->hw);
  3250. if (ret) {
  3251. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3252. return ret;
  3253. }
  3254. priv->mac80211_registered = 1;
  3255. return 0;
  3256. }
  3257. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3258. {
  3259. int err = 0;
  3260. struct iwl_priv *priv;
  3261. struct ieee80211_hw *hw;
  3262. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3263. struct iwl3945_eeprom *eeprom;
  3264. unsigned long flags;
  3265. /***********************
  3266. * 1. Allocating HW data
  3267. * ********************/
  3268. /* mac80211 allocates memory for this device instance, including
  3269. * space for this driver's private structure */
  3270. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3271. if (hw == NULL) {
  3272. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3273. err = -ENOMEM;
  3274. goto out;
  3275. }
  3276. priv = hw->priv;
  3277. SET_IEEE80211_DEV(hw, &pdev->dev);
  3278. /*
  3279. * Disabling hardware scan means that mac80211 will perform scans
  3280. * "the hard way", rather than using device's scan.
  3281. */
  3282. if (iwl3945_mod_params.disable_hw_scan) {
  3283. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3284. iwl3945_hw_ops.hw_scan = NULL;
  3285. }
  3286. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3287. priv->cfg = cfg;
  3288. priv->pci_dev = pdev;
  3289. priv->inta_mask = CSR_INI_SET_MASK;
  3290. if (iwl_alloc_traffic_mem(priv))
  3291. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3292. /***************************
  3293. * 2. Initializing PCI bus
  3294. * *************************/
  3295. if (pci_enable_device(pdev)) {
  3296. err = -ENODEV;
  3297. goto out_ieee80211_free_hw;
  3298. }
  3299. pci_set_master(pdev);
  3300. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3301. if (!err)
  3302. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3303. if (err) {
  3304. IWL_WARN(priv, "No suitable DMA available.\n");
  3305. goto out_pci_disable_device;
  3306. }
  3307. pci_set_drvdata(pdev, priv);
  3308. err = pci_request_regions(pdev, DRV_NAME);
  3309. if (err)
  3310. goto out_pci_disable_device;
  3311. /***********************
  3312. * 3. Read REV Register
  3313. * ********************/
  3314. priv->hw_base = pci_iomap(pdev, 0, 0);
  3315. if (!priv->hw_base) {
  3316. err = -ENODEV;
  3317. goto out_pci_release_regions;
  3318. }
  3319. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3320. (unsigned long long) pci_resource_len(pdev, 0));
  3321. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3322. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3323. * PCI Tx retries from interfering with C3 CPU state */
  3324. pci_write_config_byte(pdev, 0x41, 0x00);
  3325. /* these spin locks will be used in apm_ops.init and EEPROM access
  3326. * we should init now
  3327. */
  3328. spin_lock_init(&priv->reg_lock);
  3329. spin_lock_init(&priv->lock);
  3330. /*
  3331. * stop and reset the on-board processor just in case it is in a
  3332. * strange state ... like being left stranded by a primary kernel
  3333. * and this is now the kdump kernel trying to start up
  3334. */
  3335. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3336. /***********************
  3337. * 4. Read EEPROM
  3338. * ********************/
  3339. /* Read the EEPROM */
  3340. err = iwl_eeprom_init(priv);
  3341. if (err) {
  3342. IWL_ERR(priv, "Unable to init EEPROM\n");
  3343. goto out_iounmap;
  3344. }
  3345. /* MAC Address location in EEPROM same for 3945/4965 */
  3346. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3347. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", eeprom->mac_address);
  3348. SET_IEEE80211_PERM_ADDR(priv->hw, eeprom->mac_address);
  3349. /***********************
  3350. * 5. Setup HW Constants
  3351. * ********************/
  3352. /* Device-specific setup */
  3353. if (iwl3945_hw_set_hw_params(priv)) {
  3354. IWL_ERR(priv, "failed to set hw settings\n");
  3355. goto out_eeprom_free;
  3356. }
  3357. /***********************
  3358. * 6. Setup priv
  3359. * ********************/
  3360. err = iwl3945_init_drv(priv);
  3361. if (err) {
  3362. IWL_ERR(priv, "initializing driver failed\n");
  3363. goto out_unset_hw_params;
  3364. }
  3365. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3366. priv->cfg->name);
  3367. /***********************
  3368. * 7. Setup Services
  3369. * ********************/
  3370. spin_lock_irqsave(&priv->lock, flags);
  3371. iwl_disable_interrupts(priv);
  3372. spin_unlock_irqrestore(&priv->lock, flags);
  3373. pci_enable_msi(priv->pci_dev);
  3374. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3375. IRQF_SHARED, DRV_NAME, priv);
  3376. if (err) {
  3377. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3378. goto out_disable_msi;
  3379. }
  3380. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3381. if (err) {
  3382. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3383. goto out_release_irq;
  3384. }
  3385. iwl_set_rxon_channel(priv,
  3386. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3387. iwl3945_setup_deferred_work(priv);
  3388. iwl3945_setup_rx_handlers(priv);
  3389. iwl_power_initialize(priv);
  3390. /*********************************
  3391. * 8. Setup and Register mac80211
  3392. * *******************************/
  3393. iwl_enable_interrupts(priv);
  3394. err = iwl3945_setup_mac(priv);
  3395. if (err)
  3396. goto out_remove_sysfs;
  3397. err = iwl_dbgfs_register(priv, DRV_NAME);
  3398. if (err)
  3399. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3400. /* Start monitoring the killswitch */
  3401. queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
  3402. 2 * HZ);
  3403. return 0;
  3404. out_remove_sysfs:
  3405. destroy_workqueue(priv->workqueue);
  3406. priv->workqueue = NULL;
  3407. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3408. out_release_irq:
  3409. free_irq(priv->pci_dev->irq, priv);
  3410. out_disable_msi:
  3411. pci_disable_msi(priv->pci_dev);
  3412. iwlcore_free_geos(priv);
  3413. iwl_free_channel_map(priv);
  3414. out_unset_hw_params:
  3415. iwl3945_unset_hw_params(priv);
  3416. out_eeprom_free:
  3417. iwl_eeprom_free(priv);
  3418. out_iounmap:
  3419. pci_iounmap(pdev, priv->hw_base);
  3420. out_pci_release_regions:
  3421. pci_release_regions(pdev);
  3422. out_pci_disable_device:
  3423. pci_set_drvdata(pdev, NULL);
  3424. pci_disable_device(pdev);
  3425. out_ieee80211_free_hw:
  3426. iwl_free_traffic_mem(priv);
  3427. ieee80211_free_hw(priv->hw);
  3428. out:
  3429. return err;
  3430. }
  3431. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3432. {
  3433. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3434. unsigned long flags;
  3435. if (!priv)
  3436. return;
  3437. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3438. iwl_dbgfs_unregister(priv);
  3439. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3440. if (priv->mac80211_registered) {
  3441. ieee80211_unregister_hw(priv->hw);
  3442. priv->mac80211_registered = 0;
  3443. } else {
  3444. iwl3945_down(priv);
  3445. }
  3446. /*
  3447. * Make sure device is reset to low power before unloading driver.
  3448. * This may be redundant with iwl_down(), but there are paths to
  3449. * run iwl_down() without calling apm_ops.stop(), and there are
  3450. * paths to avoid running iwl_down() at all before leaving driver.
  3451. * This (inexpensive) call *makes sure* device is reset.
  3452. */
  3453. priv->cfg->ops->lib->apm_ops.stop(priv);
  3454. /* make sure we flush any pending irq or
  3455. * tasklet for the driver
  3456. */
  3457. spin_lock_irqsave(&priv->lock, flags);
  3458. iwl_disable_interrupts(priv);
  3459. spin_unlock_irqrestore(&priv->lock, flags);
  3460. iwl_synchronize_irq(priv);
  3461. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3462. cancel_delayed_work_sync(&priv->_3945.rfkill_poll);
  3463. iwl3945_dealloc_ucode_pci(priv);
  3464. if (priv->rxq.bd)
  3465. iwl3945_rx_queue_free(priv, &priv->rxq);
  3466. iwl3945_hw_txq_ctx_free(priv);
  3467. iwl3945_unset_hw_params(priv);
  3468. /*netif_stop_queue(dev); */
  3469. flush_workqueue(priv->workqueue);
  3470. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3471. * priv->workqueue... so we can't take down the workqueue
  3472. * until now... */
  3473. destroy_workqueue(priv->workqueue);
  3474. priv->workqueue = NULL;
  3475. iwl_free_traffic_mem(priv);
  3476. free_irq(pdev->irq, priv);
  3477. pci_disable_msi(pdev);
  3478. pci_iounmap(pdev, priv->hw_base);
  3479. pci_release_regions(pdev);
  3480. pci_disable_device(pdev);
  3481. pci_set_drvdata(pdev, NULL);
  3482. iwl_free_channel_map(priv);
  3483. iwlcore_free_geos(priv);
  3484. kfree(priv->scan_cmd);
  3485. if (priv->ibss_beacon)
  3486. dev_kfree_skb(priv->ibss_beacon);
  3487. ieee80211_free_hw(priv->hw);
  3488. }
  3489. /*****************************************************************************
  3490. *
  3491. * driver and module entry point
  3492. *
  3493. *****************************************************************************/
  3494. static struct pci_driver iwl3945_driver = {
  3495. .name = DRV_NAME,
  3496. .id_table = iwl3945_hw_card_ids,
  3497. .probe = iwl3945_pci_probe,
  3498. .remove = __devexit_p(iwl3945_pci_remove),
  3499. #ifdef CONFIG_PM
  3500. .suspend = iwl_pci_suspend,
  3501. .resume = iwl_pci_resume,
  3502. #endif
  3503. };
  3504. static int __init iwl3945_init(void)
  3505. {
  3506. int ret;
  3507. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3508. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3509. ret = iwl3945_rate_control_register();
  3510. if (ret) {
  3511. printk(KERN_ERR DRV_NAME
  3512. "Unable to register rate control algorithm: %d\n", ret);
  3513. return ret;
  3514. }
  3515. ret = pci_register_driver(&iwl3945_driver);
  3516. if (ret) {
  3517. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3518. goto error_register;
  3519. }
  3520. return ret;
  3521. error_register:
  3522. iwl3945_rate_control_unregister();
  3523. return ret;
  3524. }
  3525. static void __exit iwl3945_exit(void)
  3526. {
  3527. pci_unregister_driver(&iwl3945_driver);
  3528. iwl3945_rate_control_unregister();
  3529. }
  3530. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3531. module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
  3532. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3533. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
  3534. MODULE_PARM_DESC(swcrypto,
  3535. "using software crypto (default 1 [software])\n");
  3536. #ifdef CONFIG_IWLWIFI_DEBUG
  3537. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3538. MODULE_PARM_DESC(debug, "debug output mask");
  3539. #endif
  3540. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
  3541. int, S_IRUGO);
  3542. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3543. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
  3544. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3545. module_exit(iwl3945_exit);
  3546. module_init(iwl3945_init);