cimax2.c 12 KB

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  1. /*
  2. * cimax2.c
  3. *
  4. * CIMax2(R) SP2 driver in conjunction with NetUp Dual DVB-S2 CI card
  5. *
  6. * Copyright (C) 2009 NetUP Inc.
  7. * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
  8. * Copyright (C) 2009 Abylay Ospan <aospan@netup.ru>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. *
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24. */
  25. #include "cx23885.h"
  26. #include "dvb_ca_en50221.h"
  27. /**** Bit definitions for MC417_RWD and MC417_OEN registers ***
  28. bits 31-16
  29. +-----------+
  30. | Reserved |
  31. +-----------+
  32. bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8
  33. +-------+-------+-------+-------+-------+-------+-------+-------+
  34. | WR# | RD# | | ACK# | ADHI | ADLO | CS1# | CS0# |
  35. +-------+-------+-------+-------+-------+-------+-------+-------+
  36. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
  37. +-------+-------+-------+-------+-------+-------+-------+-------+
  38. | DATA7| DATA6| DATA5| DATA4| DATA3| DATA2| DATA1| DATA0|
  39. +-------+-------+-------+-------+-------+-------+-------+-------+
  40. ***/
  41. /* MC417 */
  42. #define NETUP_DATA 0x000000ff
  43. #define NETUP_WR 0x00008000
  44. #define NETUP_RD 0x00004000
  45. #define NETUP_ACK 0x00001000
  46. #define NETUP_ADHI 0x00000800
  47. #define NETUP_ADLO 0x00000400
  48. #define NETUP_CS1 0x00000200
  49. #define NETUP_CS0 0x00000100
  50. #define NETUP_EN_ALL 0x00001000
  51. #define NETUP_CTRL_OFF (NETUP_CS1 | NETUP_CS0 | NETUP_WR | NETUP_RD)
  52. #define NETUP_CI_CTL 0x04
  53. #define NETUP_CI_RD 1
  54. #define NETUP_IRQ_DETAM 0x1
  55. #define NETUP_IRQ_IRQAM 0x4
  56. static unsigned int ci_dbg;
  57. module_param(ci_dbg, int, 0644);
  58. MODULE_PARM_DESC(ci_dbg, "Enable CI debugging");
  59. #define ci_dbg_print(args...) \
  60. do { \
  61. if (ci_dbg) \
  62. printk(KERN_DEBUG args); \
  63. } while (0)
  64. /* stores all private variables for communication with CI */
  65. struct netup_ci_state {
  66. struct dvb_ca_en50221 ca;
  67. struct mutex ca_mutex;
  68. struct i2c_adapter *i2c_adap;
  69. u8 ci_i2c_addr;
  70. int status;
  71. struct work_struct work;
  72. void *priv;
  73. u8 current_irq_mode;
  74. int current_ci_flag;
  75. unsigned long next_status_checked_time;
  76. };
  77. int netup_read_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
  78. u8 *buf, int len)
  79. {
  80. int ret;
  81. struct i2c_msg msg[] = {
  82. {
  83. .addr = addr,
  84. .flags = 0,
  85. .buf = &reg,
  86. .len = 1
  87. }, {
  88. .addr = addr,
  89. .flags = I2C_M_RD,
  90. .buf = buf,
  91. .len = len
  92. }
  93. };
  94. ret = i2c_transfer(i2c_adap, msg, 2);
  95. if (ret != 2) {
  96. ci_dbg_print("%s: i2c read error, Reg = 0x%02x, Status = %d\n",
  97. __func__, reg, ret);
  98. return -1;
  99. }
  100. ci_dbg_print("%s: i2c read Addr=0x%04x, Reg = 0x%02x, data = %02x\n",
  101. __func__, addr, reg, buf[0]);
  102. return 0;
  103. }
  104. int netup_write_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
  105. u8 *buf, int len)
  106. {
  107. int ret;
  108. u8 buffer[len + 1];
  109. struct i2c_msg msg = {
  110. .addr = addr,
  111. .flags = 0,
  112. .buf = &buffer[0],
  113. .len = len + 1
  114. };
  115. buffer[0] = reg;
  116. memcpy(&buffer[1], buf, len);
  117. ret = i2c_transfer(i2c_adap, &msg, 1);
  118. if (ret != 1) {
  119. ci_dbg_print("%s: i2c write error, Reg=[0x%02x], Status=%d\n",
  120. __func__, reg, ret);
  121. return -1;
  122. }
  123. return 0;
  124. }
  125. int netup_ci_get_mem(struct cx23885_dev *dev)
  126. {
  127. int mem;
  128. unsigned long timeout = jiffies + msecs_to_jiffies(1);
  129. for (;;) {
  130. mem = cx_read(MC417_RWD);
  131. if ((mem & NETUP_ACK) == 0)
  132. break;
  133. if (time_after(jiffies, timeout))
  134. break;
  135. udelay(1);
  136. }
  137. cx_set(MC417_RWD, NETUP_CTRL_OFF);
  138. return mem & 0xff;
  139. }
  140. int netup_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
  141. u8 flag, u8 read, int addr, u8 data)
  142. {
  143. struct netup_ci_state *state = en50221->data;
  144. struct cx23885_tsport *port = state->priv;
  145. struct cx23885_dev *dev = port->dev;
  146. u8 store;
  147. int mem;
  148. int ret;
  149. if (0 != slot)
  150. return -EINVAL;
  151. if (state->current_ci_flag != flag) {
  152. ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
  153. 0, &store, 1);
  154. if (ret != 0)
  155. return ret;
  156. store &= ~0x0c;
  157. store |= flag;
  158. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  159. 0, &store, 1);
  160. if (ret != 0)
  161. return ret;
  162. };
  163. state->current_ci_flag = flag;
  164. mutex_lock(&dev->gpio_lock);
  165. /* write addr */
  166. cx_write(MC417_OEN, NETUP_EN_ALL);
  167. cx_write(MC417_RWD, NETUP_CTRL_OFF |
  168. NETUP_ADLO | (0xff & addr));
  169. cx_clear(MC417_RWD, NETUP_ADLO);
  170. cx_write(MC417_RWD, NETUP_CTRL_OFF |
  171. NETUP_ADHI | (0xff & (addr >> 8)));
  172. cx_clear(MC417_RWD, NETUP_ADHI);
  173. if (read) { /* data in */
  174. cx_write(MC417_OEN, NETUP_EN_ALL | NETUP_DATA);
  175. } else /* data out */
  176. cx_write(MC417_RWD, NETUP_CTRL_OFF | data);
  177. /* choose chip */
  178. cx_clear(MC417_RWD,
  179. (state->ci_i2c_addr == 0x40) ? NETUP_CS0 : NETUP_CS1);
  180. /* read/write */
  181. cx_clear(MC417_RWD, (read) ? NETUP_RD : NETUP_WR);
  182. mem = netup_ci_get_mem(dev);
  183. mutex_unlock(&dev->gpio_lock);
  184. if (!read)
  185. if (mem < 0)
  186. return -EREMOTEIO;
  187. ci_dbg_print("%s: %s: chipaddr=[0x%x] addr=[0x%02x], %s=%x\n", __func__,
  188. (read) ? "read" : "write", state->ci_i2c_addr, addr,
  189. (flag == NETUP_CI_CTL) ? "ctl" : "mem",
  190. (read) ? mem : data);
  191. if (read)
  192. return mem;
  193. return 0;
  194. }
  195. int netup_ci_read_attribute_mem(struct dvb_ca_en50221 *en50221,
  196. int slot, int addr)
  197. {
  198. return netup_ci_op_cam(en50221, slot, 0, NETUP_CI_RD, addr, 0);
  199. }
  200. int netup_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
  201. int slot, int addr, u8 data)
  202. {
  203. return netup_ci_op_cam(en50221, slot, 0, 0, addr, data);
  204. }
  205. int netup_ci_read_cam_ctl(struct dvb_ca_en50221 *en50221, int slot, u8 addr)
  206. {
  207. return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL,
  208. NETUP_CI_RD, addr, 0);
  209. }
  210. int netup_ci_write_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
  211. u8 addr, u8 data)
  212. {
  213. return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL, 0, addr, data);
  214. }
  215. int netup_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
  216. {
  217. struct netup_ci_state *state = en50221->data;
  218. u8 buf = 0x80;
  219. int ret;
  220. if (0 != slot)
  221. return -EINVAL;
  222. udelay(500);
  223. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  224. 0, &buf, 1);
  225. if (ret != 0)
  226. return ret;
  227. udelay(500);
  228. buf = 0x00;
  229. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  230. 0, &buf, 1);
  231. msleep(1000);
  232. dvb_ca_en50221_camready_irq(&state->ca, 0);
  233. return 0;
  234. }
  235. int netup_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
  236. {
  237. /* not implemented */
  238. return 0;
  239. }
  240. int netup_ci_set_irq(struct dvb_ca_en50221 *en50221, u8 irq_mode)
  241. {
  242. struct netup_ci_state *state = en50221->data;
  243. int ret;
  244. if (irq_mode == state->current_irq_mode)
  245. return 0;
  246. ci_dbg_print("%s: chipaddr=[0x%x] setting ci IRQ to [0x%x] \n",
  247. __func__, state->ci_i2c_addr, irq_mode);
  248. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  249. 0x1b, &irq_mode, 1);
  250. if (ret != 0)
  251. return ret;
  252. state->current_irq_mode = irq_mode;
  253. return 0;
  254. }
  255. int netup_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot)
  256. {
  257. struct netup_ci_state *state = en50221->data;
  258. u8 buf;
  259. if (0 != slot)
  260. return -EINVAL;
  261. netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
  262. 0, &buf, 1);
  263. buf |= 0x60;
  264. return netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  265. 0, &buf, 1);
  266. }
  267. /* work handler */
  268. static void netup_read_ci_status(struct work_struct *work)
  269. {
  270. struct netup_ci_state *state =
  271. container_of(work, struct netup_ci_state, work);
  272. u8 buf[33];
  273. int ret;
  274. /* CAM module IRQ processing. fast operation */
  275. dvb_ca_en50221_frda_irq(&state->ca, 0);
  276. /* CAM module INSERT/REMOVE processing. slow operation because of i2c
  277. * transfers */
  278. if (time_after(jiffies, state->next_status_checked_time)
  279. || !state->status) {
  280. ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
  281. 0, &buf[0], 33);
  282. state->next_status_checked_time = jiffies
  283. + msecs_to_jiffies(1000);
  284. if (ret != 0)
  285. return;
  286. ci_dbg_print("%s: Slot Status Addr=[0x%04x], "
  287. "Reg=[0x%02x], data=%02x, "
  288. "TS config = %02x\n", __func__,
  289. state->ci_i2c_addr, 0, buf[0],
  290. buf[0]);
  291. if (buf[0] & 1)
  292. state->status = DVB_CA_EN50221_POLL_CAM_PRESENT |
  293. DVB_CA_EN50221_POLL_CAM_READY;
  294. else
  295. state->status = 0;
  296. };
  297. }
  298. /* CI irq handler */
  299. int netup_ci_slot_status(struct cx23885_dev *dev, u32 pci_status)
  300. {
  301. struct cx23885_tsport *port = NULL;
  302. struct netup_ci_state *state = NULL;
  303. if (pci_status & PCI_MSK_GPIO0)
  304. port = &dev->ts1;
  305. else if (pci_status & PCI_MSK_GPIO1)
  306. port = &dev->ts2;
  307. else /* who calls ? */
  308. return 0;
  309. state = port->port_priv;
  310. schedule_work(&state->work);
  311. return 1;
  312. }
  313. int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221, int slot, int open)
  314. {
  315. struct netup_ci_state *state = en50221->data;
  316. if (0 != slot)
  317. return -EINVAL;
  318. netup_ci_set_irq(en50221, open ? (NETUP_IRQ_DETAM | NETUP_IRQ_IRQAM)
  319. : NETUP_IRQ_DETAM);
  320. return state->status;
  321. }
  322. int netup_ci_init(struct cx23885_tsport *port)
  323. {
  324. struct netup_ci_state *state;
  325. u8 cimax_init[34] = {
  326. 0x00, /* module A control*/
  327. 0x00, /* auto select mask high A */
  328. 0x00, /* auto select mask low A */
  329. 0x00, /* auto select pattern high A */
  330. 0x00, /* auto select pattern low A */
  331. 0x44, /* memory access time A */
  332. 0x00, /* invert input A */
  333. 0x00, /* RFU */
  334. 0x00, /* RFU */
  335. 0x00, /* module B control*/
  336. 0x00, /* auto select mask high B */
  337. 0x00, /* auto select mask low B */
  338. 0x00, /* auto select pattern high B */
  339. 0x00, /* auto select pattern low B */
  340. 0x44, /* memory access time B */
  341. 0x00, /* invert input B */
  342. 0x00, /* RFU */
  343. 0x00, /* RFU */
  344. 0x00, /* auto select mask high Ext */
  345. 0x00, /* auto select mask low Ext */
  346. 0x00, /* auto select pattern high Ext */
  347. 0x00, /* auto select pattern low Ext */
  348. 0x00, /* RFU */
  349. 0x02, /* destination - module A */
  350. 0x01, /* power on (use it like store place) */
  351. 0x00, /* RFU */
  352. 0x00, /* int status read only */
  353. NETUP_IRQ_IRQAM | NETUP_IRQ_DETAM, /* DETAM, IRQAM unmasked */
  354. 0x05, /* EXTINT=active-high, INT=push-pull */
  355. 0x00, /* USCG1 */
  356. 0x04, /* ack active low */
  357. 0x00, /* LOCK = 0 */
  358. 0x33, /* serial mode, rising in, rising out, MSB first*/
  359. 0x31, /* syncronization */
  360. };
  361. int ret;
  362. ci_dbg_print("%s\n", __func__);
  363. state = kzalloc(sizeof(struct netup_ci_state), GFP_KERNEL);
  364. if (!state) {
  365. ci_dbg_print("%s: Unable create CI structure!\n", __func__);
  366. ret = -ENOMEM;
  367. goto err;
  368. }
  369. port->port_priv = state;
  370. switch (port->nr) {
  371. case 1:
  372. state->ci_i2c_addr = 0x40;
  373. break;
  374. case 2:
  375. state->ci_i2c_addr = 0x41;
  376. break;
  377. }
  378. state->i2c_adap = &port->dev->i2c_bus[0].i2c_adap;
  379. state->ca.owner = THIS_MODULE;
  380. state->ca.read_attribute_mem = netup_ci_read_attribute_mem;
  381. state->ca.write_attribute_mem = netup_ci_write_attribute_mem;
  382. state->ca.read_cam_control = netup_ci_read_cam_ctl;
  383. state->ca.write_cam_control = netup_ci_write_cam_ctl;
  384. state->ca.slot_reset = netup_ci_slot_reset;
  385. state->ca.slot_shutdown = netup_ci_slot_shutdown;
  386. state->ca.slot_ts_enable = netup_ci_slot_ts_ctl;
  387. state->ca.poll_slot_status = netup_poll_ci_slot_status;
  388. state->ca.data = state;
  389. state->priv = port;
  390. state->current_irq_mode = NETUP_IRQ_IRQAM | NETUP_IRQ_DETAM;
  391. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  392. 0, &cimax_init[0], 34);
  393. /* lock registers */
  394. ret |= netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  395. 0x1f, &cimax_init[0x18], 1);
  396. /* power on slots */
  397. ret |= netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  398. 0x18, &cimax_init[0x18], 1);
  399. if (0 != ret)
  400. goto err;
  401. ret = dvb_ca_en50221_init(&port->frontends.adapter,
  402. &state->ca,
  403. /* flags */ 0,
  404. /* n_slots */ 1);
  405. if (0 != ret)
  406. goto err;
  407. INIT_WORK(&state->work, netup_read_ci_status);
  408. schedule_work(&state->work);
  409. ci_dbg_print("%s: CI initialized!\n", __func__);
  410. return 0;
  411. err:
  412. ci_dbg_print("%s: Cannot initialize CI: Error %d.\n", __func__, ret);
  413. kfree(state);
  414. return ret;
  415. }
  416. void netup_ci_exit(struct cx23885_tsport *port)
  417. {
  418. struct netup_ci_state *state;
  419. if (NULL == port)
  420. return;
  421. state = (struct netup_ci_state *)port->port_priv;
  422. if (NULL == state)
  423. return;
  424. if (NULL == state->ca.data)
  425. return;
  426. dvb_ca_en50221_release(&state->ca);
  427. kfree(state);
  428. }