nsp32.c 90 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511
  1. /*
  2. * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
  3. * Copyright (C) 2001, 2002, 2003
  4. * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
  5. * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. *
  18. * Revision History:
  19. * 1.0: Initial Release.
  20. * 1.1: Add /proc SDTR status.
  21. * Remove obsolete error handler nsp32_reset.
  22. * Some clean up.
  23. * 1.2: PowerPC (big endian) support.
  24. */
  25. #include <linux/version.h>
  26. #include <linux/module.h>
  27. #include <linux/init.h>
  28. #include <linux/kernel.h>
  29. #include <linux/slab.h>
  30. #include <linux/string.h>
  31. #include <linux/timer.h>
  32. #include <linux/ioport.h>
  33. #include <linux/major.h>
  34. #include <linux/blkdev.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/pci.h>
  37. #include <linux/delay.h>
  38. #include <linux/ctype.h>
  39. #include <linux/dma-mapping.h>
  40. #include <asm/dma.h>
  41. #include <asm/system.h>
  42. #include <asm/io.h>
  43. #include <scsi/scsi.h>
  44. #include <scsi/scsi_cmnd.h>
  45. #include <scsi/scsi_device.h>
  46. #include <scsi/scsi_host.h>
  47. #include <scsi/scsi_ioctl.h>
  48. #include "nsp32.h"
  49. /***********************************************************************
  50. * Module parameters
  51. */
  52. static int trans_mode = 0; /* default: BIOS */
  53. module_param (trans_mode, int, 0);
  54. MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
  55. #define ASYNC_MODE 1
  56. #define ULTRA20M_MODE 2
  57. static int auto_param = 0; /* default: ON */
  58. module_param (auto_param, bool, 0);
  59. MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
  60. static int disc_priv = 1; /* default: OFF */
  61. module_param (disc_priv, bool, 0);
  62. MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
  63. MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
  64. MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
  65. MODULE_LICENSE("GPL");
  66. static const char *nsp32_release_version = "1.2";
  67. /****************************************************************************
  68. * Supported hardware
  69. */
  70. static struct pci_device_id nsp32_pci_table[] __devinitdata = {
  71. {
  72. .vendor = PCI_VENDOR_ID_IODATA,
  73. .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
  74. .subvendor = PCI_ANY_ID,
  75. .subdevice = PCI_ANY_ID,
  76. .driver_data = MODEL_IODATA,
  77. },
  78. {
  79. .vendor = PCI_VENDOR_ID_WORKBIT,
  80. .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
  81. .subvendor = PCI_ANY_ID,
  82. .subdevice = PCI_ANY_ID,
  83. .driver_data = MODEL_KME,
  84. },
  85. {
  86. .vendor = PCI_VENDOR_ID_WORKBIT,
  87. .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
  88. .subvendor = PCI_ANY_ID,
  89. .subdevice = PCI_ANY_ID,
  90. .driver_data = MODEL_WORKBIT,
  91. },
  92. {
  93. .vendor = PCI_VENDOR_ID_WORKBIT,
  94. .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
  95. .subvendor = PCI_ANY_ID,
  96. .subdevice = PCI_ANY_ID,
  97. .driver_data = MODEL_PCI_WORKBIT,
  98. },
  99. {
  100. .vendor = PCI_VENDOR_ID_WORKBIT,
  101. .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
  102. .subvendor = PCI_ANY_ID,
  103. .subdevice = PCI_ANY_ID,
  104. .driver_data = MODEL_LOGITEC,
  105. },
  106. {
  107. .vendor = PCI_VENDOR_ID_WORKBIT,
  108. .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
  109. .subvendor = PCI_ANY_ID,
  110. .subdevice = PCI_ANY_ID,
  111. .driver_data = MODEL_PCI_LOGITEC,
  112. },
  113. {
  114. .vendor = PCI_VENDOR_ID_WORKBIT,
  115. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
  116. .subvendor = PCI_ANY_ID,
  117. .subdevice = PCI_ANY_ID,
  118. .driver_data = MODEL_PCI_MELCO,
  119. },
  120. {
  121. .vendor = PCI_VENDOR_ID_WORKBIT,
  122. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
  123. .subvendor = PCI_ANY_ID,
  124. .subdevice = PCI_ANY_ID,
  125. .driver_data = MODEL_PCI_MELCO,
  126. },
  127. {0,0,},
  128. };
  129. MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
  130. static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
  131. /*
  132. * Period/AckWidth speed conversion table
  133. *
  134. * Note: This period/ackwidth speed table must be in descending order.
  135. */
  136. static nsp32_sync_table nsp32_sync_table_40M[] = {
  137. /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
  138. {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
  139. {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
  140. {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  141. {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
  142. {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
  143. {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
  144. {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  145. {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
  146. {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  147. };
  148. static nsp32_sync_table nsp32_sync_table_20M[] = {
  149. {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  150. {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
  151. {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  152. {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  153. {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
  154. {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
  155. {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
  156. {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
  157. {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
  158. };
  159. static nsp32_sync_table nsp32_sync_table_pci[] = {
  160. {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
  161. {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
  162. {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
  163. {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
  164. {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
  165. {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
  166. {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
  167. {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
  168. {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
  169. };
  170. /*
  171. * function declaration
  172. */
  173. /* module entry point */
  174. static int __devinit nsp32_probe (struct pci_dev *, const struct pci_device_id *);
  175. static void __devexit nsp32_remove(struct pci_dev *);
  176. static int __init init_nsp32 (void);
  177. static void __exit exit_nsp32 (void);
  178. /* struct struct scsi_host_template */
  179. static int nsp32_proc_info (struct Scsi_Host *, char *, char **, off_t, int, int);
  180. static int nsp32_detect (struct pci_dev *pdev);
  181. static int nsp32_queuecommand(struct scsi_cmnd *,
  182. void (*done)(struct scsi_cmnd *));
  183. static const char *nsp32_info (struct Scsi_Host *);
  184. static int nsp32_release (struct Scsi_Host *);
  185. /* SCSI error handler */
  186. static int nsp32_eh_abort (struct scsi_cmnd *);
  187. static int nsp32_eh_bus_reset (struct scsi_cmnd *);
  188. static int nsp32_eh_host_reset(struct scsi_cmnd *);
  189. /* generate SCSI message */
  190. static void nsp32_build_identify(struct scsi_cmnd *);
  191. static void nsp32_build_nop (struct scsi_cmnd *);
  192. static void nsp32_build_reject (struct scsi_cmnd *);
  193. static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char);
  194. /* SCSI message handler */
  195. static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
  196. static void nsp32_msgout_occur (struct scsi_cmnd *);
  197. static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short);
  198. static int nsp32_setup_sg_table (struct scsi_cmnd *);
  199. static int nsp32_selection_autopara(struct scsi_cmnd *);
  200. static int nsp32_selection_autoscsi(struct scsi_cmnd *);
  201. static void nsp32_scsi_done (struct scsi_cmnd *);
  202. static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
  203. static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
  204. static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
  205. static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
  206. /* SCSI SDTR */
  207. static void nsp32_analyze_sdtr (struct scsi_cmnd *);
  208. static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
  209. static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
  210. static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
  211. static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
  212. /* SCSI bus status handler */
  213. static void nsp32_wait_req (nsp32_hw_data *, int);
  214. static void nsp32_wait_sack (nsp32_hw_data *, int);
  215. static void nsp32_sack_assert (nsp32_hw_data *);
  216. static void nsp32_sack_negate (nsp32_hw_data *);
  217. static void nsp32_do_bus_reset(nsp32_hw_data *);
  218. /* hardware interrupt handler */
  219. static irqreturn_t do_nsp32_isr(int, void *);
  220. /* initialize hardware */
  221. static int nsp32hw_init(nsp32_hw_data *);
  222. /* EEPROM handler */
  223. static int nsp32_getprom_param (nsp32_hw_data *);
  224. static int nsp32_getprom_at24 (nsp32_hw_data *);
  225. static int nsp32_getprom_c16 (nsp32_hw_data *);
  226. static void nsp32_prom_start (nsp32_hw_data *);
  227. static void nsp32_prom_stop (nsp32_hw_data *);
  228. static int nsp32_prom_read (nsp32_hw_data *, int);
  229. static int nsp32_prom_read_bit (nsp32_hw_data *);
  230. static void nsp32_prom_write_bit(nsp32_hw_data *, int);
  231. static void nsp32_prom_set (nsp32_hw_data *, int, int);
  232. static int nsp32_prom_get (nsp32_hw_data *, int);
  233. /* debug/warning/info message */
  234. static void nsp32_message (const char *, int, char *, char *, ...);
  235. #ifdef NSP32_DEBUG
  236. static void nsp32_dmessage(const char *, int, int, char *, ...);
  237. #endif
  238. /*
  239. * max_sectors is currently limited up to 128.
  240. */
  241. static struct scsi_host_template nsp32_template = {
  242. .proc_name = "nsp32",
  243. .name = "Workbit NinjaSCSI-32Bi/UDE",
  244. .proc_info = nsp32_proc_info,
  245. .info = nsp32_info,
  246. .queuecommand = nsp32_queuecommand,
  247. .can_queue = 1,
  248. .sg_tablesize = NSP32_SG_SIZE,
  249. .max_sectors = 128,
  250. .cmd_per_lun = 1,
  251. .this_id = NSP32_HOST_SCSIID,
  252. .use_clustering = DISABLE_CLUSTERING,
  253. .eh_abort_handler = nsp32_eh_abort,
  254. .eh_bus_reset_handler = nsp32_eh_bus_reset,
  255. .eh_host_reset_handler = nsp32_eh_host_reset,
  256. /* .highmem_io = 1, */
  257. };
  258. #include "nsp32_io.h"
  259. /***********************************************************************
  260. * debug, error print
  261. */
  262. #ifndef NSP32_DEBUG
  263. # define NSP32_DEBUG_MASK 0x000000
  264. # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
  265. # define nsp32_dbg(mask, args...) /* */
  266. #else
  267. # define NSP32_DEBUG_MASK 0xffffff
  268. # define nsp32_msg(type, args...) \
  269. nsp32_message (__FUNCTION__, __LINE__, (type), args)
  270. # define nsp32_dbg(mask, args...) \
  271. nsp32_dmessage(__FUNCTION__, __LINE__, (mask), args)
  272. #endif
  273. #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
  274. #define NSP32_DEBUG_REGISTER BIT(1)
  275. #define NSP32_DEBUG_AUTOSCSI BIT(2)
  276. #define NSP32_DEBUG_INTR BIT(3)
  277. #define NSP32_DEBUG_SGLIST BIT(4)
  278. #define NSP32_DEBUG_BUSFREE BIT(5)
  279. #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
  280. #define NSP32_DEBUG_RESELECTION BIT(7)
  281. #define NSP32_DEBUG_MSGINOCCUR BIT(8)
  282. #define NSP32_DEBUG_EEPROM BIT(9)
  283. #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
  284. #define NSP32_DEBUG_BUSRESET BIT(11)
  285. #define NSP32_DEBUG_RESTART BIT(12)
  286. #define NSP32_DEBUG_SYNC BIT(13)
  287. #define NSP32_DEBUG_WAIT BIT(14)
  288. #define NSP32_DEBUG_TARGETFLAG BIT(15)
  289. #define NSP32_DEBUG_PROC BIT(16)
  290. #define NSP32_DEBUG_INIT BIT(17)
  291. #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
  292. #define NSP32_DEBUG_BUF_LEN 100
  293. static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
  294. {
  295. va_list args;
  296. char buf[NSP32_DEBUG_BUF_LEN];
  297. va_start(args, fmt);
  298. vsnprintf(buf, sizeof(buf), fmt, args);
  299. va_end(args);
  300. #ifndef NSP32_DEBUG
  301. printk("%snsp32: %s\n", type, buf);
  302. #else
  303. printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
  304. #endif
  305. }
  306. #ifdef NSP32_DEBUG
  307. static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
  308. {
  309. va_list args;
  310. char buf[NSP32_DEBUG_BUF_LEN];
  311. va_start(args, fmt);
  312. vsnprintf(buf, sizeof(buf), fmt, args);
  313. va_end(args);
  314. if (mask & NSP32_DEBUG_MASK) {
  315. printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
  316. }
  317. }
  318. #endif
  319. #ifdef NSP32_DEBUG
  320. # include "nsp32_debug.c"
  321. #else
  322. # define show_command(arg) /* */
  323. # define show_busphase(arg) /* */
  324. # define show_autophase(arg) /* */
  325. #endif
  326. /*
  327. * IDENTIFY Message
  328. */
  329. static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
  330. {
  331. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  332. int pos = data->msgout_len;
  333. int mode = FALSE;
  334. /* XXX: Auto DiscPriv detection is progressing... */
  335. if (disc_priv == 0) {
  336. /* mode = TRUE; */
  337. }
  338. data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
  339. data->msgout_len = pos;
  340. }
  341. /*
  342. * SDTR Message Routine
  343. */
  344. static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
  345. unsigned char period,
  346. unsigned char offset)
  347. {
  348. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  349. int pos = data->msgout_len;
  350. data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
  351. data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
  352. data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
  353. data->msgoutbuf[pos] = period; pos++;
  354. data->msgoutbuf[pos] = offset; pos++;
  355. data->msgout_len = pos;
  356. }
  357. /*
  358. * No Operation Message
  359. */
  360. static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
  361. {
  362. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  363. int pos = data->msgout_len;
  364. if (pos != 0) {
  365. nsp32_msg(KERN_WARNING,
  366. "Some messages are already contained!");
  367. return;
  368. }
  369. data->msgoutbuf[pos] = NOP; pos++;
  370. data->msgout_len = pos;
  371. }
  372. /*
  373. * Reject Message
  374. */
  375. static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
  376. {
  377. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  378. int pos = data->msgout_len;
  379. data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
  380. data->msgout_len = pos;
  381. }
  382. /*
  383. * timer
  384. */
  385. #if 0
  386. static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
  387. {
  388. unsigned int base = SCpnt->host->io_port;
  389. nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
  390. if (time & (~TIMER_CNT_MASK)) {
  391. nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
  392. }
  393. nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
  394. }
  395. #endif
  396. /*
  397. * set SCSI command and other parameter to asic, and start selection phase
  398. */
  399. static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
  400. {
  401. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  402. unsigned int base = SCpnt->device->host->io_port;
  403. unsigned int host_id = SCpnt->device->host->this_id;
  404. unsigned char target = scmd_id(SCpnt);
  405. nsp32_autoparam *param = data->autoparam;
  406. unsigned char phase;
  407. int i, ret;
  408. unsigned int msgout;
  409. u16_le s;
  410. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  411. /*
  412. * check bus free
  413. */
  414. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  415. if (phase != BUSMON_BUS_FREE) {
  416. nsp32_msg(KERN_WARNING, "bus busy");
  417. show_busphase(phase & BUSMON_PHASE_MASK);
  418. SCpnt->result = DID_BUS_BUSY << 16;
  419. return FALSE;
  420. }
  421. /*
  422. * message out
  423. *
  424. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  425. * over 3 messages needs another routine.
  426. */
  427. if (data->msgout_len == 0) {
  428. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  429. SCpnt->result = DID_ERROR << 16;
  430. return FALSE;
  431. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  432. msgout = 0;
  433. for (i = 0; i < data->msgout_len; i++) {
  434. /*
  435. * the sending order of the message is:
  436. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  437. * MCNT 2: MSG#1 -> MSG#2
  438. * MCNT 1: MSG#2
  439. */
  440. msgout >>= 8;
  441. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  442. }
  443. msgout |= MV_VALID; /* MV valid */
  444. msgout |= (unsigned int)data->msgout_len; /* len */
  445. } else {
  446. /* data->msgout_len > 3 */
  447. msgout = 0;
  448. }
  449. // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT));
  450. // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  451. /*
  452. * setup asic parameter
  453. */
  454. memset(param, 0, sizeof(nsp32_autoparam));
  455. /* cdb */
  456. for (i = 0; i < SCpnt->cmd_len; i++) {
  457. param->cdb[4 * i] = SCpnt->cmnd[i];
  458. }
  459. /* outgoing messages */
  460. param->msgout = cpu_to_le32(msgout);
  461. /* syncreg, ackwidth, target id, SREQ sampling rate */
  462. param->syncreg = data->cur_target->syncreg;
  463. param->ackwidth = data->cur_target->ackwidth;
  464. param->target_id = BIT(host_id) | BIT(target);
  465. param->sample_reg = data->cur_target->sample_reg;
  466. // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
  467. /* command control */
  468. param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
  469. AUTOSCSI_START |
  470. AUTO_MSGIN_00_OR_04 |
  471. AUTO_MSGIN_02 |
  472. AUTO_ATN );
  473. /* transfer control */
  474. s = 0;
  475. switch (data->trans_method) {
  476. case NSP32_TRANSFER_BUSMASTER:
  477. s |= BM_START;
  478. break;
  479. case NSP32_TRANSFER_MMIO:
  480. s |= CB_MMIO_MODE;
  481. break;
  482. case NSP32_TRANSFER_PIO:
  483. s |= CB_IO_MODE;
  484. break;
  485. default:
  486. nsp32_msg(KERN_ERR, "unknown trans_method");
  487. break;
  488. }
  489. /*
  490. * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
  491. * For bus master transfer, it's taken off.
  492. */
  493. s |= (TRANSFER_GO | ALL_COUNTER_CLR);
  494. param->transfer_control = cpu_to_le16(s);
  495. /* sg table addr */
  496. param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
  497. /*
  498. * transfer parameter to ASIC
  499. */
  500. nsp32_write4(base, SGT_ADR, data->auto_paddr);
  501. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
  502. AUTO_PARAMETER );
  503. /*
  504. * Check arbitration
  505. */
  506. ret = nsp32_arbitration(SCpnt, base);
  507. return ret;
  508. }
  509. /*
  510. * Selection with AUTO SCSI (without AUTO PARAMETER)
  511. */
  512. static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
  513. {
  514. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  515. unsigned int base = SCpnt->device->host->io_port;
  516. unsigned int host_id = SCpnt->device->host->this_id;
  517. unsigned char target = scmd_id(SCpnt);
  518. unsigned char phase;
  519. int status;
  520. unsigned short command = 0;
  521. unsigned int msgout = 0;
  522. unsigned short execph;
  523. int i;
  524. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  525. /*
  526. * IRQ disable
  527. */
  528. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  529. /*
  530. * check bus line
  531. */
  532. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  533. if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) {
  534. nsp32_msg(KERN_WARNING, "bus busy");
  535. SCpnt->result = DID_BUS_BUSY << 16;
  536. status = 1;
  537. goto out;
  538. }
  539. /*
  540. * clear execph
  541. */
  542. execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  543. /*
  544. * clear FIFO counter to set CDBs
  545. */
  546. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
  547. /*
  548. * set CDB0 - CDB15
  549. */
  550. for (i = 0; i < SCpnt->cmd_len; i++) {
  551. nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
  552. }
  553. nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
  554. /*
  555. * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
  556. */
  557. nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
  558. /*
  559. * set SCSI MSGOUT REG
  560. *
  561. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  562. * over 3 messages needs another routine.
  563. */
  564. if (data->msgout_len == 0) {
  565. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  566. SCpnt->result = DID_ERROR << 16;
  567. status = 1;
  568. goto out;
  569. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  570. msgout = 0;
  571. for (i = 0; i < data->msgout_len; i++) {
  572. /*
  573. * the sending order of the message is:
  574. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  575. * MCNT 2: MSG#1 -> MSG#2
  576. * MCNT 1: MSG#2
  577. */
  578. msgout >>= 8;
  579. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  580. }
  581. msgout |= MV_VALID; /* MV valid */
  582. msgout |= (unsigned int)data->msgout_len; /* len */
  583. nsp32_write4(base, SCSI_MSG_OUT, msgout);
  584. } else {
  585. /* data->msgout_len > 3 */
  586. nsp32_write4(base, SCSI_MSG_OUT, 0);
  587. }
  588. /*
  589. * set selection timeout(= 250ms)
  590. */
  591. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  592. /*
  593. * set SREQ hazard killer sampling rate
  594. *
  595. * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
  596. * check other internal clock!
  597. */
  598. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  599. /*
  600. * clear Arbit
  601. */
  602. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  603. /*
  604. * set SYNCREG
  605. * Don't set BM_START_ADR before setting this register.
  606. */
  607. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  608. /*
  609. * set ACKWIDTH
  610. */
  611. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  612. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  613. "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
  614. nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
  615. nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
  616. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
  617. data->msgout_len, msgout);
  618. /*
  619. * set SGT ADDR (physical address)
  620. */
  621. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  622. /*
  623. * set TRANSFER CONTROL REG
  624. */
  625. command = 0;
  626. command |= (TRANSFER_GO | ALL_COUNTER_CLR);
  627. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  628. if (SCpnt->request_bufflen > 0) {
  629. command |= BM_START;
  630. }
  631. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  632. command |= CB_MMIO_MODE;
  633. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  634. command |= CB_IO_MODE;
  635. }
  636. nsp32_write2(base, TRANSFER_CONTROL, command);
  637. /*
  638. * start AUTO SCSI, kick off arbitration
  639. */
  640. command = (CLEAR_CDB_FIFO_POINTER |
  641. AUTOSCSI_START |
  642. AUTO_MSGIN_00_OR_04 |
  643. AUTO_MSGIN_02 |
  644. AUTO_ATN );
  645. nsp32_write2(base, COMMAND_CONTROL, command);
  646. /*
  647. * Check arbitration
  648. */
  649. status = nsp32_arbitration(SCpnt, base);
  650. out:
  651. /*
  652. * IRQ enable
  653. */
  654. nsp32_write2(base, IRQ_CONTROL, 0);
  655. return status;
  656. }
  657. /*
  658. * Arbitration Status Check
  659. *
  660. * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
  661. * Using udelay(1) consumes CPU time and system time, but
  662. * arbitration delay time is defined minimal 2.4us in SCSI
  663. * specification, thus udelay works as coarse grained wait timer.
  664. */
  665. static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
  666. {
  667. unsigned char arbit;
  668. int status = TRUE;
  669. int time = 0;
  670. do {
  671. arbit = nsp32_read1(base, ARBIT_STATUS);
  672. time++;
  673. } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
  674. (time <= ARBIT_TIMEOUT_TIME));
  675. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  676. "arbit: 0x%x, delay time: %d", arbit, time);
  677. if (arbit & ARBIT_WIN) {
  678. /* Arbitration succeeded */
  679. SCpnt->result = DID_OK << 16;
  680. nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
  681. } else if (arbit & ARBIT_FAIL) {
  682. /* Arbitration failed */
  683. SCpnt->result = DID_BUS_BUSY << 16;
  684. status = FALSE;
  685. } else {
  686. /*
  687. * unknown error or ARBIT_GO timeout,
  688. * something lock up! guess no connection.
  689. */
  690. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
  691. SCpnt->result = DID_NO_CONNECT << 16;
  692. status = FALSE;
  693. }
  694. /*
  695. * clear Arbit
  696. */
  697. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  698. return status;
  699. }
  700. /*
  701. * reselection
  702. *
  703. * Note: This reselection routine is called from msgin_occur,
  704. * reselection target id&lun must be already set.
  705. * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
  706. */
  707. static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
  708. {
  709. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  710. unsigned int host_id = SCpnt->device->host->this_id;
  711. unsigned int base = SCpnt->device->host->io_port;
  712. unsigned char tmpid, newid;
  713. nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
  714. /*
  715. * calculate reselected SCSI ID
  716. */
  717. tmpid = nsp32_read1(base, RESELECT_ID);
  718. tmpid &= (~BIT(host_id));
  719. newid = 0;
  720. while (tmpid) {
  721. if (tmpid & 1) {
  722. break;
  723. }
  724. tmpid >>= 1;
  725. newid++;
  726. }
  727. /*
  728. * If reselected New ID:LUN is not existed
  729. * or current nexus is not existed, unexpected
  730. * reselection is occurred. Send reject message.
  731. */
  732. if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
  733. nsp32_msg(KERN_WARNING, "unknown id/lun");
  734. return FALSE;
  735. } else if(data->lunt[newid][newlun].SCpnt == NULL) {
  736. nsp32_msg(KERN_WARNING, "no SCSI command is processing");
  737. return FALSE;
  738. }
  739. data->cur_id = newid;
  740. data->cur_lun = newlun;
  741. data->cur_target = &(data->target[newid]);
  742. data->cur_lunt = &(data->lunt[newid][newlun]);
  743. /* reset SACK/SavedACK counter (or ALL clear?) */
  744. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  745. return TRUE;
  746. }
  747. /*
  748. * nsp32_setup_sg_table - build scatter gather list for transfer data
  749. * with bus master.
  750. *
  751. * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
  752. */
  753. static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
  754. {
  755. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  756. struct scatterlist *sgl;
  757. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  758. int num, i;
  759. u32_le l;
  760. if (SCpnt->request_bufflen == 0) {
  761. return TRUE;
  762. }
  763. if (sgt == NULL) {
  764. nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
  765. return FALSE;
  766. }
  767. if (SCpnt->use_sg) {
  768. sgl = (struct scatterlist *)SCpnt->request_buffer;
  769. num = pci_map_sg(data->Pci, sgl, SCpnt->use_sg,
  770. SCpnt->sc_data_direction);
  771. for (i = 0; i < num; i++) {
  772. /*
  773. * Build nsp32_sglist, substitute sg dma addresses.
  774. */
  775. sgt[i].addr = cpu_to_le32(sg_dma_address(sgl));
  776. sgt[i].len = cpu_to_le32(sg_dma_len(sgl));
  777. sgl++;
  778. if (le32_to_cpu(sgt[i].len) > 0x10000) {
  779. nsp32_msg(KERN_ERR,
  780. "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
  781. return FALSE;
  782. }
  783. nsp32_dbg(NSP32_DEBUG_SGLIST,
  784. "num 0x%x : addr 0x%lx len 0x%lx",
  785. i,
  786. le32_to_cpu(sgt[i].addr),
  787. le32_to_cpu(sgt[i].len ));
  788. }
  789. /* set end mark */
  790. l = le32_to_cpu(sgt[num-1].len);
  791. sgt[num-1].len = cpu_to_le32(l | SGTEND);
  792. } else {
  793. SCpnt->SCp.have_data_in = pci_map_single(data->Pci,
  794. SCpnt->request_buffer, SCpnt->request_bufflen,
  795. SCpnt->sc_data_direction);
  796. sgt[0].addr = cpu_to_le32(SCpnt->SCp.have_data_in);
  797. sgt[0].len = cpu_to_le32(SCpnt->request_bufflen | SGTEND); /* set end mark */
  798. if (SCpnt->request_bufflen > 0x10000) {
  799. nsp32_msg(KERN_ERR,
  800. "can't transfer over 64KB at a time, size=0x%lx", SCpnt->request_bufflen);
  801. return FALSE;
  802. }
  803. nsp32_dbg(NSP32_DEBUG_SGLIST, "single : addr 0x%lx len=0x%lx",
  804. le32_to_cpu(sgt[0].addr),
  805. le32_to_cpu(sgt[0].len ));
  806. }
  807. return TRUE;
  808. }
  809. static int nsp32_queuecommand(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
  810. {
  811. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  812. nsp32_target *target;
  813. nsp32_lunt *cur_lunt;
  814. int ret;
  815. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  816. "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x "
  817. "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
  818. SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
  819. SCpnt->use_sg, SCpnt->request_buffer, SCpnt->request_bufflen);
  820. if (data->CurrentSC != NULL) {
  821. nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
  822. data->CurrentSC = NULL;
  823. SCpnt->result = DID_NO_CONNECT << 16;
  824. done(SCpnt);
  825. return 0;
  826. }
  827. /* check target ID is not same as this initiator ID */
  828. if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
  829. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "terget==host???");
  830. SCpnt->result = DID_BAD_TARGET << 16;
  831. done(SCpnt);
  832. return 0;
  833. }
  834. /* check target LUN is allowable value */
  835. if (SCpnt->device->lun >= MAX_LUN) {
  836. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
  837. SCpnt->result = DID_BAD_TARGET << 16;
  838. done(SCpnt);
  839. return 0;
  840. }
  841. show_command(SCpnt);
  842. SCpnt->scsi_done = done;
  843. data->CurrentSC = SCpnt;
  844. SCpnt->SCp.Status = CHECK_CONDITION;
  845. SCpnt->SCp.Message = 0;
  846. SCpnt->resid = SCpnt->request_bufflen;
  847. SCpnt->SCp.ptr = (char *) SCpnt->request_buffer;
  848. SCpnt->SCp.this_residual = SCpnt->request_bufflen;
  849. SCpnt->SCp.buffer = NULL;
  850. SCpnt->SCp.buffers_residual = 0;
  851. /* initialize data */
  852. data->msgout_len = 0;
  853. data->msgin_len = 0;
  854. cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
  855. cur_lunt->SCpnt = SCpnt;
  856. cur_lunt->save_datp = 0;
  857. cur_lunt->msgin03 = FALSE;
  858. data->cur_lunt = cur_lunt;
  859. data->cur_id = SCpnt->device->id;
  860. data->cur_lun = SCpnt->device->lun;
  861. ret = nsp32_setup_sg_table(SCpnt);
  862. if (ret == FALSE) {
  863. nsp32_msg(KERN_ERR, "SGT fail");
  864. SCpnt->result = DID_ERROR << 16;
  865. nsp32_scsi_done(SCpnt);
  866. return 0;
  867. }
  868. /* Build IDENTIFY */
  869. nsp32_build_identify(SCpnt);
  870. /*
  871. * If target is the first time to transfer after the reset
  872. * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
  873. * message SDTR is needed to do synchronous transfer.
  874. */
  875. target = &data->target[scmd_id(SCpnt)];
  876. data->cur_target = target;
  877. if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
  878. unsigned char period, offset;
  879. if (trans_mode != ASYNC_MODE) {
  880. nsp32_set_max_sync(data, target, &period, &offset);
  881. nsp32_build_sdtr(SCpnt, period, offset);
  882. target->sync_flag |= SDTR_INITIATOR;
  883. } else {
  884. nsp32_set_async(data, target);
  885. target->sync_flag |= SDTR_DONE;
  886. }
  887. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  888. "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
  889. target->limit_entry, period, offset);
  890. } else if (target->sync_flag & SDTR_INITIATOR) {
  891. /*
  892. * It was negotiating SDTR with target, sending from the
  893. * initiator, but there are no chance to remove this flag.
  894. * Set async because we don't get proper negotiation.
  895. */
  896. nsp32_set_async(data, target);
  897. target->sync_flag &= ~SDTR_INITIATOR;
  898. target->sync_flag |= SDTR_DONE;
  899. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  900. "SDTR_INITIATOR: fall back to async");
  901. } else if (target->sync_flag & SDTR_TARGET) {
  902. /*
  903. * It was negotiating SDTR with target, sending from target,
  904. * but there are no chance to remove this flag. Set async
  905. * because we don't get proper negotiation.
  906. */
  907. nsp32_set_async(data, target);
  908. target->sync_flag &= ~SDTR_TARGET;
  909. target->sync_flag |= SDTR_DONE;
  910. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  911. "Unknown SDTR from target is reached, fall back to async.");
  912. }
  913. nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
  914. "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
  915. SCpnt->device->id, target->sync_flag, target->syncreg,
  916. target->ackwidth);
  917. /* Selection */
  918. if (auto_param == 0) {
  919. ret = nsp32_selection_autopara(SCpnt);
  920. } else {
  921. ret = nsp32_selection_autoscsi(SCpnt);
  922. }
  923. if (ret != TRUE) {
  924. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
  925. nsp32_scsi_done(SCpnt);
  926. }
  927. return 0;
  928. }
  929. /* initialize asic */
  930. static int nsp32hw_init(nsp32_hw_data *data)
  931. {
  932. unsigned int base = data->BaseAddress;
  933. unsigned short irq_stat;
  934. unsigned long lc_reg;
  935. unsigned char power;
  936. lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
  937. if ((lc_reg & 0xff00) == 0) {
  938. lc_reg |= (0x20 << 8);
  939. nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
  940. }
  941. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  942. nsp32_write2(base, TRANSFER_CONTROL, 0);
  943. nsp32_write4(base, BM_CNT, 0);
  944. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  945. do {
  946. irq_stat = nsp32_read2(base, IRQ_STATUS);
  947. nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
  948. } while (irq_stat & IRQSTATUS_ANY_IRQ);
  949. /*
  950. * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
  951. * designated by specification.
  952. */
  953. if ((data->trans_method & NSP32_TRANSFER_PIO) ||
  954. (data->trans_method & NSP32_TRANSFER_MMIO)) {
  955. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
  956. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
  957. } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  958. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
  959. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
  960. } else {
  961. nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
  962. }
  963. nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
  964. nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
  965. nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
  966. nsp32_index_write1(base, CLOCK_DIV, data->clock);
  967. nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
  968. nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
  969. /*
  970. * initialize MISC_WRRD register
  971. *
  972. * Note: Designated parameters is obeyed as following:
  973. * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
  974. * MISC_MASTER_TERMINATION_SELECT: It must be set.
  975. * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
  976. * MISC_AUTOSEL_TIMING_SEL: It should be set.
  977. * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
  978. * MISC_DELAYED_BMSTART: It's selected for safety.
  979. *
  980. * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
  981. * we have to set TRANSFERCONTROL_BM_START as 0 and set
  982. * appropriate value before restarting bus master transfer.
  983. */
  984. nsp32_index_write2(base, MISC_WR,
  985. (SCSI_DIRECTION_DETECTOR_SELECT |
  986. DELAYED_BMSTART |
  987. MASTER_TERMINATION_SELECT |
  988. BMREQ_NEGATE_TIMING_SEL |
  989. AUTOSEL_TIMING_SEL |
  990. BMSTOP_CHANGE2_NONDATA_PHASE));
  991. nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
  992. power = nsp32_index_read1(base, TERM_PWR_CONTROL);
  993. if (!(power & SENSE)) {
  994. nsp32_msg(KERN_INFO, "term power on");
  995. nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
  996. }
  997. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  998. nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
  999. nsp32_write1(base, SYNC_REG, 0);
  1000. nsp32_write1(base, ACK_WIDTH, 0);
  1001. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  1002. /*
  1003. * enable to select designated IRQ (except for
  1004. * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
  1005. */
  1006. nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
  1007. IRQSELECT_SCSIRESET_IRQ |
  1008. IRQSELECT_FIFO_SHLD_IRQ |
  1009. IRQSELECT_RESELECT_IRQ |
  1010. IRQSELECT_PHASE_CHANGE_IRQ |
  1011. IRQSELECT_AUTO_SCSI_SEQ_IRQ |
  1012. // IRQSELECT_BMCNTERR_IRQ |
  1013. IRQSELECT_TARGET_ABORT_IRQ |
  1014. IRQSELECT_MASTER_ABORT_IRQ );
  1015. nsp32_write2(base, IRQ_CONTROL, 0);
  1016. /* PCI LED off */
  1017. nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
  1018. nsp32_index_write1(base, EXT_PORT, LED_OFF);
  1019. return TRUE;
  1020. }
  1021. /* interrupt routine */
  1022. static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
  1023. {
  1024. nsp32_hw_data *data = dev_id;
  1025. unsigned int base = data->BaseAddress;
  1026. struct scsi_cmnd *SCpnt = data->CurrentSC;
  1027. unsigned short auto_stat, irq_stat, trans_stat;
  1028. unsigned char busmon, busphase;
  1029. unsigned long flags;
  1030. int ret;
  1031. int handled = 0;
  1032. struct Scsi_Host *host = data->Host;
  1033. spin_lock_irqsave(host->host_lock, flags);
  1034. /*
  1035. * IRQ check, then enable IRQ mask
  1036. */
  1037. irq_stat = nsp32_read2(base, IRQ_STATUS);
  1038. nsp32_dbg(NSP32_DEBUG_INTR,
  1039. "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
  1040. /* is this interrupt comes from Ninja asic? */
  1041. if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
  1042. nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
  1043. goto out2;
  1044. }
  1045. handled = 1;
  1046. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  1047. busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
  1048. busphase = busmon & BUSMON_PHASE_MASK;
  1049. trans_stat = nsp32_read2(base, TRANSFER_STATUS);
  1050. if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
  1051. nsp32_msg(KERN_INFO, "card disconnect");
  1052. if (data->CurrentSC != NULL) {
  1053. nsp32_msg(KERN_INFO, "clean up current SCSI command");
  1054. SCpnt->result = DID_BAD_TARGET << 16;
  1055. nsp32_scsi_done(SCpnt);
  1056. }
  1057. goto out;
  1058. }
  1059. /* Timer IRQ */
  1060. if (irq_stat & IRQSTATUS_TIMER_IRQ) {
  1061. nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
  1062. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  1063. goto out;
  1064. }
  1065. /* SCSI reset */
  1066. if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
  1067. nsp32_msg(KERN_INFO, "detected someone do bus reset");
  1068. nsp32_do_bus_reset(data);
  1069. if (SCpnt != NULL) {
  1070. SCpnt->result = DID_RESET << 16;
  1071. nsp32_scsi_done(SCpnt);
  1072. }
  1073. goto out;
  1074. }
  1075. if (SCpnt == NULL) {
  1076. nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
  1077. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1078. goto out;
  1079. }
  1080. /*
  1081. * AutoSCSI Interrupt.
  1082. * Note: This interrupt is occurred when AutoSCSI is finished. Then
  1083. * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
  1084. * recorded when AutoSCSI sequencer has been processed.
  1085. */
  1086. if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
  1087. /* getting SCSI executed phase */
  1088. auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  1089. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  1090. /* Selection Timeout, go busfree phase. */
  1091. if (auto_stat & SELECTION_TIMEOUT) {
  1092. nsp32_dbg(NSP32_DEBUG_INTR,
  1093. "selection timeout occurred");
  1094. SCpnt->result = DID_TIME_OUT << 16;
  1095. nsp32_scsi_done(SCpnt);
  1096. goto out;
  1097. }
  1098. if (auto_stat & MSGOUT_PHASE) {
  1099. /*
  1100. * MsgOut phase was processed.
  1101. * If MSG_IN_OCCUER is not set, then MsgOut phase is
  1102. * completed. Thus, msgout_len must reset. Otherwise,
  1103. * nothing to do here. If MSG_OUT_OCCUER is occurred,
  1104. * then we will encounter the condition and check.
  1105. */
  1106. if (!(auto_stat & MSG_IN_OCCUER) &&
  1107. (data->msgout_len <= 3)) {
  1108. /*
  1109. * !MSG_IN_OCCUER && msgout_len <=3
  1110. * ---> AutoSCSI with MSGOUTreg is processed.
  1111. */
  1112. data->msgout_len = 0;
  1113. };
  1114. nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
  1115. }
  1116. if ((auto_stat & DATA_IN_PHASE) &&
  1117. (SCpnt->resid > 0) &&
  1118. ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
  1119. printk( "auto+fifo\n");
  1120. //nsp32_pio_read(SCpnt);
  1121. }
  1122. if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
  1123. /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
  1124. nsp32_dbg(NSP32_DEBUG_INTR,
  1125. "Data in/out phase processed");
  1126. /* read BMCNT, SGT pointer addr */
  1127. nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
  1128. nsp32_read4(base, BM_CNT));
  1129. nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
  1130. nsp32_read4(base, SGT_ADR));
  1131. nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
  1132. nsp32_read4(base, SACK_CNT));
  1133. nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
  1134. nsp32_read4(base, SAVED_SACK_CNT));
  1135. SCpnt->resid = 0; /* all data transfered! */
  1136. }
  1137. /*
  1138. * MsgIn Occur
  1139. */
  1140. if (auto_stat & MSG_IN_OCCUER) {
  1141. nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
  1142. }
  1143. /*
  1144. * MsgOut Occur
  1145. */
  1146. if (auto_stat & MSG_OUT_OCCUER) {
  1147. nsp32_msgout_occur(SCpnt);
  1148. }
  1149. /*
  1150. * Bus Free Occur
  1151. */
  1152. if (auto_stat & BUS_FREE_OCCUER) {
  1153. ret = nsp32_busfree_occur(SCpnt, auto_stat);
  1154. if (ret == TRUE) {
  1155. goto out;
  1156. }
  1157. }
  1158. if (auto_stat & STATUS_PHASE) {
  1159. /*
  1160. * Read CSB and substitute CSB for SCpnt->result
  1161. * to save status phase stutas byte.
  1162. * scsi error handler checks host_byte (DID_*:
  1163. * low level driver to indicate status), then checks
  1164. * status_byte (SCSI status byte).
  1165. */
  1166. SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
  1167. }
  1168. if (auto_stat & ILLEGAL_PHASE) {
  1169. /* Illegal phase is detected. SACK is not back. */
  1170. nsp32_msg(KERN_WARNING,
  1171. "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
  1172. /* TODO: currently we don't have any action... bus reset? */
  1173. /*
  1174. * To send back SACK, assert, wait, and negate.
  1175. */
  1176. nsp32_sack_assert(data);
  1177. nsp32_wait_req(data, NEGATE);
  1178. nsp32_sack_negate(data);
  1179. }
  1180. if (auto_stat & COMMAND_PHASE) {
  1181. /* nothing to do */
  1182. nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
  1183. }
  1184. if (auto_stat & AUTOSCSI_BUSY) {
  1185. /* AutoSCSI is running */
  1186. }
  1187. show_autophase(auto_stat);
  1188. }
  1189. /* FIFO_SHLD_IRQ */
  1190. if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
  1191. nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
  1192. switch(busphase) {
  1193. case BUSPHASE_DATA_OUT:
  1194. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
  1195. //nsp32_pio_write(SCpnt);
  1196. break;
  1197. case BUSPHASE_DATA_IN:
  1198. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
  1199. //nsp32_pio_read(SCpnt);
  1200. break;
  1201. case BUSPHASE_STATUS:
  1202. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
  1203. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1204. break;
  1205. default:
  1206. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
  1207. nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1208. show_busphase(busphase);
  1209. break;
  1210. }
  1211. goto out;
  1212. }
  1213. /* Phase Change IRQ */
  1214. if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
  1215. nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
  1216. switch(busphase) {
  1217. case BUSPHASE_MESSAGE_IN:
  1218. nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
  1219. nsp32_msgin_occur(SCpnt, irq_stat, 0);
  1220. break;
  1221. default:
  1222. nsp32_msg(KERN_WARNING, "phase chg/other phase?");
  1223. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
  1224. irq_stat, trans_stat);
  1225. show_busphase(busphase);
  1226. break;
  1227. }
  1228. goto out;
  1229. }
  1230. /* PCI_IRQ */
  1231. if (irq_stat & IRQSTATUS_PCI_IRQ) {
  1232. nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
  1233. /* Do nothing */
  1234. }
  1235. /* BMCNTERR_IRQ */
  1236. if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
  1237. nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
  1238. /*
  1239. * TODO: To be implemented improving bus master
  1240. * transfer reliablity when BMCNTERR is occurred in
  1241. * AutoSCSI phase described in specification.
  1242. */
  1243. }
  1244. #if 0
  1245. nsp32_dbg(NSP32_DEBUG_INTR,
  1246. "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1247. show_busphase(busphase);
  1248. #endif
  1249. out:
  1250. /* disable IRQ mask */
  1251. nsp32_write2(base, IRQ_CONTROL, 0);
  1252. out2:
  1253. spin_unlock_irqrestore(host->host_lock, flags);
  1254. nsp32_dbg(NSP32_DEBUG_INTR, "exit");
  1255. return IRQ_RETVAL(handled);
  1256. }
  1257. #undef SPRINTF
  1258. #define SPRINTF(args...) \
  1259. do { \
  1260. if(length > (pos - buffer)) { \
  1261. pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \
  1262. nsp32_dbg(NSP32_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\
  1263. } \
  1264. } while(0)
  1265. static int nsp32_proc_info(struct Scsi_Host *host, char *buffer, char **start,
  1266. off_t offset, int length, int inout)
  1267. {
  1268. char *pos = buffer;
  1269. int thislength;
  1270. unsigned long flags;
  1271. nsp32_hw_data *data;
  1272. int hostno;
  1273. unsigned int base;
  1274. unsigned char mode_reg;
  1275. int id, speed;
  1276. long model;
  1277. /* Write is not supported, just return. */
  1278. if (inout == TRUE) {
  1279. return -EINVAL;
  1280. }
  1281. hostno = host->host_no;
  1282. data = (nsp32_hw_data *)host->hostdata;
  1283. base = host->io_port;
  1284. SPRINTF("NinjaSCSI-32 status\n\n");
  1285. SPRINTF("Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
  1286. SPRINTF("SCSI host No.: %d\n", hostno);
  1287. SPRINTF("IRQ: %d\n", host->irq);
  1288. SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
  1289. SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
  1290. SPRINTF("sg_tablesize: %d\n", host->sg_tablesize);
  1291. SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
  1292. mode_reg = nsp32_index_read1(base, CHIP_MODE);
  1293. model = data->pci_devid->driver_data;
  1294. #ifdef CONFIG_PM
  1295. SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
  1296. #endif
  1297. SPRINTF("OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
  1298. spin_lock_irqsave(&(data->Lock), flags);
  1299. SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC);
  1300. spin_unlock_irqrestore(&(data->Lock), flags);
  1301. SPRINTF("SDTR status\n");
  1302. for (id = 0; id < ARRAY_SIZE(data->target); id++) {
  1303. SPRINTF("id %d: ", id);
  1304. if (id == host->this_id) {
  1305. SPRINTF("----- NinjaSCSI-32 host adapter\n");
  1306. continue;
  1307. }
  1308. if (data->target[id].sync_flag == SDTR_DONE) {
  1309. if (data->target[id].period == 0 &&
  1310. data->target[id].offset == ASYNC_OFFSET ) {
  1311. SPRINTF("async");
  1312. } else {
  1313. SPRINTF(" sync");
  1314. }
  1315. } else {
  1316. SPRINTF(" none");
  1317. }
  1318. if (data->target[id].period != 0) {
  1319. speed = 1000000 / (data->target[id].period * 4);
  1320. SPRINTF(" transfer %d.%dMB/s, offset %d",
  1321. speed / 1000,
  1322. speed % 1000,
  1323. data->target[id].offset
  1324. );
  1325. }
  1326. SPRINTF("\n");
  1327. }
  1328. thislength = pos - (buffer + offset);
  1329. if(thislength < 0) {
  1330. *start = NULL;
  1331. return 0;
  1332. }
  1333. thislength = min(thislength, length);
  1334. *start = buffer + offset;
  1335. return thislength;
  1336. }
  1337. #undef SPRINTF
  1338. /*
  1339. * Reset parameters and call scsi_done for data->cur_lunt.
  1340. * Be careful setting SCpnt->result = DID_* before calling this function.
  1341. */
  1342. static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
  1343. {
  1344. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1345. unsigned int base = SCpnt->device->host->io_port;
  1346. /*
  1347. * unmap pci
  1348. */
  1349. if (SCpnt->request_bufflen == 0) {
  1350. goto skip;
  1351. }
  1352. if (SCpnt->use_sg) {
  1353. pci_unmap_sg(data->Pci,
  1354. (struct scatterlist *)SCpnt->request_buffer,
  1355. SCpnt->use_sg, SCpnt->sc_data_direction);
  1356. } else {
  1357. pci_unmap_single(data->Pci,
  1358. (u32)SCpnt->SCp.have_data_in,
  1359. SCpnt->request_bufflen,
  1360. SCpnt->sc_data_direction);
  1361. }
  1362. skip:
  1363. /*
  1364. * clear TRANSFERCONTROL_BM_START
  1365. */
  1366. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1367. nsp32_write4(base, BM_CNT, 0);
  1368. /*
  1369. * call scsi_done
  1370. */
  1371. (*SCpnt->scsi_done)(SCpnt);
  1372. /*
  1373. * reset parameters
  1374. */
  1375. data->cur_lunt->SCpnt = NULL;
  1376. data->cur_lunt = NULL;
  1377. data->cur_target = NULL;
  1378. data->CurrentSC = NULL;
  1379. }
  1380. /*
  1381. * Bus Free Occur
  1382. *
  1383. * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
  1384. * with ACK reply when below condition is matched:
  1385. * MsgIn 00: Command Complete.
  1386. * MsgIn 02: Save Data Pointer.
  1387. * MsgIn 04: Diconnect.
  1388. * In other case, unexpected BUSFREE is detected.
  1389. */
  1390. static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
  1391. {
  1392. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1393. unsigned int base = SCpnt->device->host->io_port;
  1394. nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
  1395. show_autophase(execph);
  1396. nsp32_write4(base, BM_CNT, 0);
  1397. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1398. /*
  1399. * MsgIn 02: Save Data Pointer
  1400. *
  1401. * VALID:
  1402. * Save Data Pointer is received. Adjust pointer.
  1403. *
  1404. * NO-VALID:
  1405. * SCSI-3 says if Save Data Pointer is not received, then we restart
  1406. * processing and we can't adjust any SCSI data pointer in next data
  1407. * phase.
  1408. */
  1409. if (execph & MSGIN_02_VALID) {
  1410. nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
  1411. /*
  1412. * Check sack_cnt/saved_sack_cnt, then adjust sg table if
  1413. * needed.
  1414. */
  1415. if (!(execph & MSGIN_00_VALID) &&
  1416. ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
  1417. unsigned int sacklen, s_sacklen;
  1418. /*
  1419. * Read SACK count and SAVEDSACK count, then compare.
  1420. */
  1421. sacklen = nsp32_read4(base, SACK_CNT );
  1422. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1423. /*
  1424. * If SAVEDSACKCNT == 0, it means SavedDataPointer is
  1425. * come after data transfering.
  1426. */
  1427. if (s_sacklen > 0) {
  1428. /*
  1429. * Comparing between sack and savedsack to
  1430. * check the condition of AutoMsgIn03.
  1431. *
  1432. * If they are same, set msgin03 == TRUE,
  1433. * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
  1434. * reselection. On the other hand, if they
  1435. * aren't same, set msgin03 == FALSE, and
  1436. * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
  1437. * reselection.
  1438. */
  1439. if (sacklen != s_sacklen) {
  1440. data->cur_lunt->msgin03 = FALSE;
  1441. } else {
  1442. data->cur_lunt->msgin03 = TRUE;
  1443. }
  1444. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1445. }
  1446. }
  1447. /* This value has not substitude with valid value yet... */
  1448. //data->cur_lunt->save_datp = data->cur_datp;
  1449. } else {
  1450. /*
  1451. * no processing.
  1452. */
  1453. }
  1454. if (execph & MSGIN_03_VALID) {
  1455. /* MsgIn03 was valid to be processed. No need processing. */
  1456. }
  1457. /*
  1458. * target SDTR check
  1459. */
  1460. if (data->cur_target->sync_flag & SDTR_INITIATOR) {
  1461. /*
  1462. * SDTR negotiation pulled by the initiator has not
  1463. * finished yet. Fall back to ASYNC mode.
  1464. */
  1465. nsp32_set_async(data, data->cur_target);
  1466. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1467. data->cur_target->sync_flag |= SDTR_DONE;
  1468. } else if (data->cur_target->sync_flag & SDTR_TARGET) {
  1469. /*
  1470. * SDTR negotiation pulled by the target has been
  1471. * negotiating.
  1472. */
  1473. if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
  1474. /*
  1475. * If valid message is received, then
  1476. * negotiation is succeeded.
  1477. */
  1478. } else {
  1479. /*
  1480. * On the contrary, if unexpected bus free is
  1481. * occurred, then negotiation is failed. Fall
  1482. * back to ASYNC mode.
  1483. */
  1484. nsp32_set_async(data, data->cur_target);
  1485. }
  1486. data->cur_target->sync_flag &= ~SDTR_TARGET;
  1487. data->cur_target->sync_flag |= SDTR_DONE;
  1488. }
  1489. /*
  1490. * It is always ensured by SCSI standard that initiator
  1491. * switches into Bus Free Phase after
  1492. * receiving message 00 (Command Complete), 04 (Disconnect).
  1493. * It's the reason that processing here is valid.
  1494. */
  1495. if (execph & MSGIN_00_VALID) {
  1496. /* MsgIn 00: Command Complete */
  1497. nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
  1498. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1499. SCpnt->SCp.Message = 0;
  1500. nsp32_dbg(NSP32_DEBUG_BUSFREE,
  1501. "normal end stat=0x%x resid=0x%x\n",
  1502. SCpnt->SCp.Status, SCpnt->resid);
  1503. SCpnt->result = (DID_OK << 16) |
  1504. (SCpnt->SCp.Message << 8) |
  1505. (SCpnt->SCp.Status << 0);
  1506. nsp32_scsi_done(SCpnt);
  1507. /* All operation is done */
  1508. return TRUE;
  1509. } else if (execph & MSGIN_04_VALID) {
  1510. /* MsgIn 04: Disconnect */
  1511. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1512. SCpnt->SCp.Message = 4;
  1513. nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
  1514. return TRUE;
  1515. } else {
  1516. /* Unexpected bus free */
  1517. nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
  1518. /* DID_ERROR? */
  1519. //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0);
  1520. SCpnt->result = DID_ERROR << 16;
  1521. nsp32_scsi_done(SCpnt);
  1522. return TRUE;
  1523. }
  1524. return FALSE;
  1525. }
  1526. /*
  1527. * nsp32_adjust_busfree - adjusting SG table
  1528. *
  1529. * Note: This driver adjust the SG table using SCSI ACK
  1530. * counter instead of BMCNT counter!
  1531. */
  1532. static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
  1533. {
  1534. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1535. int old_entry = data->cur_entry;
  1536. int new_entry;
  1537. int sg_num = data->cur_lunt->sg_num;
  1538. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  1539. unsigned int restlen, sentlen;
  1540. u32_le len, addr;
  1541. nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", SCpnt->resid);
  1542. /* adjust saved SACK count with 4 byte start address boundary */
  1543. s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
  1544. /*
  1545. * calculate new_entry from sack count and each sgt[].len
  1546. * calculate the byte which is intent to send
  1547. */
  1548. sentlen = 0;
  1549. for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
  1550. sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
  1551. if (sentlen > s_sacklen) {
  1552. break;
  1553. }
  1554. }
  1555. /* all sgt is processed */
  1556. if (new_entry == sg_num) {
  1557. goto last;
  1558. }
  1559. if (sentlen == s_sacklen) {
  1560. /* XXX: confirm it's ok or not */
  1561. /* In this case, it's ok because we are at
  1562. the head element of the sg. restlen is correctly calculated. */
  1563. }
  1564. /* calculate the rest length for transfering */
  1565. restlen = sentlen - s_sacklen;
  1566. /* update adjusting current SG table entry */
  1567. len = le32_to_cpu(sgt[new_entry].len);
  1568. addr = le32_to_cpu(sgt[new_entry].addr);
  1569. addr += (len - restlen);
  1570. sgt[new_entry].addr = cpu_to_le32(addr);
  1571. sgt[new_entry].len = cpu_to_le32(restlen);
  1572. /* set cur_entry with new_entry */
  1573. data->cur_entry = new_entry;
  1574. return;
  1575. last:
  1576. if (SCpnt->resid < sentlen) {
  1577. nsp32_msg(KERN_ERR, "resid underflow");
  1578. }
  1579. SCpnt->resid -= sentlen;
  1580. nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", SCpnt->resid);
  1581. /* update hostdata and lun */
  1582. return;
  1583. }
  1584. /*
  1585. * It's called MsgOut phase occur.
  1586. * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
  1587. * message out phase. It, however, has more than 3 messages,
  1588. * HBA creates the interrupt and we have to process by hand.
  1589. */
  1590. static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
  1591. {
  1592. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1593. unsigned int base = SCpnt->device->host->io_port;
  1594. //unsigned short command;
  1595. long new_sgtp;
  1596. int i;
  1597. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1598. "enter: msgout_len: 0x%x", data->msgout_len);
  1599. /*
  1600. * If MsgOut phase is occurred without having any
  1601. * message, then No_Operation is sent (SCSI-2).
  1602. */
  1603. if (data->msgout_len == 0) {
  1604. nsp32_build_nop(SCpnt);
  1605. }
  1606. /*
  1607. * Set SGTP ADDR current entry for restarting AUTOSCSI,
  1608. * because SGTP is incremented next point.
  1609. * There is few statement in the specification...
  1610. */
  1611. new_sgtp = data->cur_lunt->sglun_paddr +
  1612. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1613. /*
  1614. * send messages
  1615. */
  1616. for (i = 0; i < data->msgout_len; i++) {
  1617. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1618. "%d : 0x%x", i, data->msgoutbuf[i]);
  1619. /*
  1620. * Check REQ is asserted.
  1621. */
  1622. nsp32_wait_req(data, ASSERT);
  1623. if (i == (data->msgout_len - 1)) {
  1624. /*
  1625. * If the last message, set the AutoSCSI restart
  1626. * before send back the ack message. AutoSCSI
  1627. * restart automatically negate ATN signal.
  1628. */
  1629. //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1630. //nsp32_restart_autoscsi(SCpnt, command);
  1631. nsp32_write2(base, COMMAND_CONTROL,
  1632. (CLEAR_CDB_FIFO_POINTER |
  1633. AUTO_COMMAND_PHASE |
  1634. AUTOSCSI_RESTART |
  1635. AUTO_MSGIN_00_OR_04 |
  1636. AUTO_MSGIN_02 ));
  1637. }
  1638. /*
  1639. * Write data with SACK, then wait sack is
  1640. * automatically negated.
  1641. */
  1642. nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
  1643. nsp32_wait_sack(data, NEGATE);
  1644. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
  1645. nsp32_read1(base, SCSI_BUS_MONITOR));
  1646. };
  1647. data->msgout_len = 0;
  1648. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
  1649. }
  1650. /*
  1651. * Restart AutoSCSI
  1652. *
  1653. * Note: Restarting AutoSCSI needs set:
  1654. * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
  1655. */
  1656. static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
  1657. {
  1658. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1659. unsigned int base = data->BaseAddress;
  1660. unsigned short transfer = 0;
  1661. nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
  1662. if (data->cur_target == NULL || data->cur_lunt == NULL) {
  1663. nsp32_msg(KERN_ERR, "Target or Lun is invalid");
  1664. }
  1665. /*
  1666. * set SYNC_REG
  1667. * Don't set BM_START_ADR before setting this register.
  1668. */
  1669. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  1670. /*
  1671. * set ACKWIDTH
  1672. */
  1673. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  1674. /*
  1675. * set SREQ hazard killer sampling rate
  1676. */
  1677. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  1678. /*
  1679. * set SGT ADDR (physical address)
  1680. */
  1681. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  1682. /*
  1683. * set TRANSFER CONTROL REG
  1684. */
  1685. transfer = 0;
  1686. transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
  1687. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  1688. if (SCpnt->request_bufflen > 0) {
  1689. transfer |= BM_START;
  1690. }
  1691. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  1692. transfer |= CB_MMIO_MODE;
  1693. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  1694. transfer |= CB_IO_MODE;
  1695. }
  1696. nsp32_write2(base, TRANSFER_CONTROL, transfer);
  1697. /*
  1698. * restart AutoSCSI
  1699. *
  1700. * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
  1701. */
  1702. command |= (CLEAR_CDB_FIFO_POINTER |
  1703. AUTO_COMMAND_PHASE |
  1704. AUTOSCSI_RESTART );
  1705. nsp32_write2(base, COMMAND_CONTROL, command);
  1706. nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
  1707. }
  1708. /*
  1709. * cannot run automatically message in occur
  1710. */
  1711. static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
  1712. unsigned long irq_status,
  1713. unsigned short execph)
  1714. {
  1715. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1716. unsigned int base = SCpnt->device->host->io_port;
  1717. unsigned char msg;
  1718. unsigned char msgtype;
  1719. unsigned char newlun;
  1720. unsigned short command = 0;
  1721. int msgclear = TRUE;
  1722. long new_sgtp;
  1723. int ret;
  1724. /*
  1725. * read first message
  1726. * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
  1727. * of Message-In have to be processed before sending back SCSI ACK.
  1728. */
  1729. msg = nsp32_read1(base, SCSI_DATA_IN);
  1730. data->msginbuf[(unsigned char)data->msgin_len] = msg;
  1731. msgtype = data->msginbuf[0];
  1732. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
  1733. "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
  1734. data->msgin_len, msg, msgtype);
  1735. /*
  1736. * TODO: We need checking whether bus phase is message in?
  1737. */
  1738. /*
  1739. * assert SCSI ACK
  1740. */
  1741. nsp32_sack_assert(data);
  1742. /*
  1743. * processing IDENTIFY
  1744. */
  1745. if (msgtype & 0x80) {
  1746. if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
  1747. /* Invalid (non reselect) phase */
  1748. goto reject;
  1749. }
  1750. newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
  1751. ret = nsp32_reselection(SCpnt, newlun);
  1752. if (ret == TRUE) {
  1753. goto restart;
  1754. } else {
  1755. goto reject;
  1756. }
  1757. }
  1758. /*
  1759. * processing messages except for IDENTIFY
  1760. *
  1761. * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
  1762. */
  1763. switch (msgtype) {
  1764. /*
  1765. * 1-byte message
  1766. */
  1767. case COMMAND_COMPLETE:
  1768. case DISCONNECT:
  1769. /*
  1770. * These messages should not be occurred.
  1771. * They should be processed on AutoSCSI sequencer.
  1772. */
  1773. nsp32_msg(KERN_WARNING,
  1774. "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
  1775. break;
  1776. case RESTORE_POINTERS:
  1777. /*
  1778. * AutoMsgIn03 is disabled, and HBA gets this message.
  1779. */
  1780. if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
  1781. unsigned int s_sacklen;
  1782. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1783. if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
  1784. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1785. } else {
  1786. /* No need to rewrite SGT */
  1787. }
  1788. }
  1789. data->cur_lunt->msgin03 = FALSE;
  1790. /* Update with the new value */
  1791. /* reset SACK/SavedACK counter (or ALL clear?) */
  1792. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  1793. /*
  1794. * set new sg pointer
  1795. */
  1796. new_sgtp = data->cur_lunt->sglun_paddr +
  1797. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1798. nsp32_write4(base, SGT_ADR, new_sgtp);
  1799. break;
  1800. case SAVE_POINTERS:
  1801. /*
  1802. * These messages should not be occurred.
  1803. * They should be processed on AutoSCSI sequencer.
  1804. */
  1805. nsp32_msg (KERN_WARNING,
  1806. "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
  1807. break;
  1808. case MESSAGE_REJECT:
  1809. /* If previous message_out is sending SDTR, and get
  1810. message_reject from target, SDTR negotiation is failed */
  1811. if (data->cur_target->sync_flag &
  1812. (SDTR_INITIATOR | SDTR_TARGET)) {
  1813. /*
  1814. * Current target is negotiating SDTR, but it's
  1815. * failed. Fall back to async transfer mode, and set
  1816. * SDTR_DONE.
  1817. */
  1818. nsp32_set_async(data, data->cur_target);
  1819. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1820. data->cur_target->sync_flag |= SDTR_DONE;
  1821. }
  1822. break;
  1823. case LINKED_CMD_COMPLETE:
  1824. case LINKED_FLG_CMD_COMPLETE:
  1825. /* queue tag is not supported currently */
  1826. nsp32_msg (KERN_WARNING,
  1827. "unsupported message: 0x%x", msgtype);
  1828. break;
  1829. case INITIATE_RECOVERY:
  1830. /* staring ECA (Extended Contingent Allegiance) state. */
  1831. /* This message is declined in SPI2 or later. */
  1832. goto reject;
  1833. /*
  1834. * 2-byte message
  1835. */
  1836. case SIMPLE_QUEUE_TAG:
  1837. case 0x23:
  1838. /*
  1839. * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
  1840. * No support is needed.
  1841. */
  1842. if (data->msgin_len >= 1) {
  1843. goto reject;
  1844. }
  1845. /* current position is 1-byte of 2 byte */
  1846. msgclear = FALSE;
  1847. break;
  1848. /*
  1849. * extended message
  1850. */
  1851. case EXTENDED_MESSAGE:
  1852. if (data->msgin_len < 1) {
  1853. /*
  1854. * Current position does not reach 2-byte
  1855. * (2-byte is extended message length).
  1856. */
  1857. msgclear = FALSE;
  1858. break;
  1859. }
  1860. if ((data->msginbuf[1] + 1) > data->msgin_len) {
  1861. /*
  1862. * Current extended message has msginbuf[1] + 2
  1863. * (msgin_len starts counting from 0, so buf[1] + 1).
  1864. * If current message position is not finished,
  1865. * continue receiving message.
  1866. */
  1867. msgclear = FALSE;
  1868. break;
  1869. }
  1870. /*
  1871. * Reach here means regular length of each type of
  1872. * extended messages.
  1873. */
  1874. switch (data->msginbuf[2]) {
  1875. case EXTENDED_MODIFY_DATA_POINTER:
  1876. /* TODO */
  1877. goto reject; /* not implemented yet */
  1878. break;
  1879. case EXTENDED_SDTR:
  1880. /*
  1881. * Exchange this message between initiator and target.
  1882. */
  1883. if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
  1884. /*
  1885. * received inappropriate message.
  1886. */
  1887. goto reject;
  1888. break;
  1889. }
  1890. nsp32_analyze_sdtr(SCpnt);
  1891. break;
  1892. case EXTENDED_EXTENDED_IDENTIFY:
  1893. /* SCSI-I only, not supported. */
  1894. goto reject; /* not implemented yet */
  1895. break;
  1896. case EXTENDED_WDTR:
  1897. goto reject; /* not implemented yet */
  1898. break;
  1899. default:
  1900. goto reject;
  1901. }
  1902. break;
  1903. default:
  1904. goto reject;
  1905. }
  1906. restart:
  1907. if (msgclear == TRUE) {
  1908. data->msgin_len = 0;
  1909. /*
  1910. * If restarting AutoSCSI, but there are some message to out
  1911. * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
  1912. * (MV_VALID = 0). When commandcontrol is written with
  1913. * AutoSCSI restart, at the same time MsgOutOccur should be
  1914. * happened (however, such situation is really possible...?).
  1915. */
  1916. if (data->msgout_len > 0) {
  1917. nsp32_write4(base, SCSI_MSG_OUT, 0);
  1918. command |= AUTO_ATN;
  1919. }
  1920. /*
  1921. * restart AutoSCSI
  1922. * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
  1923. */
  1924. command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1925. /*
  1926. * If current msgin03 is TRUE, then flag on.
  1927. */
  1928. if (data->cur_lunt->msgin03 == TRUE) {
  1929. command |= AUTO_MSGIN_03;
  1930. }
  1931. data->cur_lunt->msgin03 = FALSE;
  1932. } else {
  1933. data->msgin_len++;
  1934. }
  1935. /*
  1936. * restart AutoSCSI
  1937. */
  1938. nsp32_restart_autoscsi(SCpnt, command);
  1939. /*
  1940. * wait SCSI REQ negate for REQ-ACK handshake
  1941. */
  1942. nsp32_wait_req(data, NEGATE);
  1943. /*
  1944. * negate SCSI ACK
  1945. */
  1946. nsp32_sack_negate(data);
  1947. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  1948. return;
  1949. reject:
  1950. nsp32_msg(KERN_WARNING,
  1951. "invalid or unsupported MessageIn, rejected. "
  1952. "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
  1953. msg, data->msgin_len, msgtype);
  1954. nsp32_build_reject(SCpnt);
  1955. data->msgin_len = 0;
  1956. goto restart;
  1957. }
  1958. /*
  1959. *
  1960. */
  1961. static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
  1962. {
  1963. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1964. nsp32_target *target = data->cur_target;
  1965. nsp32_sync_table *synct;
  1966. unsigned char get_period = data->msginbuf[3];
  1967. unsigned char get_offset = data->msginbuf[4];
  1968. int entry;
  1969. int syncnum;
  1970. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
  1971. synct = data->synct;
  1972. syncnum = data->syncnum;
  1973. /*
  1974. * If this inititor sent the SDTR message, then target responds SDTR,
  1975. * initiator SYNCREG, ACKWIDTH from SDTR parameter.
  1976. * Messages are not appropriate, then send back reject message.
  1977. * If initiator did not send the SDTR, but target sends SDTR,
  1978. * initiator calculator the appropriate parameter and send back SDTR.
  1979. */
  1980. if (target->sync_flag & SDTR_INITIATOR) {
  1981. /*
  1982. * Initiator sent SDTR, the target responds and
  1983. * send back negotiation SDTR.
  1984. */
  1985. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
  1986. target->sync_flag &= ~SDTR_INITIATOR;
  1987. target->sync_flag |= SDTR_DONE;
  1988. /*
  1989. * offset:
  1990. */
  1991. if (get_offset > SYNC_OFFSET) {
  1992. /*
  1993. * Negotiation is failed, the target send back
  1994. * unexpected offset value.
  1995. */
  1996. goto reject;
  1997. }
  1998. if (get_offset == ASYNC_OFFSET) {
  1999. /*
  2000. * Negotiation is succeeded, the target want
  2001. * to fall back into asynchronous transfer mode.
  2002. */
  2003. goto async;
  2004. }
  2005. /*
  2006. * period:
  2007. * Check whether sync period is too short. If too short,
  2008. * fall back to async mode. If it's ok, then investigate
  2009. * the received sync period. If sync period is acceptable
  2010. * between sync table start_period and end_period, then
  2011. * set this I_T nexus as sent offset and period.
  2012. * If it's not acceptable, send back reject and fall back
  2013. * to async mode.
  2014. */
  2015. if (get_period < data->synct[0].period_num) {
  2016. /*
  2017. * Negotiation is failed, the target send back
  2018. * unexpected period value.
  2019. */
  2020. goto reject;
  2021. }
  2022. entry = nsp32_search_period_entry(data, target, get_period);
  2023. if (entry < 0) {
  2024. /*
  2025. * Target want to use long period which is not
  2026. * acceptable NinjaSCSI-32Bi/UDE.
  2027. */
  2028. goto reject;
  2029. }
  2030. /*
  2031. * Set new sync table and offset in this I_T nexus.
  2032. */
  2033. nsp32_set_sync_entry(data, target, entry, get_offset);
  2034. } else {
  2035. /* Target send SDTR to initiator. */
  2036. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
  2037. target->sync_flag |= SDTR_INITIATOR;
  2038. /* offset: */
  2039. if (get_offset > SYNC_OFFSET) {
  2040. /* send back as SYNC_OFFSET */
  2041. get_offset = SYNC_OFFSET;
  2042. }
  2043. /* period: */
  2044. if (get_period < data->synct[0].period_num) {
  2045. get_period = data->synct[0].period_num;
  2046. }
  2047. entry = nsp32_search_period_entry(data, target, get_period);
  2048. if (get_offset == ASYNC_OFFSET || entry < 0) {
  2049. nsp32_set_async(data, target);
  2050. nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
  2051. } else {
  2052. nsp32_set_sync_entry(data, target, entry, get_offset);
  2053. nsp32_build_sdtr(SCpnt, get_period, get_offset);
  2054. }
  2055. }
  2056. target->period = get_period;
  2057. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  2058. return;
  2059. reject:
  2060. /*
  2061. * If the current message is unacceptable, send back to the target
  2062. * with reject message.
  2063. */
  2064. nsp32_build_reject(SCpnt);
  2065. async:
  2066. nsp32_set_async(data, target); /* set as ASYNC transfer mode */
  2067. target->period = 0;
  2068. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
  2069. return;
  2070. }
  2071. /*
  2072. * Search config entry number matched in sync_table from given
  2073. * target and speed period value. If failed to search, return negative value.
  2074. */
  2075. static int nsp32_search_period_entry(nsp32_hw_data *data,
  2076. nsp32_target *target,
  2077. unsigned char period)
  2078. {
  2079. int i;
  2080. if (target->limit_entry >= data->syncnum) {
  2081. nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
  2082. target->limit_entry = 0;
  2083. }
  2084. for (i = target->limit_entry; i < data->syncnum; i++) {
  2085. if (period >= data->synct[i].start_period &&
  2086. period <= data->synct[i].end_period) {
  2087. break;
  2088. }
  2089. }
  2090. /*
  2091. * Check given period value is over the sync_table value.
  2092. * If so, return max value.
  2093. */
  2094. if (i == data->syncnum) {
  2095. i = -1;
  2096. }
  2097. return i;
  2098. }
  2099. /*
  2100. * target <-> initiator use ASYNC transfer
  2101. */
  2102. static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
  2103. {
  2104. unsigned char period = data->synct[target->limit_entry].period_num;
  2105. target->offset = ASYNC_OFFSET;
  2106. target->period = 0;
  2107. target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
  2108. target->ackwidth = 0;
  2109. target->sample_reg = 0;
  2110. nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
  2111. }
  2112. /*
  2113. * target <-> initiator use maximum SYNC transfer
  2114. */
  2115. static void nsp32_set_max_sync(nsp32_hw_data *data,
  2116. nsp32_target *target,
  2117. unsigned char *period,
  2118. unsigned char *offset)
  2119. {
  2120. unsigned char period_num, ackwidth;
  2121. period_num = data->synct[target->limit_entry].period_num;
  2122. *period = data->synct[target->limit_entry].start_period;
  2123. ackwidth = data->synct[target->limit_entry].ackwidth;
  2124. *offset = SYNC_OFFSET;
  2125. target->syncreg = TO_SYNCREG(period_num, *offset);
  2126. target->ackwidth = ackwidth;
  2127. target->offset = *offset;
  2128. target->sample_reg = 0; /* disable SREQ sampling */
  2129. }
  2130. /*
  2131. * target <-> initiator use entry number speed
  2132. */
  2133. static void nsp32_set_sync_entry(nsp32_hw_data *data,
  2134. nsp32_target *target,
  2135. int entry,
  2136. unsigned char offset)
  2137. {
  2138. unsigned char period, ackwidth, sample_rate;
  2139. period = data->synct[entry].period_num;
  2140. ackwidth = data->synct[entry].ackwidth;
  2141. offset = offset;
  2142. sample_rate = data->synct[entry].sample_rate;
  2143. target->syncreg = TO_SYNCREG(period, offset);
  2144. target->ackwidth = ackwidth;
  2145. target->offset = offset;
  2146. target->sample_reg = sample_rate | SAMPLING_ENABLE;
  2147. nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
  2148. }
  2149. /*
  2150. * It waits until SCSI REQ becomes assertion or negation state.
  2151. *
  2152. * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
  2153. * connected target responds SCSI REQ negation. We have to wait
  2154. * SCSI REQ becomes negation in order to negate SCSI ACK signal for
  2155. * REQ-ACK handshake.
  2156. */
  2157. static void nsp32_wait_req(nsp32_hw_data *data, int state)
  2158. {
  2159. unsigned int base = data->BaseAddress;
  2160. int wait_time = 0;
  2161. unsigned char bus, req_bit;
  2162. if (!((state == ASSERT) || (state == NEGATE))) {
  2163. nsp32_msg(KERN_ERR, "unknown state designation");
  2164. }
  2165. /* REQ is BIT(5) */
  2166. req_bit = (state == ASSERT ? BUSMON_REQ : 0);
  2167. do {
  2168. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2169. if ((bus & BUSMON_REQ) == req_bit) {
  2170. nsp32_dbg(NSP32_DEBUG_WAIT,
  2171. "wait_time: %d", wait_time);
  2172. return;
  2173. }
  2174. udelay(1);
  2175. wait_time++;
  2176. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2177. nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
  2178. }
  2179. /*
  2180. * It waits until SCSI SACK becomes assertion or negation state.
  2181. */
  2182. static void nsp32_wait_sack(nsp32_hw_data *data, int state)
  2183. {
  2184. unsigned int base = data->BaseAddress;
  2185. int wait_time = 0;
  2186. unsigned char bus, ack_bit;
  2187. if (!((state == ASSERT) || (state == NEGATE))) {
  2188. nsp32_msg(KERN_ERR, "unknown state designation");
  2189. }
  2190. /* ACK is BIT(4) */
  2191. ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
  2192. do {
  2193. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2194. if ((bus & BUSMON_ACK) == ack_bit) {
  2195. nsp32_dbg(NSP32_DEBUG_WAIT,
  2196. "wait_time: %d", wait_time);
  2197. return;
  2198. }
  2199. udelay(1);
  2200. wait_time++;
  2201. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2202. nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
  2203. }
  2204. /*
  2205. * assert SCSI ACK
  2206. *
  2207. * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
  2208. */
  2209. static void nsp32_sack_assert(nsp32_hw_data *data)
  2210. {
  2211. unsigned int base = data->BaseAddress;
  2212. unsigned char busctrl;
  2213. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2214. busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
  2215. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2216. }
  2217. /*
  2218. * negate SCSI ACK
  2219. */
  2220. static void nsp32_sack_negate(nsp32_hw_data *data)
  2221. {
  2222. unsigned int base = data->BaseAddress;
  2223. unsigned char busctrl;
  2224. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2225. busctrl &= ~BUSCTL_ACK;
  2226. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2227. }
  2228. /*
  2229. * Note: n_io_port is defined as 0x7f because I/O register port is
  2230. * assigned as:
  2231. * 0x800-0x8ff: memory mapped I/O port
  2232. * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
  2233. * 0xc00-0xfff: CardBus status registers
  2234. */
  2235. static int nsp32_detect(struct pci_dev *pdev)
  2236. {
  2237. struct Scsi_Host *host; /* registered host structure */
  2238. struct resource *res;
  2239. nsp32_hw_data *data;
  2240. int ret;
  2241. int i, j;
  2242. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2243. /*
  2244. * register this HBA as SCSI device
  2245. */
  2246. host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
  2247. if (host == NULL) {
  2248. nsp32_msg (KERN_ERR, "failed to scsi register");
  2249. goto err;
  2250. }
  2251. /*
  2252. * set nsp32_hw_data
  2253. */
  2254. data = (nsp32_hw_data *)host->hostdata;
  2255. memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
  2256. host->irq = data->IrqNumber;
  2257. host->io_port = data->BaseAddress;
  2258. host->unique_id = data->BaseAddress;
  2259. host->n_io_port = data->NumAddress;
  2260. host->base = (unsigned long)data->MmioAddress;
  2261. data->Host = host;
  2262. spin_lock_init(&(data->Lock));
  2263. data->cur_lunt = NULL;
  2264. data->cur_target = NULL;
  2265. /*
  2266. * Bus master transfer mode is supported currently.
  2267. */
  2268. data->trans_method = NSP32_TRANSFER_BUSMASTER;
  2269. /*
  2270. * Set clock div, CLOCK_4 (HBA has own external clock, and
  2271. * dividing * 100ns/4).
  2272. * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
  2273. */
  2274. data->clock = CLOCK_4;
  2275. /*
  2276. * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
  2277. */
  2278. switch (data->clock) {
  2279. case CLOCK_4:
  2280. /* If data->clock is CLOCK_4, then select 40M sync table. */
  2281. data->synct = nsp32_sync_table_40M;
  2282. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2283. break;
  2284. case CLOCK_2:
  2285. /* If data->clock is CLOCK_2, then select 20M sync table. */
  2286. data->synct = nsp32_sync_table_20M;
  2287. data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
  2288. break;
  2289. case PCICLK:
  2290. /* If data->clock is PCICLK, then select pci sync table. */
  2291. data->synct = nsp32_sync_table_pci;
  2292. data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
  2293. break;
  2294. default:
  2295. nsp32_msg(KERN_WARNING,
  2296. "Invalid clock div is selected, set CLOCK_4.");
  2297. /* Use default value CLOCK_4 */
  2298. data->clock = CLOCK_4;
  2299. data->synct = nsp32_sync_table_40M;
  2300. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2301. }
  2302. /*
  2303. * setup nsp32_lunt
  2304. */
  2305. /*
  2306. * setup DMA
  2307. */
  2308. if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) != 0) {
  2309. nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
  2310. goto scsi_unregister;
  2311. }
  2312. /*
  2313. * allocate autoparam DMA resource.
  2314. */
  2315. data->autoparam = pci_alloc_consistent(pdev, sizeof(nsp32_autoparam), &(data->auto_paddr));
  2316. if (data->autoparam == NULL) {
  2317. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2318. goto scsi_unregister;
  2319. }
  2320. /*
  2321. * allocate scatter-gather DMA resource.
  2322. */
  2323. data->sg_list = pci_alloc_consistent(pdev, NSP32_SG_TABLE_SIZE,
  2324. &(data->sg_paddr));
  2325. if (data->sg_list == NULL) {
  2326. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2327. goto free_autoparam;
  2328. }
  2329. for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
  2330. for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
  2331. int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
  2332. nsp32_lunt tmp = {
  2333. .SCpnt = NULL,
  2334. .save_datp = 0,
  2335. .msgin03 = FALSE,
  2336. .sg_num = 0,
  2337. .cur_entry = 0,
  2338. .sglun = &(data->sg_list[offset]),
  2339. .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
  2340. };
  2341. data->lunt[i][j] = tmp;
  2342. }
  2343. }
  2344. /*
  2345. * setup target
  2346. */
  2347. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2348. nsp32_target *target = &(data->target[i]);
  2349. target->limit_entry = 0;
  2350. target->sync_flag = 0;
  2351. nsp32_set_async(data, target);
  2352. }
  2353. /*
  2354. * EEPROM check
  2355. */
  2356. ret = nsp32_getprom_param(data);
  2357. if (ret == FALSE) {
  2358. data->resettime = 3; /* default 3 */
  2359. }
  2360. /*
  2361. * setup HBA
  2362. */
  2363. nsp32hw_init(data);
  2364. snprintf(data->info_str, sizeof(data->info_str),
  2365. "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
  2366. host->irq, host->io_port, host->n_io_port);
  2367. /*
  2368. * SCSI bus reset
  2369. *
  2370. * Note: It's important to reset SCSI bus in initialization phase.
  2371. * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
  2372. * system is coming up, so SCSI devices connected to HBA is set as
  2373. * un-asynchronous mode. It brings the merit that this HBA is
  2374. * ready to start synchronous transfer without any preparation,
  2375. * but we are difficult to control transfer speed. In addition,
  2376. * it prevents device transfer speed from effecting EEPROM start-up
  2377. * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
  2378. * Auto Mode, then FAST-10M is selected when SCSI devices are
  2379. * connected same or more than 4 devices. It should be avoided
  2380. * depending on this specification. Thus, resetting the SCSI bus
  2381. * restores all connected SCSI devices to asynchronous mode, then
  2382. * this driver set SDTR safely later, and we can control all SCSI
  2383. * device transfer mode.
  2384. */
  2385. nsp32_do_bus_reset(data);
  2386. ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
  2387. if (ret < 0) {
  2388. nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
  2389. "SCSI PCI controller. Interrupt: %d", host->irq);
  2390. goto free_sg_list;
  2391. }
  2392. /*
  2393. * PCI IO register
  2394. */
  2395. res = request_region(host->io_port, host->n_io_port, "nsp32");
  2396. if (res == NULL) {
  2397. nsp32_msg(KERN_ERR,
  2398. "I/O region 0x%lx+0x%lx is already used",
  2399. data->BaseAddress, data->NumAddress);
  2400. goto free_irq;
  2401. }
  2402. ret = scsi_add_host(host, &pdev->dev);
  2403. if (ret) {
  2404. nsp32_msg(KERN_ERR, "failed to add scsi host");
  2405. goto free_region;
  2406. }
  2407. scsi_scan_host(host);
  2408. pci_set_drvdata(pdev, host);
  2409. return 0;
  2410. free_region:
  2411. release_region(host->io_port, host->n_io_port);
  2412. free_irq:
  2413. free_irq(host->irq, data);
  2414. free_sg_list:
  2415. pci_free_consistent(pdev, NSP32_SG_TABLE_SIZE,
  2416. data->sg_list, data->sg_paddr);
  2417. free_autoparam:
  2418. pci_free_consistent(pdev, sizeof(nsp32_autoparam),
  2419. data->autoparam, data->auto_paddr);
  2420. scsi_unregister:
  2421. scsi_host_put(host);
  2422. err:
  2423. return 1;
  2424. }
  2425. static int nsp32_release(struct Scsi_Host *host)
  2426. {
  2427. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2428. if (data->autoparam) {
  2429. pci_free_consistent(data->Pci, sizeof(nsp32_autoparam),
  2430. data->autoparam, data->auto_paddr);
  2431. }
  2432. if (data->sg_list) {
  2433. pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE,
  2434. data->sg_list, data->sg_paddr);
  2435. }
  2436. if (host->irq) {
  2437. free_irq(host->irq, data);
  2438. }
  2439. if (host->io_port && host->n_io_port) {
  2440. release_region(host->io_port, host->n_io_port);
  2441. }
  2442. if (data->MmioAddress) {
  2443. iounmap(data->MmioAddress);
  2444. }
  2445. return 0;
  2446. }
  2447. static const char *nsp32_info(struct Scsi_Host *shpnt)
  2448. {
  2449. nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
  2450. return data->info_str;
  2451. }
  2452. /****************************************************************************
  2453. * error handler
  2454. */
  2455. static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
  2456. {
  2457. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2458. unsigned int base = SCpnt->device->host->io_port;
  2459. nsp32_msg(KERN_WARNING, "abort");
  2460. if (data->cur_lunt->SCpnt == NULL) {
  2461. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
  2462. return FAILED;
  2463. }
  2464. if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
  2465. /* reset SDTR negotiation */
  2466. data->cur_target->sync_flag = 0;
  2467. nsp32_set_async(data, data->cur_target);
  2468. }
  2469. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2470. nsp32_write2(base, BM_CNT, 0);
  2471. SCpnt->result = DID_ABORT << 16;
  2472. nsp32_scsi_done(SCpnt);
  2473. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
  2474. return SUCCESS;
  2475. }
  2476. static int nsp32_eh_bus_reset(struct scsi_cmnd *SCpnt)
  2477. {
  2478. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2479. unsigned int base = SCpnt->device->host->io_port;
  2480. spin_lock_irq(SCpnt->device->host->host_lock);
  2481. nsp32_msg(KERN_INFO, "Bus Reset");
  2482. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2483. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2484. nsp32_do_bus_reset(data);
  2485. nsp32_write2(base, IRQ_CONTROL, 0);
  2486. spin_unlock_irq(SCpnt->device->host->host_lock);
  2487. return SUCCESS; /* SCSI bus reset is succeeded at any time. */
  2488. }
  2489. static void nsp32_do_bus_reset(nsp32_hw_data *data)
  2490. {
  2491. unsigned int base = data->BaseAddress;
  2492. unsigned short intrdat;
  2493. int i;
  2494. nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
  2495. /*
  2496. * stop all transfer
  2497. * clear TRANSFERCONTROL_BM_START
  2498. * clear counter
  2499. */
  2500. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2501. nsp32_write4(base, BM_CNT, 0);
  2502. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  2503. /*
  2504. * fall back to asynchronous transfer mode
  2505. * initialize SDTR negotiation flag
  2506. */
  2507. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2508. nsp32_target *target = &data->target[i];
  2509. target->sync_flag = 0;
  2510. nsp32_set_async(data, target);
  2511. }
  2512. /*
  2513. * reset SCSI bus
  2514. */
  2515. nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
  2516. udelay(RESET_HOLD_TIME);
  2517. nsp32_write1(base, SCSI_BUS_CONTROL, 0);
  2518. for(i = 0; i < 5; i++) {
  2519. intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
  2520. nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
  2521. }
  2522. data->CurrentSC = NULL;
  2523. }
  2524. static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
  2525. {
  2526. struct Scsi_Host *host = SCpnt->device->host;
  2527. unsigned int base = SCpnt->device->host->io_port;
  2528. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2529. nsp32_msg(KERN_INFO, "Host Reset");
  2530. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2531. spin_lock_irq(SCpnt->device->host->host_lock);
  2532. nsp32hw_init(data);
  2533. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2534. nsp32_do_bus_reset(data);
  2535. nsp32_write2(base, IRQ_CONTROL, 0);
  2536. spin_unlock_irq(SCpnt->device->host->host_lock);
  2537. return SUCCESS; /* Host reset is succeeded at any time. */
  2538. }
  2539. /**************************************************************************
  2540. * EEPROM handler
  2541. */
  2542. /*
  2543. * getting EEPROM parameter
  2544. */
  2545. static int nsp32_getprom_param(nsp32_hw_data *data)
  2546. {
  2547. int vendor = data->pci_devid->vendor;
  2548. int device = data->pci_devid->device;
  2549. int ret, val, i;
  2550. /*
  2551. * EEPROM checking.
  2552. */
  2553. ret = nsp32_prom_read(data, 0x7e);
  2554. if (ret != 0x55) {
  2555. nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
  2556. return FALSE;
  2557. }
  2558. ret = nsp32_prom_read(data, 0x7f);
  2559. if (ret != 0xaa) {
  2560. nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
  2561. return FALSE;
  2562. }
  2563. /*
  2564. * check EEPROM type
  2565. */
  2566. if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2567. device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
  2568. ret = nsp32_getprom_c16(data);
  2569. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2570. device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
  2571. ret = nsp32_getprom_at24(data);
  2572. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2573. device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
  2574. ret = nsp32_getprom_at24(data);
  2575. } else {
  2576. nsp32_msg(KERN_WARNING, "Unknown EEPROM");
  2577. ret = FALSE;
  2578. }
  2579. /* for debug : SPROM data full checking */
  2580. for (i = 0; i <= 0x1f; i++) {
  2581. val = nsp32_prom_read(data, i);
  2582. nsp32_dbg(NSP32_DEBUG_EEPROM,
  2583. "rom address 0x%x : 0x%x", i, val);
  2584. }
  2585. return ret;
  2586. }
  2587. /*
  2588. * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
  2589. *
  2590. * ROMADDR
  2591. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2592. * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
  2593. * 0x07 : HBA Synchronous Transfer Period
  2594. * Value 0: AutoSync, 1: Manual Setting
  2595. * 0x08 - 0x0f : Not Used? (0x0)
  2596. * 0x10 : Bus Termination
  2597. * Value 0: Auto[ON], 1: ON, 2: OFF
  2598. * 0x11 : Not Used? (0)
  2599. * 0x12 : Bus Reset Delay Time (0x03)
  2600. * 0x13 : Bootable CD Support
  2601. * Value 0: Disable, 1: Enable
  2602. * 0x14 : Device Scan
  2603. * Bit 7 6 5 4 3 2 1 0
  2604. * | <----------------->
  2605. * | SCSI ID: Value 0: Skip, 1: YES
  2606. * |-> Value 0: ALL scan, Value 1: Manual
  2607. * 0x15 - 0x1b : Not Used? (0)
  2608. * 0x1c : Constant? (0x01) (clock div?)
  2609. * 0x1d - 0x7c : Not Used (0xff)
  2610. * 0x7d : Not Used? (0xff)
  2611. * 0x7e : Constant (0x55), Validity signature
  2612. * 0x7f : Constant (0xaa), Validity signature
  2613. */
  2614. static int nsp32_getprom_at24(nsp32_hw_data *data)
  2615. {
  2616. int ret, i;
  2617. int auto_sync;
  2618. nsp32_target *target;
  2619. int entry;
  2620. /*
  2621. * Reset time which is designated by EEPROM.
  2622. *
  2623. * TODO: Not used yet.
  2624. */
  2625. data->resettime = nsp32_prom_read(data, 0x12);
  2626. /*
  2627. * HBA Synchronous Transfer Period
  2628. *
  2629. * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
  2630. * that if auto_sync is 0 (auto), and connected SCSI devices are
  2631. * same or lower than 3, then transfer speed is set as ULTRA-20M.
  2632. * On the contrary if connected SCSI devices are same or higher
  2633. * than 4, then transfer speed is set as FAST-10M.
  2634. *
  2635. * I break this rule. The number of connected SCSI devices are
  2636. * only ignored. If auto_sync is 0 (auto), then transfer speed is
  2637. * forced as ULTRA-20M.
  2638. */
  2639. ret = nsp32_prom_read(data, 0x07);
  2640. switch (ret) {
  2641. case 0:
  2642. auto_sync = TRUE;
  2643. break;
  2644. case 1:
  2645. auto_sync = FALSE;
  2646. break;
  2647. default:
  2648. nsp32_msg(KERN_WARNING,
  2649. "Unsupported Auto Sync mode. Fall back to manual mode.");
  2650. auto_sync = TRUE;
  2651. }
  2652. if (trans_mode == ULTRA20M_MODE) {
  2653. auto_sync = TRUE;
  2654. }
  2655. /*
  2656. * each device Synchronous Transfer Period
  2657. */
  2658. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2659. target = &data->target[i];
  2660. if (auto_sync == TRUE) {
  2661. target->limit_entry = 0; /* set as ULTRA20M */
  2662. } else {
  2663. ret = nsp32_prom_read(data, i);
  2664. entry = nsp32_search_period_entry(data, target, ret);
  2665. if (entry < 0) {
  2666. /* search failed... set maximum speed */
  2667. entry = 0;
  2668. }
  2669. target->limit_entry = entry;
  2670. }
  2671. }
  2672. return TRUE;
  2673. }
  2674. /*
  2675. * C16 110 (I-O Data: SC-NBD) data map:
  2676. *
  2677. * ROMADDR
  2678. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2679. * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
  2680. * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
  2681. * 0x08 - 0x0f : Not Used? (0x0)
  2682. * 0x10 : Transfer Mode
  2683. * Value 0: PIO, 1: Busmater
  2684. * 0x11 : Bus Reset Delay Time (0x00-0x20)
  2685. * 0x12 : Bus Termination
  2686. * Value 0: Disable, 1: Enable
  2687. * 0x13 - 0x19 : Disconnection
  2688. * Value 0: Disable, 1: Enable
  2689. * 0x1a - 0x7c : Not Used? (0)
  2690. * 0x7d : Not Used? (0xf8)
  2691. * 0x7e : Constant (0x55), Validity signature
  2692. * 0x7f : Constant (0xaa), Validity signature
  2693. */
  2694. static int nsp32_getprom_c16(nsp32_hw_data *data)
  2695. {
  2696. int ret, i;
  2697. nsp32_target *target;
  2698. int entry, val;
  2699. /*
  2700. * Reset time which is designated by EEPROM.
  2701. *
  2702. * TODO: Not used yet.
  2703. */
  2704. data->resettime = nsp32_prom_read(data, 0x11);
  2705. /*
  2706. * each device Synchronous Transfer Period
  2707. */
  2708. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2709. target = &data->target[i];
  2710. ret = nsp32_prom_read(data, i);
  2711. switch (ret) {
  2712. case 0: /* 20MB/s */
  2713. val = 0x0c;
  2714. break;
  2715. case 1: /* 10MB/s */
  2716. val = 0x19;
  2717. break;
  2718. case 2: /* 5MB/s */
  2719. val = 0x32;
  2720. break;
  2721. case 3: /* ASYNC */
  2722. val = 0x00;
  2723. break;
  2724. default: /* default 20MB/s */
  2725. val = 0x0c;
  2726. break;
  2727. }
  2728. entry = nsp32_search_period_entry(data, target, val);
  2729. if (entry < 0 || trans_mode == ULTRA20M_MODE) {
  2730. /* search failed... set maximum speed */
  2731. entry = 0;
  2732. }
  2733. target->limit_entry = entry;
  2734. }
  2735. return TRUE;
  2736. }
  2737. /*
  2738. * Atmel AT24C01A (drived in 5V) serial EEPROM routines
  2739. */
  2740. static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
  2741. {
  2742. int i, val;
  2743. /* start condition */
  2744. nsp32_prom_start(data);
  2745. /* device address */
  2746. nsp32_prom_write_bit(data, 1); /* 1 */
  2747. nsp32_prom_write_bit(data, 0); /* 0 */
  2748. nsp32_prom_write_bit(data, 1); /* 1 */
  2749. nsp32_prom_write_bit(data, 0); /* 0 */
  2750. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2751. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2752. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2753. /* R/W: W for dummy write */
  2754. nsp32_prom_write_bit(data, 0);
  2755. /* ack */
  2756. nsp32_prom_write_bit(data, 0);
  2757. /* word address */
  2758. for (i = 7; i >= 0; i--) {
  2759. nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
  2760. }
  2761. /* ack */
  2762. nsp32_prom_write_bit(data, 0);
  2763. /* start condition */
  2764. nsp32_prom_start(data);
  2765. /* device address */
  2766. nsp32_prom_write_bit(data, 1); /* 1 */
  2767. nsp32_prom_write_bit(data, 0); /* 0 */
  2768. nsp32_prom_write_bit(data, 1); /* 1 */
  2769. nsp32_prom_write_bit(data, 0); /* 0 */
  2770. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2771. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2772. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2773. /* R/W: R */
  2774. nsp32_prom_write_bit(data, 1);
  2775. /* ack */
  2776. nsp32_prom_write_bit(data, 0);
  2777. /* data... */
  2778. val = 0;
  2779. for (i = 7; i >= 0; i--) {
  2780. val += (nsp32_prom_read_bit(data) << i);
  2781. }
  2782. /* no ack */
  2783. nsp32_prom_write_bit(data, 1);
  2784. /* stop condition */
  2785. nsp32_prom_stop(data);
  2786. return val;
  2787. }
  2788. static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
  2789. {
  2790. int base = data->BaseAddress;
  2791. int tmp;
  2792. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
  2793. if (val == 0) {
  2794. tmp &= ~bit;
  2795. } else {
  2796. tmp |= bit;
  2797. }
  2798. nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
  2799. udelay(10);
  2800. }
  2801. static int nsp32_prom_get(nsp32_hw_data *data, int bit)
  2802. {
  2803. int base = data->BaseAddress;
  2804. int tmp, ret;
  2805. if (bit != SDA) {
  2806. nsp32_msg(KERN_ERR, "return value is not appropriate");
  2807. return 0;
  2808. }
  2809. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
  2810. if (tmp == 0) {
  2811. ret = 0;
  2812. } else {
  2813. ret = 1;
  2814. }
  2815. udelay(10);
  2816. return ret;
  2817. }
  2818. static void nsp32_prom_start (nsp32_hw_data *data)
  2819. {
  2820. /* start condition */
  2821. nsp32_prom_set(data, SCL, 1);
  2822. nsp32_prom_set(data, SDA, 1);
  2823. nsp32_prom_set(data, ENA, 1); /* output mode */
  2824. nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
  2825. * SDA 1->0 is start condition */
  2826. nsp32_prom_set(data, SCL, 0);
  2827. }
  2828. static void nsp32_prom_stop (nsp32_hw_data *data)
  2829. {
  2830. /* stop condition */
  2831. nsp32_prom_set(data, SCL, 1);
  2832. nsp32_prom_set(data, SDA, 0);
  2833. nsp32_prom_set(data, ENA, 1); /* output mode */
  2834. nsp32_prom_set(data, SDA, 1);
  2835. nsp32_prom_set(data, SCL, 0);
  2836. }
  2837. static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
  2838. {
  2839. /* write */
  2840. nsp32_prom_set(data, SDA, val);
  2841. nsp32_prom_set(data, SCL, 1 );
  2842. nsp32_prom_set(data, SCL, 0 );
  2843. }
  2844. static int nsp32_prom_read_bit(nsp32_hw_data *data)
  2845. {
  2846. int val;
  2847. /* read */
  2848. nsp32_prom_set(data, ENA, 0); /* input mode */
  2849. nsp32_prom_set(data, SCL, 1);
  2850. val = nsp32_prom_get(data, SDA);
  2851. nsp32_prom_set(data, SCL, 0);
  2852. nsp32_prom_set(data, ENA, 1); /* output mode */
  2853. return val;
  2854. }
  2855. /**************************************************************************
  2856. * Power Management
  2857. */
  2858. #ifdef CONFIG_PM
  2859. /* Device suspended */
  2860. static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
  2861. {
  2862. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2863. nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
  2864. pci_save_state (pdev);
  2865. pci_disable_device (pdev);
  2866. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2867. return 0;
  2868. }
  2869. /* Device woken up */
  2870. static int nsp32_resume(struct pci_dev *pdev)
  2871. {
  2872. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2873. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2874. unsigned short reg;
  2875. nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
  2876. pci_set_power_state(pdev, PCI_D0);
  2877. pci_enable_wake (pdev, PCI_D0, 0);
  2878. pci_restore_state (pdev);
  2879. reg = nsp32_read2(data->BaseAddress, INDEX_REG);
  2880. nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
  2881. if (reg == 0xffff) {
  2882. nsp32_msg(KERN_INFO, "missing device. abort resume.");
  2883. return 0;
  2884. }
  2885. nsp32hw_init (data);
  2886. nsp32_do_bus_reset(data);
  2887. nsp32_msg(KERN_INFO, "resume success");
  2888. return 0;
  2889. }
  2890. /* Enable wake event */
  2891. static int nsp32_enable_wake(struct pci_dev *pdev, pci_power_t state, int enable)
  2892. {
  2893. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2894. nsp32_msg(KERN_INFO, "pci-enable_wake: stub, pdev=0x%p, enable=%d, slot=%s, host=0x%p", pdev, enable, pci_name(pdev), host);
  2895. return 0;
  2896. }
  2897. #endif
  2898. /************************************************************************
  2899. * PCI/Cardbus probe/remove routine
  2900. */
  2901. static int __devinit nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  2902. {
  2903. int ret;
  2904. nsp32_hw_data *data = &nsp32_data_base;
  2905. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2906. ret = pci_enable_device(pdev);
  2907. if (ret) {
  2908. nsp32_msg(KERN_ERR, "failed to enable pci device");
  2909. return ret;
  2910. }
  2911. data->Pci = pdev;
  2912. data->pci_devid = id;
  2913. data->IrqNumber = pdev->irq;
  2914. data->BaseAddress = pci_resource_start(pdev, 0);
  2915. data->NumAddress = pci_resource_len (pdev, 0);
  2916. data->MmioAddress = ioremap_nocache(pci_resource_start(pdev, 1),
  2917. pci_resource_len (pdev, 1));
  2918. data->MmioLength = pci_resource_len (pdev, 1);
  2919. pci_set_master(pdev);
  2920. ret = nsp32_detect(pdev);
  2921. nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
  2922. pdev->irq,
  2923. data->MmioAddress, data->MmioLength,
  2924. pci_name(pdev),
  2925. nsp32_model[id->driver_data]);
  2926. nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
  2927. return ret;
  2928. }
  2929. static void __devexit nsp32_remove(struct pci_dev *pdev)
  2930. {
  2931. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2932. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2933. scsi_remove_host(host);
  2934. nsp32_release(host);
  2935. scsi_host_put(host);
  2936. }
  2937. static struct pci_driver nsp32_driver = {
  2938. .name = "nsp32",
  2939. .id_table = nsp32_pci_table,
  2940. .probe = nsp32_probe,
  2941. .remove = __devexit_p(nsp32_remove),
  2942. #ifdef CONFIG_PM
  2943. .suspend = nsp32_suspend,
  2944. .resume = nsp32_resume,
  2945. .enable_wake = nsp32_enable_wake,
  2946. #endif
  2947. };
  2948. /*********************************************************************
  2949. * Moule entry point
  2950. */
  2951. static int __init init_nsp32(void) {
  2952. nsp32_msg(KERN_INFO, "loading...");
  2953. return pci_register_driver(&nsp32_driver);
  2954. }
  2955. static void __exit exit_nsp32(void) {
  2956. nsp32_msg(KERN_INFO, "unloading...");
  2957. pci_unregister_driver(&nsp32_driver);
  2958. }
  2959. module_init(init_nsp32);
  2960. module_exit(exit_nsp32);
  2961. /* end */