cdv_intel_lvds.c 19 KB

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  1. /*
  2. * Copyright © 2006-2011 Intel Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program; if not, write to the Free Software Foundation, Inc.,
  15. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  16. *
  17. * Authors:
  18. * Eric Anholt <eric@anholt.net>
  19. * Dave Airlie <airlied@linux.ie>
  20. * Jesse Barnes <jesse.barnes@intel.com>
  21. */
  22. #include <linux/i2c.h>
  23. #include <linux/dmi.h>
  24. #include <drm/drmP.h>
  25. #include "intel_bios.h"
  26. #include "psb_drv.h"
  27. #include "psb_intel_drv.h"
  28. #include "psb_intel_reg.h"
  29. #include "power.h"
  30. #include <linux/pm_runtime.h>
  31. #include "cdv_device.h"
  32. /**
  33. * LVDS I2C backlight control macros
  34. */
  35. #define BRIGHTNESS_MAX_LEVEL 100
  36. #define BRIGHTNESS_MASK 0xFF
  37. #define BLC_I2C_TYPE 0x01
  38. #define BLC_PWM_TYPT 0x02
  39. #define BLC_POLARITY_NORMAL 0
  40. #define BLC_POLARITY_INVERSE 1
  41. #define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
  42. #define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
  43. #define PSB_BLC_PWM_PRECISION_FACTOR (10)
  44. #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
  45. #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
  46. struct cdv_intel_lvds_priv {
  47. /**
  48. * Saved LVDO output states
  49. */
  50. uint32_t savePP_ON;
  51. uint32_t savePP_OFF;
  52. uint32_t saveLVDS;
  53. uint32_t savePP_CONTROL;
  54. uint32_t savePP_CYCLE;
  55. uint32_t savePFIT_CONTROL;
  56. uint32_t savePFIT_PGM_RATIOS;
  57. uint32_t saveBLC_PWM_CTL;
  58. };
  59. /*
  60. * Returns the maximum level of the backlight duty cycle field.
  61. */
  62. static u32 cdv_intel_lvds_get_max_backlight(struct drm_device *dev)
  63. {
  64. struct drm_psb_private *dev_priv = dev->dev_private;
  65. u32 retval;
  66. if (gma_power_begin(dev, false)) {
  67. retval = ((REG_READ(BLC_PWM_CTL) &
  68. BACKLIGHT_MODULATION_FREQ_MASK) >>
  69. BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  70. gma_power_end(dev);
  71. } else
  72. retval = ((dev_priv->saveBLC_PWM_CTL &
  73. BACKLIGHT_MODULATION_FREQ_MASK) >>
  74. BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  75. return retval;
  76. }
  77. /*
  78. * Set LVDS backlight level by I2C command
  79. */
  80. static int cdv_lvds_i2c_set_brightness(struct drm_device *dev,
  81. unsigned int level)
  82. {
  83. struct drm_psb_private *dev_priv = dev->dev_private;
  84. struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
  85. u8 out_buf[2];
  86. unsigned int blc_i2c_brightness;
  87. struct i2c_msg msgs[] = {
  88. {
  89. .addr = lvds_i2c_bus->slave_addr,
  90. .flags = 0,
  91. .len = 2,
  92. .buf = out_buf,
  93. }
  94. };
  95. blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
  96. BRIGHTNESS_MASK /
  97. BRIGHTNESS_MAX_LEVEL);
  98. if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
  99. blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
  100. out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
  101. out_buf[1] = (u8)blc_i2c_brightness;
  102. if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1)
  103. return 0;
  104. DRM_ERROR("I2C transfer error\n");
  105. return -1;
  106. }
  107. static int cdv_lvds_pwm_set_brightness(struct drm_device *dev, int level)
  108. {
  109. struct drm_psb_private *dev_priv = dev->dev_private;
  110. u32 max_pwm_blc;
  111. u32 blc_pwm_duty_cycle;
  112. max_pwm_blc = cdv_intel_lvds_get_max_backlight(dev);
  113. /*BLC_PWM_CTL Should be initiated while backlight device init*/
  114. BUG_ON((max_pwm_blc & PSB_BLC_MAX_PWM_REG_FREQ) == 0);
  115. blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
  116. if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
  117. blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
  118. blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
  119. REG_WRITE(BLC_PWM_CTL,
  120. (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
  121. (blc_pwm_duty_cycle));
  122. return 0;
  123. }
  124. /*
  125. * Set LVDS backlight level either by I2C or PWM
  126. */
  127. void cdv_intel_lvds_set_brightness(struct drm_device *dev, int level)
  128. {
  129. struct drm_psb_private *dev_priv = dev->dev_private;
  130. if (!dev_priv->lvds_bl) {
  131. DRM_ERROR("NO LVDS Backlight Info\n");
  132. return;
  133. }
  134. if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
  135. cdv_lvds_i2c_set_brightness(dev, level);
  136. else
  137. cdv_lvds_pwm_set_brightness(dev, level);
  138. }
  139. /**
  140. * Sets the backlight level.
  141. *
  142. * level backlight level, from 0 to cdv_intel_lvds_get_max_backlight().
  143. */
  144. static void cdv_intel_lvds_set_backlight(struct drm_device *dev, int level)
  145. {
  146. struct drm_psb_private *dev_priv = dev->dev_private;
  147. u32 blc_pwm_ctl;
  148. if (gma_power_begin(dev, false)) {
  149. blc_pwm_ctl =
  150. REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  151. REG_WRITE(BLC_PWM_CTL,
  152. (blc_pwm_ctl |
  153. (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  154. gma_power_end(dev);
  155. } else {
  156. blc_pwm_ctl = dev_priv->saveBLC_PWM_CTL &
  157. ~BACKLIGHT_DUTY_CYCLE_MASK;
  158. dev_priv->saveBLC_PWM_CTL = (blc_pwm_ctl |
  159. (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
  160. }
  161. }
  162. /**
  163. * Sets the power state for the panel.
  164. */
  165. static void cdv_intel_lvds_set_power(struct drm_device *dev,
  166. struct psb_intel_output *output, bool on)
  167. {
  168. u32 pp_status;
  169. if (!gma_power_begin(dev, true))
  170. return;
  171. if (on) {
  172. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
  173. POWER_TARGET_ON);
  174. do {
  175. pp_status = REG_READ(PP_STATUS);
  176. } while ((pp_status & PP_ON) == 0);
  177. cdv_intel_lvds_set_backlight(dev,
  178. output->
  179. mode_dev->backlight_duty_cycle);
  180. } else {
  181. cdv_intel_lvds_set_backlight(dev, 0);
  182. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
  183. ~POWER_TARGET_ON);
  184. do {
  185. pp_status = REG_READ(PP_STATUS);
  186. } while (pp_status & PP_ON);
  187. }
  188. gma_power_end(dev);
  189. }
  190. static void cdv_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
  191. {
  192. struct drm_device *dev = encoder->dev;
  193. struct psb_intel_output *output = enc_to_psb_intel_output(encoder);
  194. if (mode == DRM_MODE_DPMS_ON)
  195. cdv_intel_lvds_set_power(dev, output, true);
  196. else
  197. cdv_intel_lvds_set_power(dev, output, false);
  198. /* XXX: We never power down the LVDS pairs. */
  199. }
  200. static void cdv_intel_lvds_save(struct drm_connector *connector)
  201. {
  202. }
  203. static void cdv_intel_lvds_restore(struct drm_connector *connector)
  204. {
  205. }
  206. int cdv_intel_lvds_mode_valid(struct drm_connector *connector,
  207. struct drm_display_mode *mode)
  208. {
  209. struct psb_intel_output *psb_intel_output =
  210. to_psb_intel_output(connector);
  211. struct drm_display_mode *fixed_mode =
  212. psb_intel_output->mode_dev->panel_fixed_mode;
  213. /* just in case */
  214. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  215. return MODE_NO_DBLESCAN;
  216. /* just in case */
  217. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  218. return MODE_NO_INTERLACE;
  219. if (fixed_mode) {
  220. if (mode->hdisplay > fixed_mode->hdisplay)
  221. return MODE_PANEL;
  222. if (mode->vdisplay > fixed_mode->vdisplay)
  223. return MODE_PANEL;
  224. }
  225. return MODE_OK;
  226. }
  227. bool cdv_intel_lvds_mode_fixup(struct drm_encoder *encoder,
  228. struct drm_display_mode *mode,
  229. struct drm_display_mode *adjusted_mode)
  230. {
  231. struct psb_intel_mode_device *mode_dev =
  232. enc_to_psb_intel_output(encoder)->mode_dev;
  233. struct drm_device *dev = encoder->dev;
  234. struct drm_encoder *tmp_encoder;
  235. struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
  236. /* Should never happen!! */
  237. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
  238. head) {
  239. if (tmp_encoder != encoder
  240. && tmp_encoder->crtc == encoder->crtc) {
  241. printk(KERN_ERR "Can't enable LVDS and another "
  242. "encoder on the same pipe\n");
  243. return false;
  244. }
  245. }
  246. /*
  247. * If we have timings from the BIOS for the panel, put them in
  248. * to the adjusted mode. The CRTC will be set up for this mode,
  249. * with the panel scaling set up to source from the H/VDisplay
  250. * of the original mode.
  251. */
  252. if (panel_fixed_mode != NULL) {
  253. adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
  254. adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
  255. adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
  256. adjusted_mode->htotal = panel_fixed_mode->htotal;
  257. adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
  258. adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
  259. adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
  260. adjusted_mode->vtotal = panel_fixed_mode->vtotal;
  261. adjusted_mode->clock = panel_fixed_mode->clock;
  262. drm_mode_set_crtcinfo(adjusted_mode,
  263. CRTC_INTERLACE_HALVE_V);
  264. }
  265. /*
  266. * XXX: It would be nice to support lower refresh rates on the
  267. * panels to reduce power consumption, and perhaps match the
  268. * user's requested refresh rate.
  269. */
  270. return true;
  271. }
  272. static void cdv_intel_lvds_prepare(struct drm_encoder *encoder)
  273. {
  274. struct drm_device *dev = encoder->dev;
  275. struct psb_intel_output *output = enc_to_psb_intel_output(encoder);
  276. struct psb_intel_mode_device *mode_dev = output->mode_dev;
  277. if (!gma_power_begin(dev, true))
  278. return;
  279. mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
  280. mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
  281. BACKLIGHT_DUTY_CYCLE_MASK);
  282. cdv_intel_lvds_set_power(dev, output, false);
  283. gma_power_end(dev);
  284. }
  285. static void cdv_intel_lvds_commit(struct drm_encoder *encoder)
  286. {
  287. struct drm_device *dev = encoder->dev;
  288. struct psb_intel_output *output = enc_to_psb_intel_output(encoder);
  289. struct psb_intel_mode_device *mode_dev = output->mode_dev;
  290. if (mode_dev->backlight_duty_cycle == 0)
  291. mode_dev->backlight_duty_cycle =
  292. cdv_intel_lvds_get_max_backlight(dev);
  293. cdv_intel_lvds_set_power(dev, output, true);
  294. }
  295. static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder,
  296. struct drm_display_mode *mode,
  297. struct drm_display_mode *adjusted_mode)
  298. {
  299. struct drm_device *dev = encoder->dev;
  300. struct drm_psb_private *dev_priv = dev->dev_private;
  301. u32 pfit_control;
  302. /*
  303. * The LVDS pin pair will already have been turned on in the
  304. * cdv_intel_crtc_mode_set since it has a large impact on the DPLL
  305. * settings.
  306. */
  307. /*
  308. * Enable automatic panel scaling so that non-native modes fill the
  309. * screen. Should be enabled before the pipe is enabled, according to
  310. * register description and PRM.
  311. */
  312. if (mode->hdisplay != adjusted_mode->hdisplay ||
  313. mode->vdisplay != adjusted_mode->vdisplay)
  314. pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
  315. HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
  316. HORIZ_INTERP_BILINEAR);
  317. else
  318. pfit_control = 0;
  319. if (dev_priv->lvds_dither)
  320. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  321. REG_WRITE(PFIT_CONTROL, pfit_control);
  322. }
  323. /**
  324. * Detect the LVDS connection.
  325. *
  326. * This always returns CONNECTOR_STATUS_CONNECTED.
  327. * This connector should only have
  328. * been set up if the LVDS was actually connected anyway.
  329. */
  330. static enum drm_connector_status cdv_intel_lvds_detect(
  331. struct drm_connector *connector, bool force)
  332. {
  333. return connector_status_connected;
  334. }
  335. /**
  336. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  337. */
  338. static int cdv_intel_lvds_get_modes(struct drm_connector *connector)
  339. {
  340. struct drm_device *dev = connector->dev;
  341. struct psb_intel_output *psb_intel_output =
  342. to_psb_intel_output(connector);
  343. struct psb_intel_mode_device *mode_dev =
  344. psb_intel_output->mode_dev;
  345. int ret;
  346. ret = psb_intel_ddc_get_modes(psb_intel_output);
  347. if (ret)
  348. return ret;
  349. /* Didn't get an EDID, so
  350. * Set wide sync ranges so we get all modes
  351. * handed to valid_mode for checking
  352. */
  353. connector->display_info.min_vfreq = 0;
  354. connector->display_info.max_vfreq = 200;
  355. connector->display_info.min_hfreq = 0;
  356. connector->display_info.max_hfreq = 200;
  357. if (mode_dev->panel_fixed_mode != NULL) {
  358. struct drm_display_mode *mode =
  359. drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
  360. drm_mode_probed_add(connector, mode);
  361. return 1;
  362. }
  363. return 0;
  364. }
  365. /**
  366. * cdv_intel_lvds_destroy - unregister and free LVDS structures
  367. * @connector: connector to free
  368. *
  369. * Unregister the DDC bus for this connector then free the driver private
  370. * structure.
  371. */
  372. void cdv_intel_lvds_destroy(struct drm_connector *connector)
  373. {
  374. struct psb_intel_output *psb_intel_output =
  375. to_psb_intel_output(connector);
  376. if (psb_intel_output->ddc_bus)
  377. psb_intel_i2c_destroy(psb_intel_output->ddc_bus);
  378. drm_sysfs_connector_remove(connector);
  379. drm_connector_cleanup(connector);
  380. kfree(connector);
  381. }
  382. int cdv_intel_lvds_set_property(struct drm_connector *connector,
  383. struct drm_property *property,
  384. uint64_t value)
  385. {
  386. struct drm_encoder *encoder = connector->encoder;
  387. if (!strcmp(property->name, "scaling mode") && encoder) {
  388. struct psb_intel_crtc *crtc =
  389. to_psb_intel_crtc(encoder->crtc);
  390. uint64_t curValue;
  391. if (!crtc)
  392. return -1;
  393. switch (value) {
  394. case DRM_MODE_SCALE_FULLSCREEN:
  395. break;
  396. case DRM_MODE_SCALE_NO_SCALE:
  397. break;
  398. case DRM_MODE_SCALE_ASPECT:
  399. break;
  400. default:
  401. return -1;
  402. }
  403. if (drm_connector_property_get_value(connector,
  404. property,
  405. &curValue))
  406. return -1;
  407. if (curValue == value)
  408. return 0;
  409. if (drm_connector_property_set_value(connector,
  410. property,
  411. value))
  412. return -1;
  413. if (crtc->saved_mode.hdisplay != 0 &&
  414. crtc->saved_mode.vdisplay != 0) {
  415. if (!drm_crtc_helper_set_mode(encoder->crtc,
  416. &crtc->saved_mode,
  417. encoder->crtc->x,
  418. encoder->crtc->y,
  419. encoder->crtc->fb))
  420. return -1;
  421. }
  422. } else if (!strcmp(property->name, "backlight") && encoder) {
  423. if (drm_connector_property_set_value(connector,
  424. property,
  425. value))
  426. return -1;
  427. else {
  428. #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
  429. struct drm_psb_private *dev_priv =
  430. encoder->dev->dev_private;
  431. struct backlight_device *bd =
  432. dev_priv->backlight_device;
  433. bd->props.brightness = value;
  434. backlight_update_status(bd);
  435. #endif
  436. }
  437. } else if (!strcmp(property->name, "DPMS") && encoder) {
  438. struct drm_encoder_helper_funcs *helpers =
  439. encoder->helper_private;
  440. helpers->dpms(encoder, value);
  441. }
  442. return 0;
  443. }
  444. static const struct drm_encoder_helper_funcs
  445. cdv_intel_lvds_helper_funcs = {
  446. .dpms = cdv_intel_lvds_encoder_dpms,
  447. .mode_fixup = cdv_intel_lvds_mode_fixup,
  448. .prepare = cdv_intel_lvds_prepare,
  449. .mode_set = cdv_intel_lvds_mode_set,
  450. .commit = cdv_intel_lvds_commit,
  451. };
  452. static const struct drm_connector_helper_funcs
  453. cdv_intel_lvds_connector_helper_funcs = {
  454. .get_modes = cdv_intel_lvds_get_modes,
  455. .mode_valid = cdv_intel_lvds_mode_valid,
  456. .best_encoder = psb_intel_best_encoder,
  457. };
  458. static const struct drm_connector_funcs cdv_intel_lvds_connector_funcs = {
  459. .dpms = drm_helper_connector_dpms,
  460. .save = cdv_intel_lvds_save,
  461. .restore = cdv_intel_lvds_restore,
  462. .detect = cdv_intel_lvds_detect,
  463. .fill_modes = drm_helper_probe_single_connector_modes,
  464. .set_property = cdv_intel_lvds_set_property,
  465. .destroy = cdv_intel_lvds_destroy,
  466. };
  467. static void cdv_intel_lvds_enc_destroy(struct drm_encoder *encoder)
  468. {
  469. drm_encoder_cleanup(encoder);
  470. }
  471. const struct drm_encoder_funcs cdv_intel_lvds_enc_funcs = {
  472. .destroy = cdv_intel_lvds_enc_destroy,
  473. };
  474. /**
  475. * cdv_intel_lvds_init - setup LVDS connectors on this device
  476. * @dev: drm device
  477. *
  478. * Create the connector, register the LVDS DDC bus, and try to figure out what
  479. * modes we can display on the LVDS panel (if present).
  480. */
  481. void cdv_intel_lvds_init(struct drm_device *dev,
  482. struct psb_intel_mode_device *mode_dev)
  483. {
  484. struct psb_intel_output *psb_intel_output;
  485. struct cdv_intel_lvds_priv *lvds_priv;
  486. struct drm_connector *connector;
  487. struct drm_encoder *encoder;
  488. struct drm_display_mode *scan;
  489. struct drm_crtc *crtc;
  490. struct drm_psb_private *dev_priv = dev->dev_private;
  491. u32 lvds;
  492. int pipe;
  493. psb_intel_output = kzalloc(sizeof(struct psb_intel_output) +
  494. sizeof(struct cdv_intel_lvds_priv), GFP_KERNEL);
  495. if (!psb_intel_output)
  496. return;
  497. lvds_priv = (struct cdv_intel_lvds_priv *)(psb_intel_output + 1);
  498. psb_intel_output->dev_priv = lvds_priv;
  499. psb_intel_output->mode_dev = mode_dev;
  500. connector = &psb_intel_output->base;
  501. encoder = &psb_intel_output->enc;
  502. drm_connector_init(dev, &psb_intel_output->base,
  503. &cdv_intel_lvds_connector_funcs,
  504. DRM_MODE_CONNECTOR_LVDS);
  505. drm_encoder_init(dev, &psb_intel_output->enc,
  506. &cdv_intel_lvds_enc_funcs,
  507. DRM_MODE_ENCODER_LVDS);
  508. drm_mode_connector_attach_encoder(&psb_intel_output->base,
  509. &psb_intel_output->enc);
  510. psb_intel_output->type = INTEL_OUTPUT_LVDS;
  511. drm_encoder_helper_add(encoder, &cdv_intel_lvds_helper_funcs);
  512. drm_connector_helper_add(connector,
  513. &cdv_intel_lvds_connector_helper_funcs);
  514. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  515. connector->interlace_allowed = false;
  516. connector->doublescan_allowed = false;
  517. /*Attach connector properties*/
  518. drm_connector_attach_property(connector,
  519. dev->mode_config.scaling_mode_property,
  520. DRM_MODE_SCALE_FULLSCREEN);
  521. drm_connector_attach_property(connector,
  522. dev_priv->backlight_property,
  523. BRIGHTNESS_MAX_LEVEL);
  524. /**
  525. * Set up I2C bus
  526. * FIXME: distroy i2c_bus when exit
  527. */
  528. psb_intel_output->i2c_bus = psb_intel_i2c_create(dev,
  529. GPIOB,
  530. "LVDSBLC_B");
  531. if (!psb_intel_output->i2c_bus) {
  532. dev_printk(KERN_ERR,
  533. &dev->pdev->dev, "I2C bus registration failed.\n");
  534. goto failed_blc_i2c;
  535. }
  536. psb_intel_output->i2c_bus->slave_addr = 0x2C;
  537. dev_priv->lvds_i2c_bus = psb_intel_output->i2c_bus;
  538. /*
  539. * LVDS discovery:
  540. * 1) check for EDID on DDC
  541. * 2) check for VBT data
  542. * 3) check to see if LVDS is already on
  543. * if none of the above, no panel
  544. * 4) make sure lid is open
  545. * if closed, act like it's not there for now
  546. */
  547. /* Set up the DDC bus. */
  548. psb_intel_output->ddc_bus = psb_intel_i2c_create(dev,
  549. GPIOC,
  550. "LVDSDDC_C");
  551. if (!psb_intel_output->ddc_bus) {
  552. dev_printk(KERN_ERR, &dev->pdev->dev,
  553. "DDC bus registration " "failed.\n");
  554. goto failed_ddc;
  555. }
  556. /*
  557. * Attempt to get the fixed panel mode from DDC. Assume that the
  558. * preferred mode is the right one.
  559. */
  560. psb_intel_ddc_get_modes(psb_intel_output);
  561. list_for_each_entry(scan, &connector->probed_modes, head) {
  562. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  563. mode_dev->panel_fixed_mode =
  564. drm_mode_duplicate(dev, scan);
  565. goto out; /* FIXME: check for quirks */
  566. }
  567. }
  568. /* Failed to get EDID, what about VBT? do we need this?*/
  569. if (dev_priv->lfp_lvds_vbt_mode) {
  570. mode_dev->panel_fixed_mode =
  571. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  572. if (mode_dev->panel_fixed_mode) {
  573. mode_dev->panel_fixed_mode->type |=
  574. DRM_MODE_TYPE_PREFERRED;
  575. goto out; /* FIXME: check for quirks */
  576. }
  577. }
  578. /*
  579. * If we didn't get EDID, try checking if the panel is already turned
  580. * on. If so, assume that whatever is currently programmed is the
  581. * correct mode.
  582. */
  583. lvds = REG_READ(LVDS);
  584. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  585. crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
  586. if (crtc && (lvds & LVDS_PORT_EN)) {
  587. mode_dev->panel_fixed_mode =
  588. cdv_intel_crtc_mode_get(dev, crtc);
  589. if (mode_dev->panel_fixed_mode) {
  590. mode_dev->panel_fixed_mode->type |=
  591. DRM_MODE_TYPE_PREFERRED;
  592. goto out; /* FIXME: check for quirks */
  593. }
  594. }
  595. /* If we still don't have a mode after all that, give up. */
  596. if (!mode_dev->panel_fixed_mode) {
  597. DRM_DEBUG
  598. ("Found no modes on the lvds, ignoring the LVDS\n");
  599. goto failed_find;
  600. }
  601. out:
  602. drm_sysfs_connector_add(connector);
  603. return;
  604. failed_find:
  605. printk(KERN_ERR "Failed find\n");
  606. if (psb_intel_output->ddc_bus)
  607. psb_intel_i2c_destroy(psb_intel_output->ddc_bus);
  608. failed_ddc:
  609. printk(KERN_ERR "Failed DDC\n");
  610. if (psb_intel_output->i2c_bus)
  611. psb_intel_i2c_destroy(psb_intel_output->i2c_bus);
  612. failed_blc_i2c:
  613. printk(KERN_ERR "Failed BLC\n");
  614. drm_encoder_cleanup(encoder);
  615. drm_connector_cleanup(connector);
  616. kfree(connector);
  617. }