mmu.c 78 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333
  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "mmu.h"
  20. #include "kvm_cache_regs.h"
  21. #include <linux/kvm_host.h>
  22. #include <linux/types.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/highmem.h>
  26. #include <linux/module.h>
  27. #include <linux/swap.h>
  28. #include <linux/hugetlb.h>
  29. #include <linux/compiler.h>
  30. #include <asm/page.h>
  31. #include <asm/cmpxchg.h>
  32. #include <asm/io.h>
  33. #include <asm/vmx.h>
  34. /*
  35. * When setting this variable to true it enables Two-Dimensional-Paging
  36. * where the hardware walks 2 page tables:
  37. * 1. the guest-virtual to guest-physical
  38. * 2. while doing 1. it walks guest-physical to host-physical
  39. * If the hardware supports that we don't need to do shadow paging.
  40. */
  41. bool tdp_enabled = false;
  42. #undef MMU_DEBUG
  43. #undef AUDIT
  44. #ifdef AUDIT
  45. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  46. #else
  47. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  48. #endif
  49. #ifdef MMU_DEBUG
  50. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  51. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  52. #else
  53. #define pgprintk(x...) do { } while (0)
  54. #define rmap_printk(x...) do { } while (0)
  55. #endif
  56. #if defined(MMU_DEBUG) || defined(AUDIT)
  57. static int dbg = 0;
  58. module_param(dbg, bool, 0644);
  59. #endif
  60. static int oos_shadow = 1;
  61. module_param(oos_shadow, bool, 0644);
  62. #ifndef MMU_DEBUG
  63. #define ASSERT(x) do { } while (0)
  64. #else
  65. #define ASSERT(x) \
  66. if (!(x)) { \
  67. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  68. __FILE__, __LINE__, #x); \
  69. }
  70. #endif
  71. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  72. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  73. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  74. #define PT64_LEVEL_BITS 9
  75. #define PT64_LEVEL_SHIFT(level) \
  76. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  77. #define PT64_LEVEL_MASK(level) \
  78. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  79. #define PT64_INDEX(address, level)\
  80. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  81. #define PT32_LEVEL_BITS 10
  82. #define PT32_LEVEL_SHIFT(level) \
  83. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  84. #define PT32_LEVEL_MASK(level) \
  85. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  86. #define PT32_INDEX(address, level)\
  87. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  88. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  89. #define PT64_DIR_BASE_ADDR_MASK \
  90. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  91. #define PT32_BASE_ADDR_MASK PAGE_MASK
  92. #define PT32_DIR_BASE_ADDR_MASK \
  93. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  94. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  95. | PT64_NX_MASK)
  96. #define PFERR_PRESENT_MASK (1U << 0)
  97. #define PFERR_WRITE_MASK (1U << 1)
  98. #define PFERR_USER_MASK (1U << 2)
  99. #define PFERR_RSVD_MASK (1U << 3)
  100. #define PFERR_FETCH_MASK (1U << 4)
  101. #define PT_DIRECTORY_LEVEL 2
  102. #define PT_PAGE_TABLE_LEVEL 1
  103. #define RMAP_EXT 4
  104. #define ACC_EXEC_MASK 1
  105. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  106. #define ACC_USER_MASK PT_USER_MASK
  107. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  108. #define CREATE_TRACE_POINTS
  109. #include "mmutrace.h"
  110. #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  111. struct kvm_rmap_desc {
  112. u64 *sptes[RMAP_EXT];
  113. struct kvm_rmap_desc *more;
  114. };
  115. struct kvm_shadow_walk_iterator {
  116. u64 addr;
  117. hpa_t shadow_addr;
  118. int level;
  119. u64 *sptep;
  120. unsigned index;
  121. };
  122. #define for_each_shadow_entry(_vcpu, _addr, _walker) \
  123. for (shadow_walk_init(&(_walker), _vcpu, _addr); \
  124. shadow_walk_okay(&(_walker)); \
  125. shadow_walk_next(&(_walker)))
  126. struct kvm_unsync_walk {
  127. int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
  128. };
  129. typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
  130. static struct kmem_cache *pte_chain_cache;
  131. static struct kmem_cache *rmap_desc_cache;
  132. static struct kmem_cache *mmu_page_header_cache;
  133. static u64 __read_mostly shadow_trap_nonpresent_pte;
  134. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  135. static u64 __read_mostly shadow_base_present_pte;
  136. static u64 __read_mostly shadow_nx_mask;
  137. static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
  138. static u64 __read_mostly shadow_user_mask;
  139. static u64 __read_mostly shadow_accessed_mask;
  140. static u64 __read_mostly shadow_dirty_mask;
  141. static inline u64 rsvd_bits(int s, int e)
  142. {
  143. return ((1ULL << (e - s + 1)) - 1) << s;
  144. }
  145. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  146. {
  147. shadow_trap_nonpresent_pte = trap_pte;
  148. shadow_notrap_nonpresent_pte = notrap_pte;
  149. }
  150. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  151. void kvm_mmu_set_base_ptes(u64 base_pte)
  152. {
  153. shadow_base_present_pte = base_pte;
  154. }
  155. EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
  156. void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
  157. u64 dirty_mask, u64 nx_mask, u64 x_mask)
  158. {
  159. shadow_user_mask = user_mask;
  160. shadow_accessed_mask = accessed_mask;
  161. shadow_dirty_mask = dirty_mask;
  162. shadow_nx_mask = nx_mask;
  163. shadow_x_mask = x_mask;
  164. }
  165. EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
  166. static int is_write_protection(struct kvm_vcpu *vcpu)
  167. {
  168. return vcpu->arch.cr0 & X86_CR0_WP;
  169. }
  170. static int is_cpuid_PSE36(void)
  171. {
  172. return 1;
  173. }
  174. static int is_nx(struct kvm_vcpu *vcpu)
  175. {
  176. return vcpu->arch.shadow_efer & EFER_NX;
  177. }
  178. static int is_shadow_present_pte(u64 pte)
  179. {
  180. return pte != shadow_trap_nonpresent_pte
  181. && pte != shadow_notrap_nonpresent_pte;
  182. }
  183. static int is_large_pte(u64 pte)
  184. {
  185. return pte & PT_PAGE_SIZE_MASK;
  186. }
  187. static int is_writeble_pte(unsigned long pte)
  188. {
  189. return pte & PT_WRITABLE_MASK;
  190. }
  191. static int is_dirty_gpte(unsigned long pte)
  192. {
  193. return pte & PT_DIRTY_MASK;
  194. }
  195. static int is_rmap_spte(u64 pte)
  196. {
  197. return is_shadow_present_pte(pte);
  198. }
  199. static int is_last_spte(u64 pte, int level)
  200. {
  201. if (level == PT_PAGE_TABLE_LEVEL)
  202. return 1;
  203. if (level == PT_DIRECTORY_LEVEL && is_large_pte(pte))
  204. return 1;
  205. return 0;
  206. }
  207. static pfn_t spte_to_pfn(u64 pte)
  208. {
  209. return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  210. }
  211. static gfn_t pse36_gfn_delta(u32 gpte)
  212. {
  213. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  214. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  215. }
  216. static void __set_spte(u64 *sptep, u64 spte)
  217. {
  218. #ifdef CONFIG_X86_64
  219. set_64bit((unsigned long *)sptep, spte);
  220. #else
  221. set_64bit((unsigned long long *)sptep, spte);
  222. #endif
  223. }
  224. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  225. struct kmem_cache *base_cache, int min)
  226. {
  227. void *obj;
  228. if (cache->nobjs >= min)
  229. return 0;
  230. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  231. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  232. if (!obj)
  233. return -ENOMEM;
  234. cache->objects[cache->nobjs++] = obj;
  235. }
  236. return 0;
  237. }
  238. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  239. {
  240. while (mc->nobjs)
  241. kfree(mc->objects[--mc->nobjs]);
  242. }
  243. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  244. int min)
  245. {
  246. struct page *page;
  247. if (cache->nobjs >= min)
  248. return 0;
  249. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  250. page = alloc_page(GFP_KERNEL);
  251. if (!page)
  252. return -ENOMEM;
  253. set_page_private(page, 0);
  254. cache->objects[cache->nobjs++] = page_address(page);
  255. }
  256. return 0;
  257. }
  258. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  259. {
  260. while (mc->nobjs)
  261. free_page((unsigned long)mc->objects[--mc->nobjs]);
  262. }
  263. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  264. {
  265. int r;
  266. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  267. pte_chain_cache, 4);
  268. if (r)
  269. goto out;
  270. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  271. rmap_desc_cache, 4);
  272. if (r)
  273. goto out;
  274. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  275. if (r)
  276. goto out;
  277. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  278. mmu_page_header_cache, 4);
  279. out:
  280. return r;
  281. }
  282. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  283. {
  284. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  285. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  286. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  287. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  288. }
  289. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  290. size_t size)
  291. {
  292. void *p;
  293. BUG_ON(!mc->nobjs);
  294. p = mc->objects[--mc->nobjs];
  295. return p;
  296. }
  297. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  298. {
  299. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  300. sizeof(struct kvm_pte_chain));
  301. }
  302. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  303. {
  304. kfree(pc);
  305. }
  306. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  307. {
  308. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  309. sizeof(struct kvm_rmap_desc));
  310. }
  311. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  312. {
  313. kfree(rd);
  314. }
  315. /*
  316. * Return the pointer to the largepage write count for a given
  317. * gfn, handling slots that are not large page aligned.
  318. */
  319. static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
  320. {
  321. unsigned long idx;
  322. idx = (gfn / KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL)) -
  323. (slot->base_gfn / KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL));
  324. return &slot->lpage_info[0][idx].write_count;
  325. }
  326. static void account_shadowed(struct kvm *kvm, gfn_t gfn)
  327. {
  328. int *write_count;
  329. gfn = unalias_gfn(kvm, gfn);
  330. write_count = slot_largepage_idx(gfn,
  331. gfn_to_memslot_unaliased(kvm, gfn));
  332. *write_count += 1;
  333. }
  334. static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
  335. {
  336. int *write_count;
  337. gfn = unalias_gfn(kvm, gfn);
  338. write_count = slot_largepage_idx(gfn,
  339. gfn_to_memslot_unaliased(kvm, gfn));
  340. *write_count -= 1;
  341. WARN_ON(*write_count < 0);
  342. }
  343. static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
  344. {
  345. struct kvm_memory_slot *slot;
  346. int *largepage_idx;
  347. gfn = unalias_gfn(kvm, gfn);
  348. slot = gfn_to_memslot_unaliased(kvm, gfn);
  349. if (slot) {
  350. largepage_idx = slot_largepage_idx(gfn, slot);
  351. return *largepage_idx;
  352. }
  353. return 1;
  354. }
  355. static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
  356. {
  357. struct vm_area_struct *vma;
  358. unsigned long addr;
  359. int ret = 0;
  360. addr = gfn_to_hva(kvm, gfn);
  361. if (kvm_is_error_hva(addr))
  362. return ret;
  363. down_read(&current->mm->mmap_sem);
  364. vma = find_vma(current->mm, addr);
  365. if (vma && is_vm_hugetlb_page(vma))
  366. ret = 1;
  367. up_read(&current->mm->mmap_sem);
  368. return ret;
  369. }
  370. static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
  371. {
  372. struct kvm_memory_slot *slot;
  373. if (has_wrprotected_page(vcpu->kvm, large_gfn))
  374. return 0;
  375. if (!host_largepage_backed(vcpu->kvm, large_gfn))
  376. return 0;
  377. slot = gfn_to_memslot(vcpu->kvm, large_gfn);
  378. if (slot && slot->dirty_bitmap)
  379. return 0;
  380. return 1;
  381. }
  382. /*
  383. * Take gfn and return the reverse mapping to it.
  384. * Note: gfn must be unaliased before this function get called
  385. */
  386. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
  387. {
  388. struct kvm_memory_slot *slot;
  389. unsigned long idx;
  390. slot = gfn_to_memslot(kvm, gfn);
  391. if (!lpage)
  392. return &slot->rmap[gfn - slot->base_gfn];
  393. idx = (gfn / KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL)) -
  394. (slot->base_gfn / KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL));
  395. return &slot->lpage_info[0][idx].rmap_pde;
  396. }
  397. /*
  398. * Reverse mapping data structures:
  399. *
  400. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  401. * that points to page_address(page).
  402. *
  403. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  404. * containing more mappings.
  405. *
  406. * Returns the number of rmap entries before the spte was added or zero if
  407. * the spte was not added.
  408. *
  409. */
  410. static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
  411. {
  412. struct kvm_mmu_page *sp;
  413. struct kvm_rmap_desc *desc;
  414. unsigned long *rmapp;
  415. int i, count = 0;
  416. if (!is_rmap_spte(*spte))
  417. return count;
  418. gfn = unalias_gfn(vcpu->kvm, gfn);
  419. sp = page_header(__pa(spte));
  420. sp->gfns[spte - sp->spt] = gfn;
  421. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  422. if (!*rmapp) {
  423. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  424. *rmapp = (unsigned long)spte;
  425. } else if (!(*rmapp & 1)) {
  426. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  427. desc = mmu_alloc_rmap_desc(vcpu);
  428. desc->sptes[0] = (u64 *)*rmapp;
  429. desc->sptes[1] = spte;
  430. *rmapp = (unsigned long)desc | 1;
  431. } else {
  432. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  433. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  434. while (desc->sptes[RMAP_EXT-1] && desc->more) {
  435. desc = desc->more;
  436. count += RMAP_EXT;
  437. }
  438. if (desc->sptes[RMAP_EXT-1]) {
  439. desc->more = mmu_alloc_rmap_desc(vcpu);
  440. desc = desc->more;
  441. }
  442. for (i = 0; desc->sptes[i]; ++i)
  443. ;
  444. desc->sptes[i] = spte;
  445. }
  446. return count;
  447. }
  448. static void rmap_desc_remove_entry(unsigned long *rmapp,
  449. struct kvm_rmap_desc *desc,
  450. int i,
  451. struct kvm_rmap_desc *prev_desc)
  452. {
  453. int j;
  454. for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
  455. ;
  456. desc->sptes[i] = desc->sptes[j];
  457. desc->sptes[j] = NULL;
  458. if (j != 0)
  459. return;
  460. if (!prev_desc && !desc->more)
  461. *rmapp = (unsigned long)desc->sptes[0];
  462. else
  463. if (prev_desc)
  464. prev_desc->more = desc->more;
  465. else
  466. *rmapp = (unsigned long)desc->more | 1;
  467. mmu_free_rmap_desc(desc);
  468. }
  469. static void rmap_remove(struct kvm *kvm, u64 *spte)
  470. {
  471. struct kvm_rmap_desc *desc;
  472. struct kvm_rmap_desc *prev_desc;
  473. struct kvm_mmu_page *sp;
  474. pfn_t pfn;
  475. unsigned long *rmapp;
  476. int i;
  477. if (!is_rmap_spte(*spte))
  478. return;
  479. sp = page_header(__pa(spte));
  480. pfn = spte_to_pfn(*spte);
  481. if (*spte & shadow_accessed_mask)
  482. kvm_set_pfn_accessed(pfn);
  483. if (is_writeble_pte(*spte))
  484. kvm_release_pfn_dirty(pfn);
  485. else
  486. kvm_release_pfn_clean(pfn);
  487. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
  488. if (!*rmapp) {
  489. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  490. BUG();
  491. } else if (!(*rmapp & 1)) {
  492. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  493. if ((u64 *)*rmapp != spte) {
  494. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  495. spte, *spte);
  496. BUG();
  497. }
  498. *rmapp = 0;
  499. } else {
  500. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  501. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  502. prev_desc = NULL;
  503. while (desc) {
  504. for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
  505. if (desc->sptes[i] == spte) {
  506. rmap_desc_remove_entry(rmapp,
  507. desc, i,
  508. prev_desc);
  509. return;
  510. }
  511. prev_desc = desc;
  512. desc = desc->more;
  513. }
  514. BUG();
  515. }
  516. }
  517. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  518. {
  519. struct kvm_rmap_desc *desc;
  520. struct kvm_rmap_desc *prev_desc;
  521. u64 *prev_spte;
  522. int i;
  523. if (!*rmapp)
  524. return NULL;
  525. else if (!(*rmapp & 1)) {
  526. if (!spte)
  527. return (u64 *)*rmapp;
  528. return NULL;
  529. }
  530. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  531. prev_desc = NULL;
  532. prev_spte = NULL;
  533. while (desc) {
  534. for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
  535. if (prev_spte == spte)
  536. return desc->sptes[i];
  537. prev_spte = desc->sptes[i];
  538. }
  539. desc = desc->more;
  540. }
  541. return NULL;
  542. }
  543. static int rmap_write_protect(struct kvm *kvm, u64 gfn)
  544. {
  545. unsigned long *rmapp;
  546. u64 *spte;
  547. int write_protected = 0;
  548. gfn = unalias_gfn(kvm, gfn);
  549. rmapp = gfn_to_rmap(kvm, gfn, 0);
  550. spte = rmap_next(kvm, rmapp, NULL);
  551. while (spte) {
  552. BUG_ON(!spte);
  553. BUG_ON(!(*spte & PT_PRESENT_MASK));
  554. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  555. if (is_writeble_pte(*spte)) {
  556. __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
  557. write_protected = 1;
  558. }
  559. spte = rmap_next(kvm, rmapp, spte);
  560. }
  561. if (write_protected) {
  562. pfn_t pfn;
  563. spte = rmap_next(kvm, rmapp, NULL);
  564. pfn = spte_to_pfn(*spte);
  565. kvm_set_pfn_dirty(pfn);
  566. }
  567. /* check for huge page mappings */
  568. rmapp = gfn_to_rmap(kvm, gfn, 1);
  569. spte = rmap_next(kvm, rmapp, NULL);
  570. while (spte) {
  571. BUG_ON(!spte);
  572. BUG_ON(!(*spte & PT_PRESENT_MASK));
  573. BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
  574. pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
  575. if (is_writeble_pte(*spte)) {
  576. rmap_remove(kvm, spte);
  577. --kvm->stat.lpages;
  578. __set_spte(spte, shadow_trap_nonpresent_pte);
  579. spte = NULL;
  580. write_protected = 1;
  581. }
  582. spte = rmap_next(kvm, rmapp, spte);
  583. }
  584. return write_protected;
  585. }
  586. static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
  587. {
  588. u64 *spte;
  589. int need_tlb_flush = 0;
  590. while ((spte = rmap_next(kvm, rmapp, NULL))) {
  591. BUG_ON(!(*spte & PT_PRESENT_MASK));
  592. rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
  593. rmap_remove(kvm, spte);
  594. __set_spte(spte, shadow_trap_nonpresent_pte);
  595. need_tlb_flush = 1;
  596. }
  597. return need_tlb_flush;
  598. }
  599. static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
  600. int (*handler)(struct kvm *kvm, unsigned long *rmapp))
  601. {
  602. int i;
  603. int retval = 0;
  604. /*
  605. * If mmap_sem isn't taken, we can look the memslots with only
  606. * the mmu_lock by skipping over the slots with userspace_addr == 0.
  607. */
  608. for (i = 0; i < kvm->nmemslots; i++) {
  609. struct kvm_memory_slot *memslot = &kvm->memslots[i];
  610. unsigned long start = memslot->userspace_addr;
  611. unsigned long end;
  612. /* mmu_lock protects userspace_addr */
  613. if (!start)
  614. continue;
  615. end = start + (memslot->npages << PAGE_SHIFT);
  616. if (hva >= start && hva < end) {
  617. gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
  618. int idx = gfn_offset /
  619. KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL);
  620. retval |= handler(kvm, &memslot->rmap[gfn_offset]);
  621. retval |= handler(kvm,
  622. &memslot->lpage_info[0][idx].rmap_pde);
  623. }
  624. }
  625. return retval;
  626. }
  627. int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
  628. {
  629. return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
  630. }
  631. static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
  632. {
  633. u64 *spte;
  634. int young = 0;
  635. /* always return old for EPT */
  636. if (!shadow_accessed_mask)
  637. return 0;
  638. spte = rmap_next(kvm, rmapp, NULL);
  639. while (spte) {
  640. int _young;
  641. u64 _spte = *spte;
  642. BUG_ON(!(_spte & PT_PRESENT_MASK));
  643. _young = _spte & PT_ACCESSED_MASK;
  644. if (_young) {
  645. young = 1;
  646. clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  647. }
  648. spte = rmap_next(kvm, rmapp, spte);
  649. }
  650. return young;
  651. }
  652. #define RMAP_RECYCLE_THRESHOLD 1000
  653. static void rmap_recycle(struct kvm_vcpu *vcpu, gfn_t gfn, int lpage)
  654. {
  655. unsigned long *rmapp;
  656. gfn = unalias_gfn(vcpu->kvm, gfn);
  657. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  658. kvm_unmap_rmapp(vcpu->kvm, rmapp);
  659. kvm_flush_remote_tlbs(vcpu->kvm);
  660. }
  661. int kvm_age_hva(struct kvm *kvm, unsigned long hva)
  662. {
  663. return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
  664. }
  665. #ifdef MMU_DEBUG
  666. static int is_empty_shadow_page(u64 *spt)
  667. {
  668. u64 *pos;
  669. u64 *end;
  670. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  671. if (is_shadow_present_pte(*pos)) {
  672. printk(KERN_ERR "%s: %p %llx\n", __func__,
  673. pos, *pos);
  674. return 0;
  675. }
  676. return 1;
  677. }
  678. #endif
  679. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  680. {
  681. ASSERT(is_empty_shadow_page(sp->spt));
  682. list_del(&sp->link);
  683. __free_page(virt_to_page(sp->spt));
  684. __free_page(virt_to_page(sp->gfns));
  685. kfree(sp);
  686. ++kvm->arch.n_free_mmu_pages;
  687. }
  688. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  689. {
  690. return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
  691. }
  692. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  693. u64 *parent_pte)
  694. {
  695. struct kvm_mmu_page *sp;
  696. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  697. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  698. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  699. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  700. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  701. INIT_LIST_HEAD(&sp->oos_link);
  702. bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
  703. sp->multimapped = 0;
  704. sp->parent_pte = parent_pte;
  705. --vcpu->kvm->arch.n_free_mmu_pages;
  706. return sp;
  707. }
  708. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  709. struct kvm_mmu_page *sp, u64 *parent_pte)
  710. {
  711. struct kvm_pte_chain *pte_chain;
  712. struct hlist_node *node;
  713. int i;
  714. if (!parent_pte)
  715. return;
  716. if (!sp->multimapped) {
  717. u64 *old = sp->parent_pte;
  718. if (!old) {
  719. sp->parent_pte = parent_pte;
  720. return;
  721. }
  722. sp->multimapped = 1;
  723. pte_chain = mmu_alloc_pte_chain(vcpu);
  724. INIT_HLIST_HEAD(&sp->parent_ptes);
  725. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  726. pte_chain->parent_ptes[0] = old;
  727. }
  728. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  729. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  730. continue;
  731. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  732. if (!pte_chain->parent_ptes[i]) {
  733. pte_chain->parent_ptes[i] = parent_pte;
  734. return;
  735. }
  736. }
  737. pte_chain = mmu_alloc_pte_chain(vcpu);
  738. BUG_ON(!pte_chain);
  739. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  740. pte_chain->parent_ptes[0] = parent_pte;
  741. }
  742. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  743. u64 *parent_pte)
  744. {
  745. struct kvm_pte_chain *pte_chain;
  746. struct hlist_node *node;
  747. int i;
  748. if (!sp->multimapped) {
  749. BUG_ON(sp->parent_pte != parent_pte);
  750. sp->parent_pte = NULL;
  751. return;
  752. }
  753. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  754. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  755. if (!pte_chain->parent_ptes[i])
  756. break;
  757. if (pte_chain->parent_ptes[i] != parent_pte)
  758. continue;
  759. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  760. && pte_chain->parent_ptes[i + 1]) {
  761. pte_chain->parent_ptes[i]
  762. = pte_chain->parent_ptes[i + 1];
  763. ++i;
  764. }
  765. pte_chain->parent_ptes[i] = NULL;
  766. if (i == 0) {
  767. hlist_del(&pte_chain->link);
  768. mmu_free_pte_chain(pte_chain);
  769. if (hlist_empty(&sp->parent_ptes)) {
  770. sp->multimapped = 0;
  771. sp->parent_pte = NULL;
  772. }
  773. }
  774. return;
  775. }
  776. BUG();
  777. }
  778. static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
  779. mmu_parent_walk_fn fn)
  780. {
  781. struct kvm_pte_chain *pte_chain;
  782. struct hlist_node *node;
  783. struct kvm_mmu_page *parent_sp;
  784. int i;
  785. if (!sp->multimapped && sp->parent_pte) {
  786. parent_sp = page_header(__pa(sp->parent_pte));
  787. fn(vcpu, parent_sp);
  788. mmu_parent_walk(vcpu, parent_sp, fn);
  789. return;
  790. }
  791. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  792. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  793. if (!pte_chain->parent_ptes[i])
  794. break;
  795. parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
  796. fn(vcpu, parent_sp);
  797. mmu_parent_walk(vcpu, parent_sp, fn);
  798. }
  799. }
  800. static void kvm_mmu_update_unsync_bitmap(u64 *spte)
  801. {
  802. unsigned int index;
  803. struct kvm_mmu_page *sp = page_header(__pa(spte));
  804. index = spte - sp->spt;
  805. if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
  806. sp->unsync_children++;
  807. WARN_ON(!sp->unsync_children);
  808. }
  809. static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
  810. {
  811. struct kvm_pte_chain *pte_chain;
  812. struct hlist_node *node;
  813. int i;
  814. if (!sp->parent_pte)
  815. return;
  816. if (!sp->multimapped) {
  817. kvm_mmu_update_unsync_bitmap(sp->parent_pte);
  818. return;
  819. }
  820. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  821. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  822. if (!pte_chain->parent_ptes[i])
  823. break;
  824. kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
  825. }
  826. }
  827. static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  828. {
  829. kvm_mmu_update_parents_unsync(sp);
  830. return 1;
  831. }
  832. static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
  833. struct kvm_mmu_page *sp)
  834. {
  835. mmu_parent_walk(vcpu, sp, unsync_walk_fn);
  836. kvm_mmu_update_parents_unsync(sp);
  837. }
  838. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  839. struct kvm_mmu_page *sp)
  840. {
  841. int i;
  842. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  843. sp->spt[i] = shadow_trap_nonpresent_pte;
  844. }
  845. static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
  846. struct kvm_mmu_page *sp)
  847. {
  848. return 1;
  849. }
  850. static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  851. {
  852. }
  853. #define KVM_PAGE_ARRAY_NR 16
  854. struct kvm_mmu_pages {
  855. struct mmu_page_and_offset {
  856. struct kvm_mmu_page *sp;
  857. unsigned int idx;
  858. } page[KVM_PAGE_ARRAY_NR];
  859. unsigned int nr;
  860. };
  861. #define for_each_unsync_children(bitmap, idx) \
  862. for (idx = find_first_bit(bitmap, 512); \
  863. idx < 512; \
  864. idx = find_next_bit(bitmap, 512, idx+1))
  865. static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
  866. int idx)
  867. {
  868. int i;
  869. if (sp->unsync)
  870. for (i=0; i < pvec->nr; i++)
  871. if (pvec->page[i].sp == sp)
  872. return 0;
  873. pvec->page[pvec->nr].sp = sp;
  874. pvec->page[pvec->nr].idx = idx;
  875. pvec->nr++;
  876. return (pvec->nr == KVM_PAGE_ARRAY_NR);
  877. }
  878. static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
  879. struct kvm_mmu_pages *pvec)
  880. {
  881. int i, ret, nr_unsync_leaf = 0;
  882. for_each_unsync_children(sp->unsync_child_bitmap, i) {
  883. u64 ent = sp->spt[i];
  884. if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
  885. struct kvm_mmu_page *child;
  886. child = page_header(ent & PT64_BASE_ADDR_MASK);
  887. if (child->unsync_children) {
  888. if (mmu_pages_add(pvec, child, i))
  889. return -ENOSPC;
  890. ret = __mmu_unsync_walk(child, pvec);
  891. if (!ret)
  892. __clear_bit(i, sp->unsync_child_bitmap);
  893. else if (ret > 0)
  894. nr_unsync_leaf += ret;
  895. else
  896. return ret;
  897. }
  898. if (child->unsync) {
  899. nr_unsync_leaf++;
  900. if (mmu_pages_add(pvec, child, i))
  901. return -ENOSPC;
  902. }
  903. }
  904. }
  905. if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
  906. sp->unsync_children = 0;
  907. return nr_unsync_leaf;
  908. }
  909. static int mmu_unsync_walk(struct kvm_mmu_page *sp,
  910. struct kvm_mmu_pages *pvec)
  911. {
  912. if (!sp->unsync_children)
  913. return 0;
  914. mmu_pages_add(pvec, sp, 0);
  915. return __mmu_unsync_walk(sp, pvec);
  916. }
  917. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  918. {
  919. unsigned index;
  920. struct hlist_head *bucket;
  921. struct kvm_mmu_page *sp;
  922. struct hlist_node *node;
  923. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  924. index = kvm_page_table_hashfn(gfn);
  925. bucket = &kvm->arch.mmu_page_hash[index];
  926. hlist_for_each_entry(sp, node, bucket, hash_link)
  927. if (sp->gfn == gfn && !sp->role.direct
  928. && !sp->role.invalid) {
  929. pgprintk("%s: found role %x\n",
  930. __func__, sp->role.word);
  931. return sp;
  932. }
  933. return NULL;
  934. }
  935. static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  936. {
  937. WARN_ON(!sp->unsync);
  938. sp->unsync = 0;
  939. --kvm->stat.mmu_unsync;
  940. }
  941. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
  942. static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  943. {
  944. if (sp->role.glevels != vcpu->arch.mmu.root_level) {
  945. kvm_mmu_zap_page(vcpu->kvm, sp);
  946. return 1;
  947. }
  948. trace_kvm_mmu_sync_page(sp);
  949. if (rmap_write_protect(vcpu->kvm, sp->gfn))
  950. kvm_flush_remote_tlbs(vcpu->kvm);
  951. kvm_unlink_unsync_page(vcpu->kvm, sp);
  952. if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
  953. kvm_mmu_zap_page(vcpu->kvm, sp);
  954. return 1;
  955. }
  956. kvm_mmu_flush_tlb(vcpu);
  957. return 0;
  958. }
  959. struct mmu_page_path {
  960. struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
  961. unsigned int idx[PT64_ROOT_LEVEL-1];
  962. };
  963. #define for_each_sp(pvec, sp, parents, i) \
  964. for (i = mmu_pages_next(&pvec, &parents, -1), \
  965. sp = pvec.page[i].sp; \
  966. i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
  967. i = mmu_pages_next(&pvec, &parents, i))
  968. static int mmu_pages_next(struct kvm_mmu_pages *pvec,
  969. struct mmu_page_path *parents,
  970. int i)
  971. {
  972. int n;
  973. for (n = i+1; n < pvec->nr; n++) {
  974. struct kvm_mmu_page *sp = pvec->page[n].sp;
  975. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  976. parents->idx[0] = pvec->page[n].idx;
  977. return n;
  978. }
  979. parents->parent[sp->role.level-2] = sp;
  980. parents->idx[sp->role.level-1] = pvec->page[n].idx;
  981. }
  982. return n;
  983. }
  984. static void mmu_pages_clear_parents(struct mmu_page_path *parents)
  985. {
  986. struct kvm_mmu_page *sp;
  987. unsigned int level = 0;
  988. do {
  989. unsigned int idx = parents->idx[level];
  990. sp = parents->parent[level];
  991. if (!sp)
  992. return;
  993. --sp->unsync_children;
  994. WARN_ON((int)sp->unsync_children < 0);
  995. __clear_bit(idx, sp->unsync_child_bitmap);
  996. level++;
  997. } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
  998. }
  999. static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
  1000. struct mmu_page_path *parents,
  1001. struct kvm_mmu_pages *pvec)
  1002. {
  1003. parents->parent[parent->role.level-1] = NULL;
  1004. pvec->nr = 0;
  1005. }
  1006. static void mmu_sync_children(struct kvm_vcpu *vcpu,
  1007. struct kvm_mmu_page *parent)
  1008. {
  1009. int i;
  1010. struct kvm_mmu_page *sp;
  1011. struct mmu_page_path parents;
  1012. struct kvm_mmu_pages pages;
  1013. kvm_mmu_pages_init(parent, &parents, &pages);
  1014. while (mmu_unsync_walk(parent, &pages)) {
  1015. int protected = 0;
  1016. for_each_sp(pages, sp, parents, i)
  1017. protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
  1018. if (protected)
  1019. kvm_flush_remote_tlbs(vcpu->kvm);
  1020. for_each_sp(pages, sp, parents, i) {
  1021. kvm_sync_page(vcpu, sp);
  1022. mmu_pages_clear_parents(&parents);
  1023. }
  1024. cond_resched_lock(&vcpu->kvm->mmu_lock);
  1025. kvm_mmu_pages_init(parent, &parents, &pages);
  1026. }
  1027. }
  1028. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  1029. gfn_t gfn,
  1030. gva_t gaddr,
  1031. unsigned level,
  1032. int direct,
  1033. unsigned access,
  1034. u64 *parent_pte)
  1035. {
  1036. union kvm_mmu_page_role role;
  1037. unsigned index;
  1038. unsigned quadrant;
  1039. struct hlist_head *bucket;
  1040. struct kvm_mmu_page *sp;
  1041. struct hlist_node *node, *tmp;
  1042. role = vcpu->arch.mmu.base_role;
  1043. role.level = level;
  1044. role.direct = direct;
  1045. role.access = access;
  1046. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  1047. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  1048. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  1049. role.quadrant = quadrant;
  1050. }
  1051. index = kvm_page_table_hashfn(gfn);
  1052. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1053. hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
  1054. if (sp->gfn == gfn) {
  1055. if (sp->unsync)
  1056. if (kvm_sync_page(vcpu, sp))
  1057. continue;
  1058. if (sp->role.word != role.word)
  1059. continue;
  1060. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  1061. if (sp->unsync_children) {
  1062. set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
  1063. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1064. }
  1065. trace_kvm_mmu_get_page(sp, false);
  1066. return sp;
  1067. }
  1068. ++vcpu->kvm->stat.mmu_cache_miss;
  1069. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  1070. if (!sp)
  1071. return sp;
  1072. sp->gfn = gfn;
  1073. sp->role = role;
  1074. hlist_add_head(&sp->hash_link, bucket);
  1075. if (!direct) {
  1076. if (rmap_write_protect(vcpu->kvm, gfn))
  1077. kvm_flush_remote_tlbs(vcpu->kvm);
  1078. account_shadowed(vcpu->kvm, gfn);
  1079. }
  1080. if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
  1081. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  1082. else
  1083. nonpaging_prefetch_page(vcpu, sp);
  1084. trace_kvm_mmu_get_page(sp, true);
  1085. return sp;
  1086. }
  1087. static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
  1088. struct kvm_vcpu *vcpu, u64 addr)
  1089. {
  1090. iterator->addr = addr;
  1091. iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
  1092. iterator->level = vcpu->arch.mmu.shadow_root_level;
  1093. if (iterator->level == PT32E_ROOT_LEVEL) {
  1094. iterator->shadow_addr
  1095. = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
  1096. iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
  1097. --iterator->level;
  1098. if (!iterator->shadow_addr)
  1099. iterator->level = 0;
  1100. }
  1101. }
  1102. static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
  1103. {
  1104. if (iterator->level < PT_PAGE_TABLE_LEVEL)
  1105. return false;
  1106. if (iterator->level == PT_PAGE_TABLE_LEVEL)
  1107. if (is_large_pte(*iterator->sptep))
  1108. return false;
  1109. iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
  1110. iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
  1111. return true;
  1112. }
  1113. static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
  1114. {
  1115. iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
  1116. --iterator->level;
  1117. }
  1118. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  1119. struct kvm_mmu_page *sp)
  1120. {
  1121. unsigned i;
  1122. u64 *pt;
  1123. u64 ent;
  1124. pt = sp->spt;
  1125. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1126. ent = pt[i];
  1127. if (is_shadow_present_pte(ent)) {
  1128. if (!is_last_spte(ent, sp->role.level)) {
  1129. ent &= PT64_BASE_ADDR_MASK;
  1130. mmu_page_remove_parent_pte(page_header(ent),
  1131. &pt[i]);
  1132. } else {
  1133. if (is_large_pte(ent))
  1134. --kvm->stat.lpages;
  1135. rmap_remove(kvm, &pt[i]);
  1136. }
  1137. }
  1138. pt[i] = shadow_trap_nonpresent_pte;
  1139. }
  1140. }
  1141. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  1142. {
  1143. mmu_page_remove_parent_pte(sp, parent_pte);
  1144. }
  1145. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  1146. {
  1147. int i;
  1148. struct kvm_vcpu *vcpu;
  1149. kvm_for_each_vcpu(i, vcpu, kvm)
  1150. vcpu->arch.last_pte_updated = NULL;
  1151. }
  1152. static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
  1153. {
  1154. u64 *parent_pte;
  1155. while (sp->multimapped || sp->parent_pte) {
  1156. if (!sp->multimapped)
  1157. parent_pte = sp->parent_pte;
  1158. else {
  1159. struct kvm_pte_chain *chain;
  1160. chain = container_of(sp->parent_ptes.first,
  1161. struct kvm_pte_chain, link);
  1162. parent_pte = chain->parent_ptes[0];
  1163. }
  1164. BUG_ON(!parent_pte);
  1165. kvm_mmu_put_page(sp, parent_pte);
  1166. __set_spte(parent_pte, shadow_trap_nonpresent_pte);
  1167. }
  1168. }
  1169. static int mmu_zap_unsync_children(struct kvm *kvm,
  1170. struct kvm_mmu_page *parent)
  1171. {
  1172. int i, zapped = 0;
  1173. struct mmu_page_path parents;
  1174. struct kvm_mmu_pages pages;
  1175. if (parent->role.level == PT_PAGE_TABLE_LEVEL)
  1176. return 0;
  1177. kvm_mmu_pages_init(parent, &parents, &pages);
  1178. while (mmu_unsync_walk(parent, &pages)) {
  1179. struct kvm_mmu_page *sp;
  1180. for_each_sp(pages, sp, parents, i) {
  1181. kvm_mmu_zap_page(kvm, sp);
  1182. mmu_pages_clear_parents(&parents);
  1183. }
  1184. zapped += pages.nr;
  1185. kvm_mmu_pages_init(parent, &parents, &pages);
  1186. }
  1187. return zapped;
  1188. }
  1189. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  1190. {
  1191. int ret;
  1192. trace_kvm_mmu_zap_page(sp);
  1193. ++kvm->stat.mmu_shadow_zapped;
  1194. ret = mmu_zap_unsync_children(kvm, sp);
  1195. kvm_mmu_page_unlink_children(kvm, sp);
  1196. kvm_mmu_unlink_parents(kvm, sp);
  1197. kvm_flush_remote_tlbs(kvm);
  1198. if (!sp->role.invalid && !sp->role.direct)
  1199. unaccount_shadowed(kvm, sp->gfn);
  1200. if (sp->unsync)
  1201. kvm_unlink_unsync_page(kvm, sp);
  1202. if (!sp->root_count) {
  1203. hlist_del(&sp->hash_link);
  1204. kvm_mmu_free_page(kvm, sp);
  1205. } else {
  1206. sp->role.invalid = 1;
  1207. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  1208. kvm_reload_remote_mmus(kvm);
  1209. }
  1210. kvm_mmu_reset_last_pte_updated(kvm);
  1211. return ret;
  1212. }
  1213. /*
  1214. * Changing the number of mmu pages allocated to the vm
  1215. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  1216. */
  1217. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  1218. {
  1219. int used_pages;
  1220. used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
  1221. used_pages = max(0, used_pages);
  1222. /*
  1223. * If we set the number of mmu pages to be smaller be than the
  1224. * number of actived pages , we must to free some mmu pages before we
  1225. * change the value
  1226. */
  1227. if (used_pages > kvm_nr_mmu_pages) {
  1228. while (used_pages > kvm_nr_mmu_pages) {
  1229. struct kvm_mmu_page *page;
  1230. page = container_of(kvm->arch.active_mmu_pages.prev,
  1231. struct kvm_mmu_page, link);
  1232. kvm_mmu_zap_page(kvm, page);
  1233. used_pages--;
  1234. }
  1235. kvm->arch.n_free_mmu_pages = 0;
  1236. }
  1237. else
  1238. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  1239. - kvm->arch.n_alloc_mmu_pages;
  1240. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  1241. }
  1242. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  1243. {
  1244. unsigned index;
  1245. struct hlist_head *bucket;
  1246. struct kvm_mmu_page *sp;
  1247. struct hlist_node *node, *n;
  1248. int r;
  1249. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  1250. r = 0;
  1251. index = kvm_page_table_hashfn(gfn);
  1252. bucket = &kvm->arch.mmu_page_hash[index];
  1253. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  1254. if (sp->gfn == gfn && !sp->role.direct) {
  1255. pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
  1256. sp->role.word);
  1257. r = 1;
  1258. if (kvm_mmu_zap_page(kvm, sp))
  1259. n = bucket->first;
  1260. }
  1261. return r;
  1262. }
  1263. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  1264. {
  1265. unsigned index;
  1266. struct hlist_head *bucket;
  1267. struct kvm_mmu_page *sp;
  1268. struct hlist_node *node, *nn;
  1269. index = kvm_page_table_hashfn(gfn);
  1270. bucket = &kvm->arch.mmu_page_hash[index];
  1271. hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
  1272. if (sp->gfn == gfn && !sp->role.direct
  1273. && !sp->role.invalid) {
  1274. pgprintk("%s: zap %lx %x\n",
  1275. __func__, gfn, sp->role.word);
  1276. kvm_mmu_zap_page(kvm, sp);
  1277. }
  1278. }
  1279. }
  1280. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  1281. {
  1282. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  1283. struct kvm_mmu_page *sp = page_header(__pa(pte));
  1284. __set_bit(slot, sp->slot_bitmap);
  1285. }
  1286. static void mmu_convert_notrap(struct kvm_mmu_page *sp)
  1287. {
  1288. int i;
  1289. u64 *pt = sp->spt;
  1290. if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
  1291. return;
  1292. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1293. if (pt[i] == shadow_notrap_nonpresent_pte)
  1294. __set_spte(&pt[i], shadow_trap_nonpresent_pte);
  1295. }
  1296. }
  1297. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  1298. {
  1299. struct page *page;
  1300. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1301. if (gpa == UNMAPPED_GVA)
  1302. return NULL;
  1303. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1304. return page;
  1305. }
  1306. /*
  1307. * The function is based on mtrr_type_lookup() in
  1308. * arch/x86/kernel/cpu/mtrr/generic.c
  1309. */
  1310. static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
  1311. u64 start, u64 end)
  1312. {
  1313. int i;
  1314. u64 base, mask;
  1315. u8 prev_match, curr_match;
  1316. int num_var_ranges = KVM_NR_VAR_MTRR;
  1317. if (!mtrr_state->enabled)
  1318. return 0xFF;
  1319. /* Make end inclusive end, instead of exclusive */
  1320. end--;
  1321. /* Look in fixed ranges. Just return the type as per start */
  1322. if (mtrr_state->have_fixed && (start < 0x100000)) {
  1323. int idx;
  1324. if (start < 0x80000) {
  1325. idx = 0;
  1326. idx += (start >> 16);
  1327. return mtrr_state->fixed_ranges[idx];
  1328. } else if (start < 0xC0000) {
  1329. idx = 1 * 8;
  1330. idx += ((start - 0x80000) >> 14);
  1331. return mtrr_state->fixed_ranges[idx];
  1332. } else if (start < 0x1000000) {
  1333. idx = 3 * 8;
  1334. idx += ((start - 0xC0000) >> 12);
  1335. return mtrr_state->fixed_ranges[idx];
  1336. }
  1337. }
  1338. /*
  1339. * Look in variable ranges
  1340. * Look of multiple ranges matching this address and pick type
  1341. * as per MTRR precedence
  1342. */
  1343. if (!(mtrr_state->enabled & 2))
  1344. return mtrr_state->def_type;
  1345. prev_match = 0xFF;
  1346. for (i = 0; i < num_var_ranges; ++i) {
  1347. unsigned short start_state, end_state;
  1348. if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
  1349. continue;
  1350. base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
  1351. (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
  1352. mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
  1353. (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
  1354. start_state = ((start & mask) == (base & mask));
  1355. end_state = ((end & mask) == (base & mask));
  1356. if (start_state != end_state)
  1357. return 0xFE;
  1358. if ((start & mask) != (base & mask))
  1359. continue;
  1360. curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
  1361. if (prev_match == 0xFF) {
  1362. prev_match = curr_match;
  1363. continue;
  1364. }
  1365. if (prev_match == MTRR_TYPE_UNCACHABLE ||
  1366. curr_match == MTRR_TYPE_UNCACHABLE)
  1367. return MTRR_TYPE_UNCACHABLE;
  1368. if ((prev_match == MTRR_TYPE_WRBACK &&
  1369. curr_match == MTRR_TYPE_WRTHROUGH) ||
  1370. (prev_match == MTRR_TYPE_WRTHROUGH &&
  1371. curr_match == MTRR_TYPE_WRBACK)) {
  1372. prev_match = MTRR_TYPE_WRTHROUGH;
  1373. curr_match = MTRR_TYPE_WRTHROUGH;
  1374. }
  1375. if (prev_match != curr_match)
  1376. return MTRR_TYPE_UNCACHABLE;
  1377. }
  1378. if (prev_match != 0xFF)
  1379. return prev_match;
  1380. return mtrr_state->def_type;
  1381. }
  1382. u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
  1383. {
  1384. u8 mtrr;
  1385. mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
  1386. (gfn << PAGE_SHIFT) + PAGE_SIZE);
  1387. if (mtrr == 0xfe || mtrr == 0xff)
  1388. mtrr = MTRR_TYPE_WRBACK;
  1389. return mtrr;
  1390. }
  1391. EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
  1392. static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  1393. {
  1394. unsigned index;
  1395. struct hlist_head *bucket;
  1396. struct kvm_mmu_page *s;
  1397. struct hlist_node *node, *n;
  1398. trace_kvm_mmu_unsync_page(sp);
  1399. index = kvm_page_table_hashfn(sp->gfn);
  1400. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1401. /* don't unsync if pagetable is shadowed with multiple roles */
  1402. hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
  1403. if (s->gfn != sp->gfn || s->role.direct)
  1404. continue;
  1405. if (s->role.word != sp->role.word)
  1406. return 1;
  1407. }
  1408. ++vcpu->kvm->stat.mmu_unsync;
  1409. sp->unsync = 1;
  1410. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1411. mmu_convert_notrap(sp);
  1412. return 0;
  1413. }
  1414. static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
  1415. bool can_unsync)
  1416. {
  1417. struct kvm_mmu_page *shadow;
  1418. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  1419. if (shadow) {
  1420. if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
  1421. return 1;
  1422. if (shadow->unsync)
  1423. return 0;
  1424. if (can_unsync && oos_shadow)
  1425. return kvm_unsync_page(vcpu, shadow);
  1426. return 1;
  1427. }
  1428. return 0;
  1429. }
  1430. static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
  1431. unsigned pte_access, int user_fault,
  1432. int write_fault, int dirty, int largepage,
  1433. gfn_t gfn, pfn_t pfn, bool speculative,
  1434. bool can_unsync)
  1435. {
  1436. u64 spte;
  1437. int ret = 0;
  1438. /*
  1439. * We don't set the accessed bit, since we sometimes want to see
  1440. * whether the guest actually used the pte (in order to detect
  1441. * demand paging).
  1442. */
  1443. spte = shadow_base_present_pte | shadow_dirty_mask;
  1444. if (!speculative)
  1445. spte |= shadow_accessed_mask;
  1446. if (!dirty)
  1447. pte_access &= ~ACC_WRITE_MASK;
  1448. if (pte_access & ACC_EXEC_MASK)
  1449. spte |= shadow_x_mask;
  1450. else
  1451. spte |= shadow_nx_mask;
  1452. if (pte_access & ACC_USER_MASK)
  1453. spte |= shadow_user_mask;
  1454. if (largepage)
  1455. spte |= PT_PAGE_SIZE_MASK;
  1456. if (tdp_enabled)
  1457. spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
  1458. kvm_is_mmio_pfn(pfn));
  1459. spte |= (u64)pfn << PAGE_SHIFT;
  1460. if ((pte_access & ACC_WRITE_MASK)
  1461. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  1462. if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
  1463. ret = 1;
  1464. spte = shadow_trap_nonpresent_pte;
  1465. goto set_pte;
  1466. }
  1467. spte |= PT_WRITABLE_MASK;
  1468. /*
  1469. * Optimization: for pte sync, if spte was writable the hash
  1470. * lookup is unnecessary (and expensive). Write protection
  1471. * is responsibility of mmu_get_page / kvm_sync_page.
  1472. * Same reasoning can be applied to dirty page accounting.
  1473. */
  1474. if (!can_unsync && is_writeble_pte(*sptep))
  1475. goto set_pte;
  1476. if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
  1477. pgprintk("%s: found shadow page for %lx, marking ro\n",
  1478. __func__, gfn);
  1479. ret = 1;
  1480. pte_access &= ~ACC_WRITE_MASK;
  1481. if (is_writeble_pte(spte))
  1482. spte &= ~PT_WRITABLE_MASK;
  1483. }
  1484. }
  1485. if (pte_access & ACC_WRITE_MASK)
  1486. mark_page_dirty(vcpu->kvm, gfn);
  1487. set_pte:
  1488. __set_spte(sptep, spte);
  1489. return ret;
  1490. }
  1491. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
  1492. unsigned pt_access, unsigned pte_access,
  1493. int user_fault, int write_fault, int dirty,
  1494. int *ptwrite, int largepage, gfn_t gfn,
  1495. pfn_t pfn, bool speculative)
  1496. {
  1497. int was_rmapped = 0;
  1498. int was_writeble = is_writeble_pte(*sptep);
  1499. int rmap_count;
  1500. pgprintk("%s: spte %llx access %x write_fault %d"
  1501. " user_fault %d gfn %lx\n",
  1502. __func__, *sptep, pt_access,
  1503. write_fault, user_fault, gfn);
  1504. if (is_rmap_spte(*sptep)) {
  1505. /*
  1506. * If we overwrite a PTE page pointer with a 2MB PMD, unlink
  1507. * the parent of the now unreachable PTE.
  1508. */
  1509. if (largepage && !is_large_pte(*sptep)) {
  1510. struct kvm_mmu_page *child;
  1511. u64 pte = *sptep;
  1512. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1513. mmu_page_remove_parent_pte(child, sptep);
  1514. } else if (pfn != spte_to_pfn(*sptep)) {
  1515. pgprintk("hfn old %lx new %lx\n",
  1516. spte_to_pfn(*sptep), pfn);
  1517. rmap_remove(vcpu->kvm, sptep);
  1518. } else
  1519. was_rmapped = 1;
  1520. }
  1521. if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
  1522. dirty, largepage, gfn, pfn, speculative, true)) {
  1523. if (write_fault)
  1524. *ptwrite = 1;
  1525. kvm_x86_ops->tlb_flush(vcpu);
  1526. }
  1527. pgprintk("%s: setting spte %llx\n", __func__, *sptep);
  1528. pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
  1529. is_large_pte(*sptep)? "2MB" : "4kB",
  1530. *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
  1531. *sptep, sptep);
  1532. if (!was_rmapped && is_large_pte(*sptep))
  1533. ++vcpu->kvm->stat.lpages;
  1534. page_header_update_slot(vcpu->kvm, sptep, gfn);
  1535. if (!was_rmapped) {
  1536. rmap_count = rmap_add(vcpu, sptep, gfn, largepage);
  1537. if (!is_rmap_spte(*sptep))
  1538. kvm_release_pfn_clean(pfn);
  1539. if (rmap_count > RMAP_RECYCLE_THRESHOLD)
  1540. rmap_recycle(vcpu, gfn, largepage);
  1541. } else {
  1542. if (was_writeble)
  1543. kvm_release_pfn_dirty(pfn);
  1544. else
  1545. kvm_release_pfn_clean(pfn);
  1546. }
  1547. if (speculative) {
  1548. vcpu->arch.last_pte_updated = sptep;
  1549. vcpu->arch.last_pte_gfn = gfn;
  1550. }
  1551. }
  1552. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  1553. {
  1554. }
  1555. static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
  1556. int largepage, gfn_t gfn, pfn_t pfn)
  1557. {
  1558. struct kvm_shadow_walk_iterator iterator;
  1559. struct kvm_mmu_page *sp;
  1560. int pt_write = 0;
  1561. gfn_t pseudo_gfn;
  1562. for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
  1563. if (iterator.level == PT_PAGE_TABLE_LEVEL
  1564. || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
  1565. mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
  1566. 0, write, 1, &pt_write,
  1567. largepage, gfn, pfn, false);
  1568. ++vcpu->stat.pf_fixed;
  1569. break;
  1570. }
  1571. if (*iterator.sptep == shadow_trap_nonpresent_pte) {
  1572. pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1573. sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
  1574. iterator.level - 1,
  1575. 1, ACC_ALL, iterator.sptep);
  1576. if (!sp) {
  1577. pgprintk("nonpaging_map: ENOMEM\n");
  1578. kvm_release_pfn_clean(pfn);
  1579. return -ENOMEM;
  1580. }
  1581. __set_spte(iterator.sptep,
  1582. __pa(sp->spt)
  1583. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  1584. | shadow_user_mask | shadow_x_mask);
  1585. }
  1586. }
  1587. return pt_write;
  1588. }
  1589. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  1590. {
  1591. int r;
  1592. int largepage = 0;
  1593. pfn_t pfn;
  1594. unsigned long mmu_seq;
  1595. if (is_largepage_backed(vcpu, gfn &
  1596. ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1))) {
  1597. gfn &= ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1);
  1598. largepage = 1;
  1599. }
  1600. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1601. smp_rmb();
  1602. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1603. /* mmio */
  1604. if (is_error_pfn(pfn)) {
  1605. kvm_release_pfn_clean(pfn);
  1606. return 1;
  1607. }
  1608. spin_lock(&vcpu->kvm->mmu_lock);
  1609. if (mmu_notifier_retry(vcpu, mmu_seq))
  1610. goto out_unlock;
  1611. kvm_mmu_free_some_pages(vcpu);
  1612. r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
  1613. spin_unlock(&vcpu->kvm->mmu_lock);
  1614. return r;
  1615. out_unlock:
  1616. spin_unlock(&vcpu->kvm->mmu_lock);
  1617. kvm_release_pfn_clean(pfn);
  1618. return 0;
  1619. }
  1620. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  1621. {
  1622. int i;
  1623. struct kvm_mmu_page *sp;
  1624. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1625. return;
  1626. spin_lock(&vcpu->kvm->mmu_lock);
  1627. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1628. hpa_t root = vcpu->arch.mmu.root_hpa;
  1629. sp = page_header(root);
  1630. --sp->root_count;
  1631. if (!sp->root_count && sp->role.invalid)
  1632. kvm_mmu_zap_page(vcpu->kvm, sp);
  1633. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1634. spin_unlock(&vcpu->kvm->mmu_lock);
  1635. return;
  1636. }
  1637. for (i = 0; i < 4; ++i) {
  1638. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1639. if (root) {
  1640. root &= PT64_BASE_ADDR_MASK;
  1641. sp = page_header(root);
  1642. --sp->root_count;
  1643. if (!sp->root_count && sp->role.invalid)
  1644. kvm_mmu_zap_page(vcpu->kvm, sp);
  1645. }
  1646. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1647. }
  1648. spin_unlock(&vcpu->kvm->mmu_lock);
  1649. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1650. }
  1651. static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
  1652. {
  1653. int ret = 0;
  1654. if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
  1655. set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
  1656. ret = 1;
  1657. }
  1658. return ret;
  1659. }
  1660. static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
  1661. {
  1662. int i;
  1663. gfn_t root_gfn;
  1664. struct kvm_mmu_page *sp;
  1665. int direct = 0;
  1666. u64 pdptr;
  1667. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  1668. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1669. hpa_t root = vcpu->arch.mmu.root_hpa;
  1670. ASSERT(!VALID_PAGE(root));
  1671. if (tdp_enabled)
  1672. direct = 1;
  1673. if (mmu_check_root(vcpu, root_gfn))
  1674. return 1;
  1675. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  1676. PT64_ROOT_LEVEL, direct,
  1677. ACC_ALL, NULL);
  1678. root = __pa(sp->spt);
  1679. ++sp->root_count;
  1680. vcpu->arch.mmu.root_hpa = root;
  1681. return 0;
  1682. }
  1683. direct = !is_paging(vcpu);
  1684. if (tdp_enabled)
  1685. direct = 1;
  1686. for (i = 0; i < 4; ++i) {
  1687. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1688. ASSERT(!VALID_PAGE(root));
  1689. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  1690. pdptr = kvm_pdptr_read(vcpu, i);
  1691. if (!is_present_gpte(pdptr)) {
  1692. vcpu->arch.mmu.pae_root[i] = 0;
  1693. continue;
  1694. }
  1695. root_gfn = pdptr >> PAGE_SHIFT;
  1696. } else if (vcpu->arch.mmu.root_level == 0)
  1697. root_gfn = 0;
  1698. if (mmu_check_root(vcpu, root_gfn))
  1699. return 1;
  1700. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  1701. PT32_ROOT_LEVEL, direct,
  1702. ACC_ALL, NULL);
  1703. root = __pa(sp->spt);
  1704. ++sp->root_count;
  1705. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  1706. }
  1707. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  1708. return 0;
  1709. }
  1710. static void mmu_sync_roots(struct kvm_vcpu *vcpu)
  1711. {
  1712. int i;
  1713. struct kvm_mmu_page *sp;
  1714. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1715. return;
  1716. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1717. hpa_t root = vcpu->arch.mmu.root_hpa;
  1718. sp = page_header(root);
  1719. mmu_sync_children(vcpu, sp);
  1720. return;
  1721. }
  1722. for (i = 0; i < 4; ++i) {
  1723. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1724. if (root && VALID_PAGE(root)) {
  1725. root &= PT64_BASE_ADDR_MASK;
  1726. sp = page_header(root);
  1727. mmu_sync_children(vcpu, sp);
  1728. }
  1729. }
  1730. }
  1731. void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
  1732. {
  1733. spin_lock(&vcpu->kvm->mmu_lock);
  1734. mmu_sync_roots(vcpu);
  1735. spin_unlock(&vcpu->kvm->mmu_lock);
  1736. }
  1737. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  1738. {
  1739. return vaddr;
  1740. }
  1741. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  1742. u32 error_code)
  1743. {
  1744. gfn_t gfn;
  1745. int r;
  1746. pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
  1747. r = mmu_topup_memory_caches(vcpu);
  1748. if (r)
  1749. return r;
  1750. ASSERT(vcpu);
  1751. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1752. gfn = gva >> PAGE_SHIFT;
  1753. return nonpaging_map(vcpu, gva & PAGE_MASK,
  1754. error_code & PFERR_WRITE_MASK, gfn);
  1755. }
  1756. static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
  1757. u32 error_code)
  1758. {
  1759. pfn_t pfn;
  1760. int r;
  1761. int largepage = 0;
  1762. gfn_t gfn = gpa >> PAGE_SHIFT;
  1763. unsigned long mmu_seq;
  1764. ASSERT(vcpu);
  1765. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1766. r = mmu_topup_memory_caches(vcpu);
  1767. if (r)
  1768. return r;
  1769. if (is_largepage_backed(vcpu, gfn &
  1770. ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1))) {
  1771. gfn &= ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1);
  1772. largepage = 1;
  1773. }
  1774. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1775. smp_rmb();
  1776. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1777. if (is_error_pfn(pfn)) {
  1778. kvm_release_pfn_clean(pfn);
  1779. return 1;
  1780. }
  1781. spin_lock(&vcpu->kvm->mmu_lock);
  1782. if (mmu_notifier_retry(vcpu, mmu_seq))
  1783. goto out_unlock;
  1784. kvm_mmu_free_some_pages(vcpu);
  1785. r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
  1786. largepage, gfn, pfn);
  1787. spin_unlock(&vcpu->kvm->mmu_lock);
  1788. return r;
  1789. out_unlock:
  1790. spin_unlock(&vcpu->kvm->mmu_lock);
  1791. kvm_release_pfn_clean(pfn);
  1792. return 0;
  1793. }
  1794. static void nonpaging_free(struct kvm_vcpu *vcpu)
  1795. {
  1796. mmu_free_roots(vcpu);
  1797. }
  1798. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  1799. {
  1800. struct kvm_mmu *context = &vcpu->arch.mmu;
  1801. context->new_cr3 = nonpaging_new_cr3;
  1802. context->page_fault = nonpaging_page_fault;
  1803. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1804. context->free = nonpaging_free;
  1805. context->prefetch_page = nonpaging_prefetch_page;
  1806. context->sync_page = nonpaging_sync_page;
  1807. context->invlpg = nonpaging_invlpg;
  1808. context->root_level = 0;
  1809. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1810. context->root_hpa = INVALID_PAGE;
  1811. return 0;
  1812. }
  1813. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1814. {
  1815. ++vcpu->stat.tlb_flush;
  1816. kvm_x86_ops->tlb_flush(vcpu);
  1817. }
  1818. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  1819. {
  1820. pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
  1821. mmu_free_roots(vcpu);
  1822. }
  1823. static void inject_page_fault(struct kvm_vcpu *vcpu,
  1824. u64 addr,
  1825. u32 err_code)
  1826. {
  1827. kvm_inject_page_fault(vcpu, addr, err_code);
  1828. }
  1829. static void paging_free(struct kvm_vcpu *vcpu)
  1830. {
  1831. nonpaging_free(vcpu);
  1832. }
  1833. static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
  1834. {
  1835. int bit7;
  1836. bit7 = (gpte >> 7) & 1;
  1837. return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
  1838. }
  1839. #define PTTYPE 64
  1840. #include "paging_tmpl.h"
  1841. #undef PTTYPE
  1842. #define PTTYPE 32
  1843. #include "paging_tmpl.h"
  1844. #undef PTTYPE
  1845. static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
  1846. {
  1847. struct kvm_mmu *context = &vcpu->arch.mmu;
  1848. int maxphyaddr = cpuid_maxphyaddr(vcpu);
  1849. u64 exb_bit_rsvd = 0;
  1850. if (!is_nx(vcpu))
  1851. exb_bit_rsvd = rsvd_bits(63, 63);
  1852. switch (level) {
  1853. case PT32_ROOT_LEVEL:
  1854. /* no rsvd bits for 2 level 4K page table entries */
  1855. context->rsvd_bits_mask[0][1] = 0;
  1856. context->rsvd_bits_mask[0][0] = 0;
  1857. if (is_cpuid_PSE36())
  1858. /* 36bits PSE 4MB page */
  1859. context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
  1860. else
  1861. /* 32 bits PSE 4MB page */
  1862. context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
  1863. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
  1864. break;
  1865. case PT32E_ROOT_LEVEL:
  1866. context->rsvd_bits_mask[0][2] =
  1867. rsvd_bits(maxphyaddr, 63) |
  1868. rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
  1869. context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
  1870. rsvd_bits(maxphyaddr, 62); /* PDE */
  1871. context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
  1872. rsvd_bits(maxphyaddr, 62); /* PTE */
  1873. context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
  1874. rsvd_bits(maxphyaddr, 62) |
  1875. rsvd_bits(13, 20); /* large page */
  1876. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
  1877. break;
  1878. case PT64_ROOT_LEVEL:
  1879. context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
  1880. rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
  1881. context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
  1882. rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
  1883. context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
  1884. rsvd_bits(maxphyaddr, 51);
  1885. context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
  1886. rsvd_bits(maxphyaddr, 51);
  1887. context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
  1888. context->rsvd_bits_mask[1][2] = context->rsvd_bits_mask[0][2];
  1889. context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
  1890. rsvd_bits(maxphyaddr, 51) |
  1891. rsvd_bits(13, 20); /* large page */
  1892. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
  1893. break;
  1894. }
  1895. }
  1896. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1897. {
  1898. struct kvm_mmu *context = &vcpu->arch.mmu;
  1899. ASSERT(is_pae(vcpu));
  1900. context->new_cr3 = paging_new_cr3;
  1901. context->page_fault = paging64_page_fault;
  1902. context->gva_to_gpa = paging64_gva_to_gpa;
  1903. context->prefetch_page = paging64_prefetch_page;
  1904. context->sync_page = paging64_sync_page;
  1905. context->invlpg = paging64_invlpg;
  1906. context->free = paging_free;
  1907. context->root_level = level;
  1908. context->shadow_root_level = level;
  1909. context->root_hpa = INVALID_PAGE;
  1910. return 0;
  1911. }
  1912. static int paging64_init_context(struct kvm_vcpu *vcpu)
  1913. {
  1914. reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
  1915. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  1916. }
  1917. static int paging32_init_context(struct kvm_vcpu *vcpu)
  1918. {
  1919. struct kvm_mmu *context = &vcpu->arch.mmu;
  1920. reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
  1921. context->new_cr3 = paging_new_cr3;
  1922. context->page_fault = paging32_page_fault;
  1923. context->gva_to_gpa = paging32_gva_to_gpa;
  1924. context->free = paging_free;
  1925. context->prefetch_page = paging32_prefetch_page;
  1926. context->sync_page = paging32_sync_page;
  1927. context->invlpg = paging32_invlpg;
  1928. context->root_level = PT32_ROOT_LEVEL;
  1929. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1930. context->root_hpa = INVALID_PAGE;
  1931. return 0;
  1932. }
  1933. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  1934. {
  1935. reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
  1936. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  1937. }
  1938. static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
  1939. {
  1940. struct kvm_mmu *context = &vcpu->arch.mmu;
  1941. context->new_cr3 = nonpaging_new_cr3;
  1942. context->page_fault = tdp_page_fault;
  1943. context->free = nonpaging_free;
  1944. context->prefetch_page = nonpaging_prefetch_page;
  1945. context->sync_page = nonpaging_sync_page;
  1946. context->invlpg = nonpaging_invlpg;
  1947. context->shadow_root_level = kvm_x86_ops->get_tdp_level();
  1948. context->root_hpa = INVALID_PAGE;
  1949. if (!is_paging(vcpu)) {
  1950. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1951. context->root_level = 0;
  1952. } else if (is_long_mode(vcpu)) {
  1953. reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
  1954. context->gva_to_gpa = paging64_gva_to_gpa;
  1955. context->root_level = PT64_ROOT_LEVEL;
  1956. } else if (is_pae(vcpu)) {
  1957. reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
  1958. context->gva_to_gpa = paging64_gva_to_gpa;
  1959. context->root_level = PT32E_ROOT_LEVEL;
  1960. } else {
  1961. reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
  1962. context->gva_to_gpa = paging32_gva_to_gpa;
  1963. context->root_level = PT32_ROOT_LEVEL;
  1964. }
  1965. return 0;
  1966. }
  1967. static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
  1968. {
  1969. int r;
  1970. ASSERT(vcpu);
  1971. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1972. if (!is_paging(vcpu))
  1973. r = nonpaging_init_context(vcpu);
  1974. else if (is_long_mode(vcpu))
  1975. r = paging64_init_context(vcpu);
  1976. else if (is_pae(vcpu))
  1977. r = paging32E_init_context(vcpu);
  1978. else
  1979. r = paging32_init_context(vcpu);
  1980. vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
  1981. return r;
  1982. }
  1983. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  1984. {
  1985. vcpu->arch.update_pte.pfn = bad_pfn;
  1986. if (tdp_enabled)
  1987. return init_kvm_tdp_mmu(vcpu);
  1988. else
  1989. return init_kvm_softmmu(vcpu);
  1990. }
  1991. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1992. {
  1993. ASSERT(vcpu);
  1994. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  1995. vcpu->arch.mmu.free(vcpu);
  1996. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1997. }
  1998. }
  1999. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  2000. {
  2001. destroy_kvm_mmu(vcpu);
  2002. return init_kvm_mmu(vcpu);
  2003. }
  2004. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  2005. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  2006. {
  2007. int r;
  2008. r = mmu_topup_memory_caches(vcpu);
  2009. if (r)
  2010. goto out;
  2011. spin_lock(&vcpu->kvm->mmu_lock);
  2012. kvm_mmu_free_some_pages(vcpu);
  2013. r = mmu_alloc_roots(vcpu);
  2014. mmu_sync_roots(vcpu);
  2015. spin_unlock(&vcpu->kvm->mmu_lock);
  2016. if (r)
  2017. goto out;
  2018. /* set_cr3() should ensure TLB has been flushed */
  2019. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  2020. out:
  2021. return r;
  2022. }
  2023. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  2024. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  2025. {
  2026. mmu_free_roots(vcpu);
  2027. }
  2028. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  2029. struct kvm_mmu_page *sp,
  2030. u64 *spte)
  2031. {
  2032. u64 pte;
  2033. struct kvm_mmu_page *child;
  2034. pte = *spte;
  2035. if (is_shadow_present_pte(pte)) {
  2036. if (is_last_spte(pte, sp->role.level))
  2037. rmap_remove(vcpu->kvm, spte);
  2038. else {
  2039. child = page_header(pte & PT64_BASE_ADDR_MASK);
  2040. mmu_page_remove_parent_pte(child, spte);
  2041. }
  2042. }
  2043. __set_spte(spte, shadow_trap_nonpresent_pte);
  2044. if (is_large_pte(pte))
  2045. --vcpu->kvm->stat.lpages;
  2046. }
  2047. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  2048. struct kvm_mmu_page *sp,
  2049. u64 *spte,
  2050. const void *new)
  2051. {
  2052. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  2053. if (!vcpu->arch.update_pte.largepage ||
  2054. sp->role.glevels == PT32_ROOT_LEVEL) {
  2055. ++vcpu->kvm->stat.mmu_pde_zapped;
  2056. return;
  2057. }
  2058. }
  2059. ++vcpu->kvm->stat.mmu_pte_updated;
  2060. if (sp->role.glevels == PT32_ROOT_LEVEL)
  2061. paging32_update_pte(vcpu, sp, spte, new);
  2062. else
  2063. paging64_update_pte(vcpu, sp, spte, new);
  2064. }
  2065. static bool need_remote_flush(u64 old, u64 new)
  2066. {
  2067. if (!is_shadow_present_pte(old))
  2068. return false;
  2069. if (!is_shadow_present_pte(new))
  2070. return true;
  2071. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  2072. return true;
  2073. old ^= PT64_NX_MASK;
  2074. new ^= PT64_NX_MASK;
  2075. return (old & ~new & PT64_PERM_MASK) != 0;
  2076. }
  2077. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  2078. {
  2079. if (need_remote_flush(old, new))
  2080. kvm_flush_remote_tlbs(vcpu->kvm);
  2081. else
  2082. kvm_mmu_flush_tlb(vcpu);
  2083. }
  2084. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  2085. {
  2086. u64 *spte = vcpu->arch.last_pte_updated;
  2087. return !!(spte && (*spte & shadow_accessed_mask));
  2088. }
  2089. static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2090. const u8 *new, int bytes)
  2091. {
  2092. gfn_t gfn;
  2093. int r;
  2094. u64 gpte = 0;
  2095. pfn_t pfn;
  2096. vcpu->arch.update_pte.largepage = 0;
  2097. if (bytes != 4 && bytes != 8)
  2098. return;
  2099. /*
  2100. * Assume that the pte write on a page table of the same type
  2101. * as the current vcpu paging mode. This is nearly always true
  2102. * (might be false while changing modes). Note it is verified later
  2103. * by update_pte().
  2104. */
  2105. if (is_pae(vcpu)) {
  2106. /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
  2107. if ((bytes == 4) && (gpa % 4 == 0)) {
  2108. r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
  2109. if (r)
  2110. return;
  2111. memcpy((void *)&gpte + (gpa % 8), new, 4);
  2112. } else if ((bytes == 8) && (gpa % 8 == 0)) {
  2113. memcpy((void *)&gpte, new, 8);
  2114. }
  2115. } else {
  2116. if ((bytes == 4) && (gpa % 4 == 0))
  2117. memcpy((void *)&gpte, new, 4);
  2118. }
  2119. if (!is_present_gpte(gpte))
  2120. return;
  2121. gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  2122. if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
  2123. gfn &= ~(KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL) - 1);
  2124. vcpu->arch.update_pte.largepage = 1;
  2125. }
  2126. vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
  2127. smp_rmb();
  2128. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  2129. if (is_error_pfn(pfn)) {
  2130. kvm_release_pfn_clean(pfn);
  2131. return;
  2132. }
  2133. vcpu->arch.update_pte.gfn = gfn;
  2134. vcpu->arch.update_pte.pfn = pfn;
  2135. }
  2136. static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  2137. {
  2138. u64 *spte = vcpu->arch.last_pte_updated;
  2139. if (spte
  2140. && vcpu->arch.last_pte_gfn == gfn
  2141. && shadow_accessed_mask
  2142. && !(*spte & shadow_accessed_mask)
  2143. && is_shadow_present_pte(*spte))
  2144. set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  2145. }
  2146. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2147. const u8 *new, int bytes,
  2148. bool guest_initiated)
  2149. {
  2150. gfn_t gfn = gpa >> PAGE_SHIFT;
  2151. struct kvm_mmu_page *sp;
  2152. struct hlist_node *node, *n;
  2153. struct hlist_head *bucket;
  2154. unsigned index;
  2155. u64 entry, gentry;
  2156. u64 *spte;
  2157. unsigned offset = offset_in_page(gpa);
  2158. unsigned pte_size;
  2159. unsigned page_offset;
  2160. unsigned misaligned;
  2161. unsigned quadrant;
  2162. int level;
  2163. int flooded = 0;
  2164. int npte;
  2165. int r;
  2166. pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
  2167. mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
  2168. spin_lock(&vcpu->kvm->mmu_lock);
  2169. kvm_mmu_access_page(vcpu, gfn);
  2170. kvm_mmu_free_some_pages(vcpu);
  2171. ++vcpu->kvm->stat.mmu_pte_write;
  2172. kvm_mmu_audit(vcpu, "pre pte write");
  2173. if (guest_initiated) {
  2174. if (gfn == vcpu->arch.last_pt_write_gfn
  2175. && !last_updated_pte_accessed(vcpu)) {
  2176. ++vcpu->arch.last_pt_write_count;
  2177. if (vcpu->arch.last_pt_write_count >= 3)
  2178. flooded = 1;
  2179. } else {
  2180. vcpu->arch.last_pt_write_gfn = gfn;
  2181. vcpu->arch.last_pt_write_count = 1;
  2182. vcpu->arch.last_pte_updated = NULL;
  2183. }
  2184. }
  2185. index = kvm_page_table_hashfn(gfn);
  2186. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  2187. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  2188. if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
  2189. continue;
  2190. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  2191. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  2192. misaligned |= bytes < 4;
  2193. if (misaligned || flooded) {
  2194. /*
  2195. * Misaligned accesses are too much trouble to fix
  2196. * up; also, they usually indicate a page is not used
  2197. * as a page table.
  2198. *
  2199. * If we're seeing too many writes to a page,
  2200. * it may no longer be a page table, or we may be
  2201. * forking, in which case it is better to unmap the
  2202. * page.
  2203. */
  2204. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  2205. gpa, bytes, sp->role.word);
  2206. if (kvm_mmu_zap_page(vcpu->kvm, sp))
  2207. n = bucket->first;
  2208. ++vcpu->kvm->stat.mmu_flooded;
  2209. continue;
  2210. }
  2211. page_offset = offset;
  2212. level = sp->role.level;
  2213. npte = 1;
  2214. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  2215. page_offset <<= 1; /* 32->64 */
  2216. /*
  2217. * A 32-bit pde maps 4MB while the shadow pdes map
  2218. * only 2MB. So we need to double the offset again
  2219. * and zap two pdes instead of one.
  2220. */
  2221. if (level == PT32_ROOT_LEVEL) {
  2222. page_offset &= ~7; /* kill rounding error */
  2223. page_offset <<= 1;
  2224. npte = 2;
  2225. }
  2226. quadrant = page_offset >> PAGE_SHIFT;
  2227. page_offset &= ~PAGE_MASK;
  2228. if (quadrant != sp->role.quadrant)
  2229. continue;
  2230. }
  2231. spte = &sp->spt[page_offset / sizeof(*spte)];
  2232. if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
  2233. gentry = 0;
  2234. r = kvm_read_guest_atomic(vcpu->kvm,
  2235. gpa & ~(u64)(pte_size - 1),
  2236. &gentry, pte_size);
  2237. new = (const void *)&gentry;
  2238. if (r < 0)
  2239. new = NULL;
  2240. }
  2241. while (npte--) {
  2242. entry = *spte;
  2243. mmu_pte_write_zap_pte(vcpu, sp, spte);
  2244. if (new)
  2245. mmu_pte_write_new_pte(vcpu, sp, spte, new);
  2246. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  2247. ++spte;
  2248. }
  2249. }
  2250. kvm_mmu_audit(vcpu, "post pte write");
  2251. spin_unlock(&vcpu->kvm->mmu_lock);
  2252. if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
  2253. kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
  2254. vcpu->arch.update_pte.pfn = bad_pfn;
  2255. }
  2256. }
  2257. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  2258. {
  2259. gpa_t gpa;
  2260. int r;
  2261. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  2262. spin_lock(&vcpu->kvm->mmu_lock);
  2263. r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  2264. spin_unlock(&vcpu->kvm->mmu_lock);
  2265. return r;
  2266. }
  2267. EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
  2268. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  2269. {
  2270. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
  2271. struct kvm_mmu_page *sp;
  2272. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  2273. struct kvm_mmu_page, link);
  2274. kvm_mmu_zap_page(vcpu->kvm, sp);
  2275. ++vcpu->kvm->stat.mmu_recycled;
  2276. }
  2277. }
  2278. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  2279. {
  2280. int r;
  2281. enum emulation_result er;
  2282. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  2283. if (r < 0)
  2284. goto out;
  2285. if (!r) {
  2286. r = 1;
  2287. goto out;
  2288. }
  2289. r = mmu_topup_memory_caches(vcpu);
  2290. if (r)
  2291. goto out;
  2292. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  2293. switch (er) {
  2294. case EMULATE_DONE:
  2295. return 1;
  2296. case EMULATE_DO_MMIO:
  2297. ++vcpu->stat.mmio_exits;
  2298. return 0;
  2299. case EMULATE_FAIL:
  2300. vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
  2301. vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
  2302. return 0;
  2303. default:
  2304. BUG();
  2305. }
  2306. out:
  2307. return r;
  2308. }
  2309. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  2310. void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  2311. {
  2312. vcpu->arch.mmu.invlpg(vcpu, gva);
  2313. kvm_mmu_flush_tlb(vcpu);
  2314. ++vcpu->stat.invlpg;
  2315. }
  2316. EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
  2317. void kvm_enable_tdp(void)
  2318. {
  2319. tdp_enabled = true;
  2320. }
  2321. EXPORT_SYMBOL_GPL(kvm_enable_tdp);
  2322. void kvm_disable_tdp(void)
  2323. {
  2324. tdp_enabled = false;
  2325. }
  2326. EXPORT_SYMBOL_GPL(kvm_disable_tdp);
  2327. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  2328. {
  2329. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  2330. }
  2331. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  2332. {
  2333. struct page *page;
  2334. int i;
  2335. ASSERT(vcpu);
  2336. spin_lock(&vcpu->kvm->mmu_lock);
  2337. if (vcpu->kvm->arch.n_requested_mmu_pages)
  2338. vcpu->kvm->arch.n_free_mmu_pages =
  2339. vcpu->kvm->arch.n_requested_mmu_pages;
  2340. else
  2341. vcpu->kvm->arch.n_free_mmu_pages =
  2342. vcpu->kvm->arch.n_alloc_mmu_pages;
  2343. spin_unlock(&vcpu->kvm->mmu_lock);
  2344. /*
  2345. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  2346. * Therefore we need to allocate shadow page tables in the first
  2347. * 4GB of memory, which happens to fit the DMA32 zone.
  2348. */
  2349. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  2350. if (!page)
  2351. goto error_1;
  2352. vcpu->arch.mmu.pae_root = page_address(page);
  2353. for (i = 0; i < 4; ++i)
  2354. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  2355. return 0;
  2356. error_1:
  2357. free_mmu_pages(vcpu);
  2358. return -ENOMEM;
  2359. }
  2360. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  2361. {
  2362. ASSERT(vcpu);
  2363. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2364. return alloc_mmu_pages(vcpu);
  2365. }
  2366. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  2367. {
  2368. ASSERT(vcpu);
  2369. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2370. return init_kvm_mmu(vcpu);
  2371. }
  2372. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  2373. {
  2374. ASSERT(vcpu);
  2375. destroy_kvm_mmu(vcpu);
  2376. free_mmu_pages(vcpu);
  2377. mmu_free_memory_caches(vcpu);
  2378. }
  2379. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  2380. {
  2381. struct kvm_mmu_page *sp;
  2382. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  2383. int i;
  2384. u64 *pt;
  2385. if (!test_bit(slot, sp->slot_bitmap))
  2386. continue;
  2387. pt = sp->spt;
  2388. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  2389. /* avoid RMW */
  2390. if (pt[i] & PT_WRITABLE_MASK)
  2391. pt[i] &= ~PT_WRITABLE_MASK;
  2392. }
  2393. kvm_flush_remote_tlbs(kvm);
  2394. }
  2395. void kvm_mmu_zap_all(struct kvm *kvm)
  2396. {
  2397. struct kvm_mmu_page *sp, *node;
  2398. spin_lock(&kvm->mmu_lock);
  2399. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  2400. if (kvm_mmu_zap_page(kvm, sp))
  2401. node = container_of(kvm->arch.active_mmu_pages.next,
  2402. struct kvm_mmu_page, link);
  2403. spin_unlock(&kvm->mmu_lock);
  2404. kvm_flush_remote_tlbs(kvm);
  2405. }
  2406. static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
  2407. {
  2408. struct kvm_mmu_page *page;
  2409. page = container_of(kvm->arch.active_mmu_pages.prev,
  2410. struct kvm_mmu_page, link);
  2411. kvm_mmu_zap_page(kvm, page);
  2412. }
  2413. static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
  2414. {
  2415. struct kvm *kvm;
  2416. struct kvm *kvm_freed = NULL;
  2417. int cache_count = 0;
  2418. spin_lock(&kvm_lock);
  2419. list_for_each_entry(kvm, &vm_list, vm_list) {
  2420. int npages;
  2421. if (!down_read_trylock(&kvm->slots_lock))
  2422. continue;
  2423. spin_lock(&kvm->mmu_lock);
  2424. npages = kvm->arch.n_alloc_mmu_pages -
  2425. kvm->arch.n_free_mmu_pages;
  2426. cache_count += npages;
  2427. if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
  2428. kvm_mmu_remove_one_alloc_mmu_page(kvm);
  2429. cache_count--;
  2430. kvm_freed = kvm;
  2431. }
  2432. nr_to_scan--;
  2433. spin_unlock(&kvm->mmu_lock);
  2434. up_read(&kvm->slots_lock);
  2435. }
  2436. if (kvm_freed)
  2437. list_move_tail(&kvm_freed->vm_list, &vm_list);
  2438. spin_unlock(&kvm_lock);
  2439. return cache_count;
  2440. }
  2441. static struct shrinker mmu_shrinker = {
  2442. .shrink = mmu_shrink,
  2443. .seeks = DEFAULT_SEEKS * 10,
  2444. };
  2445. static void mmu_destroy_caches(void)
  2446. {
  2447. if (pte_chain_cache)
  2448. kmem_cache_destroy(pte_chain_cache);
  2449. if (rmap_desc_cache)
  2450. kmem_cache_destroy(rmap_desc_cache);
  2451. if (mmu_page_header_cache)
  2452. kmem_cache_destroy(mmu_page_header_cache);
  2453. }
  2454. void kvm_mmu_module_exit(void)
  2455. {
  2456. mmu_destroy_caches();
  2457. unregister_shrinker(&mmu_shrinker);
  2458. }
  2459. int kvm_mmu_module_init(void)
  2460. {
  2461. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  2462. sizeof(struct kvm_pte_chain),
  2463. 0, 0, NULL);
  2464. if (!pte_chain_cache)
  2465. goto nomem;
  2466. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  2467. sizeof(struct kvm_rmap_desc),
  2468. 0, 0, NULL);
  2469. if (!rmap_desc_cache)
  2470. goto nomem;
  2471. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  2472. sizeof(struct kvm_mmu_page),
  2473. 0, 0, NULL);
  2474. if (!mmu_page_header_cache)
  2475. goto nomem;
  2476. register_shrinker(&mmu_shrinker);
  2477. return 0;
  2478. nomem:
  2479. mmu_destroy_caches();
  2480. return -ENOMEM;
  2481. }
  2482. /*
  2483. * Caculate mmu pages needed for kvm.
  2484. */
  2485. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  2486. {
  2487. int i;
  2488. unsigned int nr_mmu_pages;
  2489. unsigned int nr_pages = 0;
  2490. for (i = 0; i < kvm->nmemslots; i++)
  2491. nr_pages += kvm->memslots[i].npages;
  2492. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  2493. nr_mmu_pages = max(nr_mmu_pages,
  2494. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  2495. return nr_mmu_pages;
  2496. }
  2497. static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2498. unsigned len)
  2499. {
  2500. if (len > buffer->len)
  2501. return NULL;
  2502. return buffer->ptr;
  2503. }
  2504. static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2505. unsigned len)
  2506. {
  2507. void *ret;
  2508. ret = pv_mmu_peek_buffer(buffer, len);
  2509. if (!ret)
  2510. return ret;
  2511. buffer->ptr += len;
  2512. buffer->len -= len;
  2513. buffer->processed += len;
  2514. return ret;
  2515. }
  2516. static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
  2517. gpa_t addr, gpa_t value)
  2518. {
  2519. int bytes = 8;
  2520. int r;
  2521. if (!is_long_mode(vcpu) && !is_pae(vcpu))
  2522. bytes = 4;
  2523. r = mmu_topup_memory_caches(vcpu);
  2524. if (r)
  2525. return r;
  2526. if (!emulator_write_phys(vcpu, addr, &value, bytes))
  2527. return -EFAULT;
  2528. return 1;
  2529. }
  2530. static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  2531. {
  2532. kvm_set_cr3(vcpu, vcpu->arch.cr3);
  2533. return 1;
  2534. }
  2535. static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
  2536. {
  2537. spin_lock(&vcpu->kvm->mmu_lock);
  2538. mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
  2539. spin_unlock(&vcpu->kvm->mmu_lock);
  2540. return 1;
  2541. }
  2542. static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
  2543. struct kvm_pv_mmu_op_buffer *buffer)
  2544. {
  2545. struct kvm_mmu_op_header *header;
  2546. header = pv_mmu_peek_buffer(buffer, sizeof *header);
  2547. if (!header)
  2548. return 0;
  2549. switch (header->op) {
  2550. case KVM_MMU_OP_WRITE_PTE: {
  2551. struct kvm_mmu_op_write_pte *wpte;
  2552. wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
  2553. if (!wpte)
  2554. return 0;
  2555. return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
  2556. wpte->pte_val);
  2557. }
  2558. case KVM_MMU_OP_FLUSH_TLB: {
  2559. struct kvm_mmu_op_flush_tlb *ftlb;
  2560. ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
  2561. if (!ftlb)
  2562. return 0;
  2563. return kvm_pv_mmu_flush_tlb(vcpu);
  2564. }
  2565. case KVM_MMU_OP_RELEASE_PT: {
  2566. struct kvm_mmu_op_release_pt *rpt;
  2567. rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
  2568. if (!rpt)
  2569. return 0;
  2570. return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
  2571. }
  2572. default: return 0;
  2573. }
  2574. }
  2575. int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
  2576. gpa_t addr, unsigned long *ret)
  2577. {
  2578. int r;
  2579. struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
  2580. buffer->ptr = buffer->buf;
  2581. buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
  2582. buffer->processed = 0;
  2583. r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
  2584. if (r)
  2585. goto out;
  2586. while (buffer->len) {
  2587. r = kvm_pv_mmu_op_one(vcpu, buffer);
  2588. if (r < 0)
  2589. goto out;
  2590. if (r == 0)
  2591. break;
  2592. }
  2593. r = 1;
  2594. out:
  2595. *ret = buffer->processed;
  2596. return r;
  2597. }
  2598. int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
  2599. {
  2600. struct kvm_shadow_walk_iterator iterator;
  2601. int nr_sptes = 0;
  2602. spin_lock(&vcpu->kvm->mmu_lock);
  2603. for_each_shadow_entry(vcpu, addr, iterator) {
  2604. sptes[iterator.level-1] = *iterator.sptep;
  2605. nr_sptes++;
  2606. if (!is_shadow_present_pte(*iterator.sptep))
  2607. break;
  2608. }
  2609. spin_unlock(&vcpu->kvm->mmu_lock);
  2610. return nr_sptes;
  2611. }
  2612. EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
  2613. #ifdef AUDIT
  2614. static const char *audit_msg;
  2615. static gva_t canonicalize(gva_t gva)
  2616. {
  2617. #ifdef CONFIG_X86_64
  2618. gva = (long long)(gva << 16) >> 16;
  2619. #endif
  2620. return gva;
  2621. }
  2622. typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
  2623. u64 *sptep);
  2624. static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
  2625. inspect_spte_fn fn)
  2626. {
  2627. int i;
  2628. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2629. u64 ent = sp->spt[i];
  2630. if (is_shadow_present_pte(ent)) {
  2631. if (!is_last_spte(ent, sp->role.level)) {
  2632. struct kvm_mmu_page *child;
  2633. child = page_header(ent & PT64_BASE_ADDR_MASK);
  2634. __mmu_spte_walk(kvm, child, fn);
  2635. } else
  2636. fn(kvm, sp, &sp->spt[i]);
  2637. }
  2638. }
  2639. }
  2640. static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
  2641. {
  2642. int i;
  2643. struct kvm_mmu_page *sp;
  2644. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  2645. return;
  2646. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  2647. hpa_t root = vcpu->arch.mmu.root_hpa;
  2648. sp = page_header(root);
  2649. __mmu_spte_walk(vcpu->kvm, sp, fn);
  2650. return;
  2651. }
  2652. for (i = 0; i < 4; ++i) {
  2653. hpa_t root = vcpu->arch.mmu.pae_root[i];
  2654. if (root && VALID_PAGE(root)) {
  2655. root &= PT64_BASE_ADDR_MASK;
  2656. sp = page_header(root);
  2657. __mmu_spte_walk(vcpu->kvm, sp, fn);
  2658. }
  2659. }
  2660. return;
  2661. }
  2662. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  2663. gva_t va, int level)
  2664. {
  2665. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  2666. int i;
  2667. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  2668. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  2669. u64 ent = pt[i];
  2670. if (ent == shadow_trap_nonpresent_pte)
  2671. continue;
  2672. va = canonicalize(va);
  2673. if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
  2674. audit_mappings_page(vcpu, ent, va, level - 1);
  2675. else {
  2676. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
  2677. gfn_t gfn = gpa >> PAGE_SHIFT;
  2678. pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
  2679. hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
  2680. if (is_error_pfn(pfn)) {
  2681. kvm_release_pfn_clean(pfn);
  2682. continue;
  2683. }
  2684. if (is_shadow_present_pte(ent)
  2685. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  2686. printk(KERN_ERR "xx audit error: (%s) levels %d"
  2687. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  2688. audit_msg, vcpu->arch.mmu.root_level,
  2689. va, gpa, hpa, ent,
  2690. is_shadow_present_pte(ent));
  2691. else if (ent == shadow_notrap_nonpresent_pte
  2692. && !is_error_hpa(hpa))
  2693. printk(KERN_ERR "audit: (%s) notrap shadow,"
  2694. " valid guest gva %lx\n", audit_msg, va);
  2695. kvm_release_pfn_clean(pfn);
  2696. }
  2697. }
  2698. }
  2699. static void audit_mappings(struct kvm_vcpu *vcpu)
  2700. {
  2701. unsigned i;
  2702. if (vcpu->arch.mmu.root_level == 4)
  2703. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  2704. else
  2705. for (i = 0; i < 4; ++i)
  2706. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  2707. audit_mappings_page(vcpu,
  2708. vcpu->arch.mmu.pae_root[i],
  2709. i << 30,
  2710. 2);
  2711. }
  2712. static int count_rmaps(struct kvm_vcpu *vcpu)
  2713. {
  2714. int nmaps = 0;
  2715. int i, j, k;
  2716. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  2717. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  2718. struct kvm_rmap_desc *d;
  2719. for (j = 0; j < m->npages; ++j) {
  2720. unsigned long *rmapp = &m->rmap[j];
  2721. if (!*rmapp)
  2722. continue;
  2723. if (!(*rmapp & 1)) {
  2724. ++nmaps;
  2725. continue;
  2726. }
  2727. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  2728. while (d) {
  2729. for (k = 0; k < RMAP_EXT; ++k)
  2730. if (d->sptes[k])
  2731. ++nmaps;
  2732. else
  2733. break;
  2734. d = d->more;
  2735. }
  2736. }
  2737. }
  2738. return nmaps;
  2739. }
  2740. void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
  2741. {
  2742. unsigned long *rmapp;
  2743. struct kvm_mmu_page *rev_sp;
  2744. gfn_t gfn;
  2745. if (*sptep & PT_WRITABLE_MASK) {
  2746. rev_sp = page_header(__pa(sptep));
  2747. gfn = rev_sp->gfns[sptep - rev_sp->spt];
  2748. if (!gfn_to_memslot(kvm, gfn)) {
  2749. if (!printk_ratelimit())
  2750. return;
  2751. printk(KERN_ERR "%s: no memslot for gfn %ld\n",
  2752. audit_msg, gfn);
  2753. printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
  2754. audit_msg, sptep - rev_sp->spt,
  2755. rev_sp->gfn);
  2756. dump_stack();
  2757. return;
  2758. }
  2759. rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
  2760. is_large_pte(*sptep));
  2761. if (!*rmapp) {
  2762. if (!printk_ratelimit())
  2763. return;
  2764. printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
  2765. audit_msg, *sptep);
  2766. dump_stack();
  2767. }
  2768. }
  2769. }
  2770. void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
  2771. {
  2772. mmu_spte_walk(vcpu, inspect_spte_has_rmap);
  2773. }
  2774. static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
  2775. {
  2776. struct kvm_mmu_page *sp;
  2777. int i;
  2778. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2779. u64 *pt = sp->spt;
  2780. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  2781. continue;
  2782. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2783. u64 ent = pt[i];
  2784. if (!(ent & PT_PRESENT_MASK))
  2785. continue;
  2786. if (!(ent & PT_WRITABLE_MASK))
  2787. continue;
  2788. inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
  2789. }
  2790. }
  2791. return;
  2792. }
  2793. static void audit_rmap(struct kvm_vcpu *vcpu)
  2794. {
  2795. check_writable_mappings_rmap(vcpu);
  2796. count_rmaps(vcpu);
  2797. }
  2798. static void audit_write_protection(struct kvm_vcpu *vcpu)
  2799. {
  2800. struct kvm_mmu_page *sp;
  2801. struct kvm_memory_slot *slot;
  2802. unsigned long *rmapp;
  2803. u64 *spte;
  2804. gfn_t gfn;
  2805. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2806. if (sp->role.direct)
  2807. continue;
  2808. if (sp->unsync)
  2809. continue;
  2810. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  2811. slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
  2812. rmapp = &slot->rmap[gfn - slot->base_gfn];
  2813. spte = rmap_next(vcpu->kvm, rmapp, NULL);
  2814. while (spte) {
  2815. if (*spte & PT_WRITABLE_MASK)
  2816. printk(KERN_ERR "%s: (%s) shadow page has "
  2817. "writable mappings: gfn %lx role %x\n",
  2818. __func__, audit_msg, sp->gfn,
  2819. sp->role.word);
  2820. spte = rmap_next(vcpu->kvm, rmapp, spte);
  2821. }
  2822. }
  2823. }
  2824. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  2825. {
  2826. int olddbg = dbg;
  2827. dbg = 0;
  2828. audit_msg = msg;
  2829. audit_rmap(vcpu);
  2830. audit_write_protection(vcpu);
  2831. if (strcmp("pre pte write", audit_msg) != 0)
  2832. audit_mappings(vcpu);
  2833. audit_writable_sptes_have_rmaps(vcpu);
  2834. dbg = olddbg;
  2835. }
  2836. #endif