patch_intelhdmi.c 23 KB

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  1. /*
  2. *
  3. * patch_intelhdmi.c - Patch for Intel HDMI codecs
  4. *
  5. * Copyright(c) 2008 Intel Corporation. All rights reserved.
  6. *
  7. * Authors:
  8. * Jiang Zhe <zhe.jiang@intel.com>
  9. * Wu Fengguang <wfg@linux.intel.com>
  10. *
  11. * Maintained by:
  12. * Wu Fengguang <wfg@linux.intel.com>
  13. *
  14. * This program is free software; you can redistribute it and/or modify it
  15. * under the terms of the GNU General Public License as published by the Free
  16. * Software Foundation; either version 2 of the License, or (at your option)
  17. * any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful, but
  20. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  21. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  22. * for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software Foundation,
  26. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  27. */
  28. #include <linux/init.h>
  29. #include <linux/delay.h>
  30. #include <linux/slab.h>
  31. #include <sound/core.h>
  32. #include "hda_codec.h"
  33. #include "hda_local.h"
  34. /*
  35. * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
  36. * could support two independent pipes, each of them can be connected to one or
  37. * more ports (DVI, HDMI or DisplayPort).
  38. *
  39. * The HDA correspondence of pipes/ports are converter/pin nodes.
  40. */
  41. #define INTEL_HDMI_CVTS 2
  42. #define INTEL_HDMI_PINS 3
  43. static char *intel_hdmi_pcm_names[INTEL_HDMI_CVTS] = {
  44. "INTEL HDMI 0",
  45. "INTEL HDMI 1",
  46. };
  47. struct intel_hdmi_spec {
  48. int num_cvts;
  49. int num_pins;
  50. hda_nid_t cvt[INTEL_HDMI_CVTS+1]; /* audio sources */
  51. hda_nid_t pin[INTEL_HDMI_PINS+1]; /* audio sinks */
  52. /*
  53. * source connection for each pin
  54. */
  55. hda_nid_t pin_cvt[INTEL_HDMI_PINS+1];
  56. /*
  57. * HDMI sink attached to each pin
  58. */
  59. bool sink_present[INTEL_HDMI_PINS];
  60. bool sink_eldv[INTEL_HDMI_PINS];
  61. struct hdmi_eld sink_eld[INTEL_HDMI_PINS];
  62. /*
  63. * export one pcm per pipe
  64. */
  65. struct hda_pcm pcm_rec[INTEL_HDMI_CVTS];
  66. };
  67. struct hdmi_audio_infoframe {
  68. u8 type; /* 0x84 */
  69. u8 ver; /* 0x01 */
  70. u8 len; /* 0x0a */
  71. u8 checksum; /* PB0 */
  72. u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
  73. u8 SS01_SF24;
  74. u8 CXT04;
  75. u8 CA;
  76. u8 LFEPBL01_LSV36_DM_INH7;
  77. u8 reserved[5]; /* PB6 - PB10 */
  78. };
  79. /*
  80. * CEA speaker placement:
  81. *
  82. * FLH FCH FRH
  83. * FLW FL FLC FC FRC FR FRW
  84. *
  85. * LFE
  86. * TC
  87. *
  88. * RL RLC RC RRC RR
  89. *
  90. * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
  91. * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
  92. */
  93. enum cea_speaker_placement {
  94. FL = (1 << 0), /* Front Left */
  95. FC = (1 << 1), /* Front Center */
  96. FR = (1 << 2), /* Front Right */
  97. FLC = (1 << 3), /* Front Left Center */
  98. FRC = (1 << 4), /* Front Right Center */
  99. RL = (1 << 5), /* Rear Left */
  100. RC = (1 << 6), /* Rear Center */
  101. RR = (1 << 7), /* Rear Right */
  102. RLC = (1 << 8), /* Rear Left Center */
  103. RRC = (1 << 9), /* Rear Right Center */
  104. LFE = (1 << 10), /* Low Frequency Effect */
  105. FLW = (1 << 11), /* Front Left Wide */
  106. FRW = (1 << 12), /* Front Right Wide */
  107. FLH = (1 << 13), /* Front Left High */
  108. FCH = (1 << 14), /* Front Center High */
  109. FRH = (1 << 15), /* Front Right High */
  110. TC = (1 << 16), /* Top Center */
  111. };
  112. /*
  113. * ELD SA bits in the CEA Speaker Allocation data block
  114. */
  115. static int eld_speaker_allocation_bits[] = {
  116. [0] = FL | FR,
  117. [1] = LFE,
  118. [2] = FC,
  119. [3] = RL | RR,
  120. [4] = RC,
  121. [5] = FLC | FRC,
  122. [6] = RLC | RRC,
  123. /* the following are not defined in ELD yet */
  124. [7] = FLW | FRW,
  125. [8] = FLH | FRH,
  126. [9] = TC,
  127. [10] = FCH,
  128. };
  129. struct cea_channel_speaker_allocation {
  130. int ca_index;
  131. int speakers[8];
  132. /* derived values, just for convenience */
  133. int channels;
  134. int spk_mask;
  135. };
  136. /*
  137. * This is an ordered list!
  138. *
  139. * The preceding ones have better chances to be selected by
  140. * hdmi_setup_channel_allocation().
  141. */
  142. static struct cea_channel_speaker_allocation channel_allocations[] = {
  143. /* channel: 8 7 6 5 4 3 2 1 */
  144. { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
  145. /* 2.1 */
  146. { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
  147. /* Dolby Surround */
  148. { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
  149. { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
  150. { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
  151. { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
  152. { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
  153. { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
  154. { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
  155. { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
  156. { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
  157. /* 5.1 */
  158. { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
  159. { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
  160. { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
  161. { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
  162. /* 6.1 */
  163. { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
  164. { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
  165. { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
  166. { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
  167. /* 7.1 */
  168. { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
  169. { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
  170. { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
  171. { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
  172. { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
  173. { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
  174. { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
  175. { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
  176. { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
  177. { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
  178. { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
  179. { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
  180. { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
  181. { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
  182. { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
  183. { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
  184. { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
  185. { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
  186. { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
  187. { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
  188. { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
  189. { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
  190. { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
  191. { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
  192. { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
  193. { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
  194. { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
  195. { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
  196. { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
  197. { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
  198. { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
  199. };
  200. static int hda_node_index(hda_nid_t *nids, hda_nid_t nid)
  201. {
  202. int i;
  203. for (i = 0; nids[i]; i++)
  204. if (nids[i] == nid)
  205. return i;
  206. snd_printk(KERN_WARNING "HDMI: nid %d not registered\n", nid);
  207. return -EINVAL;
  208. }
  209. /*
  210. * HDMI routines
  211. */
  212. #ifdef BE_PARANOID
  213. static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  214. int *packet_index, int *byte_index)
  215. {
  216. int val;
  217. val = snd_hda_codec_read(codec, pin_nid, 0,
  218. AC_VERB_GET_HDMI_DIP_INDEX, 0);
  219. *packet_index = val >> 5;
  220. *byte_index = val & 0x1f;
  221. }
  222. #endif
  223. static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  224. int packet_index, int byte_index)
  225. {
  226. int val;
  227. val = (packet_index << 5) | (byte_index & 0x1f);
  228. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
  229. }
  230. static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
  231. unsigned char val)
  232. {
  233. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
  234. }
  235. static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid)
  236. {
  237. /* Unmute */
  238. if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
  239. snd_hda_codec_write(codec, pin_nid, 0,
  240. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
  241. /* Enable pin out */
  242. snd_hda_codec_write(codec, pin_nid, 0,
  243. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  244. }
  245. /*
  246. * Enable Audio InfoFrame Transmission
  247. */
  248. static void hdmi_start_infoframe_trans(struct hda_codec *codec,
  249. hda_nid_t pin_nid)
  250. {
  251. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  252. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  253. AC_DIPXMIT_BEST);
  254. }
  255. /*
  256. * Disable Audio InfoFrame Transmission
  257. */
  258. static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
  259. hda_nid_t pin_nid)
  260. {
  261. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  262. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  263. AC_DIPXMIT_DISABLE);
  264. }
  265. static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid)
  266. {
  267. return 1 + snd_hda_codec_read(codec, nid, 0,
  268. AC_VERB_GET_CVT_CHAN_COUNT, 0);
  269. }
  270. static void hdmi_set_channel_count(struct hda_codec *codec,
  271. hda_nid_t nid, int chs)
  272. {
  273. snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
  274. #ifdef CONFIG_SND_DEBUG_VERBOSE
  275. if (chs != hdmi_get_channel_count(codec, nid))
  276. snd_printd(KERN_INFO "HDMI channel count: expect %d, get %d\n",
  277. chs, hdmi_get_channel_count(codec, nid));
  278. #endif
  279. }
  280. static void hdmi_debug_channel_mapping(struct hda_codec *codec, hda_nid_t nid)
  281. {
  282. #ifdef CONFIG_SND_DEBUG_VERBOSE
  283. int i;
  284. int slot;
  285. for (i = 0; i < 8; i++) {
  286. slot = snd_hda_codec_read(codec, nid, 0,
  287. AC_VERB_GET_HDMI_CHAN_SLOT, i);
  288. printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
  289. slot >> 4, slot & 0x7);
  290. }
  291. #endif
  292. }
  293. static void hdmi_parse_eld(struct hda_codec *codec, int index)
  294. {
  295. struct intel_hdmi_spec *spec = codec->spec;
  296. struct hdmi_eld *eld = &spec->sink_eld[index];
  297. if (!snd_hdmi_get_eld(eld, codec, spec->pin[index]))
  298. snd_hdmi_show_eld(eld);
  299. }
  300. /*
  301. * Audio InfoFrame routines
  302. */
  303. static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
  304. {
  305. #ifdef CONFIG_SND_DEBUG_VERBOSE
  306. int i;
  307. int size;
  308. size = snd_hdmi_get_eld_size(codec, pin_nid);
  309. printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
  310. for (i = 0; i < 8; i++) {
  311. size = snd_hda_codec_read(codec, pin_nid, 0,
  312. AC_VERB_GET_HDMI_DIP_SIZE, i);
  313. printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
  314. }
  315. #endif
  316. }
  317. static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
  318. {
  319. #ifdef BE_PARANOID
  320. int i, j;
  321. int size;
  322. int pi, bi;
  323. for (i = 0; i < 8; i++) {
  324. size = snd_hda_codec_read(codec, pin_nid, 0,
  325. AC_VERB_GET_HDMI_DIP_SIZE, i);
  326. if (size == 0)
  327. continue;
  328. hdmi_set_dip_index(codec, pin_nid, i, 0x0);
  329. for (j = 1; j < 1000; j++) {
  330. hdmi_write_dip_byte(codec, pin_nid, 0x0);
  331. hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
  332. if (pi != i)
  333. snd_printd(KERN_INFO "dip index %d: %d != %d\n",
  334. bi, pi, i);
  335. if (bi == 0) /* byte index wrapped around */
  336. break;
  337. }
  338. snd_printd(KERN_INFO
  339. "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
  340. i, size, j);
  341. }
  342. #endif
  343. }
  344. static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
  345. hda_nid_t pin_nid,
  346. struct hdmi_audio_infoframe *ai)
  347. {
  348. u8 *params = (u8 *)ai;
  349. u8 sum = 0;
  350. int i;
  351. hdmi_debug_dip_size(codec, pin_nid);
  352. hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
  353. for (i = 0; i < sizeof(ai); i++)
  354. sum += params[i];
  355. ai->checksum = - sum;
  356. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  357. for (i = 0; i < sizeof(ai); i++)
  358. hdmi_write_dip_byte(codec, pin_nid, params[i]);
  359. }
  360. /*
  361. * Compute derived values in channel_allocations[].
  362. */
  363. static void init_channel_allocations(void)
  364. {
  365. int i, j;
  366. struct cea_channel_speaker_allocation *p;
  367. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  368. p = channel_allocations + i;
  369. p->channels = 0;
  370. p->spk_mask = 0;
  371. for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
  372. if (p->speakers[j]) {
  373. p->channels++;
  374. p->spk_mask |= p->speakers[j];
  375. }
  376. }
  377. }
  378. /*
  379. * The transformation takes two steps:
  380. *
  381. * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
  382. * spk_mask => (channel_allocations[]) => ai->CA
  383. *
  384. * TODO: it could select the wrong CA from multiple candidates.
  385. */
  386. static int hdmi_setup_channel_allocation(struct hda_codec *codec, hda_nid_t nid,
  387. struct hdmi_audio_infoframe *ai)
  388. {
  389. struct intel_hdmi_spec *spec = codec->spec;
  390. struct hdmi_eld *eld;
  391. int i;
  392. int spk_mask = 0;
  393. int channels = 1 + (ai->CC02_CT47 & 0x7);
  394. char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
  395. /*
  396. * CA defaults to 0 for basic stereo audio
  397. */
  398. if (channels <= 2)
  399. return 0;
  400. i = hda_node_index(spec->pin_cvt, nid);
  401. if (i < 0)
  402. return 0;
  403. eld = &spec->sink_eld[i];
  404. /*
  405. * HDMI sink's ELD info cannot always be retrieved for now, e.g.
  406. * in console or for audio devices. Assume the highest speakers
  407. * configuration, to _not_ prohibit multi-channel audio playback.
  408. */
  409. if (!eld->spk_alloc)
  410. eld->spk_alloc = 0xffff;
  411. /*
  412. * expand ELD's speaker allocation mask
  413. *
  414. * ELD tells the speaker mask in a compact(paired) form,
  415. * expand ELD's notions to match the ones used by Audio InfoFrame.
  416. */
  417. for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
  418. if (eld->spk_alloc & (1 << i))
  419. spk_mask |= eld_speaker_allocation_bits[i];
  420. }
  421. /* search for the first working match in the CA table */
  422. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  423. if (channels == channel_allocations[i].channels &&
  424. (spk_mask & channel_allocations[i].spk_mask) ==
  425. channel_allocations[i].spk_mask) {
  426. ai->CA = channel_allocations[i].ca_index;
  427. break;
  428. }
  429. }
  430. snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
  431. snd_printdd(KERN_INFO
  432. "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
  433. ai->CA, channels, buf);
  434. return ai->CA;
  435. }
  436. static void hdmi_setup_channel_mapping(struct hda_codec *codec, hda_nid_t nid,
  437. struct hdmi_audio_infoframe *ai)
  438. {
  439. int i;
  440. if (!ai->CA)
  441. return;
  442. /*
  443. * TODO: adjust channel mapping if necessary
  444. * ALSA sequence is front/surr/clfe/side?
  445. */
  446. for (i = 0; i < 8; i++)
  447. snd_hda_codec_write(codec, nid, 0,
  448. AC_VERB_SET_HDMI_CHAN_SLOT,
  449. (i << 4) | i);
  450. hdmi_debug_channel_mapping(codec, nid);
  451. }
  452. static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
  453. struct snd_pcm_substream *substream)
  454. {
  455. struct intel_hdmi_spec *spec = codec->spec;
  456. hda_nid_t pin_nid;
  457. int i;
  458. struct hdmi_audio_infoframe ai = {
  459. .type = 0x84,
  460. .ver = 0x01,
  461. .len = 0x0a,
  462. .CC02_CT47 = substream->runtime->channels - 1,
  463. };
  464. hdmi_setup_channel_allocation(codec, nid, &ai);
  465. hdmi_setup_channel_mapping(codec, nid, &ai);
  466. for (i = 0; i < spec->num_pins; i++) {
  467. if (spec->pin_cvt[i] != nid)
  468. continue;
  469. if (spec->sink_present[i] != true)
  470. continue;
  471. pin_nid = spec->pin[i];
  472. hdmi_fill_audio_infoframe(codec, pin_nid, &ai);
  473. hdmi_start_infoframe_trans(codec, pin_nid);
  474. }
  475. }
  476. /*
  477. * Unsolicited events
  478. */
  479. static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
  480. {
  481. struct intel_hdmi_spec *spec = codec->spec;
  482. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  483. int pind = !!(res & AC_UNSOL_RES_PD);
  484. int eldv = !!(res & AC_UNSOL_RES_ELDV);
  485. int index;
  486. printk(KERN_INFO
  487. "HDMI hot plug event: Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  488. tag, pind, eldv);
  489. index = hda_node_index(spec->pin, tag);
  490. if (index < 0)
  491. return;
  492. spec->sink_present[index] = pind;
  493. spec->sink_eldv[index] = eldv;
  494. if (pind && eldv) {
  495. hdmi_parse_eld(codec, index);
  496. /* TODO: do real things about ELD */
  497. }
  498. }
  499. static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
  500. {
  501. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  502. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  503. int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
  504. int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
  505. printk(KERN_INFO
  506. "HDMI CP event: PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
  507. tag,
  508. subtag,
  509. cp_state,
  510. cp_ready);
  511. /* TODO */
  512. if (cp_state)
  513. ;
  514. if (cp_ready)
  515. ;
  516. }
  517. static void intel_hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
  518. {
  519. struct intel_hdmi_spec *spec = codec->spec;
  520. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  521. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  522. if (hda_node_index(spec->pin, tag) < 0) {
  523. snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
  524. return;
  525. }
  526. if (subtag == 0)
  527. hdmi_intrinsic_event(codec, res);
  528. else
  529. hdmi_non_intrinsic_event(codec, res);
  530. }
  531. /*
  532. * Callbacks
  533. */
  534. static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  535. struct hda_codec *codec,
  536. unsigned int stream_tag,
  537. unsigned int format,
  538. struct snd_pcm_substream *substream)
  539. {
  540. hdmi_set_channel_count(codec, hinfo->nid,
  541. substream->runtime->channels);
  542. hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
  543. snd_hda_codec_setup_stream(codec, hinfo->nid, stream_tag, 0, format);
  544. return 0;
  545. }
  546. static int intel_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  547. struct hda_codec *codec,
  548. struct snd_pcm_substream *substream)
  549. {
  550. struct intel_hdmi_spec *spec = codec->spec;
  551. int i;
  552. for (i = 0; i < spec->num_pins; i++) {
  553. if (spec->pin_cvt[i] != hinfo->nid)
  554. continue;
  555. hdmi_stop_infoframe_trans(codec, spec->pin[i]);
  556. }
  557. snd_hda_codec_cleanup_stream(codec, hinfo->nid);
  558. return 0;
  559. }
  560. static struct hda_pcm_stream intel_hdmi_pcm_playback = {
  561. .substreams = 1,
  562. .channels_min = 2,
  563. .ops = {
  564. .prepare = intel_hdmi_playback_pcm_prepare,
  565. .cleanup = intel_hdmi_playback_pcm_cleanup,
  566. },
  567. };
  568. static int intel_hdmi_build_pcms(struct hda_codec *codec)
  569. {
  570. struct intel_hdmi_spec *spec = codec->spec;
  571. struct hda_pcm *info = spec->pcm_rec;
  572. int i;
  573. codec->num_pcms = spec->num_cvts;
  574. codec->pcm_info = info;
  575. for (i = 0; i < codec->num_pcms; i++, info++) {
  576. unsigned int chans;
  577. chans = get_wcaps(codec, spec->cvt[i]);
  578. chans = get_wcaps_channels(chans);
  579. info->name = intel_hdmi_pcm_names[i];
  580. info->pcm_type = HDA_PCM_TYPE_HDMI;
  581. info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
  582. intel_hdmi_pcm_playback;
  583. info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->cvt[i];
  584. info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = chans;
  585. }
  586. return 0;
  587. }
  588. static int intel_hdmi_build_controls(struct hda_codec *codec)
  589. {
  590. struct intel_hdmi_spec *spec = codec->spec;
  591. int err;
  592. int i;
  593. for (i = 0; i < codec->num_pcms; i++) {
  594. err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
  595. if (err < 0)
  596. return err;
  597. }
  598. return 0;
  599. }
  600. static int intel_hdmi_init(struct hda_codec *codec)
  601. {
  602. struct intel_hdmi_spec *spec = codec->spec;
  603. int i;
  604. for (i = 0; spec->pin[i]; i++) {
  605. hdmi_enable_output(codec, spec->pin[i]);
  606. snd_hda_codec_write(codec, spec->pin[i], 0,
  607. AC_VERB_SET_UNSOLICITED_ENABLE,
  608. AC_USRSP_EN | spec->pin[i]);
  609. }
  610. return 0;
  611. }
  612. static void intel_hdmi_free(struct hda_codec *codec)
  613. {
  614. struct intel_hdmi_spec *spec = codec->spec;
  615. int i;
  616. for (i = 0; i < spec->num_pins; i++)
  617. snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
  618. kfree(spec);
  619. }
  620. static struct hda_codec_ops intel_hdmi_patch_ops = {
  621. .init = intel_hdmi_init,
  622. .free = intel_hdmi_free,
  623. .build_pcms = intel_hdmi_build_pcms,
  624. .build_controls = intel_hdmi_build_controls,
  625. .unsol_event = intel_hdmi_unsol_event,
  626. };
  627. static struct intel_hdmi_spec static_specs[] = {
  628. {
  629. .num_cvts = 1,
  630. .num_pins = 1,
  631. .cvt = { 0x2 },
  632. .pin = { 0x3 },
  633. .pin_cvt = { 0x2 },
  634. },
  635. {
  636. .num_cvts = 2,
  637. .num_pins = 3,
  638. .cvt = { 0x2, 0x3 },
  639. .pin = { 0x4, 0x5, 0x6 },
  640. .pin_cvt = { 0x2, 0x2, 0x2 },
  641. },
  642. };
  643. static int do_patch_intel_hdmi(struct hda_codec *codec, int spec_id)
  644. {
  645. struct intel_hdmi_spec *spec;
  646. int i;
  647. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  648. if (spec == NULL)
  649. return -ENOMEM;
  650. *spec = static_specs[spec_id];
  651. codec->spec = spec;
  652. codec->patch_ops = intel_hdmi_patch_ops;
  653. for (i = 0; i < spec->num_pins; i++)
  654. snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
  655. init_channel_allocations();
  656. return 0;
  657. }
  658. static int patch_intel_hdmi(struct hda_codec *codec)
  659. {
  660. return do_patch_intel_hdmi(codec, 0);
  661. }
  662. static int patch_intel_hdmi_ibexpeak(struct hda_codec *codec)
  663. {
  664. return do_patch_intel_hdmi(codec, 1);
  665. }
  666. static struct hda_codec_preset snd_hda_preset_intelhdmi[] = {
  667. { .id = 0x808629fb, .name = "G45 DEVCL", .patch = patch_intel_hdmi },
  668. { .id = 0x80862801, .name = "G45 DEVBLC", .patch = patch_intel_hdmi },
  669. { .id = 0x80862802, .name = "G45 DEVCTG", .patch = patch_intel_hdmi },
  670. { .id = 0x80862803, .name = "G45 DEVELK", .patch = patch_intel_hdmi },
  671. { .id = 0x80862804, .name = "G45 DEVIBX", .patch = patch_intel_hdmi_ibexpeak },
  672. { .id = 0x80860054, .name = "Q57 DEVIBX", .patch = patch_intel_hdmi_ibexpeak },
  673. { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_intel_hdmi },
  674. {} /* terminator */
  675. };
  676. MODULE_ALIAS("snd-hda-codec-id:808629fb");
  677. MODULE_ALIAS("snd-hda-codec-id:80862801");
  678. MODULE_ALIAS("snd-hda-codec-id:80862802");
  679. MODULE_ALIAS("snd-hda-codec-id:80862803");
  680. MODULE_ALIAS("snd-hda-codec-id:80862804");
  681. MODULE_ALIAS("snd-hda-codec-id:80860054");
  682. MODULE_ALIAS("snd-hda-codec-id:10951392");
  683. MODULE_LICENSE("GPL");
  684. MODULE_DESCRIPTION("Intel HDMI HD-audio codec");
  685. static struct hda_codec_preset_list intel_list = {
  686. .preset = snd_hda_preset_intelhdmi,
  687. .owner = THIS_MODULE,
  688. };
  689. static int __init patch_intelhdmi_init(void)
  690. {
  691. return snd_hda_add_codec_preset(&intel_list);
  692. }
  693. static void __exit patch_intelhdmi_exit(void)
  694. {
  695. snd_hda_delete_codec_preset(&intel_list);
  696. }
  697. module_init(patch_intelhdmi_init)
  698. module_exit(patch_intelhdmi_exit)