iwl3945-base.c 240 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. /*
  30. * NOTE: This file (iwl-base.c) is used to build to multiple hardware targets
  31. * by defining IWL to either 3945 or 4965. The Makefile used when building
  32. * the base targets will create base-3945.o and base-4965.o
  33. *
  34. * The eventual goal is to move as many of the #if IWL / #endif blocks out of
  35. * this file and into the hardware specific implementation files (iwl-XXXX.c)
  36. * and leave only the common (non #ifdef sprinkled) code in this file
  37. */
  38. #include <linux/kernel.h>
  39. #include <linux/module.h>
  40. #include <linux/version.h>
  41. #include <linux/init.h>
  42. #include <linux/pci.h>
  43. #include <linux/dma-mapping.h>
  44. #include <linux/delay.h>
  45. #include <linux/skbuff.h>
  46. #include <linux/netdevice.h>
  47. #include <linux/wireless.h>
  48. #include <linux/firmware.h>
  49. #include <linux/etherdevice.h>
  50. #include <linux/if_arp.h>
  51. #include <net/ieee80211_radiotap.h>
  52. #include <net/mac80211.h>
  53. #include <asm/div64.h>
  54. #define IWL 3945
  55. #include "iwlwifi.h"
  56. #include "iwl-3945.h"
  57. #include "iwl-helpers.h"
  58. #ifdef CONFIG_IWLWIFI_DEBUG
  59. u32 iwl_debug_level;
  60. #endif
  61. /******************************************************************************
  62. *
  63. * module boiler plate
  64. *
  65. ******************************************************************************/
  66. /* module parameters */
  67. int iwl_param_disable_hw_scan;
  68. int iwl_param_debug;
  69. int iwl_param_disable; /* def: enable radio */
  70. int iwl_param_antenna; /* def: 0 = both antennas (use diversity) */
  71. int iwl_param_hwcrypto; /* def: using software encryption */
  72. int iwl_param_qos_enable = 1;
  73. int iwl_param_queues_num = IWL_MAX_NUM_QUEUES;
  74. /*
  75. * module name, copyright, version, etc.
  76. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  77. */
  78. #define DRV_DESCRIPTION \
  79. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  80. #ifdef CONFIG_IWLWIFI_DEBUG
  81. #define VD "d"
  82. #else
  83. #define VD
  84. #endif
  85. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  86. #define VS "s"
  87. #else
  88. #define VS
  89. #endif
  90. #define IWLWIFI_VERSION "1.1.17k" VD VS
  91. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  92. #define DRV_VERSION IWLWIFI_VERSION
  93. /* Change firmware file name, using "-" and incrementing number,
  94. * *only* when uCode interface or architecture changes so that it
  95. * is not compatible with earlier drivers.
  96. * This number will also appear in << 8 position of 1st dword of uCode file */
  97. #define IWL3945_UCODE_API "-1"
  98. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  99. MODULE_VERSION(DRV_VERSION);
  100. MODULE_AUTHOR(DRV_COPYRIGHT);
  101. MODULE_LICENSE("GPL");
  102. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  103. {
  104. u16 fc = le16_to_cpu(hdr->frame_control);
  105. int hdr_len = ieee80211_get_hdrlen(fc);
  106. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  107. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  108. return NULL;
  109. }
  110. static const struct ieee80211_hw_mode *iwl_get_hw_mode(
  111. struct iwl_priv *priv, int mode)
  112. {
  113. int i;
  114. for (i = 0; i < 3; i++)
  115. if (priv->modes[i].mode == mode)
  116. return &priv->modes[i];
  117. return NULL;
  118. }
  119. static int iwl_is_empty_essid(const char *essid, int essid_len)
  120. {
  121. /* Single white space is for Linksys APs */
  122. if (essid_len == 1 && essid[0] == ' ')
  123. return 1;
  124. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  125. while (essid_len) {
  126. essid_len--;
  127. if (essid[essid_len] != '\0')
  128. return 0;
  129. }
  130. return 1;
  131. }
  132. static const char *iwl_escape_essid(const char *essid, u8 essid_len)
  133. {
  134. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  135. const char *s = essid;
  136. char *d = escaped;
  137. if (iwl_is_empty_essid(essid, essid_len)) {
  138. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  139. return escaped;
  140. }
  141. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  142. while (essid_len--) {
  143. if (*s == '\0') {
  144. *d++ = '\\';
  145. *d++ = '0';
  146. s++;
  147. } else
  148. *d++ = *s++;
  149. }
  150. *d = '\0';
  151. return escaped;
  152. }
  153. static void iwl_print_hex_dump(int level, void *p, u32 len)
  154. {
  155. #ifdef CONFIG_IWLWIFI_DEBUG
  156. if (!(iwl_debug_level & level))
  157. return;
  158. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  159. p, len, 1);
  160. #endif
  161. }
  162. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  163. * DMA services
  164. *
  165. * Theory of operation
  166. *
  167. * A queue is a circular buffers with 'Read' and 'Write' pointers.
  168. * 2 empty entries always kept in the buffer to protect from overflow.
  169. *
  170. * For Tx queue, there are low mark and high mark limits. If, after queuing
  171. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  172. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  173. * Tx queue resumed.
  174. *
  175. * The IWL operates with six queues, one receive queue in the device's
  176. * sram, one transmit queue for sending commands to the device firmware,
  177. * and four transmit queues for data.
  178. ***************************************************/
  179. static int iwl_queue_space(const struct iwl_queue *q)
  180. {
  181. int s = q->read_ptr - q->write_ptr;
  182. if (q->read_ptr > q->write_ptr)
  183. s -= q->n_bd;
  184. if (s <= 0)
  185. s += q->n_window;
  186. /* keep some reserve to not confuse empty and full situations */
  187. s -= 2;
  188. if (s < 0)
  189. s = 0;
  190. return s;
  191. }
  192. /* XXX: n_bd must be power-of-two size */
  193. static inline int iwl_queue_inc_wrap(int index, int n_bd)
  194. {
  195. return ++index & (n_bd - 1);
  196. }
  197. /* XXX: n_bd must be power-of-two size */
  198. static inline int iwl_queue_dec_wrap(int index, int n_bd)
  199. {
  200. return --index & (n_bd - 1);
  201. }
  202. static inline int x2_queue_used(const struct iwl_queue *q, int i)
  203. {
  204. return q->write_ptr > q->read_ptr ?
  205. (i >= q->read_ptr && i < q->write_ptr) :
  206. !(i < q->read_ptr && i >= q->write_ptr);
  207. }
  208. static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
  209. {
  210. if (is_huge)
  211. return q->n_window;
  212. return index & (q->n_window - 1);
  213. }
  214. static int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
  215. int count, int slots_num, u32 id)
  216. {
  217. q->n_bd = count;
  218. q->n_window = slots_num;
  219. q->id = id;
  220. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  221. * and iwl_queue_dec_wrap are broken. */
  222. BUG_ON(!is_power_of_2(count));
  223. /* slots_num must be power-of-two size, otherwise
  224. * get_cmd_index is broken. */
  225. BUG_ON(!is_power_of_2(slots_num));
  226. q->low_mark = q->n_window / 4;
  227. if (q->low_mark < 4)
  228. q->low_mark = 4;
  229. q->high_mark = q->n_window / 8;
  230. if (q->high_mark < 2)
  231. q->high_mark = 2;
  232. q->write_ptr = q->read_ptr = 0;
  233. return 0;
  234. }
  235. static int iwl_tx_queue_alloc(struct iwl_priv *priv,
  236. struct iwl_tx_queue *txq, u32 id)
  237. {
  238. struct pci_dev *dev = priv->pci_dev;
  239. if (id != IWL_CMD_QUEUE_NUM) {
  240. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  241. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  242. if (!txq->txb) {
  243. IWL_ERROR("kmalloc for auxiliary BD "
  244. "structures failed\n");
  245. goto error;
  246. }
  247. } else
  248. txq->txb = NULL;
  249. txq->bd = pci_alloc_consistent(dev,
  250. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  251. &txq->q.dma_addr);
  252. if (!txq->bd) {
  253. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  254. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  255. goto error;
  256. }
  257. txq->q.id = id;
  258. return 0;
  259. error:
  260. if (txq->txb) {
  261. kfree(txq->txb);
  262. txq->txb = NULL;
  263. }
  264. return -ENOMEM;
  265. }
  266. int iwl_tx_queue_init(struct iwl_priv *priv,
  267. struct iwl_tx_queue *txq, int slots_num, u32 txq_id)
  268. {
  269. struct pci_dev *dev = priv->pci_dev;
  270. int len;
  271. int rc = 0;
  272. /* allocate command space + one big command for scan since scan
  273. * command is very huge the system will not have two scan at the
  274. * same time */
  275. len = sizeof(struct iwl_cmd) * slots_num;
  276. if (txq_id == IWL_CMD_QUEUE_NUM)
  277. len += IWL_MAX_SCAN_SIZE;
  278. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  279. if (!txq->cmd)
  280. return -ENOMEM;
  281. rc = iwl_tx_queue_alloc(priv, txq, txq_id);
  282. if (rc) {
  283. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  284. return -ENOMEM;
  285. }
  286. txq->need_update = 0;
  287. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  288. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  289. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  290. iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  291. iwl_hw_tx_queue_init(priv, txq);
  292. return 0;
  293. }
  294. /**
  295. * iwl_tx_queue_free - Deallocate DMA queue.
  296. * @txq: Transmit queue to deallocate.
  297. *
  298. * Empty queue by removing and destroying all BD's.
  299. * Free all buffers. txq itself is not freed.
  300. *
  301. */
  302. void iwl_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
  303. {
  304. struct iwl_queue *q = &txq->q;
  305. struct pci_dev *dev = priv->pci_dev;
  306. int len;
  307. if (q->n_bd == 0)
  308. return;
  309. /* first, empty all BD's */
  310. for (; q->write_ptr != q->read_ptr;
  311. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  312. iwl_hw_txq_free_tfd(priv, txq);
  313. len = sizeof(struct iwl_cmd) * q->n_window;
  314. if (q->id == IWL_CMD_QUEUE_NUM)
  315. len += IWL_MAX_SCAN_SIZE;
  316. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  317. /* free buffers belonging to queue itself */
  318. if (txq->q.n_bd)
  319. pci_free_consistent(dev, sizeof(struct iwl_tfd_frame) *
  320. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  321. if (txq->txb) {
  322. kfree(txq->txb);
  323. txq->txb = NULL;
  324. }
  325. /* 0 fill whole structure */
  326. memset(txq, 0, sizeof(*txq));
  327. }
  328. const u8 BROADCAST_ADDR[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  329. /*************** STATION TABLE MANAGEMENT ****
  330. *
  331. * NOTE: This needs to be overhauled to better synchronize between
  332. * how the iwl-4965.c is using iwl_hw_find_station vs. iwl-3945.c
  333. *
  334. * mac80211 should also be examined to determine if sta_info is duplicating
  335. * the functionality provided here
  336. */
  337. /**************************************************************/
  338. #if 0 /* temporary disable till we add real remove station */
  339. static u8 iwl_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  340. {
  341. int index = IWL_INVALID_STATION;
  342. int i;
  343. unsigned long flags;
  344. spin_lock_irqsave(&priv->sta_lock, flags);
  345. if (is_ap)
  346. index = IWL_AP_ID;
  347. else if (is_broadcast_ether_addr(addr))
  348. index = priv->hw_setting.bcast_sta_id;
  349. else
  350. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  351. if (priv->stations[i].used &&
  352. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  353. addr)) {
  354. index = i;
  355. break;
  356. }
  357. if (unlikely(index == IWL_INVALID_STATION))
  358. goto out;
  359. if (priv->stations[index].used) {
  360. priv->stations[index].used = 0;
  361. priv->num_stations--;
  362. }
  363. BUG_ON(priv->num_stations < 0);
  364. out:
  365. spin_unlock_irqrestore(&priv->sta_lock, flags);
  366. return 0;
  367. }
  368. #endif
  369. static void iwl_clear_stations_table(struct iwl_priv *priv)
  370. {
  371. unsigned long flags;
  372. spin_lock_irqsave(&priv->sta_lock, flags);
  373. priv->num_stations = 0;
  374. memset(priv->stations, 0, sizeof(priv->stations));
  375. spin_unlock_irqrestore(&priv->sta_lock, flags);
  376. }
  377. u8 iwl_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  378. {
  379. int i;
  380. int index = IWL_INVALID_STATION;
  381. struct iwl_station_entry *station;
  382. unsigned long flags_spin;
  383. DECLARE_MAC_BUF(mac);
  384. u8 rate;
  385. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  386. if (is_ap)
  387. index = IWL_AP_ID;
  388. else if (is_broadcast_ether_addr(addr))
  389. index = priv->hw_setting.bcast_sta_id;
  390. else
  391. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  392. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  393. addr)) {
  394. index = i;
  395. break;
  396. }
  397. if (!priv->stations[i].used &&
  398. index == IWL_INVALID_STATION)
  399. index = i;
  400. }
  401. /* These two conditions has the same outcome but keep them separate
  402. since they have different meaning */
  403. if (unlikely(index == IWL_INVALID_STATION)) {
  404. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  405. return index;
  406. }
  407. if (priv->stations[index].used &&
  408. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  409. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  410. return index;
  411. }
  412. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  413. station = &priv->stations[index];
  414. station->used = 1;
  415. priv->num_stations++;
  416. memset(&station->sta, 0, sizeof(struct iwl_addsta_cmd));
  417. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  418. station->sta.mode = 0;
  419. station->sta.sta.sta_id = index;
  420. station->sta.station_flags = 0;
  421. if (priv->phymode == MODE_IEEE80211A)
  422. rate = IWL_RATE_6M_PLCP;
  423. else
  424. rate = IWL_RATE_1M_PLCP;
  425. /* Turn on both antennas for the station... */
  426. station->sta.rate_n_flags =
  427. iwl_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
  428. station->current_rate.rate_n_flags =
  429. le16_to_cpu(station->sta.rate_n_flags);
  430. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  431. iwl_send_add_station(priv, &station->sta, flags);
  432. return index;
  433. }
  434. /*************** DRIVER STATUS FUNCTIONS *****/
  435. static inline int iwl_is_ready(struct iwl_priv *priv)
  436. {
  437. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  438. * set but EXIT_PENDING is not */
  439. return test_bit(STATUS_READY, &priv->status) &&
  440. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  441. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  442. }
  443. static inline int iwl_is_alive(struct iwl_priv *priv)
  444. {
  445. return test_bit(STATUS_ALIVE, &priv->status);
  446. }
  447. static inline int iwl_is_init(struct iwl_priv *priv)
  448. {
  449. return test_bit(STATUS_INIT, &priv->status);
  450. }
  451. static inline int iwl_is_rfkill(struct iwl_priv *priv)
  452. {
  453. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  454. test_bit(STATUS_RF_KILL_SW, &priv->status);
  455. }
  456. static inline int iwl_is_ready_rf(struct iwl_priv *priv)
  457. {
  458. if (iwl_is_rfkill(priv))
  459. return 0;
  460. return iwl_is_ready(priv);
  461. }
  462. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  463. #define IWL_CMD(x) case x : return #x
  464. static const char *get_cmd_string(u8 cmd)
  465. {
  466. switch (cmd) {
  467. IWL_CMD(REPLY_ALIVE);
  468. IWL_CMD(REPLY_ERROR);
  469. IWL_CMD(REPLY_RXON);
  470. IWL_CMD(REPLY_RXON_ASSOC);
  471. IWL_CMD(REPLY_QOS_PARAM);
  472. IWL_CMD(REPLY_RXON_TIMING);
  473. IWL_CMD(REPLY_ADD_STA);
  474. IWL_CMD(REPLY_REMOVE_STA);
  475. IWL_CMD(REPLY_REMOVE_ALL_STA);
  476. IWL_CMD(REPLY_3945_RX);
  477. IWL_CMD(REPLY_TX);
  478. IWL_CMD(REPLY_RATE_SCALE);
  479. IWL_CMD(REPLY_LEDS_CMD);
  480. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  481. IWL_CMD(RADAR_NOTIFICATION);
  482. IWL_CMD(REPLY_QUIET_CMD);
  483. IWL_CMD(REPLY_CHANNEL_SWITCH);
  484. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  485. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  486. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  487. IWL_CMD(POWER_TABLE_CMD);
  488. IWL_CMD(PM_SLEEP_NOTIFICATION);
  489. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  490. IWL_CMD(REPLY_SCAN_CMD);
  491. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  492. IWL_CMD(SCAN_START_NOTIFICATION);
  493. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  494. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  495. IWL_CMD(BEACON_NOTIFICATION);
  496. IWL_CMD(REPLY_TX_BEACON);
  497. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  498. IWL_CMD(QUIET_NOTIFICATION);
  499. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  500. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  501. IWL_CMD(REPLY_BT_CONFIG);
  502. IWL_CMD(REPLY_STATISTICS_CMD);
  503. IWL_CMD(STATISTICS_NOTIFICATION);
  504. IWL_CMD(REPLY_CARD_STATE_CMD);
  505. IWL_CMD(CARD_STATE_NOTIFICATION);
  506. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  507. default:
  508. return "UNKNOWN";
  509. }
  510. }
  511. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  512. /**
  513. * iwl_enqueue_hcmd - enqueue a uCode command
  514. * @priv: device private data point
  515. * @cmd: a point to the ucode command structure
  516. *
  517. * The function returns < 0 values to indicate the operation is
  518. * failed. On success, it turns the index (> 0) of command in the
  519. * command queue.
  520. */
  521. static int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  522. {
  523. struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  524. struct iwl_queue *q = &txq->q;
  525. struct iwl_tfd_frame *tfd;
  526. u32 *control_flags;
  527. struct iwl_cmd *out_cmd;
  528. u32 idx;
  529. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  530. dma_addr_t phys_addr;
  531. int pad;
  532. u16 count;
  533. int ret;
  534. unsigned long flags;
  535. /* If any of the command structures end up being larger than
  536. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  537. * we will need to increase the size of the TFD entries */
  538. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  539. !(cmd->meta.flags & CMD_SIZE_HUGE));
  540. if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  541. IWL_ERROR("No space for Tx\n");
  542. return -ENOSPC;
  543. }
  544. spin_lock_irqsave(&priv->hcmd_lock, flags);
  545. tfd = &txq->bd[q->write_ptr];
  546. memset(tfd, 0, sizeof(*tfd));
  547. control_flags = (u32 *) tfd;
  548. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  549. out_cmd = &txq->cmd[idx];
  550. out_cmd->hdr.cmd = cmd->id;
  551. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  552. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  553. /* At this point, the out_cmd now has all of the incoming cmd
  554. * information */
  555. out_cmd->hdr.flags = 0;
  556. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  557. INDEX_TO_SEQ(q->write_ptr));
  558. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  559. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  560. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  561. offsetof(struct iwl_cmd, hdr);
  562. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  563. pad = U32_PAD(cmd->len);
  564. count = TFD_CTL_COUNT_GET(*control_flags);
  565. *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
  566. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  567. "%d bytes at %d[%d]:%d\n",
  568. get_cmd_string(out_cmd->hdr.cmd),
  569. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  570. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  571. txq->need_update = 1;
  572. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  573. ret = iwl_tx_queue_update_write_ptr(priv, txq);
  574. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  575. return ret ? ret : idx;
  576. }
  577. int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  578. {
  579. int ret;
  580. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  581. /* An asynchronous command can not expect an SKB to be set. */
  582. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  583. /* An asynchronous command MUST have a callback. */
  584. BUG_ON(!cmd->meta.u.callback);
  585. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  586. return -EBUSY;
  587. ret = iwl_enqueue_hcmd(priv, cmd);
  588. if (ret < 0) {
  589. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  590. get_cmd_string(cmd->id), ret);
  591. return ret;
  592. }
  593. return 0;
  594. }
  595. int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  596. {
  597. int cmd_idx;
  598. int ret;
  599. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  600. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  601. /* A synchronous command can not have a callback set. */
  602. BUG_ON(cmd->meta.u.callback != NULL);
  603. if (atomic_xchg(&entry, 1)) {
  604. IWL_ERROR("Error sending %s: Already sending a host command\n",
  605. get_cmd_string(cmd->id));
  606. return -EBUSY;
  607. }
  608. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  609. if (cmd->meta.flags & CMD_WANT_SKB)
  610. cmd->meta.source = &cmd->meta;
  611. cmd_idx = iwl_enqueue_hcmd(priv, cmd);
  612. if (cmd_idx < 0) {
  613. ret = cmd_idx;
  614. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  615. get_cmd_string(cmd->id), ret);
  616. goto out;
  617. }
  618. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  619. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  620. HOST_COMPLETE_TIMEOUT);
  621. if (!ret) {
  622. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  623. IWL_ERROR("Error sending %s: time out after %dms.\n",
  624. get_cmd_string(cmd->id),
  625. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  626. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  627. ret = -ETIMEDOUT;
  628. goto cancel;
  629. }
  630. }
  631. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  632. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  633. get_cmd_string(cmd->id));
  634. ret = -ECANCELED;
  635. goto fail;
  636. }
  637. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  638. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  639. get_cmd_string(cmd->id));
  640. ret = -EIO;
  641. goto fail;
  642. }
  643. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  644. IWL_ERROR("Error: Response NULL in '%s'\n",
  645. get_cmd_string(cmd->id));
  646. ret = -EIO;
  647. goto out;
  648. }
  649. ret = 0;
  650. goto out;
  651. cancel:
  652. if (cmd->meta.flags & CMD_WANT_SKB) {
  653. struct iwl_cmd *qcmd;
  654. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  655. * TX cmd queue. Otherwise in case the cmd comes
  656. * in later, it will possibly set an invalid
  657. * address (cmd->meta.source). */
  658. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  659. qcmd->meta.flags &= ~CMD_WANT_SKB;
  660. }
  661. fail:
  662. if (cmd->meta.u.skb) {
  663. dev_kfree_skb_any(cmd->meta.u.skb);
  664. cmd->meta.u.skb = NULL;
  665. }
  666. out:
  667. atomic_set(&entry, 0);
  668. return ret;
  669. }
  670. int iwl_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  671. {
  672. /* A command can not be asynchronous AND expect an SKB to be set. */
  673. BUG_ON((cmd->meta.flags & CMD_ASYNC) &&
  674. (cmd->meta.flags & CMD_WANT_SKB));
  675. if (cmd->meta.flags & CMD_ASYNC)
  676. return iwl_send_cmd_async(priv, cmd);
  677. return iwl_send_cmd_sync(priv, cmd);
  678. }
  679. int iwl_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
  680. {
  681. struct iwl_host_cmd cmd = {
  682. .id = id,
  683. .len = len,
  684. .data = data,
  685. };
  686. return iwl_send_cmd_sync(priv, &cmd);
  687. }
  688. static int __must_check iwl_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
  689. {
  690. struct iwl_host_cmd cmd = {
  691. .id = id,
  692. .len = sizeof(val),
  693. .data = &val,
  694. };
  695. return iwl_send_cmd_sync(priv, &cmd);
  696. }
  697. int iwl_send_statistics_request(struct iwl_priv *priv)
  698. {
  699. return iwl_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  700. }
  701. /**
  702. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  703. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  704. * @channel: Any channel valid for the requested phymode
  705. * In addition to setting the staging RXON, priv->phymode is also set.
  706. *
  707. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  708. * in the staging RXON flag structure based on the phymode
  709. */
  710. static int iwl_set_rxon_channel(struct iwl_priv *priv, u8 phymode, u16 channel)
  711. {
  712. if (!iwl_get_channel_info(priv, phymode, channel)) {
  713. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  714. channel, phymode);
  715. return -EINVAL;
  716. }
  717. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  718. (priv->phymode == phymode))
  719. return 0;
  720. priv->staging_rxon.channel = cpu_to_le16(channel);
  721. if (phymode == MODE_IEEE80211A)
  722. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  723. else
  724. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  725. priv->phymode = phymode;
  726. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  727. return 0;
  728. }
  729. /**
  730. * iwl_check_rxon_cmd - validate RXON structure is valid
  731. *
  732. * NOTE: This is really only useful during development and can eventually
  733. * be #ifdef'd out once the driver is stable and folks aren't actively
  734. * making changes
  735. */
  736. static int iwl_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
  737. {
  738. int error = 0;
  739. int counter = 1;
  740. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  741. error |= le32_to_cpu(rxon->flags &
  742. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  743. RXON_FLG_RADAR_DETECT_MSK));
  744. if (error)
  745. IWL_WARNING("check 24G fields %d | %d\n",
  746. counter++, error);
  747. } else {
  748. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  749. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  750. if (error)
  751. IWL_WARNING("check 52 fields %d | %d\n",
  752. counter++, error);
  753. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  754. if (error)
  755. IWL_WARNING("check 52 CCK %d | %d\n",
  756. counter++, error);
  757. }
  758. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  759. if (error)
  760. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  761. /* make sure basic rates 6Mbps and 1Mbps are supported */
  762. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  763. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  764. if (error)
  765. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  766. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  767. if (error)
  768. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  769. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  770. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  771. if (error)
  772. IWL_WARNING("check CCK and short slot %d | %d\n",
  773. counter++, error);
  774. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  775. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  776. if (error)
  777. IWL_WARNING("check CCK & auto detect %d | %d\n",
  778. counter++, error);
  779. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  780. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  781. if (error)
  782. IWL_WARNING("check TGG and auto detect %d | %d\n",
  783. counter++, error);
  784. if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
  785. error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
  786. RXON_FLG_ANT_A_MSK)) == 0);
  787. if (error)
  788. IWL_WARNING("check antenna %d %d\n", counter++, error);
  789. if (error)
  790. IWL_WARNING("Tuning to channel %d\n",
  791. le16_to_cpu(rxon->channel));
  792. if (error) {
  793. IWL_ERROR("Not a valid iwl_rxon_assoc_cmd field values\n");
  794. return -1;
  795. }
  796. return 0;
  797. }
  798. /**
  799. * iwl_full_rxon_required - determine if RXON_ASSOC can be used in RXON commit
  800. * @priv: staging_rxon is compared to active_rxon
  801. *
  802. * If the RXON structure is changing sufficient to require a new
  803. * tune or to clear and reset the RXON_FILTER_ASSOC_MSK then return 1
  804. * to indicate a new tune is required.
  805. */
  806. static int iwl_full_rxon_required(struct iwl_priv *priv)
  807. {
  808. /* These items are only settable from the full RXON command */
  809. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  810. compare_ether_addr(priv->staging_rxon.bssid_addr,
  811. priv->active_rxon.bssid_addr) ||
  812. compare_ether_addr(priv->staging_rxon.node_addr,
  813. priv->active_rxon.node_addr) ||
  814. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  815. priv->active_rxon.wlap_bssid_addr) ||
  816. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  817. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  818. (priv->staging_rxon.air_propagation !=
  819. priv->active_rxon.air_propagation) ||
  820. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  821. return 1;
  822. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  823. * be updated with the RXON_ASSOC command -- however only some
  824. * flag transitions are allowed using RXON_ASSOC */
  825. /* Check if we are not switching bands */
  826. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  827. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  828. return 1;
  829. /* Check if we are switching association toggle */
  830. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  831. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  832. return 1;
  833. return 0;
  834. }
  835. static int iwl_send_rxon_assoc(struct iwl_priv *priv)
  836. {
  837. int rc = 0;
  838. struct iwl_rx_packet *res = NULL;
  839. struct iwl_rxon_assoc_cmd rxon_assoc;
  840. struct iwl_host_cmd cmd = {
  841. .id = REPLY_RXON_ASSOC,
  842. .len = sizeof(rxon_assoc),
  843. .meta.flags = CMD_WANT_SKB,
  844. .data = &rxon_assoc,
  845. };
  846. const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
  847. const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
  848. if ((rxon1->flags == rxon2->flags) &&
  849. (rxon1->filter_flags == rxon2->filter_flags) &&
  850. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  851. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  852. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  853. return 0;
  854. }
  855. rxon_assoc.flags = priv->staging_rxon.flags;
  856. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  857. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  858. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  859. rxon_assoc.reserved = 0;
  860. rc = iwl_send_cmd_sync(priv, &cmd);
  861. if (rc)
  862. return rc;
  863. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  864. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  865. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  866. rc = -EIO;
  867. }
  868. priv->alloc_rxb_skb--;
  869. dev_kfree_skb_any(cmd.meta.u.skb);
  870. return rc;
  871. }
  872. /**
  873. * iwl_commit_rxon - commit staging_rxon to hardware
  874. *
  875. * The RXON command in staging_rxon is committed to the hardware and
  876. * the active_rxon structure is updated with the new data. This
  877. * function correctly transitions out of the RXON_ASSOC_MSK state if
  878. * a HW tune is required based on the RXON structure changes.
  879. */
  880. static int iwl_commit_rxon(struct iwl_priv *priv)
  881. {
  882. /* cast away the const for active_rxon in this function */
  883. struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  884. int rc = 0;
  885. DECLARE_MAC_BUF(mac);
  886. if (!iwl_is_alive(priv))
  887. return -1;
  888. /* always get timestamp with Rx frame */
  889. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  890. /* select antenna */
  891. priv->staging_rxon.flags &=
  892. ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
  893. priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
  894. rc = iwl_check_rxon_cmd(&priv->staging_rxon);
  895. if (rc) {
  896. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  897. return -EINVAL;
  898. }
  899. /* If we don't need to send a full RXON, we can use
  900. * iwl_rxon_assoc_cmd which is used to reconfigure filter
  901. * and other flags for the current radio configuration. */
  902. if (!iwl_full_rxon_required(priv)) {
  903. rc = iwl_send_rxon_assoc(priv);
  904. if (rc) {
  905. IWL_ERROR("Error setting RXON_ASSOC "
  906. "configuration (%d).\n", rc);
  907. return rc;
  908. }
  909. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  910. return 0;
  911. }
  912. /* If we are currently associated and the new config requires
  913. * an RXON_ASSOC and the new config wants the associated mask enabled,
  914. * we must clear the associated from the active configuration
  915. * before we apply the new config */
  916. if (iwl_is_associated(priv) &&
  917. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  918. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  919. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  920. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  921. sizeof(struct iwl_rxon_cmd),
  922. &priv->active_rxon);
  923. /* If the mask clearing failed then we set
  924. * active_rxon back to what it was previously */
  925. if (rc) {
  926. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  927. IWL_ERROR("Error clearing ASSOC_MSK on current "
  928. "configuration (%d).\n", rc);
  929. return rc;
  930. }
  931. }
  932. IWL_DEBUG_INFO("Sending RXON\n"
  933. "* with%s RXON_FILTER_ASSOC_MSK\n"
  934. "* channel = %d\n"
  935. "* bssid = %s\n",
  936. ((priv->staging_rxon.filter_flags &
  937. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  938. le16_to_cpu(priv->staging_rxon.channel),
  939. print_mac(mac, priv->staging_rxon.bssid_addr));
  940. /* Apply the new configuration */
  941. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  942. sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
  943. if (rc) {
  944. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  945. return rc;
  946. }
  947. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  948. iwl_clear_stations_table(priv);
  949. /* If we issue a new RXON command which required a tune then we must
  950. * send a new TXPOWER command or we won't be able to Tx any frames */
  951. rc = iwl_hw_reg_send_txpower(priv);
  952. if (rc) {
  953. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  954. return rc;
  955. }
  956. /* Add the broadcast address so we can send broadcast frames */
  957. if (iwl_add_station(priv, BROADCAST_ADDR, 0, 0) ==
  958. IWL_INVALID_STATION) {
  959. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  960. return -EIO;
  961. }
  962. /* If we have set the ASSOC_MSK and we are in BSS mode then
  963. * add the IWL_AP_ID to the station rate table */
  964. if (iwl_is_associated(priv) &&
  965. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  966. if (iwl_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
  967. == IWL_INVALID_STATION) {
  968. IWL_ERROR("Error adding AP address for transmit.\n");
  969. return -EIO;
  970. }
  971. /* Init the hardware's rate fallback order based on the
  972. * phymode */
  973. rc = iwl3945_init_hw_rate_table(priv);
  974. if (rc) {
  975. IWL_ERROR("Error setting HW rate table: %02X\n", rc);
  976. return -EIO;
  977. }
  978. return 0;
  979. }
  980. static int iwl_send_bt_config(struct iwl_priv *priv)
  981. {
  982. struct iwl_bt_cmd bt_cmd = {
  983. .flags = 3,
  984. .lead_time = 0xAA,
  985. .max_kill = 1,
  986. .kill_ack_mask = 0,
  987. .kill_cts_mask = 0,
  988. };
  989. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  990. sizeof(struct iwl_bt_cmd), &bt_cmd);
  991. }
  992. static int iwl_send_scan_abort(struct iwl_priv *priv)
  993. {
  994. int rc = 0;
  995. struct iwl_rx_packet *res;
  996. struct iwl_host_cmd cmd = {
  997. .id = REPLY_SCAN_ABORT_CMD,
  998. .meta.flags = CMD_WANT_SKB,
  999. };
  1000. /* If there isn't a scan actively going on in the hardware
  1001. * then we are in between scan bands and not actually
  1002. * actively scanning, so don't send the abort command */
  1003. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1004. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1005. return 0;
  1006. }
  1007. rc = iwl_send_cmd_sync(priv, &cmd);
  1008. if (rc) {
  1009. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1010. return rc;
  1011. }
  1012. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1013. if (res->u.status != CAN_ABORT_STATUS) {
  1014. /* The scan abort will return 1 for success or
  1015. * 2 for "failure". A failure condition can be
  1016. * due to simply not being in an active scan which
  1017. * can occur if we send the scan abort before we
  1018. * the microcode has notified us that a scan is
  1019. * completed. */
  1020. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1021. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1022. clear_bit(STATUS_SCAN_HW, &priv->status);
  1023. }
  1024. dev_kfree_skb_any(cmd.meta.u.skb);
  1025. return rc;
  1026. }
  1027. static int iwl_card_state_sync_callback(struct iwl_priv *priv,
  1028. struct iwl_cmd *cmd,
  1029. struct sk_buff *skb)
  1030. {
  1031. return 1;
  1032. }
  1033. /*
  1034. * CARD_STATE_CMD
  1035. *
  1036. * Use: Sets the internal card state to enable, disable, or halt
  1037. *
  1038. * When in the 'enable' state the card operates as normal.
  1039. * When in the 'disable' state, the card enters into a low power mode.
  1040. * When in the 'halt' state, the card is shut down and must be fully
  1041. * restarted to come back on.
  1042. */
  1043. static int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1044. {
  1045. struct iwl_host_cmd cmd = {
  1046. .id = REPLY_CARD_STATE_CMD,
  1047. .len = sizeof(u32),
  1048. .data = &flags,
  1049. .meta.flags = meta_flag,
  1050. };
  1051. if (meta_flag & CMD_ASYNC)
  1052. cmd.meta.u.callback = iwl_card_state_sync_callback;
  1053. return iwl_send_cmd(priv, &cmd);
  1054. }
  1055. static int iwl_add_sta_sync_callback(struct iwl_priv *priv,
  1056. struct iwl_cmd *cmd, struct sk_buff *skb)
  1057. {
  1058. struct iwl_rx_packet *res = NULL;
  1059. if (!skb) {
  1060. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1061. return 1;
  1062. }
  1063. res = (struct iwl_rx_packet *)skb->data;
  1064. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1065. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1066. res->hdr.flags);
  1067. return 1;
  1068. }
  1069. switch (res->u.add_sta.status) {
  1070. case ADD_STA_SUCCESS_MSK:
  1071. break;
  1072. default:
  1073. break;
  1074. }
  1075. /* We didn't cache the SKB; let the caller free it */
  1076. return 1;
  1077. }
  1078. int iwl_send_add_station(struct iwl_priv *priv,
  1079. struct iwl_addsta_cmd *sta, u8 flags)
  1080. {
  1081. struct iwl_rx_packet *res = NULL;
  1082. int rc = 0;
  1083. struct iwl_host_cmd cmd = {
  1084. .id = REPLY_ADD_STA,
  1085. .len = sizeof(struct iwl_addsta_cmd),
  1086. .meta.flags = flags,
  1087. .data = sta,
  1088. };
  1089. if (flags & CMD_ASYNC)
  1090. cmd.meta.u.callback = iwl_add_sta_sync_callback;
  1091. else
  1092. cmd.meta.flags |= CMD_WANT_SKB;
  1093. rc = iwl_send_cmd(priv, &cmd);
  1094. if (rc || (flags & CMD_ASYNC))
  1095. return rc;
  1096. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1097. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1098. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1099. res->hdr.flags);
  1100. rc = -EIO;
  1101. }
  1102. if (rc == 0) {
  1103. switch (res->u.add_sta.status) {
  1104. case ADD_STA_SUCCESS_MSK:
  1105. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1106. break;
  1107. default:
  1108. rc = -EIO;
  1109. IWL_WARNING("REPLY_ADD_STA failed\n");
  1110. break;
  1111. }
  1112. }
  1113. priv->alloc_rxb_skb--;
  1114. dev_kfree_skb_any(cmd.meta.u.skb);
  1115. return rc;
  1116. }
  1117. static int iwl_update_sta_key_info(struct iwl_priv *priv,
  1118. struct ieee80211_key_conf *keyconf,
  1119. u8 sta_id)
  1120. {
  1121. unsigned long flags;
  1122. __le16 key_flags = 0;
  1123. switch (keyconf->alg) {
  1124. case ALG_CCMP:
  1125. key_flags |= STA_KEY_FLG_CCMP;
  1126. key_flags |= cpu_to_le16(
  1127. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1128. key_flags &= ~STA_KEY_FLG_INVALID;
  1129. break;
  1130. case ALG_TKIP:
  1131. case ALG_WEP:
  1132. return -EINVAL;
  1133. default:
  1134. return -EINVAL;
  1135. }
  1136. spin_lock_irqsave(&priv->sta_lock, flags);
  1137. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1138. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1139. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1140. keyconf->keylen);
  1141. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1142. keyconf->keylen);
  1143. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1144. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1145. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1146. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1147. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1148. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1149. return 0;
  1150. }
  1151. static int iwl_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  1152. {
  1153. unsigned long flags;
  1154. spin_lock_irqsave(&priv->sta_lock, flags);
  1155. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  1156. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl_keyinfo));
  1157. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1158. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1159. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1160. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1161. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1162. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1163. return 0;
  1164. }
  1165. static void iwl_clear_free_frames(struct iwl_priv *priv)
  1166. {
  1167. struct list_head *element;
  1168. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1169. priv->frames_count);
  1170. while (!list_empty(&priv->free_frames)) {
  1171. element = priv->free_frames.next;
  1172. list_del(element);
  1173. kfree(list_entry(element, struct iwl_frame, list));
  1174. priv->frames_count--;
  1175. }
  1176. if (priv->frames_count) {
  1177. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1178. priv->frames_count);
  1179. priv->frames_count = 0;
  1180. }
  1181. }
  1182. static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
  1183. {
  1184. struct iwl_frame *frame;
  1185. struct list_head *element;
  1186. if (list_empty(&priv->free_frames)) {
  1187. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1188. if (!frame) {
  1189. IWL_ERROR("Could not allocate frame!\n");
  1190. return NULL;
  1191. }
  1192. priv->frames_count++;
  1193. return frame;
  1194. }
  1195. element = priv->free_frames.next;
  1196. list_del(element);
  1197. return list_entry(element, struct iwl_frame, list);
  1198. }
  1199. static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
  1200. {
  1201. memset(frame, 0, sizeof(*frame));
  1202. list_add(&frame->list, &priv->free_frames);
  1203. }
  1204. unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
  1205. struct ieee80211_hdr *hdr,
  1206. const u8 *dest, int left)
  1207. {
  1208. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  1209. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1210. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1211. return 0;
  1212. if (priv->ibss_beacon->len > left)
  1213. return 0;
  1214. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1215. return priv->ibss_beacon->len;
  1216. }
  1217. static int iwl_rate_index_from_plcp(int plcp)
  1218. {
  1219. int i = 0;
  1220. for (i = 0; i < IWL_RATE_COUNT; i++)
  1221. if (iwl_rates[i].plcp == plcp)
  1222. return i;
  1223. return -1;
  1224. }
  1225. static u8 iwl_rate_get_lowest_plcp(int rate_mask)
  1226. {
  1227. u8 i;
  1228. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1229. i = iwl_rates[i].next_ieee) {
  1230. if (rate_mask & (1 << i))
  1231. return iwl_rates[i].plcp;
  1232. }
  1233. return IWL_RATE_INVALID;
  1234. }
  1235. static int iwl_send_beacon_cmd(struct iwl_priv *priv)
  1236. {
  1237. struct iwl_frame *frame;
  1238. unsigned int frame_size;
  1239. int rc;
  1240. u8 rate;
  1241. frame = iwl_get_free_frame(priv);
  1242. if (!frame) {
  1243. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1244. "command.\n");
  1245. return -ENOMEM;
  1246. }
  1247. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1248. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic &
  1249. 0xFF0);
  1250. if (rate == IWL_INVALID_RATE)
  1251. rate = IWL_RATE_6M_PLCP;
  1252. } else {
  1253. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1254. if (rate == IWL_INVALID_RATE)
  1255. rate = IWL_RATE_1M_PLCP;
  1256. }
  1257. frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
  1258. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1259. &frame->u.cmd[0]);
  1260. iwl_free_frame(priv, frame);
  1261. return rc;
  1262. }
  1263. /******************************************************************************
  1264. *
  1265. * EEPROM related functions
  1266. *
  1267. ******************************************************************************/
  1268. static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
  1269. {
  1270. memcpy(mac, priv->eeprom.mac_address, 6);
  1271. }
  1272. /**
  1273. * iwl_eeprom_init - read EEPROM contents
  1274. *
  1275. * Load the EEPROM from adapter into priv->eeprom
  1276. *
  1277. * NOTE: This routine uses the non-debug IO access functions.
  1278. */
  1279. int iwl_eeprom_init(struct iwl_priv *priv)
  1280. {
  1281. u16 *e = (u16 *)&priv->eeprom;
  1282. u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
  1283. u32 r;
  1284. int sz = sizeof(priv->eeprom);
  1285. int rc;
  1286. int i;
  1287. u16 addr;
  1288. /* The EEPROM structure has several padding buffers within it
  1289. * and when adding new EEPROM maps is subject to programmer errors
  1290. * which may be very difficult to identify without explicitly
  1291. * checking the resulting size of the eeprom map. */
  1292. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1293. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1294. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1295. return -ENOENT;
  1296. }
  1297. rc = iwl_eeprom_acquire_semaphore(priv);
  1298. if (rc < 0) {
  1299. IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
  1300. return -ENOENT;
  1301. }
  1302. /* eeprom is an array of 16bit values */
  1303. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1304. _iwl_write32(priv, CSR_EEPROM_REG, addr << 1);
  1305. _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1306. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1307. i += IWL_EEPROM_ACCESS_DELAY) {
  1308. r = _iwl_read_restricted(priv, CSR_EEPROM_REG);
  1309. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1310. break;
  1311. udelay(IWL_EEPROM_ACCESS_DELAY);
  1312. }
  1313. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1314. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1315. return -ETIMEDOUT;
  1316. }
  1317. e[addr / 2] = le16_to_cpu(r >> 16);
  1318. }
  1319. return 0;
  1320. }
  1321. /******************************************************************************
  1322. *
  1323. * Misc. internal state and helper functions
  1324. *
  1325. ******************************************************************************/
  1326. #ifdef CONFIG_IWLWIFI_DEBUG
  1327. /**
  1328. * iwl_report_frame - dump frame to syslog during debug sessions
  1329. *
  1330. * hack this function to show different aspects of received frames,
  1331. * including selective frame dumps.
  1332. * group100 parameter selects whether to show 1 out of 100 good frames.
  1333. *
  1334. * TODO: ieee80211_hdr stuff is common to 3945 and 4965, so frame type
  1335. * info output is okay, but some of this stuff (e.g. iwl_rx_frame_stats)
  1336. * is 3945-specific and gives bad output for 4965. Need to split the
  1337. * functionality, keep common stuff here.
  1338. */
  1339. void iwl_report_frame(struct iwl_priv *priv,
  1340. struct iwl_rx_packet *pkt,
  1341. struct ieee80211_hdr *header, int group100)
  1342. {
  1343. u32 to_us;
  1344. u32 print_summary = 0;
  1345. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1346. u32 hundred = 0;
  1347. u32 dataframe = 0;
  1348. u16 fc;
  1349. u16 seq_ctl;
  1350. u16 channel;
  1351. u16 phy_flags;
  1352. int rate_sym;
  1353. u16 length;
  1354. u16 status;
  1355. u16 bcn_tmr;
  1356. u32 tsf_low;
  1357. u64 tsf;
  1358. u8 rssi;
  1359. u8 agc;
  1360. u16 sig_avg;
  1361. u16 noise_diff;
  1362. struct iwl_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1363. struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1364. struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1365. u8 *data = IWL_RX_DATA(pkt);
  1366. /* MAC header */
  1367. fc = le16_to_cpu(header->frame_control);
  1368. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1369. /* metadata */
  1370. channel = le16_to_cpu(rx_hdr->channel);
  1371. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1372. rate_sym = rx_hdr->rate;
  1373. length = le16_to_cpu(rx_hdr->len);
  1374. /* end-of-frame status and timestamp */
  1375. status = le32_to_cpu(rx_end->status);
  1376. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1377. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1378. tsf = le64_to_cpu(rx_end->timestamp);
  1379. /* signal statistics */
  1380. rssi = rx_stats->rssi;
  1381. agc = rx_stats->agc;
  1382. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1383. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1384. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1385. /* if data frame is to us and all is good,
  1386. * (optionally) print summary for only 1 out of every 100 */
  1387. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1388. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1389. dataframe = 1;
  1390. if (!group100)
  1391. print_summary = 1; /* print each frame */
  1392. else if (priv->framecnt_to_us < 100) {
  1393. priv->framecnt_to_us++;
  1394. print_summary = 0;
  1395. } else {
  1396. priv->framecnt_to_us = 0;
  1397. print_summary = 1;
  1398. hundred = 1;
  1399. }
  1400. } else {
  1401. /* print summary for all other frames */
  1402. print_summary = 1;
  1403. }
  1404. if (print_summary) {
  1405. char *title;
  1406. u32 rate;
  1407. if (hundred)
  1408. title = "100Frames";
  1409. else if (fc & IEEE80211_FCTL_RETRY)
  1410. title = "Retry";
  1411. else if (ieee80211_is_assoc_response(fc))
  1412. title = "AscRsp";
  1413. else if (ieee80211_is_reassoc_response(fc))
  1414. title = "RasRsp";
  1415. else if (ieee80211_is_probe_response(fc)) {
  1416. title = "PrbRsp";
  1417. print_dump = 1; /* dump frame contents */
  1418. } else if (ieee80211_is_beacon(fc)) {
  1419. title = "Beacon";
  1420. print_dump = 1; /* dump frame contents */
  1421. } else if (ieee80211_is_atim(fc))
  1422. title = "ATIM";
  1423. else if (ieee80211_is_auth(fc))
  1424. title = "Auth";
  1425. else if (ieee80211_is_deauth(fc))
  1426. title = "DeAuth";
  1427. else if (ieee80211_is_disassoc(fc))
  1428. title = "DisAssoc";
  1429. else
  1430. title = "Frame";
  1431. rate = iwl_rate_index_from_plcp(rate_sym);
  1432. if (rate == -1)
  1433. rate = 0;
  1434. else
  1435. rate = iwl_rates[rate].ieee / 2;
  1436. /* print frame summary.
  1437. * MAC addresses show just the last byte (for brevity),
  1438. * but you can hack it to show more, if you'd like to. */
  1439. if (dataframe)
  1440. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1441. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1442. title, fc, header->addr1[5],
  1443. length, rssi, channel, rate);
  1444. else {
  1445. /* src/dst addresses assume managed mode */
  1446. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1447. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1448. "phy=0x%02x, chnl=%d\n",
  1449. title, fc, header->addr1[5],
  1450. header->addr3[5], rssi,
  1451. tsf_low - priv->scan_start_tsf,
  1452. phy_flags, channel);
  1453. }
  1454. }
  1455. if (print_dump)
  1456. iwl_print_hex_dump(IWL_DL_RX, data, length);
  1457. }
  1458. #endif
  1459. static void iwl_unset_hw_setting(struct iwl_priv *priv)
  1460. {
  1461. if (priv->hw_setting.shared_virt)
  1462. pci_free_consistent(priv->pci_dev,
  1463. sizeof(struct iwl_shared),
  1464. priv->hw_setting.shared_virt,
  1465. priv->hw_setting.shared_phys);
  1466. }
  1467. /**
  1468. * iwl_supported_rate_to_ie - fill in the supported rate in IE field
  1469. *
  1470. * return : set the bit for each supported rate insert in ie
  1471. */
  1472. static u16 iwl_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1473. u16 basic_rate, int *left)
  1474. {
  1475. u16 ret_rates = 0, bit;
  1476. int i;
  1477. u8 *cnt = ie;
  1478. u8 *rates = ie + 1;
  1479. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1480. if (bit & supported_rate) {
  1481. ret_rates |= bit;
  1482. rates[*cnt] = iwl_rates[i].ieee |
  1483. ((bit & basic_rate) ? 0x80 : 0x00);
  1484. (*cnt)++;
  1485. (*left)--;
  1486. if ((*left <= 0) ||
  1487. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1488. break;
  1489. }
  1490. }
  1491. return ret_rates;
  1492. }
  1493. /**
  1494. * iwl_fill_probe_req - fill in all required fields and IE for probe request
  1495. */
  1496. static u16 iwl_fill_probe_req(struct iwl_priv *priv,
  1497. struct ieee80211_mgmt *frame,
  1498. int left, int is_direct)
  1499. {
  1500. int len = 0;
  1501. u8 *pos = NULL;
  1502. u16 active_rates, ret_rates, cck_rates;
  1503. /* Make sure there is enough space for the probe request,
  1504. * two mandatory IEs and the data */
  1505. left -= 24;
  1506. if (left < 0)
  1507. return 0;
  1508. len += 24;
  1509. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1510. memcpy(frame->da, BROADCAST_ADDR, ETH_ALEN);
  1511. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1512. memcpy(frame->bssid, BROADCAST_ADDR, ETH_ALEN);
  1513. frame->seq_ctrl = 0;
  1514. /* fill in our indirect SSID IE */
  1515. /* ...next IE... */
  1516. left -= 2;
  1517. if (left < 0)
  1518. return 0;
  1519. len += 2;
  1520. pos = &(frame->u.probe_req.variable[0]);
  1521. *pos++ = WLAN_EID_SSID;
  1522. *pos++ = 0;
  1523. /* fill in our direct SSID IE... */
  1524. if (is_direct) {
  1525. /* ...next IE... */
  1526. left -= 2 + priv->essid_len;
  1527. if (left < 0)
  1528. return 0;
  1529. /* ... fill it in... */
  1530. *pos++ = WLAN_EID_SSID;
  1531. *pos++ = priv->essid_len;
  1532. memcpy(pos, priv->essid, priv->essid_len);
  1533. pos += priv->essid_len;
  1534. len += 2 + priv->essid_len;
  1535. }
  1536. /* fill in supported rate */
  1537. /* ...next IE... */
  1538. left -= 2;
  1539. if (left < 0)
  1540. return 0;
  1541. /* ... fill it in... */
  1542. *pos++ = WLAN_EID_SUPP_RATES;
  1543. *pos = 0;
  1544. priv->active_rate = priv->rates_mask;
  1545. active_rates = priv->active_rate;
  1546. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  1547. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1548. ret_rates = iwl_supported_rate_to_ie(pos, cck_rates,
  1549. priv->active_rate_basic, &left);
  1550. active_rates &= ~ret_rates;
  1551. ret_rates = iwl_supported_rate_to_ie(pos, active_rates,
  1552. priv->active_rate_basic, &left);
  1553. active_rates &= ~ret_rates;
  1554. len += 2 + *pos;
  1555. pos += (*pos) + 1;
  1556. if (active_rates == 0)
  1557. goto fill_end;
  1558. /* fill in supported extended rate */
  1559. /* ...next IE... */
  1560. left -= 2;
  1561. if (left < 0)
  1562. return 0;
  1563. /* ... fill it in... */
  1564. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1565. *pos = 0;
  1566. iwl_supported_rate_to_ie(pos, active_rates,
  1567. priv->active_rate_basic, &left);
  1568. if (*pos > 0)
  1569. len += 2 + *pos;
  1570. fill_end:
  1571. return (u16)len;
  1572. }
  1573. /*
  1574. * QoS support
  1575. */
  1576. #ifdef CONFIG_IWLWIFI_QOS
  1577. static int iwl_send_qos_params_command(struct iwl_priv *priv,
  1578. struct iwl_qosparam_cmd *qos)
  1579. {
  1580. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1581. sizeof(struct iwl_qosparam_cmd), qos);
  1582. }
  1583. static void iwl_reset_qos(struct iwl_priv *priv)
  1584. {
  1585. u16 cw_min = 15;
  1586. u16 cw_max = 1023;
  1587. u8 aifs = 2;
  1588. u8 is_legacy = 0;
  1589. unsigned long flags;
  1590. int i;
  1591. spin_lock_irqsave(&priv->lock, flags);
  1592. priv->qos_data.qos_active = 0;
  1593. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1594. if (priv->qos_data.qos_enable)
  1595. priv->qos_data.qos_active = 1;
  1596. if (!(priv->active_rate & 0xfff0)) {
  1597. cw_min = 31;
  1598. is_legacy = 1;
  1599. }
  1600. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1601. if (priv->qos_data.qos_enable)
  1602. priv->qos_data.qos_active = 1;
  1603. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1604. cw_min = 31;
  1605. is_legacy = 1;
  1606. }
  1607. if (priv->qos_data.qos_active)
  1608. aifs = 3;
  1609. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1610. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1611. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1612. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1613. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1614. if (priv->qos_data.qos_active) {
  1615. i = 1;
  1616. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1617. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1618. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1619. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1620. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1621. i = 2;
  1622. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1623. cpu_to_le16((cw_min + 1) / 2 - 1);
  1624. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1625. cpu_to_le16(cw_max);
  1626. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1627. if (is_legacy)
  1628. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1629. cpu_to_le16(6016);
  1630. else
  1631. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1632. cpu_to_le16(3008);
  1633. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1634. i = 3;
  1635. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1636. cpu_to_le16((cw_min + 1) / 4 - 1);
  1637. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1638. cpu_to_le16((cw_max + 1) / 2 - 1);
  1639. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1640. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1641. if (is_legacy)
  1642. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1643. cpu_to_le16(3264);
  1644. else
  1645. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1646. cpu_to_le16(1504);
  1647. } else {
  1648. for (i = 1; i < 4; i++) {
  1649. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1650. cpu_to_le16(cw_min);
  1651. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1652. cpu_to_le16(cw_max);
  1653. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1654. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1655. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1656. }
  1657. }
  1658. IWL_DEBUG_QOS("set QoS to default \n");
  1659. spin_unlock_irqrestore(&priv->lock, flags);
  1660. }
  1661. static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
  1662. {
  1663. unsigned long flags;
  1664. if (priv == NULL)
  1665. return;
  1666. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1667. return;
  1668. if (!priv->qos_data.qos_enable)
  1669. return;
  1670. spin_lock_irqsave(&priv->lock, flags);
  1671. priv->qos_data.def_qos_parm.qos_flags = 0;
  1672. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1673. !priv->qos_data.qos_cap.q_AP.txop_request)
  1674. priv->qos_data.def_qos_parm.qos_flags |=
  1675. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1676. if (priv->qos_data.qos_active)
  1677. priv->qos_data.def_qos_parm.qos_flags |=
  1678. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1679. spin_unlock_irqrestore(&priv->lock, flags);
  1680. if (force || iwl_is_associated(priv)) {
  1681. IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
  1682. priv->qos_data.qos_active);
  1683. iwl_send_qos_params_command(priv,
  1684. &(priv->qos_data.def_qos_parm));
  1685. }
  1686. }
  1687. #endif /* CONFIG_IWLWIFI_QOS */
  1688. /*
  1689. * Power management (not Tx power!) functions
  1690. */
  1691. #define MSEC_TO_USEC 1024
  1692. #define NOSLP __constant_cpu_to_le32(0)
  1693. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
  1694. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1695. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1696. __constant_cpu_to_le32(X1), \
  1697. __constant_cpu_to_le32(X2), \
  1698. __constant_cpu_to_le32(X3), \
  1699. __constant_cpu_to_le32(X4)}
  1700. /* default power management (not Tx power) table values */
  1701. /* for tim 0-10 */
  1702. static struct iwl_power_vec_entry range_0[IWL_POWER_AC] = {
  1703. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1704. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1705. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1706. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1707. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1708. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1709. };
  1710. /* for tim > 10 */
  1711. static struct iwl_power_vec_entry range_1[IWL_POWER_AC] = {
  1712. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1713. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1714. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1715. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1716. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1717. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1718. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1719. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1720. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1721. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1722. };
  1723. int iwl_power_init_handle(struct iwl_priv *priv)
  1724. {
  1725. int rc = 0, i;
  1726. struct iwl_power_mgr *pow_data;
  1727. int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_AC;
  1728. u16 pci_pm;
  1729. IWL_DEBUG_POWER("Initialize power \n");
  1730. pow_data = &(priv->power_data);
  1731. memset(pow_data, 0, sizeof(*pow_data));
  1732. pow_data->active_index = IWL_POWER_RANGE_0;
  1733. pow_data->dtim_val = 0xffff;
  1734. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1735. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1736. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1737. if (rc != 0)
  1738. return 0;
  1739. else {
  1740. struct iwl_powertable_cmd *cmd;
  1741. IWL_DEBUG_POWER("adjust power command flags\n");
  1742. for (i = 0; i < IWL_POWER_AC; i++) {
  1743. cmd = &pow_data->pwr_range_0[i].cmd;
  1744. if (pci_pm & 0x1)
  1745. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1746. else
  1747. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1748. }
  1749. }
  1750. return rc;
  1751. }
  1752. static int iwl_update_power_cmd(struct iwl_priv *priv,
  1753. struct iwl_powertable_cmd *cmd, u32 mode)
  1754. {
  1755. int rc = 0, i;
  1756. u8 skip;
  1757. u32 max_sleep = 0;
  1758. struct iwl_power_vec_entry *range;
  1759. u8 period = 0;
  1760. struct iwl_power_mgr *pow_data;
  1761. if (mode > IWL_POWER_INDEX_5) {
  1762. IWL_DEBUG_POWER("Error invalid power mode \n");
  1763. return -1;
  1764. }
  1765. pow_data = &(priv->power_data);
  1766. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1767. range = &pow_data->pwr_range_0[0];
  1768. else
  1769. range = &pow_data->pwr_range_1[1];
  1770. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl_powertable_cmd));
  1771. #ifdef IWL_MAC80211_DISABLE
  1772. if (priv->assoc_network != NULL) {
  1773. unsigned long flags;
  1774. period = priv->assoc_network->tim.tim_period;
  1775. }
  1776. #endif /*IWL_MAC80211_DISABLE */
  1777. skip = range[mode].no_dtim;
  1778. if (period == 0) {
  1779. period = 1;
  1780. skip = 0;
  1781. }
  1782. if (skip == 0) {
  1783. max_sleep = period;
  1784. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1785. } else {
  1786. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1787. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1788. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1789. }
  1790. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1791. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1792. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1793. }
  1794. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1795. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1796. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1797. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1798. le32_to_cpu(cmd->sleep_interval[0]),
  1799. le32_to_cpu(cmd->sleep_interval[1]),
  1800. le32_to_cpu(cmd->sleep_interval[2]),
  1801. le32_to_cpu(cmd->sleep_interval[3]),
  1802. le32_to_cpu(cmd->sleep_interval[4]));
  1803. return rc;
  1804. }
  1805. static int iwl_send_power_mode(struct iwl_priv *priv, u32 mode)
  1806. {
  1807. u32 final_mode = mode;
  1808. int rc;
  1809. struct iwl_powertable_cmd cmd;
  1810. /* If on battery, set to 3,
  1811. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1812. * else user level */
  1813. switch (mode) {
  1814. case IWL_POWER_BATTERY:
  1815. final_mode = IWL_POWER_INDEX_3;
  1816. break;
  1817. case IWL_POWER_AC:
  1818. final_mode = IWL_POWER_MODE_CAM;
  1819. break;
  1820. default:
  1821. final_mode = mode;
  1822. break;
  1823. }
  1824. iwl_update_power_cmd(priv, &cmd, final_mode);
  1825. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1826. if (final_mode == IWL_POWER_MODE_CAM)
  1827. clear_bit(STATUS_POWER_PMI, &priv->status);
  1828. else
  1829. set_bit(STATUS_POWER_PMI, &priv->status);
  1830. return rc;
  1831. }
  1832. int iwl_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1833. {
  1834. /* Filter incoming packets to determine if they are targeted toward
  1835. * this network, discarding packets coming from ourselves */
  1836. switch (priv->iw_mode) {
  1837. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1838. /* packets from our adapter are dropped (echo) */
  1839. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1840. return 0;
  1841. /* {broad,multi}cast packets to our IBSS go through */
  1842. if (is_multicast_ether_addr(header->addr1))
  1843. return !compare_ether_addr(header->addr3, priv->bssid);
  1844. /* packets to our adapter go through */
  1845. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1846. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1847. /* packets from our adapter are dropped (echo) */
  1848. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1849. return 0;
  1850. /* {broad,multi}cast packets to our BSS go through */
  1851. if (is_multicast_ether_addr(header->addr1))
  1852. return !compare_ether_addr(header->addr2, priv->bssid);
  1853. /* packets to our adapter go through */
  1854. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1855. }
  1856. return 1;
  1857. }
  1858. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1859. const char *iwl_get_tx_fail_reason(u32 status)
  1860. {
  1861. switch (status & TX_STATUS_MSK) {
  1862. case TX_STATUS_SUCCESS:
  1863. return "SUCCESS";
  1864. TX_STATUS_ENTRY(SHORT_LIMIT);
  1865. TX_STATUS_ENTRY(LONG_LIMIT);
  1866. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1867. TX_STATUS_ENTRY(MGMNT_ABORT);
  1868. TX_STATUS_ENTRY(NEXT_FRAG);
  1869. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1870. TX_STATUS_ENTRY(DEST_PS);
  1871. TX_STATUS_ENTRY(ABORTED);
  1872. TX_STATUS_ENTRY(BT_RETRY);
  1873. TX_STATUS_ENTRY(STA_INVALID);
  1874. TX_STATUS_ENTRY(FRAG_DROPPED);
  1875. TX_STATUS_ENTRY(TID_DISABLE);
  1876. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1877. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1878. TX_STATUS_ENTRY(TX_LOCKED);
  1879. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1880. }
  1881. return "UNKNOWN";
  1882. }
  1883. /**
  1884. * iwl_scan_cancel - Cancel any currently executing HW scan
  1885. *
  1886. * NOTE: priv->mutex is not required before calling this function
  1887. */
  1888. static int iwl_scan_cancel(struct iwl_priv *priv)
  1889. {
  1890. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1891. clear_bit(STATUS_SCANNING, &priv->status);
  1892. return 0;
  1893. }
  1894. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1895. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1896. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1897. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1898. queue_work(priv->workqueue, &priv->abort_scan);
  1899. } else
  1900. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1901. return test_bit(STATUS_SCANNING, &priv->status);
  1902. }
  1903. return 0;
  1904. }
  1905. /**
  1906. * iwl_scan_cancel_timeout - Cancel any currently executing HW scan
  1907. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1908. *
  1909. * NOTE: priv->mutex must be held before calling this function
  1910. */
  1911. static int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1912. {
  1913. unsigned long now = jiffies;
  1914. int ret;
  1915. ret = iwl_scan_cancel(priv);
  1916. if (ret && ms) {
  1917. mutex_unlock(&priv->mutex);
  1918. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1919. test_bit(STATUS_SCANNING, &priv->status))
  1920. msleep(1);
  1921. mutex_lock(&priv->mutex);
  1922. return test_bit(STATUS_SCANNING, &priv->status);
  1923. }
  1924. return ret;
  1925. }
  1926. static void iwl_sequence_reset(struct iwl_priv *priv)
  1927. {
  1928. /* Reset ieee stats */
  1929. /* We don't reset the net_device_stats (ieee->stats) on
  1930. * re-association */
  1931. priv->last_seq_num = -1;
  1932. priv->last_frag_num = -1;
  1933. priv->last_packet_time = 0;
  1934. iwl_scan_cancel(priv);
  1935. }
  1936. #define MAX_UCODE_BEACON_INTERVAL 1024
  1937. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1938. static __le16 iwl_adjust_beacon_interval(u16 beacon_val)
  1939. {
  1940. u16 new_val = 0;
  1941. u16 beacon_factor = 0;
  1942. beacon_factor =
  1943. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1944. / MAX_UCODE_BEACON_INTERVAL;
  1945. new_val = beacon_val / beacon_factor;
  1946. return cpu_to_le16(new_val);
  1947. }
  1948. static void iwl_setup_rxon_timing(struct iwl_priv *priv)
  1949. {
  1950. u64 interval_tm_unit;
  1951. u64 tsf, result;
  1952. unsigned long flags;
  1953. struct ieee80211_conf *conf = NULL;
  1954. u16 beacon_int = 0;
  1955. conf = ieee80211_get_hw_conf(priv->hw);
  1956. spin_lock_irqsave(&priv->lock, flags);
  1957. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1958. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1959. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1960. tsf = priv->timestamp1;
  1961. tsf = ((tsf << 32) | priv->timestamp0);
  1962. beacon_int = priv->beacon_int;
  1963. spin_unlock_irqrestore(&priv->lock, flags);
  1964. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1965. if (beacon_int == 0) {
  1966. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1967. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1968. } else {
  1969. priv->rxon_timing.beacon_interval =
  1970. cpu_to_le16(beacon_int);
  1971. priv->rxon_timing.beacon_interval =
  1972. iwl_adjust_beacon_interval(
  1973. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1974. }
  1975. priv->rxon_timing.atim_window = 0;
  1976. } else {
  1977. priv->rxon_timing.beacon_interval =
  1978. iwl_adjust_beacon_interval(conf->beacon_int);
  1979. /* TODO: we need to get atim_window from upper stack
  1980. * for now we set to 0 */
  1981. priv->rxon_timing.atim_window = 0;
  1982. }
  1983. interval_tm_unit =
  1984. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1985. result = do_div(tsf, interval_tm_unit);
  1986. priv->rxon_timing.beacon_init_val =
  1987. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1988. IWL_DEBUG_ASSOC
  1989. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1990. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1991. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1992. le16_to_cpu(priv->rxon_timing.atim_window));
  1993. }
  1994. static int iwl_scan_initiate(struct iwl_priv *priv)
  1995. {
  1996. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1997. IWL_ERROR("APs don't scan.\n");
  1998. return 0;
  1999. }
  2000. if (!iwl_is_ready_rf(priv)) {
  2001. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  2002. return -EIO;
  2003. }
  2004. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2005. IWL_DEBUG_SCAN("Scan already in progress.\n");
  2006. return -EAGAIN;
  2007. }
  2008. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2009. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2010. "Queuing.\n");
  2011. return -EAGAIN;
  2012. }
  2013. IWL_DEBUG_INFO("Starting scan...\n");
  2014. priv->scan_bands = 2;
  2015. set_bit(STATUS_SCANNING, &priv->status);
  2016. priv->scan_start = jiffies;
  2017. priv->scan_pass_start = priv->scan_start;
  2018. queue_work(priv->workqueue, &priv->request_scan);
  2019. return 0;
  2020. }
  2021. static int iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  2022. {
  2023. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  2024. if (hw_decrypt)
  2025. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2026. else
  2027. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2028. return 0;
  2029. }
  2030. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode)
  2031. {
  2032. if (phymode == MODE_IEEE80211A) {
  2033. priv->staging_rxon.flags &=
  2034. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2035. | RXON_FLG_CCK_MSK);
  2036. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2037. } else {
  2038. /* Copied from iwl_bg_post_associate() */
  2039. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2040. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2041. else
  2042. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2043. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2044. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2045. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2046. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2047. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2048. }
  2049. }
  2050. /*
  2051. * initialize rxon structure with default values from eeprom
  2052. */
  2053. static void iwl_connection_init_rx_config(struct iwl_priv *priv)
  2054. {
  2055. const struct iwl_channel_info *ch_info;
  2056. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2057. switch (priv->iw_mode) {
  2058. case IEEE80211_IF_TYPE_AP:
  2059. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2060. break;
  2061. case IEEE80211_IF_TYPE_STA:
  2062. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2063. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2064. break;
  2065. case IEEE80211_IF_TYPE_IBSS:
  2066. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2067. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2068. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2069. RXON_FILTER_ACCEPT_GRP_MSK;
  2070. break;
  2071. case IEEE80211_IF_TYPE_MNTR:
  2072. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2073. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2074. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2075. break;
  2076. }
  2077. #if 0
  2078. /* TODO: Figure out when short_preamble would be set and cache from
  2079. * that */
  2080. if (!hw_to_local(priv->hw)->short_preamble)
  2081. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2082. else
  2083. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2084. #endif
  2085. ch_info = iwl_get_channel_info(priv, priv->phymode,
  2086. le16_to_cpu(priv->staging_rxon.channel));
  2087. if (!ch_info)
  2088. ch_info = &priv->channel_info[0];
  2089. /*
  2090. * in some case A channels are all non IBSS
  2091. * in this case force B/G channel
  2092. */
  2093. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2094. !(is_channel_ibss(ch_info)))
  2095. ch_info = &priv->channel_info[0];
  2096. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2097. if (is_channel_a_band(ch_info))
  2098. priv->phymode = MODE_IEEE80211A;
  2099. else
  2100. priv->phymode = MODE_IEEE80211G;
  2101. iwl_set_flags_for_phymode(priv, priv->phymode);
  2102. priv->staging_rxon.ofdm_basic_rates =
  2103. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2104. priv->staging_rxon.cck_basic_rates =
  2105. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2106. }
  2107. static int iwl_set_mode(struct iwl_priv *priv, int mode)
  2108. {
  2109. if (!iwl_is_ready_rf(priv))
  2110. return -EAGAIN;
  2111. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2112. const struct iwl_channel_info *ch_info;
  2113. ch_info = iwl_get_channel_info(priv,
  2114. priv->phymode,
  2115. le16_to_cpu(priv->staging_rxon.channel));
  2116. if (!ch_info || !is_channel_ibss(ch_info)) {
  2117. IWL_ERROR("channel %d not IBSS channel\n",
  2118. le16_to_cpu(priv->staging_rxon.channel));
  2119. return -EINVAL;
  2120. }
  2121. }
  2122. cancel_delayed_work(&priv->scan_check);
  2123. if (iwl_scan_cancel_timeout(priv, 100)) {
  2124. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2125. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2126. return -EAGAIN;
  2127. }
  2128. priv->iw_mode = mode;
  2129. iwl_connection_init_rx_config(priv);
  2130. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2131. iwl_clear_stations_table(priv);
  2132. iwl_commit_rxon(priv);
  2133. return 0;
  2134. }
  2135. static void iwl_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  2136. struct ieee80211_tx_control *ctl,
  2137. struct iwl_cmd *cmd,
  2138. struct sk_buff *skb_frag,
  2139. int last_frag)
  2140. {
  2141. struct iwl_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2142. switch (keyinfo->alg) {
  2143. case ALG_CCMP:
  2144. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2145. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2146. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2147. break;
  2148. case ALG_TKIP:
  2149. #if 0
  2150. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2151. if (last_frag)
  2152. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2153. 8);
  2154. else
  2155. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2156. #endif
  2157. break;
  2158. case ALG_WEP:
  2159. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2160. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2161. if (keyinfo->keylen == 13)
  2162. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2163. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2164. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2165. "with key %d\n", ctl->key_idx);
  2166. break;
  2167. default:
  2168. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2169. break;
  2170. }
  2171. }
  2172. /*
  2173. * handle build REPLY_TX command notification.
  2174. */
  2175. static void iwl_build_tx_cmd_basic(struct iwl_priv *priv,
  2176. struct iwl_cmd *cmd,
  2177. struct ieee80211_tx_control *ctrl,
  2178. struct ieee80211_hdr *hdr,
  2179. int is_unicast, u8 std_id)
  2180. {
  2181. __le16 *qc;
  2182. u16 fc = le16_to_cpu(hdr->frame_control);
  2183. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2184. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2185. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2186. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2187. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2188. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2189. if (ieee80211_is_probe_response(fc) &&
  2190. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2191. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2192. } else {
  2193. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2194. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2195. }
  2196. cmd->cmd.tx.sta_id = std_id;
  2197. if (ieee80211_get_morefrag(hdr))
  2198. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2199. qc = ieee80211_get_qos_ctrl(hdr);
  2200. if (qc) {
  2201. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2202. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2203. } else
  2204. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2205. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2206. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2207. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2208. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2209. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2210. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2211. }
  2212. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2213. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2214. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2215. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2216. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2217. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2218. cmd->cmd.tx.timeout.pm_frame_timeout =
  2219. cpu_to_le16(3);
  2220. else
  2221. cmd->cmd.tx.timeout.pm_frame_timeout =
  2222. cpu_to_le16(2);
  2223. } else
  2224. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2225. cmd->cmd.tx.driver_txop = 0;
  2226. cmd->cmd.tx.tx_flags = tx_flags;
  2227. cmd->cmd.tx.next_frame_len = 0;
  2228. }
  2229. static int iwl_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  2230. {
  2231. int sta_id;
  2232. u16 fc = le16_to_cpu(hdr->frame_control);
  2233. /* If this frame is broadcast or not data then use the broadcast
  2234. * station id */
  2235. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2236. is_multicast_ether_addr(hdr->addr1))
  2237. return priv->hw_setting.bcast_sta_id;
  2238. switch (priv->iw_mode) {
  2239. /* If this frame is part of a BSS network (we're a station), then
  2240. * we use the AP's station id */
  2241. case IEEE80211_IF_TYPE_STA:
  2242. return IWL_AP_ID;
  2243. /* If we are an AP, then find the station, or use BCAST */
  2244. case IEEE80211_IF_TYPE_AP:
  2245. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2246. if (sta_id != IWL_INVALID_STATION)
  2247. return sta_id;
  2248. return priv->hw_setting.bcast_sta_id;
  2249. /* If this frame is part of a IBSS network, then we use the
  2250. * target specific station id */
  2251. case IEEE80211_IF_TYPE_IBSS: {
  2252. DECLARE_MAC_BUF(mac);
  2253. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2254. if (sta_id != IWL_INVALID_STATION)
  2255. return sta_id;
  2256. sta_id = iwl_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  2257. if (sta_id != IWL_INVALID_STATION)
  2258. return sta_id;
  2259. IWL_DEBUG_DROP("Station %s not in station map. "
  2260. "Defaulting to broadcast...\n",
  2261. print_mac(mac, hdr->addr1));
  2262. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2263. return priv->hw_setting.bcast_sta_id;
  2264. }
  2265. default:
  2266. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2267. return priv->hw_setting.bcast_sta_id;
  2268. }
  2269. }
  2270. /*
  2271. * start REPLY_TX command process
  2272. */
  2273. static int iwl_tx_skb(struct iwl_priv *priv,
  2274. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2275. {
  2276. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2277. struct iwl_tfd_frame *tfd;
  2278. u32 *control_flags;
  2279. int txq_id = ctl->queue;
  2280. struct iwl_tx_queue *txq = NULL;
  2281. struct iwl_queue *q = NULL;
  2282. dma_addr_t phys_addr;
  2283. dma_addr_t txcmd_phys;
  2284. struct iwl_cmd *out_cmd = NULL;
  2285. u16 len, idx, len_org;
  2286. u8 id, hdr_len, unicast;
  2287. u8 sta_id;
  2288. u16 seq_number = 0;
  2289. u16 fc;
  2290. __le16 *qc;
  2291. u8 wait_write_ptr = 0;
  2292. unsigned long flags;
  2293. int rc;
  2294. spin_lock_irqsave(&priv->lock, flags);
  2295. if (iwl_is_rfkill(priv)) {
  2296. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2297. goto drop_unlock;
  2298. }
  2299. if (!priv->interface_id) {
  2300. IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
  2301. goto drop_unlock;
  2302. }
  2303. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2304. IWL_ERROR("ERROR: No TX rate available.\n");
  2305. goto drop_unlock;
  2306. }
  2307. unicast = !is_multicast_ether_addr(hdr->addr1);
  2308. id = 0;
  2309. fc = le16_to_cpu(hdr->frame_control);
  2310. #ifdef CONFIG_IWLWIFI_DEBUG
  2311. if (ieee80211_is_auth(fc))
  2312. IWL_DEBUG_TX("Sending AUTH frame\n");
  2313. else if (ieee80211_is_assoc_request(fc))
  2314. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2315. else if (ieee80211_is_reassoc_request(fc))
  2316. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2317. #endif
  2318. if (!iwl_is_associated(priv) &&
  2319. ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
  2320. IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
  2321. goto drop_unlock;
  2322. }
  2323. spin_unlock_irqrestore(&priv->lock, flags);
  2324. hdr_len = ieee80211_get_hdrlen(fc);
  2325. sta_id = iwl_get_sta_id(priv, hdr);
  2326. if (sta_id == IWL_INVALID_STATION) {
  2327. DECLARE_MAC_BUF(mac);
  2328. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2329. print_mac(mac, hdr->addr1));
  2330. goto drop;
  2331. }
  2332. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2333. qc = ieee80211_get_qos_ctrl(hdr);
  2334. if (qc) {
  2335. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2336. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2337. IEEE80211_SCTL_SEQ;
  2338. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2339. (hdr->seq_ctrl &
  2340. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2341. seq_number += 0x10;
  2342. }
  2343. txq = &priv->txq[txq_id];
  2344. q = &txq->q;
  2345. spin_lock_irqsave(&priv->lock, flags);
  2346. tfd = &txq->bd[q->write_ptr];
  2347. memset(tfd, 0, sizeof(*tfd));
  2348. control_flags = (u32 *) tfd;
  2349. idx = get_cmd_index(q, q->write_ptr, 0);
  2350. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  2351. txq->txb[q->write_ptr].skb[0] = skb;
  2352. memcpy(&(txq->txb[q->write_ptr].status.control),
  2353. ctl, sizeof(struct ieee80211_tx_control));
  2354. out_cmd = &txq->cmd[idx];
  2355. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2356. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2357. out_cmd->hdr.cmd = REPLY_TX;
  2358. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2359. INDEX_TO_SEQ(q->write_ptr)));
  2360. /* copy frags header */
  2361. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2362. /* hdr = (struct ieee80211_hdr *)out_cmd->cmd.tx.hdr; */
  2363. len = priv->hw_setting.tx_cmd_len +
  2364. sizeof(struct iwl_cmd_header) + hdr_len;
  2365. len_org = len;
  2366. len = (len + 3) & ~3;
  2367. if (len_org != len)
  2368. len_org = 1;
  2369. else
  2370. len_org = 0;
  2371. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  2372. offsetof(struct iwl_cmd, hdr);
  2373. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2374. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2375. iwl_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2376. /* 802.11 null functions have no payload... */
  2377. len = skb->len - hdr_len;
  2378. if (len) {
  2379. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2380. len, PCI_DMA_TODEVICE);
  2381. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2382. }
  2383. /* If there is no payload, then only one TFD is used */
  2384. if (!len)
  2385. *control_flags = TFD_CTL_COUNT_SET(1);
  2386. else
  2387. *control_flags = TFD_CTL_COUNT_SET(2) |
  2388. TFD_CTL_PAD_SET(U32_PAD(len));
  2389. len = (u16)skb->len;
  2390. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2391. /* TODO need this for burst mode later on */
  2392. iwl_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2393. /* set is_hcca to 0; it probably will never be implemented */
  2394. iwl_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2395. out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  2396. out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  2397. if (!ieee80211_get_morefrag(hdr)) {
  2398. txq->need_update = 1;
  2399. if (qc) {
  2400. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2401. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2402. }
  2403. } else {
  2404. wait_write_ptr = 1;
  2405. txq->need_update = 0;
  2406. }
  2407. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2408. sizeof(out_cmd->cmd.tx));
  2409. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2410. ieee80211_get_hdrlen(fc));
  2411. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  2412. rc = iwl_tx_queue_update_write_ptr(priv, txq);
  2413. spin_unlock_irqrestore(&priv->lock, flags);
  2414. if (rc)
  2415. return rc;
  2416. if ((iwl_queue_space(q) < q->high_mark)
  2417. && priv->mac80211_registered) {
  2418. if (wait_write_ptr) {
  2419. spin_lock_irqsave(&priv->lock, flags);
  2420. txq->need_update = 1;
  2421. iwl_tx_queue_update_write_ptr(priv, txq);
  2422. spin_unlock_irqrestore(&priv->lock, flags);
  2423. }
  2424. ieee80211_stop_queue(priv->hw, ctl->queue);
  2425. }
  2426. return 0;
  2427. drop_unlock:
  2428. spin_unlock_irqrestore(&priv->lock, flags);
  2429. drop:
  2430. return -1;
  2431. }
  2432. static void iwl_set_rate(struct iwl_priv *priv)
  2433. {
  2434. const struct ieee80211_hw_mode *hw = NULL;
  2435. struct ieee80211_rate *rate;
  2436. int i;
  2437. hw = iwl_get_hw_mode(priv, priv->phymode);
  2438. if (!hw) {
  2439. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2440. return;
  2441. }
  2442. priv->active_rate = 0;
  2443. priv->active_rate_basic = 0;
  2444. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2445. hw->mode == MODE_IEEE80211A ?
  2446. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2447. for (i = 0; i < hw->num_rates; i++) {
  2448. rate = &(hw->rates[i]);
  2449. if ((rate->val < IWL_RATE_COUNT) &&
  2450. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2451. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2452. rate->val, iwl_rates[rate->val].plcp,
  2453. (rate->flags & IEEE80211_RATE_BASIC) ?
  2454. "*" : "");
  2455. priv->active_rate |= (1 << rate->val);
  2456. if (rate->flags & IEEE80211_RATE_BASIC)
  2457. priv->active_rate_basic |= (1 << rate->val);
  2458. } else
  2459. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2460. rate->val, iwl_rates[rate->val].plcp);
  2461. }
  2462. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2463. priv->active_rate, priv->active_rate_basic);
  2464. /*
  2465. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2466. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2467. * OFDM
  2468. */
  2469. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2470. priv->staging_rxon.cck_basic_rates =
  2471. ((priv->active_rate_basic &
  2472. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2473. else
  2474. priv->staging_rxon.cck_basic_rates =
  2475. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2476. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2477. priv->staging_rxon.ofdm_basic_rates =
  2478. ((priv->active_rate_basic &
  2479. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2480. IWL_FIRST_OFDM_RATE) & 0xFF;
  2481. else
  2482. priv->staging_rxon.ofdm_basic_rates =
  2483. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2484. }
  2485. static void iwl_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2486. {
  2487. unsigned long flags;
  2488. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2489. return;
  2490. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2491. disable_radio ? "OFF" : "ON");
  2492. if (disable_radio) {
  2493. iwl_scan_cancel(priv);
  2494. /* FIXME: This is a workaround for AP */
  2495. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2496. spin_lock_irqsave(&priv->lock, flags);
  2497. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2498. CSR_UCODE_SW_BIT_RFKILL);
  2499. spin_unlock_irqrestore(&priv->lock, flags);
  2500. iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2501. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2502. }
  2503. return;
  2504. }
  2505. spin_lock_irqsave(&priv->lock, flags);
  2506. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2507. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2508. spin_unlock_irqrestore(&priv->lock, flags);
  2509. /* wake up ucode */
  2510. msleep(10);
  2511. spin_lock_irqsave(&priv->lock, flags);
  2512. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2513. if (!iwl_grab_restricted_access(priv))
  2514. iwl_release_restricted_access(priv);
  2515. spin_unlock_irqrestore(&priv->lock, flags);
  2516. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2517. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2518. "disabled by HW switch\n");
  2519. return;
  2520. }
  2521. queue_work(priv->workqueue, &priv->restart);
  2522. return;
  2523. }
  2524. void iwl_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2525. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2526. {
  2527. u16 fc =
  2528. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2529. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2530. return;
  2531. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2532. return;
  2533. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2534. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2535. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2536. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2537. RX_RES_STATUS_BAD_ICV_MIC)
  2538. stats->flag |= RX_FLAG_MMIC_ERROR;
  2539. case RX_RES_STATUS_SEC_TYPE_WEP:
  2540. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2541. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2542. RX_RES_STATUS_DECRYPT_OK) {
  2543. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2544. stats->flag |= RX_FLAG_DECRYPTED;
  2545. }
  2546. break;
  2547. default:
  2548. break;
  2549. }
  2550. }
  2551. void iwl_handle_data_packet_monitor(struct iwl_priv *priv,
  2552. struct iwl_rx_mem_buffer *rxb,
  2553. void *data, short len,
  2554. struct ieee80211_rx_status *stats,
  2555. u16 phy_flags)
  2556. {
  2557. struct iwl_rt_rx_hdr *iwl_rt;
  2558. /* First cache any information we need before we overwrite
  2559. * the information provided in the skb from the hardware */
  2560. s8 signal = stats->ssi;
  2561. s8 noise = 0;
  2562. int rate = stats->rate;
  2563. u64 tsf = stats->mactime;
  2564. __le16 phy_flags_hw = cpu_to_le16(phy_flags);
  2565. /* We received data from the HW, so stop the watchdog */
  2566. if (len > IWL_RX_BUF_SIZE - sizeof(*iwl_rt)) {
  2567. IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
  2568. return;
  2569. }
  2570. /* copy the frame data to write after where the radiotap header goes */
  2571. iwl_rt = (void *)rxb->skb->data;
  2572. memmove(iwl_rt->payload, data, len);
  2573. iwl_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  2574. iwl_rt->rt_hdr.it_pad = 0; /* always good to zero */
  2575. /* total header + data */
  2576. iwl_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl_rt));
  2577. /* Set the size of the skb to the size of the frame */
  2578. skb_put(rxb->skb, sizeof(*iwl_rt) + len);
  2579. /* Big bitfield of all the fields we provide in radiotap */
  2580. iwl_rt->rt_hdr.it_present =
  2581. cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  2582. (1 << IEEE80211_RADIOTAP_FLAGS) |
  2583. (1 << IEEE80211_RADIOTAP_RATE) |
  2584. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  2585. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  2586. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  2587. (1 << IEEE80211_RADIOTAP_ANTENNA));
  2588. /* Zero the flags, we'll add to them as we go */
  2589. iwl_rt->rt_flags = 0;
  2590. iwl_rt->rt_tsf = cpu_to_le64(tsf);
  2591. /* Convert to dBm */
  2592. iwl_rt->rt_dbmsignal = signal;
  2593. iwl_rt->rt_dbmnoise = noise;
  2594. /* Convert the channel frequency and set the flags */
  2595. iwl_rt->rt_channelMHz = cpu_to_le16(stats->freq);
  2596. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  2597. iwl_rt->rt_chbitmask =
  2598. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
  2599. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  2600. iwl_rt->rt_chbitmask =
  2601. cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
  2602. else /* 802.11g */
  2603. iwl_rt->rt_chbitmask =
  2604. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
  2605. rate = iwl_rate_index_from_plcp(rate);
  2606. if (rate == -1)
  2607. iwl_rt->rt_rate = 0;
  2608. else
  2609. iwl_rt->rt_rate = iwl_rates[rate].ieee;
  2610. /* antenna number */
  2611. iwl_rt->rt_antenna =
  2612. le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
  2613. /* set the preamble flag if we have it */
  2614. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  2615. iwl_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  2616. IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
  2617. stats->flag |= RX_FLAG_RADIOTAP;
  2618. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2619. rxb->skb = NULL;
  2620. }
  2621. #define IWL_PACKET_RETRY_TIME HZ
  2622. int is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2623. {
  2624. u16 sc = le16_to_cpu(header->seq_ctrl);
  2625. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2626. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2627. u16 *last_seq, *last_frag;
  2628. unsigned long *last_time;
  2629. switch (priv->iw_mode) {
  2630. case IEEE80211_IF_TYPE_IBSS:{
  2631. struct list_head *p;
  2632. struct iwl_ibss_seq *entry = NULL;
  2633. u8 *mac = header->addr2;
  2634. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2635. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2636. entry =
  2637. list_entry(p, struct iwl_ibss_seq, list);
  2638. if (!compare_ether_addr(entry->mac, mac))
  2639. break;
  2640. }
  2641. if (p == &priv->ibss_mac_hash[index]) {
  2642. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2643. if (!entry) {
  2644. IWL_ERROR
  2645. ("Cannot malloc new mac entry\n");
  2646. return 0;
  2647. }
  2648. memcpy(entry->mac, mac, ETH_ALEN);
  2649. entry->seq_num = seq;
  2650. entry->frag_num = frag;
  2651. entry->packet_time = jiffies;
  2652. list_add(&entry->list,
  2653. &priv->ibss_mac_hash[index]);
  2654. return 0;
  2655. }
  2656. last_seq = &entry->seq_num;
  2657. last_frag = &entry->frag_num;
  2658. last_time = &entry->packet_time;
  2659. break;
  2660. }
  2661. case IEEE80211_IF_TYPE_STA:
  2662. last_seq = &priv->last_seq_num;
  2663. last_frag = &priv->last_frag_num;
  2664. last_time = &priv->last_packet_time;
  2665. break;
  2666. default:
  2667. return 0;
  2668. }
  2669. if ((*last_seq == seq) &&
  2670. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2671. if (*last_frag == frag)
  2672. goto drop;
  2673. if (*last_frag + 1 != frag)
  2674. /* out-of-order fragment */
  2675. goto drop;
  2676. } else
  2677. *last_seq = seq;
  2678. *last_frag = frag;
  2679. *last_time = jiffies;
  2680. return 0;
  2681. drop:
  2682. return 1;
  2683. }
  2684. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  2685. #include "iwl-spectrum.h"
  2686. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2687. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2688. #define TIME_UNIT 1024
  2689. /*
  2690. * extended beacon time format
  2691. * time in usec will be changed into a 32-bit value in 8:24 format
  2692. * the high 1 byte is the beacon counts
  2693. * the lower 3 bytes is the time in usec within one beacon interval
  2694. */
  2695. static u32 iwl_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2696. {
  2697. u32 quot;
  2698. u32 rem;
  2699. u32 interval = beacon_interval * 1024;
  2700. if (!interval || !usec)
  2701. return 0;
  2702. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2703. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2704. return (quot << 24) + rem;
  2705. }
  2706. /* base is usually what we get from ucode with each received frame,
  2707. * the same as HW timer counter counting down
  2708. */
  2709. static __le32 iwl_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2710. {
  2711. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2712. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2713. u32 interval = beacon_interval * TIME_UNIT;
  2714. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2715. (addon & BEACON_TIME_MASK_HIGH);
  2716. if (base_low > addon_low)
  2717. res += base_low - addon_low;
  2718. else if (base_low < addon_low) {
  2719. res += interval + base_low - addon_low;
  2720. res += (1 << 24);
  2721. } else
  2722. res += (1 << 24);
  2723. return cpu_to_le32(res);
  2724. }
  2725. static int iwl_get_measurement(struct iwl_priv *priv,
  2726. struct ieee80211_measurement_params *params,
  2727. u8 type)
  2728. {
  2729. struct iwl_spectrum_cmd spectrum;
  2730. struct iwl_rx_packet *res;
  2731. struct iwl_host_cmd cmd = {
  2732. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2733. .data = (void *)&spectrum,
  2734. .meta.flags = CMD_WANT_SKB,
  2735. };
  2736. u32 add_time = le64_to_cpu(params->start_time);
  2737. int rc;
  2738. int spectrum_resp_status;
  2739. int duration = le16_to_cpu(params->duration);
  2740. if (iwl_is_associated(priv))
  2741. add_time =
  2742. iwl_usecs_to_beacons(
  2743. le64_to_cpu(params->start_time) - priv->last_tsf,
  2744. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2745. memset(&spectrum, 0, sizeof(spectrum));
  2746. spectrum.channel_count = cpu_to_le16(1);
  2747. spectrum.flags =
  2748. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2749. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2750. cmd.len = sizeof(spectrum);
  2751. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2752. if (iwl_is_associated(priv))
  2753. spectrum.start_time =
  2754. iwl_add_beacon_time(priv->last_beacon_time,
  2755. add_time,
  2756. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2757. else
  2758. spectrum.start_time = 0;
  2759. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2760. spectrum.channels[0].channel = params->channel;
  2761. spectrum.channels[0].type = type;
  2762. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2763. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2764. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2765. rc = iwl_send_cmd_sync(priv, &cmd);
  2766. if (rc)
  2767. return rc;
  2768. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  2769. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2770. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2771. rc = -EIO;
  2772. }
  2773. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2774. switch (spectrum_resp_status) {
  2775. case 0: /* Command will be handled */
  2776. if (res->u.spectrum.id != 0xff) {
  2777. IWL_DEBUG_INFO
  2778. ("Replaced existing measurement: %d\n",
  2779. res->u.spectrum.id);
  2780. priv->measurement_status &= ~MEASUREMENT_READY;
  2781. }
  2782. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2783. rc = 0;
  2784. break;
  2785. case 1: /* Command will not be handled */
  2786. rc = -EAGAIN;
  2787. break;
  2788. }
  2789. dev_kfree_skb_any(cmd.meta.u.skb);
  2790. return rc;
  2791. }
  2792. #endif
  2793. static void iwl_txstatus_to_ieee(struct iwl_priv *priv,
  2794. struct iwl_tx_info *tx_sta)
  2795. {
  2796. tx_sta->status.ack_signal = 0;
  2797. tx_sta->status.excessive_retries = 0;
  2798. tx_sta->status.queue_length = 0;
  2799. tx_sta->status.queue_number = 0;
  2800. if (in_interrupt())
  2801. ieee80211_tx_status_irqsafe(priv->hw,
  2802. tx_sta->skb[0], &(tx_sta->status));
  2803. else
  2804. ieee80211_tx_status(priv->hw,
  2805. tx_sta->skb[0], &(tx_sta->status));
  2806. tx_sta->skb[0] = NULL;
  2807. }
  2808. /**
  2809. * iwl_tx_queue_reclaim - Reclaim Tx queue entries no more used by NIC.
  2810. *
  2811. * When FW advances 'R' index, all entries between old and
  2812. * new 'R' index need to be reclaimed. As result, some free space
  2813. * forms. If there is enough free space (> low mark), wake Tx queue.
  2814. */
  2815. int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2816. {
  2817. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2818. struct iwl_queue *q = &txq->q;
  2819. int nfreed = 0;
  2820. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2821. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2822. "is out of range [0-%d] %d %d.\n", txq_id,
  2823. index, q->n_bd, q->write_ptr, q->read_ptr);
  2824. return 0;
  2825. }
  2826. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2827. q->read_ptr != index;
  2828. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2829. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2830. iwl_txstatus_to_ieee(priv,
  2831. &(txq->txb[txq->q.read_ptr]));
  2832. iwl_hw_txq_free_tfd(priv, txq);
  2833. } else if (nfreed > 1) {
  2834. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2835. q->write_ptr, q->read_ptr);
  2836. queue_work(priv->workqueue, &priv->restart);
  2837. }
  2838. nfreed++;
  2839. }
  2840. if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2841. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2842. priv->mac80211_registered)
  2843. ieee80211_wake_queue(priv->hw, txq_id);
  2844. return nfreed;
  2845. }
  2846. static int iwl_is_tx_success(u32 status)
  2847. {
  2848. return (status & 0xFF) == 0x1;
  2849. }
  2850. /******************************************************************************
  2851. *
  2852. * Generic RX handler implementations
  2853. *
  2854. ******************************************************************************/
  2855. static void iwl_rx_reply_tx(struct iwl_priv *priv,
  2856. struct iwl_rx_mem_buffer *rxb)
  2857. {
  2858. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2859. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2860. int txq_id = SEQ_TO_QUEUE(sequence);
  2861. int index = SEQ_TO_INDEX(sequence);
  2862. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2863. struct ieee80211_tx_status *tx_status;
  2864. struct iwl_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2865. u32 status = le32_to_cpu(tx_resp->status);
  2866. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2867. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2868. "is out of range [0-%d] %d %d\n", txq_id,
  2869. index, txq->q.n_bd, txq->q.write_ptr,
  2870. txq->q.read_ptr);
  2871. return;
  2872. }
  2873. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2874. tx_status->retry_count = tx_resp->failure_frame;
  2875. tx_status->queue_number = status;
  2876. tx_status->queue_length = tx_resp->bt_kill_count;
  2877. tx_status->queue_length |= tx_resp->failure_rts;
  2878. tx_status->flags =
  2879. iwl_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2880. tx_status->control.tx_rate = iwl_rate_index_from_plcp(tx_resp->rate);
  2881. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
  2882. txq_id, iwl_get_tx_fail_reason(status), status,
  2883. tx_resp->rate, tx_resp->failure_frame);
  2884. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2885. if (index != -1)
  2886. iwl_tx_queue_reclaim(priv, txq_id, index);
  2887. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2888. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2889. }
  2890. static void iwl_rx_reply_alive(struct iwl_priv *priv,
  2891. struct iwl_rx_mem_buffer *rxb)
  2892. {
  2893. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2894. struct iwl_alive_resp *palive;
  2895. struct delayed_work *pwork;
  2896. palive = &pkt->u.alive_frame;
  2897. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2898. "0x%01X 0x%01X\n",
  2899. palive->is_valid, palive->ver_type,
  2900. palive->ver_subtype);
  2901. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2902. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2903. memcpy(&priv->card_alive_init,
  2904. &pkt->u.alive_frame,
  2905. sizeof(struct iwl_init_alive_resp));
  2906. pwork = &priv->init_alive_start;
  2907. } else {
  2908. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2909. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2910. sizeof(struct iwl_alive_resp));
  2911. pwork = &priv->alive_start;
  2912. iwl_disable_events(priv);
  2913. }
  2914. /* We delay the ALIVE response by 5ms to
  2915. * give the HW RF Kill time to activate... */
  2916. if (palive->is_valid == UCODE_VALID_OK)
  2917. queue_delayed_work(priv->workqueue, pwork,
  2918. msecs_to_jiffies(5));
  2919. else
  2920. IWL_WARNING("uCode did not respond OK.\n");
  2921. }
  2922. static void iwl_rx_reply_add_sta(struct iwl_priv *priv,
  2923. struct iwl_rx_mem_buffer *rxb)
  2924. {
  2925. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2926. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2927. return;
  2928. }
  2929. static void iwl_rx_reply_error(struct iwl_priv *priv,
  2930. struct iwl_rx_mem_buffer *rxb)
  2931. {
  2932. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2933. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2934. "seq 0x%04X ser 0x%08X\n",
  2935. le32_to_cpu(pkt->u.err_resp.error_type),
  2936. get_cmd_string(pkt->u.err_resp.cmd_id),
  2937. pkt->u.err_resp.cmd_id,
  2938. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2939. le32_to_cpu(pkt->u.err_resp.error_info));
  2940. }
  2941. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2942. static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  2943. {
  2944. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2945. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2946. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  2947. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2948. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2949. rxon->channel = csa->channel;
  2950. priv->staging_rxon.channel = csa->channel;
  2951. }
  2952. static void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2953. struct iwl_rx_mem_buffer *rxb)
  2954. {
  2955. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  2956. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2957. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2958. if (!report->state) {
  2959. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2960. "Spectrum Measure Notification: Start\n");
  2961. return;
  2962. }
  2963. memcpy(&priv->measure_report, report, sizeof(*report));
  2964. priv->measurement_status |= MEASUREMENT_READY;
  2965. #endif
  2966. }
  2967. static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  2968. struct iwl_rx_mem_buffer *rxb)
  2969. {
  2970. #ifdef CONFIG_IWLWIFI_DEBUG
  2971. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2972. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2973. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2974. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2975. #endif
  2976. }
  2977. static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2978. struct iwl_rx_mem_buffer *rxb)
  2979. {
  2980. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2981. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2982. "notification for %s:\n",
  2983. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2984. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  2985. }
  2986. static void iwl_bg_beacon_update(struct work_struct *work)
  2987. {
  2988. struct iwl_priv *priv =
  2989. container_of(work, struct iwl_priv, beacon_update);
  2990. struct sk_buff *beacon;
  2991. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2992. beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
  2993. if (!beacon) {
  2994. IWL_ERROR("update beacon failed\n");
  2995. return;
  2996. }
  2997. mutex_lock(&priv->mutex);
  2998. /* new beacon skb is allocated every time; dispose previous.*/
  2999. if (priv->ibss_beacon)
  3000. dev_kfree_skb(priv->ibss_beacon);
  3001. priv->ibss_beacon = beacon;
  3002. mutex_unlock(&priv->mutex);
  3003. iwl_send_beacon_cmd(priv);
  3004. }
  3005. static void iwl_rx_beacon_notif(struct iwl_priv *priv,
  3006. struct iwl_rx_mem_buffer *rxb)
  3007. {
  3008. #ifdef CONFIG_IWLWIFI_DEBUG
  3009. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3010. struct iwl_beacon_notif *beacon = &(pkt->u.beacon_status);
  3011. u8 rate = beacon->beacon_notify_hdr.rate;
  3012. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3013. "tsf %d %d rate %d\n",
  3014. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3015. beacon->beacon_notify_hdr.failure_frame,
  3016. le32_to_cpu(beacon->ibss_mgr_status),
  3017. le32_to_cpu(beacon->high_tsf),
  3018. le32_to_cpu(beacon->low_tsf), rate);
  3019. #endif
  3020. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3021. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3022. queue_work(priv->workqueue, &priv->beacon_update);
  3023. }
  3024. /* Service response to REPLY_SCAN_CMD (0x80) */
  3025. static void iwl_rx_reply_scan(struct iwl_priv *priv,
  3026. struct iwl_rx_mem_buffer *rxb)
  3027. {
  3028. #ifdef CONFIG_IWLWIFI_DEBUG
  3029. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3030. struct iwl_scanreq_notification *notif =
  3031. (struct iwl_scanreq_notification *)pkt->u.raw;
  3032. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3033. #endif
  3034. }
  3035. /* Service SCAN_START_NOTIFICATION (0x82) */
  3036. static void iwl_rx_scan_start_notif(struct iwl_priv *priv,
  3037. struct iwl_rx_mem_buffer *rxb)
  3038. {
  3039. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3040. struct iwl_scanstart_notification *notif =
  3041. (struct iwl_scanstart_notification *)pkt->u.raw;
  3042. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3043. IWL_DEBUG_SCAN("Scan start: "
  3044. "%d [802.11%s] "
  3045. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3046. notif->channel,
  3047. notif->band ? "bg" : "a",
  3048. notif->tsf_high,
  3049. notif->tsf_low, notif->status, notif->beacon_timer);
  3050. }
  3051. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3052. static void iwl_rx_scan_results_notif(struct iwl_priv *priv,
  3053. struct iwl_rx_mem_buffer *rxb)
  3054. {
  3055. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3056. struct iwl_scanresults_notification *notif =
  3057. (struct iwl_scanresults_notification *)pkt->u.raw;
  3058. IWL_DEBUG_SCAN("Scan ch.res: "
  3059. "%d [802.11%s] "
  3060. "(TSF: 0x%08X:%08X) - %d "
  3061. "elapsed=%lu usec (%dms since last)\n",
  3062. notif->channel,
  3063. notif->band ? "bg" : "a",
  3064. le32_to_cpu(notif->tsf_high),
  3065. le32_to_cpu(notif->tsf_low),
  3066. le32_to_cpu(notif->statistics[0]),
  3067. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3068. jiffies_to_msecs(elapsed_jiffies
  3069. (priv->last_scan_jiffies, jiffies)));
  3070. priv->last_scan_jiffies = jiffies;
  3071. }
  3072. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3073. static void iwl_rx_scan_complete_notif(struct iwl_priv *priv,
  3074. struct iwl_rx_mem_buffer *rxb)
  3075. {
  3076. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3077. struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3078. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3079. scan_notif->scanned_channels,
  3080. scan_notif->tsf_low,
  3081. scan_notif->tsf_high, scan_notif->status);
  3082. /* The HW is no longer scanning */
  3083. clear_bit(STATUS_SCAN_HW, &priv->status);
  3084. /* The scan completion notification came in, so kill that timer... */
  3085. cancel_delayed_work(&priv->scan_check);
  3086. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3087. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3088. jiffies_to_msecs(elapsed_jiffies
  3089. (priv->scan_pass_start, jiffies)));
  3090. /* Remove this scanned band from the list
  3091. * of pending bands to scan */
  3092. priv->scan_bands--;
  3093. /* If a request to abort was given, or the scan did not succeed
  3094. * then we reset the scan state machine and terminate,
  3095. * re-queuing another scan if one has been requested */
  3096. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3097. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3098. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3099. } else {
  3100. /* If there are more bands on this scan pass reschedule */
  3101. if (priv->scan_bands > 0)
  3102. goto reschedule;
  3103. }
  3104. priv->last_scan_jiffies = jiffies;
  3105. IWL_DEBUG_INFO("Setting scan to off\n");
  3106. clear_bit(STATUS_SCANNING, &priv->status);
  3107. IWL_DEBUG_INFO("Scan took %dms\n",
  3108. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3109. queue_work(priv->workqueue, &priv->scan_completed);
  3110. return;
  3111. reschedule:
  3112. priv->scan_pass_start = jiffies;
  3113. queue_work(priv->workqueue, &priv->request_scan);
  3114. }
  3115. /* Handle notification from uCode that card's power state is changing
  3116. * due to software, hardware, or critical temperature RFKILL */
  3117. static void iwl_rx_card_state_notif(struct iwl_priv *priv,
  3118. struct iwl_rx_mem_buffer *rxb)
  3119. {
  3120. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3121. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3122. unsigned long status = priv->status;
  3123. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3124. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3125. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3126. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3127. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3128. if (flags & HW_CARD_DISABLED)
  3129. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3130. else
  3131. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3132. if (flags & SW_CARD_DISABLED)
  3133. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3134. else
  3135. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3136. iwl_scan_cancel(priv);
  3137. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3138. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3139. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3140. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3141. queue_work(priv->workqueue, &priv->rf_kill);
  3142. else
  3143. wake_up_interruptible(&priv->wait_command_queue);
  3144. }
  3145. /**
  3146. * iwl_setup_rx_handlers - Initialize Rx handler callbacks
  3147. *
  3148. * Setup the RX handlers for each of the reply types sent from the uCode
  3149. * to the host.
  3150. *
  3151. * This function chains into the hardware specific files for them to setup
  3152. * any hardware specific handlers as well.
  3153. */
  3154. static void iwl_setup_rx_handlers(struct iwl_priv *priv)
  3155. {
  3156. priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
  3157. priv->rx_handlers[REPLY_ADD_STA] = iwl_rx_reply_add_sta;
  3158. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  3159. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  3160. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3161. iwl_rx_spectrum_measure_notif;
  3162. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  3163. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3164. iwl_rx_pm_debug_statistics_notif;
  3165. priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
  3166. /* NOTE: iwl_rx_statistics is different based on whether
  3167. * the build is for the 3945 or the 4965. See the
  3168. * corresponding implementation in iwl-XXXX.c
  3169. *
  3170. * The same handler is used for both the REPLY to a
  3171. * discrete statistics request from the host as well as
  3172. * for the periodic statistics notification from the uCode
  3173. */
  3174. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_hw_rx_statistics;
  3175. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_hw_rx_statistics;
  3176. priv->rx_handlers[REPLY_SCAN_CMD] = iwl_rx_reply_scan;
  3177. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl_rx_scan_start_notif;
  3178. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3179. iwl_rx_scan_results_notif;
  3180. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3181. iwl_rx_scan_complete_notif;
  3182. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
  3183. priv->rx_handlers[REPLY_TX] = iwl_rx_reply_tx;
  3184. /* Setup hardware specific Rx handlers */
  3185. iwl_hw_rx_handler_setup(priv);
  3186. }
  3187. /**
  3188. * iwl_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3189. * @rxb: Rx buffer to reclaim
  3190. *
  3191. * If an Rx buffer has an async callback associated with it the callback
  3192. * will be executed. The attached skb (if present) will only be freed
  3193. * if the callback returns 1
  3194. */
  3195. static void iwl_tx_cmd_complete(struct iwl_priv *priv,
  3196. struct iwl_rx_mem_buffer *rxb)
  3197. {
  3198. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3199. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3200. int txq_id = SEQ_TO_QUEUE(sequence);
  3201. int index = SEQ_TO_INDEX(sequence);
  3202. int huge = sequence & SEQ_HUGE_FRAME;
  3203. int cmd_index;
  3204. struct iwl_cmd *cmd;
  3205. /* If a Tx command is being handled and it isn't in the actual
  3206. * command queue then there a command routing bug has been introduced
  3207. * in the queue management code. */
  3208. if (txq_id != IWL_CMD_QUEUE_NUM)
  3209. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3210. txq_id, pkt->hdr.cmd);
  3211. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3212. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3213. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3214. /* Input error checking is done when commands are added to queue. */
  3215. if (cmd->meta.flags & CMD_WANT_SKB) {
  3216. cmd->meta.source->u.skb = rxb->skb;
  3217. rxb->skb = NULL;
  3218. } else if (cmd->meta.u.callback &&
  3219. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3220. rxb->skb = NULL;
  3221. iwl_tx_queue_reclaim(priv, txq_id, index);
  3222. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3223. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3224. wake_up_interruptible(&priv->wait_command_queue);
  3225. }
  3226. }
  3227. /************************** RX-FUNCTIONS ****************************/
  3228. /*
  3229. * Rx theory of operation
  3230. *
  3231. * The host allocates 32 DMA target addresses and passes the host address
  3232. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  3233. * 0 to 31
  3234. *
  3235. * Rx Queue Indexes
  3236. * The host/firmware share two index registers for managing the Rx buffers.
  3237. *
  3238. * The READ index maps to the first position that the firmware may be writing
  3239. * to -- the driver can read up to (but not including) this position and get
  3240. * good data.
  3241. * The READ index is managed by the firmware once the card is enabled.
  3242. *
  3243. * The WRITE index maps to the last position the driver has read from -- the
  3244. * position preceding WRITE is the last slot the firmware can place a packet.
  3245. *
  3246. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3247. * WRITE = READ.
  3248. *
  3249. * During initialization the host sets up the READ queue position to the first
  3250. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3251. *
  3252. * When the firmware places a packet in a buffer it will advance the READ index
  3253. * and fire the RX interrupt. The driver can then query the READ index and
  3254. * process as many packets as possible, moving the WRITE index forward as it
  3255. * resets the Rx queue buffers with new memory.
  3256. *
  3257. * The management in the driver is as follows:
  3258. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3259. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3260. * to replenish the iwl->rxq->rx_free.
  3261. * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  3262. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3263. * 'processed' and 'read' driver indexes as well)
  3264. * + A received packet is processed and handed to the kernel network stack,
  3265. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3266. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3267. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3268. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3269. * were enough free buffers and RX_STALLED is set it is cleared.
  3270. *
  3271. *
  3272. * Driver sequence:
  3273. *
  3274. * iwl_rx_queue_alloc() Allocates rx_free
  3275. * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3276. * iwl_rx_queue_restock
  3277. * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  3278. * queue, updates firmware pointers, and updates
  3279. * the WRITE index. If insufficient rx_free buffers
  3280. * are available, schedules iwl_rx_replenish
  3281. *
  3282. * -- enable interrupts --
  3283. * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
  3284. * READ INDEX, detaching the SKB from the pool.
  3285. * Moves the packet buffer from queue to rx_used.
  3286. * Calls iwl_rx_queue_restock to refill any empty
  3287. * slots.
  3288. * ...
  3289. *
  3290. */
  3291. /**
  3292. * iwl_rx_queue_space - Return number of free slots available in queue.
  3293. */
  3294. static int iwl_rx_queue_space(const struct iwl_rx_queue *q)
  3295. {
  3296. int s = q->read - q->write;
  3297. if (s <= 0)
  3298. s += RX_QUEUE_SIZE;
  3299. /* keep some buffer to not confuse full and empty queue */
  3300. s -= 2;
  3301. if (s < 0)
  3302. s = 0;
  3303. return s;
  3304. }
  3305. /**
  3306. * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3307. *
  3308. * NOTE: This function has 3945 and 4965 specific code sections
  3309. * but is declared in base due to the majority of the
  3310. * implementation being the same (only a numeric constant is
  3311. * different)
  3312. *
  3313. */
  3314. int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
  3315. {
  3316. u32 reg = 0;
  3317. int rc = 0;
  3318. unsigned long flags;
  3319. spin_lock_irqsave(&q->lock, flags);
  3320. if (q->need_update == 0)
  3321. goto exit_unlock;
  3322. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3323. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3324. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3325. iwl_set_bit(priv, CSR_GP_CNTRL,
  3326. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3327. goto exit_unlock;
  3328. }
  3329. rc = iwl_grab_restricted_access(priv);
  3330. if (rc)
  3331. goto exit_unlock;
  3332. iwl_write_restricted(priv, FH_RSCSR_CHNL0_WPTR,
  3333. q->write & ~0x7);
  3334. iwl_release_restricted_access(priv);
  3335. } else
  3336. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3337. q->need_update = 0;
  3338. exit_unlock:
  3339. spin_unlock_irqrestore(&q->lock, flags);
  3340. return rc;
  3341. }
  3342. /**
  3343. * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer pointer.
  3344. *
  3345. * NOTE: This function has 3945 and 4965 specific code paths in it.
  3346. */
  3347. static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3348. dma_addr_t dma_addr)
  3349. {
  3350. return cpu_to_le32((u32)dma_addr);
  3351. }
  3352. /**
  3353. * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
  3354. *
  3355. * If there are slots in the RX queue that need to be restocked,
  3356. * and we have free pre-allocated buffers, fill the ranks as much
  3357. * as we can pulling from rx_free.
  3358. *
  3359. * This moves the 'write' index forward to catch up with 'processed', and
  3360. * also updates the memory address in the firmware to reference the new
  3361. * target buffer.
  3362. */
  3363. int iwl_rx_queue_restock(struct iwl_priv *priv)
  3364. {
  3365. struct iwl_rx_queue *rxq = &priv->rxq;
  3366. struct list_head *element;
  3367. struct iwl_rx_mem_buffer *rxb;
  3368. unsigned long flags;
  3369. int write, rc;
  3370. spin_lock_irqsave(&rxq->lock, flags);
  3371. write = rxq->write & ~0x7;
  3372. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3373. element = rxq->rx_free.next;
  3374. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3375. list_del(element);
  3376. rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3377. rxq->queue[rxq->write] = rxb;
  3378. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3379. rxq->free_count--;
  3380. }
  3381. spin_unlock_irqrestore(&rxq->lock, flags);
  3382. /* If the pre-allocated buffer pool is dropping low, schedule to
  3383. * refill it */
  3384. if (rxq->free_count <= RX_LOW_WATERMARK)
  3385. queue_work(priv->workqueue, &priv->rx_replenish);
  3386. /* If we've added more space for the firmware to place data, tell it */
  3387. if ((write != (rxq->write & ~0x7))
  3388. || (abs(rxq->write - rxq->read) > 7)) {
  3389. spin_lock_irqsave(&rxq->lock, flags);
  3390. rxq->need_update = 1;
  3391. spin_unlock_irqrestore(&rxq->lock, flags);
  3392. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  3393. if (rc)
  3394. return rc;
  3395. }
  3396. return 0;
  3397. }
  3398. /**
  3399. * iwl_rx_replenish - Move all used packet from rx_used to rx_free
  3400. *
  3401. * When moving to rx_free an SKB is allocated for the slot.
  3402. *
  3403. * Also restock the Rx queue via iwl_rx_queue_restock.
  3404. * This is called as a scheduled work item (except for during initialization)
  3405. */
  3406. void iwl_rx_replenish(void *data)
  3407. {
  3408. struct iwl_priv *priv = data;
  3409. struct iwl_rx_queue *rxq = &priv->rxq;
  3410. struct list_head *element;
  3411. struct iwl_rx_mem_buffer *rxb;
  3412. unsigned long flags;
  3413. spin_lock_irqsave(&rxq->lock, flags);
  3414. while (!list_empty(&rxq->rx_used)) {
  3415. element = rxq->rx_used.next;
  3416. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3417. rxb->skb =
  3418. alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
  3419. if (!rxb->skb) {
  3420. if (net_ratelimit())
  3421. printk(KERN_CRIT DRV_NAME
  3422. ": Can not allocate SKB buffers\n");
  3423. /* We don't reschedule replenish work here -- we will
  3424. * call the restock method and if it still needs
  3425. * more buffers it will schedule replenish */
  3426. break;
  3427. }
  3428. priv->alloc_rxb_skb++;
  3429. list_del(element);
  3430. rxb->dma_addr =
  3431. pci_map_single(priv->pci_dev, rxb->skb->data,
  3432. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3433. list_add_tail(&rxb->list, &rxq->rx_free);
  3434. rxq->free_count++;
  3435. }
  3436. spin_unlock_irqrestore(&rxq->lock, flags);
  3437. spin_lock_irqsave(&priv->lock, flags);
  3438. iwl_rx_queue_restock(priv);
  3439. spin_unlock_irqrestore(&priv->lock, flags);
  3440. }
  3441. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3442. * If an SKB has been detached, the POOL needs to have it's SKB set to NULL
  3443. * This free routine walks the list of POOL entries and if SKB is set to
  3444. * non NULL it is unmapped and freed
  3445. */
  3446. void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3447. {
  3448. int i;
  3449. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3450. if (rxq->pool[i].skb != NULL) {
  3451. pci_unmap_single(priv->pci_dev,
  3452. rxq->pool[i].dma_addr,
  3453. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3454. dev_kfree_skb(rxq->pool[i].skb);
  3455. }
  3456. }
  3457. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3458. rxq->dma_addr);
  3459. rxq->bd = NULL;
  3460. }
  3461. int iwl_rx_queue_alloc(struct iwl_priv *priv)
  3462. {
  3463. struct iwl_rx_queue *rxq = &priv->rxq;
  3464. struct pci_dev *dev = priv->pci_dev;
  3465. int i;
  3466. spin_lock_init(&rxq->lock);
  3467. INIT_LIST_HEAD(&rxq->rx_free);
  3468. INIT_LIST_HEAD(&rxq->rx_used);
  3469. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3470. if (!rxq->bd)
  3471. return -ENOMEM;
  3472. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3473. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3474. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3475. /* Set us so that we have processed and used all buffers, but have
  3476. * not restocked the Rx queue with fresh buffers */
  3477. rxq->read = rxq->write = 0;
  3478. rxq->free_count = 0;
  3479. rxq->need_update = 0;
  3480. return 0;
  3481. }
  3482. void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3483. {
  3484. unsigned long flags;
  3485. int i;
  3486. spin_lock_irqsave(&rxq->lock, flags);
  3487. INIT_LIST_HEAD(&rxq->rx_free);
  3488. INIT_LIST_HEAD(&rxq->rx_used);
  3489. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3490. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3491. /* In the reset function, these buffers may have been allocated
  3492. * to an SKB, so we need to unmap and free potential storage */
  3493. if (rxq->pool[i].skb != NULL) {
  3494. pci_unmap_single(priv->pci_dev,
  3495. rxq->pool[i].dma_addr,
  3496. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3497. priv->alloc_rxb_skb--;
  3498. dev_kfree_skb(rxq->pool[i].skb);
  3499. rxq->pool[i].skb = NULL;
  3500. }
  3501. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3502. }
  3503. /* Set us so that we have processed and used all buffers, but have
  3504. * not restocked the Rx queue with fresh buffers */
  3505. rxq->read = rxq->write = 0;
  3506. rxq->free_count = 0;
  3507. spin_unlock_irqrestore(&rxq->lock, flags);
  3508. }
  3509. /* Convert linear signal-to-noise ratio into dB */
  3510. static u8 ratio2dB[100] = {
  3511. /* 0 1 2 3 4 5 6 7 8 9 */
  3512. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3513. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3514. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3515. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3516. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3517. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3518. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3519. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3520. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3521. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3522. };
  3523. /* Calculates a relative dB value from a ratio of linear
  3524. * (i.e. not dB) signal levels.
  3525. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3526. int iwl_calc_db_from_ratio(int sig_ratio)
  3527. {
  3528. /* Anything above 1000:1 just report as 60 dB */
  3529. if (sig_ratio > 1000)
  3530. return 60;
  3531. /* Above 100:1, divide by 10 and use table,
  3532. * add 20 dB to make up for divide by 10 */
  3533. if (sig_ratio > 100)
  3534. return (20 + (int)ratio2dB[sig_ratio/10]);
  3535. /* We shouldn't see this */
  3536. if (sig_ratio < 1)
  3537. return 0;
  3538. /* Use table for ratios 1:1 - 99:1 */
  3539. return (int)ratio2dB[sig_ratio];
  3540. }
  3541. #define PERFECT_RSSI (-20) /* dBm */
  3542. #define WORST_RSSI (-95) /* dBm */
  3543. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3544. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3545. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3546. * about formulas used below. */
  3547. int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3548. {
  3549. int sig_qual;
  3550. int degradation = PERFECT_RSSI - rssi_dbm;
  3551. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3552. * as indicator; formula is (signal dbm - noise dbm).
  3553. * SNR at or above 40 is a great signal (100%).
  3554. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3555. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3556. if (noise_dbm) {
  3557. if (rssi_dbm - noise_dbm >= 40)
  3558. return 100;
  3559. else if (rssi_dbm < noise_dbm)
  3560. return 0;
  3561. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3562. /* Else use just the signal level.
  3563. * This formula is a least squares fit of data points collected and
  3564. * compared with a reference system that had a percentage (%) display
  3565. * for signal quality. */
  3566. } else
  3567. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3568. (15 * RSSI_RANGE + 62 * degradation)) /
  3569. (RSSI_RANGE * RSSI_RANGE);
  3570. if (sig_qual > 100)
  3571. sig_qual = 100;
  3572. else if (sig_qual < 1)
  3573. sig_qual = 0;
  3574. return sig_qual;
  3575. }
  3576. /**
  3577. * iwl_rx_handle - Main entry function for receiving responses from the uCode
  3578. *
  3579. * Uses the priv->rx_handlers callback function array to invoke
  3580. * the appropriate handlers, including command responses,
  3581. * frame-received notifications, and other notifications.
  3582. */
  3583. static void iwl_rx_handle(struct iwl_priv *priv)
  3584. {
  3585. struct iwl_rx_mem_buffer *rxb;
  3586. struct iwl_rx_packet *pkt;
  3587. struct iwl_rx_queue *rxq = &priv->rxq;
  3588. u32 r, i;
  3589. int reclaim;
  3590. unsigned long flags;
  3591. r = iwl_hw_get_rx_read(priv);
  3592. i = rxq->read;
  3593. /* Rx interrupt, but nothing sent from uCode */
  3594. if (i == r)
  3595. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3596. while (i != r) {
  3597. rxb = rxq->queue[i];
  3598. /* If an RXB doesn't have a queue slot associated with it
  3599. * then a bug has been introduced in the queue refilling
  3600. * routines -- catch it here */
  3601. BUG_ON(rxb == NULL);
  3602. rxq->queue[i] = NULL;
  3603. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3604. IWL_RX_BUF_SIZE,
  3605. PCI_DMA_FROMDEVICE);
  3606. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3607. /* Reclaim a command buffer only if this packet is a response
  3608. * to a (driver-originated) command.
  3609. * If the packet (e.g. Rx frame) originated from uCode,
  3610. * there is no command buffer to reclaim.
  3611. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3612. * but apparently a few don't get set; catch them here. */
  3613. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3614. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3615. (pkt->hdr.cmd != REPLY_TX);
  3616. /* Based on type of command response or notification,
  3617. * handle those that need handling via function in
  3618. * rx_handlers table. See iwl_setup_rx_handlers() */
  3619. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3620. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3621. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3622. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3623. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3624. } else {
  3625. /* No handling needed */
  3626. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3627. "r %d i %d No handler needed for %s, 0x%02x\n",
  3628. r, i, get_cmd_string(pkt->hdr.cmd),
  3629. pkt->hdr.cmd);
  3630. }
  3631. if (reclaim) {
  3632. /* Invoke any callbacks, transfer the skb to caller,
  3633. * and fire off the (possibly) blocking iwl_send_cmd()
  3634. * as we reclaim the driver command queue */
  3635. if (rxb && rxb->skb)
  3636. iwl_tx_cmd_complete(priv, rxb);
  3637. else
  3638. IWL_WARNING("Claim null rxb?\n");
  3639. }
  3640. /* For now we just don't re-use anything. We can tweak this
  3641. * later to try and re-use notification packets and SKBs that
  3642. * fail to Rx correctly */
  3643. if (rxb->skb != NULL) {
  3644. priv->alloc_rxb_skb--;
  3645. dev_kfree_skb_any(rxb->skb);
  3646. rxb->skb = NULL;
  3647. }
  3648. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3649. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3650. spin_lock_irqsave(&rxq->lock, flags);
  3651. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3652. spin_unlock_irqrestore(&rxq->lock, flags);
  3653. i = (i + 1) & RX_QUEUE_MASK;
  3654. }
  3655. /* Backtrack one entry */
  3656. priv->rxq.read = i;
  3657. iwl_rx_queue_restock(priv);
  3658. }
  3659. int iwl_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3660. struct iwl_tx_queue *txq)
  3661. {
  3662. u32 reg = 0;
  3663. int rc = 0;
  3664. int txq_id = txq->q.id;
  3665. if (txq->need_update == 0)
  3666. return rc;
  3667. /* if we're trying to save power */
  3668. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3669. /* wake up nic if it's powered down ...
  3670. * uCode will wake up, and interrupt us again, so next
  3671. * time we'll skip this part. */
  3672. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3673. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3674. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3675. iwl_set_bit(priv, CSR_GP_CNTRL,
  3676. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3677. return rc;
  3678. }
  3679. /* restore this queue's parameters in nic hardware. */
  3680. rc = iwl_grab_restricted_access(priv);
  3681. if (rc)
  3682. return rc;
  3683. iwl_write_restricted(priv, HBUS_TARG_WRPTR,
  3684. txq->q.write_ptr | (txq_id << 8));
  3685. iwl_release_restricted_access(priv);
  3686. /* else not in power-save mode, uCode will never sleep when we're
  3687. * trying to tx (during RFKILL, we're not trying to tx). */
  3688. } else
  3689. iwl_write32(priv, HBUS_TARG_WRPTR,
  3690. txq->q.write_ptr | (txq_id << 8));
  3691. txq->need_update = 0;
  3692. return rc;
  3693. }
  3694. #ifdef CONFIG_IWLWIFI_DEBUG
  3695. static void iwl_print_rx_config_cmd(struct iwl_rxon_cmd *rxon)
  3696. {
  3697. DECLARE_MAC_BUF(mac);
  3698. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3699. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3700. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3701. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3702. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3703. le32_to_cpu(rxon->filter_flags));
  3704. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3705. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3706. rxon->ofdm_basic_rates);
  3707. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3708. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3709. print_mac(mac, rxon->node_addr));
  3710. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3711. print_mac(mac, rxon->bssid_addr));
  3712. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3713. }
  3714. #endif
  3715. static void iwl_enable_interrupts(struct iwl_priv *priv)
  3716. {
  3717. IWL_DEBUG_ISR("Enabling interrupts\n");
  3718. set_bit(STATUS_INT_ENABLED, &priv->status);
  3719. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3720. }
  3721. static inline void iwl_disable_interrupts(struct iwl_priv *priv)
  3722. {
  3723. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3724. /* disable interrupts from uCode/NIC to host */
  3725. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3726. /* acknowledge/clear/reset any interrupts still pending
  3727. * from uCode or flow handler (Rx/Tx DMA) */
  3728. iwl_write32(priv, CSR_INT, 0xffffffff);
  3729. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3730. IWL_DEBUG_ISR("Disabled interrupts\n");
  3731. }
  3732. static const char *desc_lookup(int i)
  3733. {
  3734. switch (i) {
  3735. case 1:
  3736. return "FAIL";
  3737. case 2:
  3738. return "BAD_PARAM";
  3739. case 3:
  3740. return "BAD_CHECKSUM";
  3741. case 4:
  3742. return "NMI_INTERRUPT";
  3743. case 5:
  3744. return "SYSASSERT";
  3745. case 6:
  3746. return "FATAL_ERROR";
  3747. }
  3748. return "UNKNOWN";
  3749. }
  3750. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3751. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3752. static void iwl_dump_nic_error_log(struct iwl_priv *priv)
  3753. {
  3754. u32 i;
  3755. u32 desc, time, count, base, data1;
  3756. u32 blink1, blink2, ilink1, ilink2;
  3757. int rc;
  3758. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3759. if (!iwl_hw_valid_rtc_data_addr(base)) {
  3760. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3761. return;
  3762. }
  3763. rc = iwl_grab_restricted_access(priv);
  3764. if (rc) {
  3765. IWL_WARNING("Can not read from adapter at this time.\n");
  3766. return;
  3767. }
  3768. count = iwl_read_restricted_mem(priv, base);
  3769. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3770. IWL_ERROR("Start IWL Error Log Dump:\n");
  3771. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  3772. priv->status, priv->config, count);
  3773. }
  3774. IWL_ERROR("Desc Time asrtPC blink2 "
  3775. "ilink1 nmiPC Line\n");
  3776. for (i = ERROR_START_OFFSET;
  3777. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  3778. i += ERROR_ELEM_SIZE) {
  3779. desc = iwl_read_restricted_mem(priv, base + i);
  3780. time =
  3781. iwl_read_restricted_mem(priv, base + i + 1 * sizeof(u32));
  3782. blink1 =
  3783. iwl_read_restricted_mem(priv, base + i + 2 * sizeof(u32));
  3784. blink2 =
  3785. iwl_read_restricted_mem(priv, base + i + 3 * sizeof(u32));
  3786. ilink1 =
  3787. iwl_read_restricted_mem(priv, base + i + 4 * sizeof(u32));
  3788. ilink2 =
  3789. iwl_read_restricted_mem(priv, base + i + 5 * sizeof(u32));
  3790. data1 =
  3791. iwl_read_restricted_mem(priv, base + i + 6 * sizeof(u32));
  3792. IWL_ERROR
  3793. ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  3794. desc_lookup(desc), desc, time, blink1, blink2,
  3795. ilink1, ilink2, data1);
  3796. }
  3797. iwl_release_restricted_access(priv);
  3798. }
  3799. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3800. /**
  3801. * iwl_print_event_log - Dump error event log to syslog
  3802. *
  3803. * NOTE: Must be called with iwl_grab_restricted_access() already obtained!
  3804. */
  3805. static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3806. u32 num_events, u32 mode)
  3807. {
  3808. u32 i;
  3809. u32 base; /* SRAM byte address of event log header */
  3810. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3811. u32 ptr; /* SRAM byte address of log data */
  3812. u32 ev, time, data; /* event log data */
  3813. if (num_events == 0)
  3814. return;
  3815. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3816. if (mode == 0)
  3817. event_size = 2 * sizeof(u32);
  3818. else
  3819. event_size = 3 * sizeof(u32);
  3820. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3821. /* "time" is actually "data" for mode 0 (no timestamp).
  3822. * place event id # at far right for easier visual parsing. */
  3823. for (i = 0; i < num_events; i++) {
  3824. ev = iwl_read_restricted_mem(priv, ptr);
  3825. ptr += sizeof(u32);
  3826. time = iwl_read_restricted_mem(priv, ptr);
  3827. ptr += sizeof(u32);
  3828. if (mode == 0)
  3829. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3830. else {
  3831. data = iwl_read_restricted_mem(priv, ptr);
  3832. ptr += sizeof(u32);
  3833. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3834. }
  3835. }
  3836. }
  3837. static void iwl_dump_nic_event_log(struct iwl_priv *priv)
  3838. {
  3839. int rc;
  3840. u32 base; /* SRAM byte address of event log header */
  3841. u32 capacity; /* event log capacity in # entries */
  3842. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3843. u32 num_wraps; /* # times uCode wrapped to top of log */
  3844. u32 next_entry; /* index of next entry to be written by uCode */
  3845. u32 size; /* # entries that we'll print */
  3846. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3847. if (!iwl_hw_valid_rtc_data_addr(base)) {
  3848. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3849. return;
  3850. }
  3851. rc = iwl_grab_restricted_access(priv);
  3852. if (rc) {
  3853. IWL_WARNING("Can not read from adapter at this time.\n");
  3854. return;
  3855. }
  3856. /* event log header */
  3857. capacity = iwl_read_restricted_mem(priv, base);
  3858. mode = iwl_read_restricted_mem(priv, base + (1 * sizeof(u32)));
  3859. num_wraps = iwl_read_restricted_mem(priv, base + (2 * sizeof(u32)));
  3860. next_entry = iwl_read_restricted_mem(priv, base + (3 * sizeof(u32)));
  3861. size = num_wraps ? capacity : next_entry;
  3862. /* bail out if nothing in log */
  3863. if (size == 0) {
  3864. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  3865. iwl_release_restricted_access(priv);
  3866. return;
  3867. }
  3868. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  3869. size, num_wraps);
  3870. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3871. * i.e the next one that uCode would fill. */
  3872. if (num_wraps)
  3873. iwl_print_event_log(priv, next_entry,
  3874. capacity - next_entry, mode);
  3875. /* (then/else) start at top of log */
  3876. iwl_print_event_log(priv, 0, next_entry, mode);
  3877. iwl_release_restricted_access(priv);
  3878. }
  3879. /**
  3880. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  3881. */
  3882. static void iwl_irq_handle_error(struct iwl_priv *priv)
  3883. {
  3884. /* Set the FW error flag -- cleared on iwl_down */
  3885. set_bit(STATUS_FW_ERROR, &priv->status);
  3886. /* Cancel currently queued command. */
  3887. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3888. #ifdef CONFIG_IWLWIFI_DEBUG
  3889. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  3890. iwl_dump_nic_error_log(priv);
  3891. iwl_dump_nic_event_log(priv);
  3892. iwl_print_rx_config_cmd(&priv->staging_rxon);
  3893. }
  3894. #endif
  3895. wake_up_interruptible(&priv->wait_command_queue);
  3896. /* Keep the restart process from trying to send host
  3897. * commands by clearing the INIT status bit */
  3898. clear_bit(STATUS_READY, &priv->status);
  3899. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3900. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3901. "Restarting adapter due to uCode error.\n");
  3902. if (iwl_is_associated(priv)) {
  3903. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  3904. sizeof(priv->recovery_rxon));
  3905. priv->error_recovering = 1;
  3906. }
  3907. queue_work(priv->workqueue, &priv->restart);
  3908. }
  3909. }
  3910. static void iwl_error_recovery(struct iwl_priv *priv)
  3911. {
  3912. unsigned long flags;
  3913. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  3914. sizeof(priv->staging_rxon));
  3915. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3916. iwl_commit_rxon(priv);
  3917. iwl_add_station(priv, priv->bssid, 1, 0);
  3918. spin_lock_irqsave(&priv->lock, flags);
  3919. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  3920. priv->error_recovering = 0;
  3921. spin_unlock_irqrestore(&priv->lock, flags);
  3922. }
  3923. static void iwl_irq_tasklet(struct iwl_priv *priv)
  3924. {
  3925. u32 inta, handled = 0;
  3926. u32 inta_fh;
  3927. unsigned long flags;
  3928. #ifdef CONFIG_IWLWIFI_DEBUG
  3929. u32 inta_mask;
  3930. #endif
  3931. spin_lock_irqsave(&priv->lock, flags);
  3932. /* Ack/clear/reset pending uCode interrupts.
  3933. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  3934. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  3935. inta = iwl_read32(priv, CSR_INT);
  3936. iwl_write32(priv, CSR_INT, inta);
  3937. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  3938. * Any new interrupts that happen after this, either while we're
  3939. * in this tasklet, or later, will show up in next ISR/tasklet. */
  3940. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3941. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  3942. #ifdef CONFIG_IWLWIFI_DEBUG
  3943. if (iwl_debug_level & IWL_DL_ISR) {
  3944. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  3945. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3946. inta, inta_mask, inta_fh);
  3947. }
  3948. #endif
  3949. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  3950. * atomic, make sure that inta covers all the interrupts that
  3951. * we've discovered, even if FH interrupt came in just after
  3952. * reading CSR_INT. */
  3953. if (inta_fh & CSR_FH_INT_RX_MASK)
  3954. inta |= CSR_INT_BIT_FH_RX;
  3955. if (inta_fh & CSR_FH_INT_TX_MASK)
  3956. inta |= CSR_INT_BIT_FH_TX;
  3957. /* Now service all interrupt bits discovered above. */
  3958. if (inta & CSR_INT_BIT_HW_ERR) {
  3959. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  3960. /* Tell the device to stop sending interrupts */
  3961. iwl_disable_interrupts(priv);
  3962. iwl_irq_handle_error(priv);
  3963. handled |= CSR_INT_BIT_HW_ERR;
  3964. spin_unlock_irqrestore(&priv->lock, flags);
  3965. return;
  3966. }
  3967. #ifdef CONFIG_IWLWIFI_DEBUG
  3968. if (iwl_debug_level & (IWL_DL_ISR)) {
  3969. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3970. if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
  3971. IWL_DEBUG_ISR("Microcode started or stopped.\n");
  3972. /* Alive notification via Rx interrupt will do the real work */
  3973. if (inta & CSR_INT_BIT_ALIVE)
  3974. IWL_DEBUG_ISR("Alive interrupt\n");
  3975. }
  3976. #endif
  3977. /* Safely ignore these bits for debug checks below */
  3978. inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
  3979. /* HW RF KILL switch toggled (4965 only) */
  3980. if (inta & CSR_INT_BIT_RF_KILL) {
  3981. int hw_rf_kill = 0;
  3982. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  3983. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  3984. hw_rf_kill = 1;
  3985. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  3986. "RF_KILL bit toggled to %s.\n",
  3987. hw_rf_kill ? "disable radio":"enable radio");
  3988. /* Queue restart only if RF_KILL switch was set to "kill"
  3989. * when we loaded driver, and is now set to "enable".
  3990. * After we're Alive, RF_KILL gets handled by
  3991. * iwl_rx_card_state_notif() */
  3992. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  3993. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3994. queue_work(priv->workqueue, &priv->restart);
  3995. }
  3996. handled |= CSR_INT_BIT_RF_KILL;
  3997. }
  3998. /* Chip got too hot and stopped itself (4965 only) */
  3999. if (inta & CSR_INT_BIT_CT_KILL) {
  4000. IWL_ERROR("Microcode CT kill error detected.\n");
  4001. handled |= CSR_INT_BIT_CT_KILL;
  4002. }
  4003. /* Error detected by uCode */
  4004. if (inta & CSR_INT_BIT_SW_ERR) {
  4005. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4006. inta);
  4007. iwl_irq_handle_error(priv);
  4008. handled |= CSR_INT_BIT_SW_ERR;
  4009. }
  4010. /* uCode wakes up after power-down sleep */
  4011. if (inta & CSR_INT_BIT_WAKEUP) {
  4012. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4013. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  4014. iwl_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4015. iwl_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4016. iwl_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4017. iwl_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4018. iwl_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4019. iwl_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4020. handled |= CSR_INT_BIT_WAKEUP;
  4021. }
  4022. /* All uCode command responses, including Tx command responses,
  4023. * Rx "responses" (frame-received notification), and other
  4024. * notifications from uCode come through here*/
  4025. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4026. iwl_rx_handle(priv);
  4027. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4028. }
  4029. if (inta & CSR_INT_BIT_FH_TX) {
  4030. IWL_DEBUG_ISR("Tx interrupt\n");
  4031. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  4032. if (!iwl_grab_restricted_access(priv)) {
  4033. iwl_write_restricted(priv,
  4034. FH_TCSR_CREDIT
  4035. (ALM_FH_SRVC_CHNL), 0x0);
  4036. iwl_release_restricted_access(priv);
  4037. }
  4038. handled |= CSR_INT_BIT_FH_TX;
  4039. }
  4040. if (inta & ~handled)
  4041. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4042. if (inta & ~CSR_INI_SET_MASK) {
  4043. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4044. inta & ~CSR_INI_SET_MASK);
  4045. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4046. }
  4047. /* Re-enable all interrupts */
  4048. iwl_enable_interrupts(priv);
  4049. #ifdef CONFIG_IWLWIFI_DEBUG
  4050. if (iwl_debug_level & (IWL_DL_ISR)) {
  4051. inta = iwl_read32(priv, CSR_INT);
  4052. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  4053. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4054. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4055. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4056. }
  4057. #endif
  4058. spin_unlock_irqrestore(&priv->lock, flags);
  4059. }
  4060. static irqreturn_t iwl_isr(int irq, void *data)
  4061. {
  4062. struct iwl_priv *priv = data;
  4063. u32 inta, inta_mask;
  4064. u32 inta_fh;
  4065. if (!priv)
  4066. return IRQ_NONE;
  4067. spin_lock(&priv->lock);
  4068. /* Disable (but don't clear!) interrupts here to avoid
  4069. * back-to-back ISRs and sporadic interrupts from our NIC.
  4070. * If we have something to service, the tasklet will re-enable ints.
  4071. * If we *don't* have something, we'll re-enable before leaving here. */
  4072. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  4073. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  4074. /* Discover which interrupts are active/pending */
  4075. inta = iwl_read32(priv, CSR_INT);
  4076. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4077. /* Ignore interrupt if there's nothing in NIC to service.
  4078. * This may be due to IRQ shared with another device,
  4079. * or due to sporadic interrupts thrown from our NIC. */
  4080. if (!inta && !inta_fh) {
  4081. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4082. goto none;
  4083. }
  4084. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4085. /* Hardware disappeared */
  4086. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4087. goto unplugged;
  4088. }
  4089. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4090. inta, inta_mask, inta_fh);
  4091. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  4092. tasklet_schedule(&priv->irq_tasklet);
  4093. unplugged:
  4094. spin_unlock(&priv->lock);
  4095. return IRQ_HANDLED;
  4096. none:
  4097. /* re-enable interrupts here since we don't have anything to service. */
  4098. iwl_enable_interrupts(priv);
  4099. spin_unlock(&priv->lock);
  4100. return IRQ_NONE;
  4101. }
  4102. /************************** EEPROM BANDS ****************************
  4103. *
  4104. * The iwl_eeprom_band definitions below provide the mapping from the
  4105. * EEPROM contents to the specific channel number supported for each
  4106. * band.
  4107. *
  4108. * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  4109. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4110. * The specific geography and calibration information for that channel
  4111. * is contained in the eeprom map itself.
  4112. *
  4113. * During init, we copy the eeprom information and channel map
  4114. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4115. *
  4116. * channel_map_24/52 provides the index in the channel_info array for a
  4117. * given channel. We have to have two separate maps as there is channel
  4118. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4119. * band_2
  4120. *
  4121. * A value of 0xff stored in the channel_map indicates that the channel
  4122. * is not supported by the hardware at all.
  4123. *
  4124. * A value of 0xfe in the channel_map indicates that the channel is not
  4125. * valid for Tx with the current hardware. This means that
  4126. * while the system can tune and receive on a given channel, it may not
  4127. * be able to associate or transmit any frames on that
  4128. * channel. There is no corresponding channel information for that
  4129. * entry.
  4130. *
  4131. *********************************************************************/
  4132. /* 2.4 GHz */
  4133. static const u8 iwl_eeprom_band_1[14] = {
  4134. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4135. };
  4136. /* 5.2 GHz bands */
  4137. static const u8 iwl_eeprom_band_2[] = {
  4138. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4139. };
  4140. static const u8 iwl_eeprom_band_3[] = { /* 5205-5320MHz */
  4141. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4142. };
  4143. static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
  4144. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4145. };
  4146. static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
  4147. 145, 149, 153, 157, 161, 165
  4148. };
  4149. static void iwl_init_band_reference(const struct iwl_priv *priv, int band,
  4150. int *eeprom_ch_count,
  4151. const struct iwl_eeprom_channel
  4152. **eeprom_ch_info,
  4153. const u8 **eeprom_ch_index)
  4154. {
  4155. switch (band) {
  4156. case 1: /* 2.4GHz band */
  4157. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
  4158. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4159. *eeprom_ch_index = iwl_eeprom_band_1;
  4160. break;
  4161. case 2: /* 5.2GHz band */
  4162. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
  4163. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4164. *eeprom_ch_index = iwl_eeprom_band_2;
  4165. break;
  4166. case 3: /* 5.2GHz band */
  4167. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
  4168. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4169. *eeprom_ch_index = iwl_eeprom_band_3;
  4170. break;
  4171. case 4: /* 5.2GHz band */
  4172. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
  4173. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4174. *eeprom_ch_index = iwl_eeprom_band_4;
  4175. break;
  4176. case 5: /* 5.2GHz band */
  4177. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
  4178. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4179. *eeprom_ch_index = iwl_eeprom_band_5;
  4180. break;
  4181. default:
  4182. BUG();
  4183. return;
  4184. }
  4185. }
  4186. const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
  4187. int phymode, u16 channel)
  4188. {
  4189. int i;
  4190. switch (phymode) {
  4191. case MODE_IEEE80211A:
  4192. for (i = 14; i < priv->channel_count; i++) {
  4193. if (priv->channel_info[i].channel == channel)
  4194. return &priv->channel_info[i];
  4195. }
  4196. break;
  4197. case MODE_IEEE80211B:
  4198. case MODE_IEEE80211G:
  4199. if (channel >= 1 && channel <= 14)
  4200. return &priv->channel_info[channel - 1];
  4201. break;
  4202. }
  4203. return NULL;
  4204. }
  4205. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4206. ? # x " " : "")
  4207. static int iwl_init_channel_map(struct iwl_priv *priv)
  4208. {
  4209. int eeprom_ch_count = 0;
  4210. const u8 *eeprom_ch_index = NULL;
  4211. const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
  4212. int band, ch;
  4213. struct iwl_channel_info *ch_info;
  4214. if (priv->channel_count) {
  4215. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4216. return 0;
  4217. }
  4218. if (priv->eeprom.version < 0x2f) {
  4219. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4220. priv->eeprom.version);
  4221. return -EINVAL;
  4222. }
  4223. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4224. priv->channel_count =
  4225. ARRAY_SIZE(iwl_eeprom_band_1) +
  4226. ARRAY_SIZE(iwl_eeprom_band_2) +
  4227. ARRAY_SIZE(iwl_eeprom_band_3) +
  4228. ARRAY_SIZE(iwl_eeprom_band_4) +
  4229. ARRAY_SIZE(iwl_eeprom_band_5);
  4230. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4231. priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
  4232. priv->channel_count, GFP_KERNEL);
  4233. if (!priv->channel_info) {
  4234. IWL_ERROR("Could not allocate channel_info\n");
  4235. priv->channel_count = 0;
  4236. return -ENOMEM;
  4237. }
  4238. ch_info = priv->channel_info;
  4239. /* Loop through the 5 EEPROM bands adding them in order to the
  4240. * channel map we maintain (that contains additional information than
  4241. * what just in the EEPROM) */
  4242. for (band = 1; band <= 5; band++) {
  4243. iwl_init_band_reference(priv, band, &eeprom_ch_count,
  4244. &eeprom_ch_info, &eeprom_ch_index);
  4245. /* Loop through each band adding each of the channels */
  4246. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4247. ch_info->channel = eeprom_ch_index[ch];
  4248. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4249. MODE_IEEE80211A;
  4250. /* permanently store EEPROM's channel regulatory flags
  4251. * and max power in channel info database. */
  4252. ch_info->eeprom = eeprom_ch_info[ch];
  4253. /* Copy the run-time flags so they are there even on
  4254. * invalid channels */
  4255. ch_info->flags = eeprom_ch_info[ch].flags;
  4256. if (!(is_channel_valid(ch_info))) {
  4257. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4258. "No traffic\n",
  4259. ch_info->channel,
  4260. ch_info->flags,
  4261. is_channel_a_band(ch_info) ?
  4262. "5.2" : "2.4");
  4263. ch_info++;
  4264. continue;
  4265. }
  4266. /* Initialize regulatory-based run-time data */
  4267. ch_info->max_power_avg = ch_info->curr_txpow =
  4268. eeprom_ch_info[ch].max_power_avg;
  4269. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4270. ch_info->min_power = 0;
  4271. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4272. " %ddBm): Ad-Hoc %ssupported\n",
  4273. ch_info->channel,
  4274. is_channel_a_band(ch_info) ?
  4275. "5.2" : "2.4",
  4276. CHECK_AND_PRINT(IBSS),
  4277. CHECK_AND_PRINT(ACTIVE),
  4278. CHECK_AND_PRINT(RADAR),
  4279. CHECK_AND_PRINT(WIDE),
  4280. CHECK_AND_PRINT(NARROW),
  4281. CHECK_AND_PRINT(DFS),
  4282. eeprom_ch_info[ch].flags,
  4283. eeprom_ch_info[ch].max_power_avg,
  4284. ((eeprom_ch_info[ch].
  4285. flags & EEPROM_CHANNEL_IBSS)
  4286. && !(eeprom_ch_info[ch].
  4287. flags & EEPROM_CHANNEL_RADAR))
  4288. ? "" : "not ");
  4289. /* Set the user_txpower_limit to the highest power
  4290. * supported by any channel */
  4291. if (eeprom_ch_info[ch].max_power_avg >
  4292. priv->user_txpower_limit)
  4293. priv->user_txpower_limit =
  4294. eeprom_ch_info[ch].max_power_avg;
  4295. ch_info++;
  4296. }
  4297. }
  4298. if (iwl3945_txpower_set_from_eeprom(priv))
  4299. return -EIO;
  4300. return 0;
  4301. }
  4302. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4303. * sending probe req. This should be set long enough to hear probe responses
  4304. * from more than one AP. */
  4305. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4306. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4307. /* For faster active scanning, scan will move to the next channel if fewer than
  4308. * PLCP_QUIET_THRESH packets are heard on this channel within
  4309. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4310. * time if it's a quiet channel (nothing responded to our probe, and there's
  4311. * no other traffic).
  4312. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4313. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4314. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4315. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4316. * Must be set longer than active dwell time.
  4317. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4318. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4319. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4320. #define IWL_PASSIVE_DWELL_BASE (100)
  4321. #define IWL_CHANNEL_TUNE_TIME 5
  4322. static inline u16 iwl_get_active_dwell_time(struct iwl_priv *priv, int phymode)
  4323. {
  4324. if (phymode == MODE_IEEE80211A)
  4325. return IWL_ACTIVE_DWELL_TIME_52;
  4326. else
  4327. return IWL_ACTIVE_DWELL_TIME_24;
  4328. }
  4329. static u16 iwl_get_passive_dwell_time(struct iwl_priv *priv, int phymode)
  4330. {
  4331. u16 active = iwl_get_active_dwell_time(priv, phymode);
  4332. u16 passive = (phymode != MODE_IEEE80211A) ?
  4333. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4334. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4335. if (iwl_is_associated(priv)) {
  4336. /* If we're associated, we clamp the maximum passive
  4337. * dwell time to be 98% of the beacon interval (minus
  4338. * 2 * channel tune time) */
  4339. passive = priv->beacon_int;
  4340. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4341. passive = IWL_PASSIVE_DWELL_BASE;
  4342. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4343. }
  4344. if (passive <= active)
  4345. passive = active + 1;
  4346. return passive;
  4347. }
  4348. static int iwl_get_channels_for_scan(struct iwl_priv *priv, int phymode,
  4349. u8 is_active, u8 direct_mask,
  4350. struct iwl_scan_channel *scan_ch)
  4351. {
  4352. const struct ieee80211_channel *channels = NULL;
  4353. const struct ieee80211_hw_mode *hw_mode;
  4354. const struct iwl_channel_info *ch_info;
  4355. u16 passive_dwell = 0;
  4356. u16 active_dwell = 0;
  4357. int added, i;
  4358. hw_mode = iwl_get_hw_mode(priv, phymode);
  4359. if (!hw_mode)
  4360. return 0;
  4361. channels = hw_mode->channels;
  4362. active_dwell = iwl_get_active_dwell_time(priv, phymode);
  4363. passive_dwell = iwl_get_passive_dwell_time(priv, phymode);
  4364. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4365. if (channels[i].chan ==
  4366. le16_to_cpu(priv->active_rxon.channel)) {
  4367. if (iwl_is_associated(priv)) {
  4368. IWL_DEBUG_SCAN
  4369. ("Skipping current channel %d\n",
  4370. le16_to_cpu(priv->active_rxon.channel));
  4371. continue;
  4372. }
  4373. } else if (priv->only_active_channel)
  4374. continue;
  4375. scan_ch->channel = channels[i].chan;
  4376. ch_info = iwl_get_channel_info(priv, phymode, scan_ch->channel);
  4377. if (!is_channel_valid(ch_info)) {
  4378. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4379. scan_ch->channel);
  4380. continue;
  4381. }
  4382. if (!is_active || is_channel_passive(ch_info) ||
  4383. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4384. scan_ch->type = 0; /* passive */
  4385. else
  4386. scan_ch->type = 1; /* active */
  4387. if (scan_ch->type & 1)
  4388. scan_ch->type |= (direct_mask << 1);
  4389. if (is_channel_narrow(ch_info))
  4390. scan_ch->type |= (1 << 7);
  4391. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4392. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4393. /* Set power levels to defaults */
  4394. scan_ch->tpc.dsp_atten = 110;
  4395. /* scan_pwr_info->tpc.dsp_atten; */
  4396. /*scan_pwr_info->tpc.tx_gain; */
  4397. if (phymode == MODE_IEEE80211A)
  4398. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4399. else {
  4400. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4401. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4402. * power level
  4403. scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
  4404. */
  4405. }
  4406. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4407. scan_ch->channel,
  4408. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4409. (scan_ch->type & 1) ?
  4410. active_dwell : passive_dwell);
  4411. scan_ch++;
  4412. added++;
  4413. }
  4414. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4415. return added;
  4416. }
  4417. static void iwl_reset_channel_flag(struct iwl_priv *priv)
  4418. {
  4419. int i, j;
  4420. for (i = 0; i < 3; i++) {
  4421. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4422. for (j = 0; j < hw_mode->num_channels; j++)
  4423. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4424. }
  4425. }
  4426. static void iwl_init_hw_rates(struct iwl_priv *priv,
  4427. struct ieee80211_rate *rates)
  4428. {
  4429. int i;
  4430. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4431. rates[i].rate = iwl_rates[i].ieee * 5;
  4432. rates[i].val = i; /* Rate scaling will work on indexes */
  4433. rates[i].val2 = i;
  4434. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4435. /* Only OFDM have the bits-per-symbol set */
  4436. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4437. rates[i].flags |= IEEE80211_RATE_OFDM;
  4438. else {
  4439. /*
  4440. * If CCK 1M then set rate flag to CCK else CCK_2
  4441. * which is CCK | PREAMBLE2
  4442. */
  4443. rates[i].flags |= (iwl_rates[i].plcp == 10) ?
  4444. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4445. }
  4446. /* Set up which ones are basic rates... */
  4447. if (IWL_BASIC_RATES_MASK & (1 << i))
  4448. rates[i].flags |= IEEE80211_RATE_BASIC;
  4449. }
  4450. }
  4451. /**
  4452. * iwl_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4453. */
  4454. static int iwl_init_geos(struct iwl_priv *priv)
  4455. {
  4456. struct iwl_channel_info *ch;
  4457. struct ieee80211_hw_mode *modes;
  4458. struct ieee80211_channel *channels;
  4459. struct ieee80211_channel *geo_ch;
  4460. struct ieee80211_rate *rates;
  4461. int i = 0;
  4462. enum {
  4463. A = 0,
  4464. B = 1,
  4465. G = 2,
  4466. };
  4467. int mode_count = 3;
  4468. if (priv->modes) {
  4469. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4470. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4471. return 0;
  4472. }
  4473. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4474. GFP_KERNEL);
  4475. if (!modes)
  4476. return -ENOMEM;
  4477. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4478. priv->channel_count, GFP_KERNEL);
  4479. if (!channels) {
  4480. kfree(modes);
  4481. return -ENOMEM;
  4482. }
  4483. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4484. GFP_KERNEL);
  4485. if (!rates) {
  4486. kfree(modes);
  4487. kfree(channels);
  4488. return -ENOMEM;
  4489. }
  4490. /* 0 = 802.11a
  4491. * 1 = 802.11b
  4492. * 2 = 802.11g
  4493. */
  4494. /* 5.2GHz channels start after the 2.4GHz channels */
  4495. modes[A].mode = MODE_IEEE80211A;
  4496. modes[A].channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4497. modes[A].rates = &rates[4];
  4498. modes[A].num_rates = 8; /* just OFDM */
  4499. modes[A].num_channels = 0;
  4500. modes[B].mode = MODE_IEEE80211B;
  4501. modes[B].channels = channels;
  4502. modes[B].rates = rates;
  4503. modes[B].num_rates = 4; /* just CCK */
  4504. modes[B].num_channels = 0;
  4505. modes[G].mode = MODE_IEEE80211G;
  4506. modes[G].channels = channels;
  4507. modes[G].rates = rates;
  4508. modes[G].num_rates = 12; /* OFDM & CCK */
  4509. modes[G].num_channels = 0;
  4510. priv->ieee_channels = channels;
  4511. priv->ieee_rates = rates;
  4512. iwl_init_hw_rates(priv, rates);
  4513. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4514. ch = &priv->channel_info[i];
  4515. if (!is_channel_valid(ch)) {
  4516. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4517. "skipping.\n",
  4518. ch->channel, is_channel_a_band(ch) ?
  4519. "5.2" : "2.4");
  4520. continue;
  4521. }
  4522. if (is_channel_a_band(ch))
  4523. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4524. else {
  4525. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4526. modes[G].num_channels++;
  4527. }
  4528. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4529. geo_ch->chan = ch->channel;
  4530. geo_ch->power_level = ch->max_power_avg;
  4531. geo_ch->antenna_max = 0xff;
  4532. if (is_channel_valid(ch)) {
  4533. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4534. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4535. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4536. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4537. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4538. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4539. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4540. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4541. priv->max_channel_txpower_limit =
  4542. ch->max_power_avg;
  4543. }
  4544. geo_ch->val = geo_ch->flag;
  4545. }
  4546. if ((modes[A].num_channels == 0) && priv->is_abg) {
  4547. printk(KERN_INFO DRV_NAME
  4548. ": Incorrectly detected BG card as ABG. Please send "
  4549. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4550. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4551. priv->is_abg = 0;
  4552. }
  4553. printk(KERN_INFO DRV_NAME
  4554. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4555. modes[G].num_channels, modes[A].num_channels);
  4556. /*
  4557. * NOTE: We register these in preference of order -- the
  4558. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  4559. * a phymode based on rates or AP capabilities but seems to
  4560. * configure it purely on if the channel being configured
  4561. * is supported by a mode -- and the first match is taken
  4562. */
  4563. if (modes[G].num_channels)
  4564. ieee80211_register_hwmode(priv->hw, &modes[G]);
  4565. if (modes[B].num_channels)
  4566. ieee80211_register_hwmode(priv->hw, &modes[B]);
  4567. if (modes[A].num_channels)
  4568. ieee80211_register_hwmode(priv->hw, &modes[A]);
  4569. priv->modes = modes;
  4570. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4571. return 0;
  4572. }
  4573. /******************************************************************************
  4574. *
  4575. * uCode download functions
  4576. *
  4577. ******************************************************************************/
  4578. static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
  4579. {
  4580. if (priv->ucode_code.v_addr != NULL) {
  4581. pci_free_consistent(priv->pci_dev,
  4582. priv->ucode_code.len,
  4583. priv->ucode_code.v_addr,
  4584. priv->ucode_code.p_addr);
  4585. priv->ucode_code.v_addr = NULL;
  4586. }
  4587. if (priv->ucode_data.v_addr != NULL) {
  4588. pci_free_consistent(priv->pci_dev,
  4589. priv->ucode_data.len,
  4590. priv->ucode_data.v_addr,
  4591. priv->ucode_data.p_addr);
  4592. priv->ucode_data.v_addr = NULL;
  4593. }
  4594. if (priv->ucode_data_backup.v_addr != NULL) {
  4595. pci_free_consistent(priv->pci_dev,
  4596. priv->ucode_data_backup.len,
  4597. priv->ucode_data_backup.v_addr,
  4598. priv->ucode_data_backup.p_addr);
  4599. priv->ucode_data_backup.v_addr = NULL;
  4600. }
  4601. if (priv->ucode_init.v_addr != NULL) {
  4602. pci_free_consistent(priv->pci_dev,
  4603. priv->ucode_init.len,
  4604. priv->ucode_init.v_addr,
  4605. priv->ucode_init.p_addr);
  4606. priv->ucode_init.v_addr = NULL;
  4607. }
  4608. if (priv->ucode_init_data.v_addr != NULL) {
  4609. pci_free_consistent(priv->pci_dev,
  4610. priv->ucode_init_data.len,
  4611. priv->ucode_init_data.v_addr,
  4612. priv->ucode_init_data.p_addr);
  4613. priv->ucode_init_data.v_addr = NULL;
  4614. }
  4615. if (priv->ucode_boot.v_addr != NULL) {
  4616. pci_free_consistent(priv->pci_dev,
  4617. priv->ucode_boot.len,
  4618. priv->ucode_boot.v_addr,
  4619. priv->ucode_boot.p_addr);
  4620. priv->ucode_boot.v_addr = NULL;
  4621. }
  4622. }
  4623. /**
  4624. * iwl_verify_inst_full - verify runtime uCode image in card vs. host,
  4625. * looking at all data.
  4626. */
  4627. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 * image, u32 len)
  4628. {
  4629. u32 val;
  4630. u32 save_len = len;
  4631. int rc = 0;
  4632. u32 errcnt;
  4633. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4634. rc = iwl_grab_restricted_access(priv);
  4635. if (rc)
  4636. return rc;
  4637. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4638. errcnt = 0;
  4639. for (; len > 0; len -= sizeof(u32), image++) {
  4640. /* read data comes through single port, auto-incr addr */
  4641. /* NOTE: Use the debugless read so we don't flood kernel log
  4642. * if IWL_DL_IO is set */
  4643. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4644. if (val != le32_to_cpu(*image)) {
  4645. IWL_ERROR("uCode INST section is invalid at "
  4646. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4647. save_len - len, val, le32_to_cpu(*image));
  4648. rc = -EIO;
  4649. errcnt++;
  4650. if (errcnt >= 20)
  4651. break;
  4652. }
  4653. }
  4654. iwl_release_restricted_access(priv);
  4655. if (!errcnt)
  4656. IWL_DEBUG_INFO
  4657. ("ucode image in INSTRUCTION memory is good\n");
  4658. return rc;
  4659. }
  4660. /**
  4661. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4662. * using sample data 100 bytes apart. If these sample points are good,
  4663. * it's a pretty good bet that everything between them is good, too.
  4664. */
  4665. static int iwl_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4666. {
  4667. u32 val;
  4668. int rc = 0;
  4669. u32 errcnt = 0;
  4670. u32 i;
  4671. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4672. rc = iwl_grab_restricted_access(priv);
  4673. if (rc)
  4674. return rc;
  4675. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4676. /* read data comes through single port, auto-incr addr */
  4677. /* NOTE: Use the debugless read so we don't flood kernel log
  4678. * if IWL_DL_IO is set */
  4679. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR,
  4680. i + RTC_INST_LOWER_BOUND);
  4681. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4682. if (val != le32_to_cpu(*image)) {
  4683. #if 0 /* Enable this if you want to see details */
  4684. IWL_ERROR("uCode INST section is invalid at "
  4685. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4686. i, val, *image);
  4687. #endif
  4688. rc = -EIO;
  4689. errcnt++;
  4690. if (errcnt >= 3)
  4691. break;
  4692. }
  4693. }
  4694. iwl_release_restricted_access(priv);
  4695. return rc;
  4696. }
  4697. /**
  4698. * iwl_verify_ucode - determine which instruction image is in SRAM,
  4699. * and verify its contents
  4700. */
  4701. static int iwl_verify_ucode(struct iwl_priv *priv)
  4702. {
  4703. __le32 *image;
  4704. u32 len;
  4705. int rc = 0;
  4706. /* Try bootstrap */
  4707. image = (__le32 *)priv->ucode_boot.v_addr;
  4708. len = priv->ucode_boot.len;
  4709. rc = iwl_verify_inst_sparse(priv, image, len);
  4710. if (rc == 0) {
  4711. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4712. return 0;
  4713. }
  4714. /* Try initialize */
  4715. image = (__le32 *)priv->ucode_init.v_addr;
  4716. len = priv->ucode_init.len;
  4717. rc = iwl_verify_inst_sparse(priv, image, len);
  4718. if (rc == 0) {
  4719. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4720. return 0;
  4721. }
  4722. /* Try runtime/protocol */
  4723. image = (__le32 *)priv->ucode_code.v_addr;
  4724. len = priv->ucode_code.len;
  4725. rc = iwl_verify_inst_sparse(priv, image, len);
  4726. if (rc == 0) {
  4727. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4728. return 0;
  4729. }
  4730. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4731. /* Show first several data entries in instruction SRAM.
  4732. * Selection of bootstrap image is arbitrary. */
  4733. image = (__le32 *)priv->ucode_boot.v_addr;
  4734. len = priv->ucode_boot.len;
  4735. rc = iwl_verify_inst_full(priv, image, len);
  4736. return rc;
  4737. }
  4738. /* check contents of special bootstrap uCode SRAM */
  4739. static int iwl_verify_bsm(struct iwl_priv *priv)
  4740. {
  4741. __le32 *image = priv->ucode_boot.v_addr;
  4742. u32 len = priv->ucode_boot.len;
  4743. u32 reg;
  4744. u32 val;
  4745. IWL_DEBUG_INFO("Begin verify bsm\n");
  4746. /* verify BSM SRAM contents */
  4747. val = iwl_read_restricted_reg(priv, BSM_WR_DWCOUNT_REG);
  4748. for (reg = BSM_SRAM_LOWER_BOUND;
  4749. reg < BSM_SRAM_LOWER_BOUND + len;
  4750. reg += sizeof(u32), image ++) {
  4751. val = iwl_read_restricted_reg(priv, reg);
  4752. if (val != le32_to_cpu(*image)) {
  4753. IWL_ERROR("BSM uCode verification failed at "
  4754. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4755. BSM_SRAM_LOWER_BOUND,
  4756. reg - BSM_SRAM_LOWER_BOUND, len,
  4757. val, le32_to_cpu(*image));
  4758. return -EIO;
  4759. }
  4760. }
  4761. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4762. return 0;
  4763. }
  4764. /**
  4765. * iwl_load_bsm - Load bootstrap instructions
  4766. *
  4767. * BSM operation:
  4768. *
  4769. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4770. * in special SRAM that does not power down during RFKILL. When powering back
  4771. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4772. * the bootstrap program into the on-board processor, and starts it.
  4773. *
  4774. * The bootstrap program loads (via DMA) instructions and data for a new
  4775. * program from host DRAM locations indicated by the host driver in the
  4776. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4777. * automatically.
  4778. *
  4779. * When initializing the NIC, the host driver points the BSM to the
  4780. * "initialize" uCode image. This uCode sets up some internal data, then
  4781. * notifies host via "initialize alive" that it is complete.
  4782. *
  4783. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4784. * normal runtime uCode instructions and a backup uCode data cache buffer
  4785. * (filled initially with starting data values for the on-board processor),
  4786. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4787. * which begins normal operation.
  4788. *
  4789. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4790. * the backup data cache in DRAM before SRAM is powered down.
  4791. *
  4792. * When powering back up, the BSM loads the bootstrap program. This reloads
  4793. * the runtime uCode instructions and the backup data cache into SRAM,
  4794. * and re-launches the runtime uCode from where it left off.
  4795. */
  4796. static int iwl_load_bsm(struct iwl_priv *priv)
  4797. {
  4798. __le32 *image = priv->ucode_boot.v_addr;
  4799. u32 len = priv->ucode_boot.len;
  4800. dma_addr_t pinst;
  4801. dma_addr_t pdata;
  4802. u32 inst_len;
  4803. u32 data_len;
  4804. int rc;
  4805. int i;
  4806. u32 done;
  4807. u32 reg_offset;
  4808. IWL_DEBUG_INFO("Begin load bsm\n");
  4809. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4810. if (len > IWL_MAX_BSM_SIZE)
  4811. return -EINVAL;
  4812. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4813. * in host DRAM ... bits 31:0 for 3945, bits 35:4 for 4965.
  4814. * NOTE: iwl_initialize_alive_start() will replace these values,
  4815. * after the "initialize" uCode has run, to point to
  4816. * runtime/protocol instructions and backup data cache. */
  4817. pinst = priv->ucode_init.p_addr;
  4818. pdata = priv->ucode_init_data.p_addr;
  4819. inst_len = priv->ucode_init.len;
  4820. data_len = priv->ucode_init_data.len;
  4821. rc = iwl_grab_restricted_access(priv);
  4822. if (rc)
  4823. return rc;
  4824. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4825. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4826. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  4827. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  4828. /* Fill BSM memory with bootstrap instructions */
  4829. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  4830. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  4831. reg_offset += sizeof(u32), image++)
  4832. _iwl_write_restricted_reg(priv, reg_offset,
  4833. le32_to_cpu(*image));
  4834. rc = iwl_verify_bsm(priv);
  4835. if (rc) {
  4836. iwl_release_restricted_access(priv);
  4837. return rc;
  4838. }
  4839. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  4840. iwl_write_restricted_reg(priv, BSM_WR_MEM_SRC_REG, 0x0);
  4841. iwl_write_restricted_reg(priv, BSM_WR_MEM_DST_REG,
  4842. RTC_INST_LOWER_BOUND);
  4843. iwl_write_restricted_reg(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  4844. /* Load bootstrap code into instruction SRAM now,
  4845. * to prepare to load "initialize" uCode */
  4846. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  4847. BSM_WR_CTRL_REG_BIT_START);
  4848. /* Wait for load of bootstrap uCode to finish */
  4849. for (i = 0; i < 100; i++) {
  4850. done = iwl_read_restricted_reg(priv, BSM_WR_CTRL_REG);
  4851. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  4852. break;
  4853. udelay(10);
  4854. }
  4855. if (i < 100)
  4856. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  4857. else {
  4858. IWL_ERROR("BSM write did not complete!\n");
  4859. return -EIO;
  4860. }
  4861. /* Enable future boot loads whenever power management unit triggers it
  4862. * (e.g. when powering back up after power-save shutdown) */
  4863. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  4864. BSM_WR_CTRL_REG_BIT_START_EN);
  4865. iwl_release_restricted_access(priv);
  4866. return 0;
  4867. }
  4868. static void iwl_nic_start(struct iwl_priv *priv)
  4869. {
  4870. /* Remove all resets to allow NIC to operate */
  4871. iwl_write32(priv, CSR_RESET, 0);
  4872. }
  4873. /**
  4874. * iwl_read_ucode - Read uCode images from disk file.
  4875. *
  4876. * Copy into buffers for card to fetch via bus-mastering
  4877. */
  4878. static int iwl_read_ucode(struct iwl_priv *priv)
  4879. {
  4880. struct iwl_ucode *ucode;
  4881. int rc = 0;
  4882. const struct firmware *ucode_raw;
  4883. /* firmware file name contains uCode/driver compatibility version */
  4884. const char *name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode";
  4885. u8 *src;
  4886. size_t len;
  4887. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4888. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4889. * request_firmware() is synchronous, file is in memory on return. */
  4890. rc = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4891. if (rc < 0) {
  4892. IWL_ERROR("%s firmware file req failed: Reason %d\n", name, rc);
  4893. goto error;
  4894. }
  4895. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4896. name, ucode_raw->size);
  4897. /* Make sure that we got at least our header! */
  4898. if (ucode_raw->size < sizeof(*ucode)) {
  4899. IWL_ERROR("File size way too small!\n");
  4900. rc = -EINVAL;
  4901. goto err_release;
  4902. }
  4903. /* Data from ucode file: header followed by uCode images */
  4904. ucode = (void *)ucode_raw->data;
  4905. ver = le32_to_cpu(ucode->ver);
  4906. inst_size = le32_to_cpu(ucode->inst_size);
  4907. data_size = le32_to_cpu(ucode->data_size);
  4908. init_size = le32_to_cpu(ucode->init_size);
  4909. init_data_size = le32_to_cpu(ucode->init_data_size);
  4910. boot_size = le32_to_cpu(ucode->boot_size);
  4911. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  4912. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  4913. inst_size);
  4914. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  4915. data_size);
  4916. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  4917. init_size);
  4918. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  4919. init_data_size);
  4920. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  4921. boot_size);
  4922. /* Verify size of file vs. image size info in file's header */
  4923. if (ucode_raw->size < sizeof(*ucode) +
  4924. inst_size + data_size + init_size +
  4925. init_data_size + boot_size) {
  4926. IWL_DEBUG_INFO("uCode file size %d too small\n",
  4927. (int)ucode_raw->size);
  4928. rc = -EINVAL;
  4929. goto err_release;
  4930. }
  4931. /* Verify that uCode images will fit in card's SRAM */
  4932. if (inst_size > IWL_MAX_INST_SIZE) {
  4933. IWL_DEBUG_INFO("uCode instr len %d too large to fit in card\n",
  4934. (int)inst_size);
  4935. rc = -EINVAL;
  4936. goto err_release;
  4937. }
  4938. if (data_size > IWL_MAX_DATA_SIZE) {
  4939. IWL_DEBUG_INFO("uCode data len %d too large to fit in card\n",
  4940. (int)data_size);
  4941. rc = -EINVAL;
  4942. goto err_release;
  4943. }
  4944. if (init_size > IWL_MAX_INST_SIZE) {
  4945. IWL_DEBUG_INFO
  4946. ("uCode init instr len %d too large to fit in card\n",
  4947. (int)init_size);
  4948. rc = -EINVAL;
  4949. goto err_release;
  4950. }
  4951. if (init_data_size > IWL_MAX_DATA_SIZE) {
  4952. IWL_DEBUG_INFO
  4953. ("uCode init data len %d too large to fit in card\n",
  4954. (int)init_data_size);
  4955. rc = -EINVAL;
  4956. goto err_release;
  4957. }
  4958. if (boot_size > IWL_MAX_BSM_SIZE) {
  4959. IWL_DEBUG_INFO
  4960. ("uCode boot instr len %d too large to fit in bsm\n",
  4961. (int)boot_size);
  4962. rc = -EINVAL;
  4963. goto err_release;
  4964. }
  4965. /* Allocate ucode buffers for card's bus-master loading ... */
  4966. /* Runtime instructions and 2 copies of data:
  4967. * 1) unmodified from disk
  4968. * 2) backup cache for save/restore during power-downs */
  4969. priv->ucode_code.len = inst_size;
  4970. priv->ucode_code.v_addr =
  4971. pci_alloc_consistent(priv->pci_dev,
  4972. priv->ucode_code.len,
  4973. &(priv->ucode_code.p_addr));
  4974. priv->ucode_data.len = data_size;
  4975. priv->ucode_data.v_addr =
  4976. pci_alloc_consistent(priv->pci_dev,
  4977. priv->ucode_data.len,
  4978. &(priv->ucode_data.p_addr));
  4979. priv->ucode_data_backup.len = data_size;
  4980. priv->ucode_data_backup.v_addr =
  4981. pci_alloc_consistent(priv->pci_dev,
  4982. priv->ucode_data_backup.len,
  4983. &(priv->ucode_data_backup.p_addr));
  4984. /* Initialization instructions and data */
  4985. priv->ucode_init.len = init_size;
  4986. priv->ucode_init.v_addr =
  4987. pci_alloc_consistent(priv->pci_dev,
  4988. priv->ucode_init.len,
  4989. &(priv->ucode_init.p_addr));
  4990. priv->ucode_init_data.len = init_data_size;
  4991. priv->ucode_init_data.v_addr =
  4992. pci_alloc_consistent(priv->pci_dev,
  4993. priv->ucode_init_data.len,
  4994. &(priv->ucode_init_data.p_addr));
  4995. /* Bootstrap (instructions only, no data) */
  4996. priv->ucode_boot.len = boot_size;
  4997. priv->ucode_boot.v_addr =
  4998. pci_alloc_consistent(priv->pci_dev,
  4999. priv->ucode_boot.len,
  5000. &(priv->ucode_boot.p_addr));
  5001. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  5002. !priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr ||
  5003. !priv->ucode_boot.v_addr || !priv->ucode_data_backup.v_addr)
  5004. goto err_pci_alloc;
  5005. /* Copy images into buffers for card's bus-master reads ... */
  5006. /* Runtime instructions (first block of data in file) */
  5007. src = &ucode->data[0];
  5008. len = priv->ucode_code.len;
  5009. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %d\n",
  5010. (int)len);
  5011. memcpy(priv->ucode_code.v_addr, src, len);
  5012. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5013. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5014. /* Runtime data (2nd block)
  5015. * NOTE: Copy into backup buffer will be done in iwl_up() */
  5016. src = &ucode->data[inst_size];
  5017. len = priv->ucode_data.len;
  5018. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %d\n",
  5019. (int)len);
  5020. memcpy(priv->ucode_data.v_addr, src, len);
  5021. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5022. /* Initialization instructions (3rd block) */
  5023. if (init_size) {
  5024. src = &ucode->data[inst_size + data_size];
  5025. len = priv->ucode_init.len;
  5026. IWL_DEBUG_INFO("Copying (but not loading) init instr len %d\n",
  5027. (int)len);
  5028. memcpy(priv->ucode_init.v_addr, src, len);
  5029. }
  5030. /* Initialization data (4th block) */
  5031. if (init_data_size) {
  5032. src = &ucode->data[inst_size + data_size + init_size];
  5033. len = priv->ucode_init_data.len;
  5034. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  5035. (int)len);
  5036. memcpy(priv->ucode_init_data.v_addr, src, len);
  5037. }
  5038. /* Bootstrap instructions (5th block) */
  5039. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5040. len = priv->ucode_boot.len;
  5041. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  5042. (int)len);
  5043. memcpy(priv->ucode_boot.v_addr, src, len);
  5044. /* We have our copies now, allow OS release its copies */
  5045. release_firmware(ucode_raw);
  5046. return 0;
  5047. err_pci_alloc:
  5048. IWL_ERROR("failed to allocate pci memory\n");
  5049. rc = -ENOMEM;
  5050. iwl_dealloc_ucode_pci(priv);
  5051. err_release:
  5052. release_firmware(ucode_raw);
  5053. error:
  5054. return rc;
  5055. }
  5056. /**
  5057. * iwl_set_ucode_ptrs - Set uCode address location
  5058. *
  5059. * Tell initialization uCode where to find runtime uCode.
  5060. *
  5061. * BSM registers initially contain pointers to initialization uCode.
  5062. * We need to replace them to load runtime uCode inst and data,
  5063. * and to save runtime data when powering down.
  5064. */
  5065. static int iwl_set_ucode_ptrs(struct iwl_priv *priv)
  5066. {
  5067. dma_addr_t pinst;
  5068. dma_addr_t pdata;
  5069. int rc = 0;
  5070. unsigned long flags;
  5071. /* bits 31:0 for 3945 */
  5072. pinst = priv->ucode_code.p_addr;
  5073. pdata = priv->ucode_data_backup.p_addr;
  5074. spin_lock_irqsave(&priv->lock, flags);
  5075. rc = iwl_grab_restricted_access(priv);
  5076. if (rc) {
  5077. spin_unlock_irqrestore(&priv->lock, flags);
  5078. return rc;
  5079. }
  5080. /* Tell bootstrap uCode where to find image to load */
  5081. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5082. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5083. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5084. priv->ucode_data.len);
  5085. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5086. * that all new ptr/size info is in place */
  5087. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5088. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5089. iwl_release_restricted_access(priv);
  5090. spin_unlock_irqrestore(&priv->lock, flags);
  5091. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5092. return rc;
  5093. }
  5094. /**
  5095. * iwl_init_alive_start - Called after REPLY_ALIVE notification received
  5096. *
  5097. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5098. *
  5099. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5100. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5101. * (3945 does not contain this data).
  5102. *
  5103. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5104. */
  5105. static void iwl_init_alive_start(struct iwl_priv *priv)
  5106. {
  5107. /* Check alive response for "valid" sign from uCode */
  5108. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5109. /* We had an error bringing up the hardware, so take it
  5110. * all the way back down so we can try again */
  5111. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5112. goto restart;
  5113. }
  5114. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5115. * This is a paranoid check, because we would not have gotten the
  5116. * "initialize" alive if code weren't properly loaded. */
  5117. if (iwl_verify_ucode(priv)) {
  5118. /* Runtime instruction load was bad;
  5119. * take it all the way back down so we can try again */
  5120. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5121. goto restart;
  5122. }
  5123. /* Send pointers to protocol/runtime uCode image ... init code will
  5124. * load and launch runtime uCode, which will send us another "Alive"
  5125. * notification. */
  5126. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5127. if (iwl_set_ucode_ptrs(priv)) {
  5128. /* Runtime instruction load won't happen;
  5129. * take it all the way back down so we can try again */
  5130. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5131. goto restart;
  5132. }
  5133. return;
  5134. restart:
  5135. queue_work(priv->workqueue, &priv->restart);
  5136. }
  5137. /**
  5138. * iwl_alive_start - called after REPLY_ALIVE notification received
  5139. * from protocol/runtime uCode (initialization uCode's
  5140. * Alive gets handled by iwl_init_alive_start()).
  5141. */
  5142. static void iwl_alive_start(struct iwl_priv *priv)
  5143. {
  5144. int rc = 0;
  5145. int thermal_spin = 0;
  5146. u32 rfkill;
  5147. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5148. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5149. /* We had an error bringing up the hardware, so take it
  5150. * all the way back down so we can try again */
  5151. IWL_DEBUG_INFO("Alive failed.\n");
  5152. goto restart;
  5153. }
  5154. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5155. * This is a paranoid check, because we would not have gotten the
  5156. * "runtime" alive if code weren't properly loaded. */
  5157. if (iwl_verify_ucode(priv)) {
  5158. /* Runtime instruction load was bad;
  5159. * take it all the way back down so we can try again */
  5160. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5161. goto restart;
  5162. }
  5163. iwl_clear_stations_table(priv);
  5164. rc = iwl_grab_restricted_access(priv);
  5165. if (rc) {
  5166. IWL_WARNING("Can not read rfkill status from adapter\n");
  5167. return;
  5168. }
  5169. rfkill = iwl_read_restricted_reg(priv, APMG_RFKILL_REG);
  5170. IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
  5171. iwl_release_restricted_access(priv);
  5172. if (rfkill & 0x1) {
  5173. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5174. /* if rfkill is not on, then wait for thermal
  5175. * sensor in adapter to kick in */
  5176. while (iwl_hw_get_temperature(priv) == 0) {
  5177. thermal_spin++;
  5178. udelay(10);
  5179. }
  5180. if (thermal_spin)
  5181. IWL_DEBUG_INFO("Thermal calibration took %dus\n",
  5182. thermal_spin * 10);
  5183. } else
  5184. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5185. /* After the ALIVE response, we can process host commands */
  5186. set_bit(STATUS_ALIVE, &priv->status);
  5187. /* Clear out the uCode error bit if it is set */
  5188. clear_bit(STATUS_FW_ERROR, &priv->status);
  5189. rc = iwl_init_channel_map(priv);
  5190. if (rc) {
  5191. IWL_ERROR("initializing regulatory failed: %d\n", rc);
  5192. return;
  5193. }
  5194. iwl_init_geos(priv);
  5195. if (iwl_is_rfkill(priv))
  5196. return;
  5197. if (!priv->mac80211_registered) {
  5198. /* Unlock so any user space entry points can call back into
  5199. * the driver without a deadlock... */
  5200. mutex_unlock(&priv->mutex);
  5201. iwl_rate_control_register(priv->hw);
  5202. rc = ieee80211_register_hw(priv->hw);
  5203. priv->hw->conf.beacon_int = 100;
  5204. mutex_lock(&priv->mutex);
  5205. if (rc) {
  5206. iwl_rate_control_unregister(priv->hw);
  5207. IWL_ERROR("Failed to register network "
  5208. "device (error %d)\n", rc);
  5209. return;
  5210. }
  5211. priv->mac80211_registered = 1;
  5212. iwl_reset_channel_flag(priv);
  5213. } else
  5214. ieee80211_start_queues(priv->hw);
  5215. priv->active_rate = priv->rates_mask;
  5216. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5217. iwl_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5218. if (iwl_is_associated(priv)) {
  5219. struct iwl_rxon_cmd *active_rxon =
  5220. (struct iwl_rxon_cmd *)(&priv->active_rxon);
  5221. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5222. sizeof(priv->staging_rxon));
  5223. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5224. } else {
  5225. /* Initialize our rx_config data */
  5226. iwl_connection_init_rx_config(priv);
  5227. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5228. }
  5229. /* Configure BT coexistence */
  5230. iwl_send_bt_config(priv);
  5231. /* Configure the adapter for unassociated operation */
  5232. iwl_commit_rxon(priv);
  5233. /* At this point, the NIC is initialized and operational */
  5234. priv->notif_missed_beacons = 0;
  5235. set_bit(STATUS_READY, &priv->status);
  5236. iwl3945_reg_txpower_periodic(priv);
  5237. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5238. if (priv->error_recovering)
  5239. iwl_error_recovery(priv);
  5240. return;
  5241. restart:
  5242. queue_work(priv->workqueue, &priv->restart);
  5243. }
  5244. static void iwl_cancel_deferred_work(struct iwl_priv *priv);
  5245. static void __iwl_down(struct iwl_priv *priv)
  5246. {
  5247. unsigned long flags;
  5248. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5249. struct ieee80211_conf *conf = NULL;
  5250. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5251. conf = ieee80211_get_hw_conf(priv->hw);
  5252. if (!exit_pending)
  5253. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5254. iwl_clear_stations_table(priv);
  5255. /* Unblock any waiting calls */
  5256. wake_up_interruptible_all(&priv->wait_command_queue);
  5257. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5258. * exiting the module */
  5259. if (!exit_pending)
  5260. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5261. /* stop and reset the on-board processor */
  5262. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5263. /* tell the device to stop sending interrupts */
  5264. iwl_disable_interrupts(priv);
  5265. if (priv->mac80211_registered)
  5266. ieee80211_stop_queues(priv->hw);
  5267. /* If we have not previously called iwl_init() then
  5268. * clear all bits but the RF Kill and SUSPEND bits and return */
  5269. if (!iwl_is_init(priv)) {
  5270. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5271. STATUS_RF_KILL_HW |
  5272. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5273. STATUS_RF_KILL_SW |
  5274. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5275. STATUS_IN_SUSPEND;
  5276. goto exit;
  5277. }
  5278. /* ...otherwise clear out all the status bits but the RF Kill and
  5279. * SUSPEND bits and continue taking the NIC down. */
  5280. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5281. STATUS_RF_KILL_HW |
  5282. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5283. STATUS_RF_KILL_SW |
  5284. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5285. STATUS_IN_SUSPEND |
  5286. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5287. STATUS_FW_ERROR;
  5288. spin_lock_irqsave(&priv->lock, flags);
  5289. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5290. spin_unlock_irqrestore(&priv->lock, flags);
  5291. iwl_hw_txq_ctx_stop(priv);
  5292. iwl_hw_rxq_stop(priv);
  5293. spin_lock_irqsave(&priv->lock, flags);
  5294. if (!iwl_grab_restricted_access(priv)) {
  5295. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  5296. APMG_CLK_VAL_DMA_CLK_RQT);
  5297. iwl_release_restricted_access(priv);
  5298. }
  5299. spin_unlock_irqrestore(&priv->lock, flags);
  5300. udelay(5);
  5301. iwl_hw_nic_stop_master(priv);
  5302. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5303. iwl_hw_nic_reset(priv);
  5304. exit:
  5305. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  5306. if (priv->ibss_beacon)
  5307. dev_kfree_skb(priv->ibss_beacon);
  5308. priv->ibss_beacon = NULL;
  5309. /* clear out any free frames */
  5310. iwl_clear_free_frames(priv);
  5311. }
  5312. static void iwl_down(struct iwl_priv *priv)
  5313. {
  5314. mutex_lock(&priv->mutex);
  5315. __iwl_down(priv);
  5316. mutex_unlock(&priv->mutex);
  5317. iwl_cancel_deferred_work(priv);
  5318. }
  5319. #define MAX_HW_RESTARTS 5
  5320. static int __iwl_up(struct iwl_priv *priv)
  5321. {
  5322. DECLARE_MAC_BUF(mac);
  5323. int rc, i;
  5324. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5325. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5326. return -EIO;
  5327. }
  5328. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5329. IWL_WARNING("Radio disabled by SW RF kill (module "
  5330. "parameter)\n");
  5331. return 0;
  5332. }
  5333. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5334. IWL_ERROR("ucode not available for device bringup\n");
  5335. return -EIO;
  5336. }
  5337. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5338. rc = iwl_hw_nic_init(priv);
  5339. if (rc) {
  5340. IWL_ERROR("Unable to int nic\n");
  5341. return rc;
  5342. }
  5343. /* make sure rfkill handshake bits are cleared */
  5344. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5345. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5346. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5347. /* clear (again), then enable host interrupts */
  5348. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5349. iwl_enable_interrupts(priv);
  5350. /* really make sure rfkill handshake bits are cleared */
  5351. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5352. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5353. /* Copy original ucode data image from disk into backup cache.
  5354. * This will be used to initialize the on-board processor's
  5355. * data SRAM for a clean start when the runtime program first loads. */
  5356. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5357. priv->ucode_data.len);
  5358. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5359. iwl_clear_stations_table(priv);
  5360. /* load bootstrap state machine,
  5361. * load bootstrap program into processor's memory,
  5362. * prepare to load the "initialize" uCode */
  5363. rc = iwl_load_bsm(priv);
  5364. if (rc) {
  5365. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5366. continue;
  5367. }
  5368. /* start card; "initialize" will load runtime ucode */
  5369. iwl_nic_start(priv);
  5370. /* MAC Address location in EEPROM same for 3945/4965 */
  5371. get_eeprom_mac(priv, priv->mac_addr);
  5372. IWL_DEBUG_INFO("MAC address: %s\n",
  5373. print_mac(mac, priv->mac_addr));
  5374. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5375. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5376. return 0;
  5377. }
  5378. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5379. __iwl_down(priv);
  5380. /* tried to restart and config the device for as long as our
  5381. * patience could withstand */
  5382. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5383. return -EIO;
  5384. }
  5385. /*****************************************************************************
  5386. *
  5387. * Workqueue callbacks
  5388. *
  5389. *****************************************************************************/
  5390. static void iwl_bg_init_alive_start(struct work_struct *data)
  5391. {
  5392. struct iwl_priv *priv =
  5393. container_of(data, struct iwl_priv, init_alive_start.work);
  5394. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5395. return;
  5396. mutex_lock(&priv->mutex);
  5397. iwl_init_alive_start(priv);
  5398. mutex_unlock(&priv->mutex);
  5399. }
  5400. static void iwl_bg_alive_start(struct work_struct *data)
  5401. {
  5402. struct iwl_priv *priv =
  5403. container_of(data, struct iwl_priv, alive_start.work);
  5404. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5405. return;
  5406. mutex_lock(&priv->mutex);
  5407. iwl_alive_start(priv);
  5408. mutex_unlock(&priv->mutex);
  5409. }
  5410. static void iwl_bg_rf_kill(struct work_struct *work)
  5411. {
  5412. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  5413. wake_up_interruptible(&priv->wait_command_queue);
  5414. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5415. return;
  5416. mutex_lock(&priv->mutex);
  5417. if (!iwl_is_rfkill(priv)) {
  5418. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5419. "HW and/or SW RF Kill no longer active, restarting "
  5420. "device\n");
  5421. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5422. queue_work(priv->workqueue, &priv->restart);
  5423. } else {
  5424. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5425. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5426. "disabled by SW switch\n");
  5427. else
  5428. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5429. "Kill switch must be turned off for "
  5430. "wireless networking to work.\n");
  5431. }
  5432. mutex_unlock(&priv->mutex);
  5433. }
  5434. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5435. static void iwl_bg_scan_check(struct work_struct *data)
  5436. {
  5437. struct iwl_priv *priv =
  5438. container_of(data, struct iwl_priv, scan_check.work);
  5439. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5440. return;
  5441. mutex_lock(&priv->mutex);
  5442. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5443. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5444. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5445. "Scan completion watchdog resetting adapter (%dms)\n",
  5446. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5447. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5448. iwl_send_scan_abort(priv);
  5449. }
  5450. mutex_unlock(&priv->mutex);
  5451. }
  5452. static void iwl_bg_request_scan(struct work_struct *data)
  5453. {
  5454. struct iwl_priv *priv =
  5455. container_of(data, struct iwl_priv, request_scan);
  5456. struct iwl_host_cmd cmd = {
  5457. .id = REPLY_SCAN_CMD,
  5458. .len = sizeof(struct iwl_scan_cmd),
  5459. .meta.flags = CMD_SIZE_HUGE,
  5460. };
  5461. int rc = 0;
  5462. struct iwl_scan_cmd *scan;
  5463. struct ieee80211_conf *conf = NULL;
  5464. u8 direct_mask;
  5465. int phymode;
  5466. conf = ieee80211_get_hw_conf(priv->hw);
  5467. mutex_lock(&priv->mutex);
  5468. if (!iwl_is_ready(priv)) {
  5469. IWL_WARNING("request scan called when driver not ready.\n");
  5470. goto done;
  5471. }
  5472. /* Make sure the scan wasn't cancelled before this queued work
  5473. * was given the chance to run... */
  5474. if (!test_bit(STATUS_SCANNING, &priv->status))
  5475. goto done;
  5476. /* This should never be called or scheduled if there is currently
  5477. * a scan active in the hardware. */
  5478. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5479. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5480. "Ignoring second request.\n");
  5481. rc = -EIO;
  5482. goto done;
  5483. }
  5484. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5485. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5486. goto done;
  5487. }
  5488. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5489. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5490. goto done;
  5491. }
  5492. if (iwl_is_rfkill(priv)) {
  5493. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5494. goto done;
  5495. }
  5496. if (!test_bit(STATUS_READY, &priv->status)) {
  5497. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5498. goto done;
  5499. }
  5500. if (!priv->scan_bands) {
  5501. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5502. goto done;
  5503. }
  5504. if (!priv->scan) {
  5505. priv->scan = kmalloc(sizeof(struct iwl_scan_cmd) +
  5506. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5507. if (!priv->scan) {
  5508. rc = -ENOMEM;
  5509. goto done;
  5510. }
  5511. }
  5512. scan = priv->scan;
  5513. memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5514. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5515. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5516. if (iwl_is_associated(priv)) {
  5517. u16 interval = 0;
  5518. u32 extra;
  5519. u32 suspend_time = 100;
  5520. u32 scan_suspend_time = 100;
  5521. unsigned long flags;
  5522. IWL_DEBUG_INFO("Scanning while associated...\n");
  5523. spin_lock_irqsave(&priv->lock, flags);
  5524. interval = priv->beacon_int;
  5525. spin_unlock_irqrestore(&priv->lock, flags);
  5526. scan->suspend_time = 0;
  5527. scan->max_out_time = cpu_to_le32(200 * 1024);
  5528. if (!interval)
  5529. interval = suspend_time;
  5530. /*
  5531. * suspend time format:
  5532. * 0-19: beacon interval in usec (time before exec.)
  5533. * 20-23: 0
  5534. * 24-31: number of beacons (suspend between channels)
  5535. */
  5536. extra = (suspend_time / interval) << 24;
  5537. scan_suspend_time = 0xFF0FFFFF &
  5538. (extra | ((suspend_time % interval) * 1024));
  5539. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5540. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5541. scan_suspend_time, interval);
  5542. }
  5543. /* We should add the ability for user to lock to PASSIVE ONLY */
  5544. if (priv->one_direct_scan) {
  5545. IWL_DEBUG_SCAN
  5546. ("Kicking off one direct scan for '%s'\n",
  5547. iwl_escape_essid(priv->direct_ssid,
  5548. priv->direct_ssid_len));
  5549. scan->direct_scan[0].id = WLAN_EID_SSID;
  5550. scan->direct_scan[0].len = priv->direct_ssid_len;
  5551. memcpy(scan->direct_scan[0].ssid,
  5552. priv->direct_ssid, priv->direct_ssid_len);
  5553. direct_mask = 1;
  5554. } else if (!iwl_is_associated(priv) && priv->essid_len) {
  5555. scan->direct_scan[0].id = WLAN_EID_SSID;
  5556. scan->direct_scan[0].len = priv->essid_len;
  5557. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5558. direct_mask = 1;
  5559. } else
  5560. direct_mask = 0;
  5561. /* We don't build a direct scan probe request; the uCode will do
  5562. * that based on the direct_mask added to each channel entry */
  5563. scan->tx_cmd.len = cpu_to_le16(
  5564. iwl_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5565. IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
  5566. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5567. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5568. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5569. /* flags + rate selection */
  5570. switch (priv->scan_bands) {
  5571. case 2:
  5572. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5573. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  5574. scan->good_CRC_th = 0;
  5575. phymode = MODE_IEEE80211G;
  5576. break;
  5577. case 1:
  5578. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  5579. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5580. phymode = MODE_IEEE80211A;
  5581. break;
  5582. default:
  5583. IWL_WARNING("Invalid scan band count\n");
  5584. goto done;
  5585. }
  5586. /* select Rx antennas */
  5587. scan->flags |= iwl3945_get_antenna_flags(priv);
  5588. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5589. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5590. if (direct_mask)
  5591. IWL_DEBUG_SCAN
  5592. ("Initiating direct scan for %s.\n",
  5593. iwl_escape_essid(priv->essid, priv->essid_len));
  5594. else
  5595. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5596. scan->channel_count =
  5597. iwl_get_channels_for_scan(
  5598. priv, phymode, 1, /* active */
  5599. direct_mask,
  5600. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5601. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5602. scan->channel_count * sizeof(struct iwl_scan_channel);
  5603. cmd.data = scan;
  5604. scan->len = cpu_to_le16(cmd.len);
  5605. set_bit(STATUS_SCAN_HW, &priv->status);
  5606. rc = iwl_send_cmd_sync(priv, &cmd);
  5607. if (rc)
  5608. goto done;
  5609. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5610. IWL_SCAN_CHECK_WATCHDOG);
  5611. mutex_unlock(&priv->mutex);
  5612. return;
  5613. done:
  5614. /* inform mac80211 scan aborted */
  5615. queue_work(priv->workqueue, &priv->scan_completed);
  5616. mutex_unlock(&priv->mutex);
  5617. }
  5618. static void iwl_bg_up(struct work_struct *data)
  5619. {
  5620. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5621. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5622. return;
  5623. mutex_lock(&priv->mutex);
  5624. __iwl_up(priv);
  5625. mutex_unlock(&priv->mutex);
  5626. }
  5627. static void iwl_bg_restart(struct work_struct *data)
  5628. {
  5629. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5630. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5631. return;
  5632. iwl_down(priv);
  5633. queue_work(priv->workqueue, &priv->up);
  5634. }
  5635. static void iwl_bg_rx_replenish(struct work_struct *data)
  5636. {
  5637. struct iwl_priv *priv =
  5638. container_of(data, struct iwl_priv, rx_replenish);
  5639. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5640. return;
  5641. mutex_lock(&priv->mutex);
  5642. iwl_rx_replenish(priv);
  5643. mutex_unlock(&priv->mutex);
  5644. }
  5645. static void iwl_bg_post_associate(struct work_struct *data)
  5646. {
  5647. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5648. post_associate.work);
  5649. int rc = 0;
  5650. struct ieee80211_conf *conf = NULL;
  5651. DECLARE_MAC_BUF(mac);
  5652. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5653. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5654. return;
  5655. }
  5656. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5657. priv->assoc_id,
  5658. print_mac(mac, priv->active_rxon.bssid_addr));
  5659. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5660. return;
  5661. mutex_lock(&priv->mutex);
  5662. if (!priv->interface_id || !priv->is_open) {
  5663. mutex_unlock(&priv->mutex);
  5664. return;
  5665. }
  5666. iwl_scan_cancel_timeout(priv, 200);
  5667. conf = ieee80211_get_hw_conf(priv->hw);
  5668. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5669. iwl_commit_rxon(priv);
  5670. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  5671. iwl_setup_rxon_timing(priv);
  5672. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5673. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5674. if (rc)
  5675. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5676. "Attempting to continue.\n");
  5677. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5678. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5679. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5680. priv->assoc_id, priv->beacon_int);
  5681. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5682. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5683. else
  5684. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5685. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5686. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5687. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5688. else
  5689. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5690. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5691. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5692. }
  5693. iwl_commit_rxon(priv);
  5694. switch (priv->iw_mode) {
  5695. case IEEE80211_IF_TYPE_STA:
  5696. iwl_rate_scale_init(priv->hw, IWL_AP_ID);
  5697. break;
  5698. case IEEE80211_IF_TYPE_IBSS:
  5699. /* clear out the station table */
  5700. iwl_clear_stations_table(priv);
  5701. iwl_add_station(priv, BROADCAST_ADDR, 0, 0);
  5702. iwl_add_station(priv, priv->bssid, 0, 0);
  5703. iwl3945_sync_sta(priv, IWL_STA_ID,
  5704. (priv->phymode == MODE_IEEE80211A)?
  5705. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  5706. CMD_ASYNC);
  5707. iwl_rate_scale_init(priv->hw, IWL_STA_ID);
  5708. iwl_send_beacon_cmd(priv);
  5709. break;
  5710. default:
  5711. IWL_ERROR("%s Should not be called in %d mode\n",
  5712. __FUNCTION__, priv->iw_mode);
  5713. break;
  5714. }
  5715. iwl_sequence_reset(priv);
  5716. #ifdef CONFIG_IWLWIFI_QOS
  5717. iwl_activate_qos(priv, 0);
  5718. #endif /* CONFIG_IWLWIFI_QOS */
  5719. mutex_unlock(&priv->mutex);
  5720. }
  5721. static void iwl_bg_abort_scan(struct work_struct *work)
  5722. {
  5723. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  5724. abort_scan);
  5725. if (!iwl_is_ready(priv))
  5726. return;
  5727. mutex_lock(&priv->mutex);
  5728. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5729. iwl_send_scan_abort(priv);
  5730. mutex_unlock(&priv->mutex);
  5731. }
  5732. static void iwl_bg_scan_completed(struct work_struct *work)
  5733. {
  5734. struct iwl_priv *priv =
  5735. container_of(work, struct iwl_priv, scan_completed);
  5736. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5737. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5738. return;
  5739. ieee80211_scan_completed(priv->hw);
  5740. /* Since setting the TXPOWER may have been deferred while
  5741. * performing the scan, fire one off */
  5742. mutex_lock(&priv->mutex);
  5743. iwl_hw_reg_send_txpower(priv);
  5744. mutex_unlock(&priv->mutex);
  5745. }
  5746. /*****************************************************************************
  5747. *
  5748. * mac80211 entry point functions
  5749. *
  5750. *****************************************************************************/
  5751. static int iwl_mac_start(struct ieee80211_hw *hw)
  5752. {
  5753. struct iwl_priv *priv = hw->priv;
  5754. IWL_DEBUG_MAC80211("enter\n");
  5755. /* we should be verifying the device is ready to be opened */
  5756. mutex_lock(&priv->mutex);
  5757. priv->is_open = 1;
  5758. if (!iwl_is_rfkill(priv))
  5759. ieee80211_start_queues(priv->hw);
  5760. mutex_unlock(&priv->mutex);
  5761. IWL_DEBUG_MAC80211("leave\n");
  5762. return 0;
  5763. }
  5764. static void iwl_mac_stop(struct ieee80211_hw *hw)
  5765. {
  5766. struct iwl_priv *priv = hw->priv;
  5767. IWL_DEBUG_MAC80211("enter\n");
  5768. mutex_lock(&priv->mutex);
  5769. /* stop mac, cancel any scan request and clear
  5770. * RXON_FILTER_ASSOC_MSK BIT
  5771. */
  5772. priv->is_open = 0;
  5773. iwl_scan_cancel_timeout(priv, 100);
  5774. cancel_delayed_work(&priv->post_associate);
  5775. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5776. iwl_commit_rxon(priv);
  5777. mutex_unlock(&priv->mutex);
  5778. IWL_DEBUG_MAC80211("leave\n");
  5779. }
  5780. static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5781. struct ieee80211_tx_control *ctl)
  5782. {
  5783. struct iwl_priv *priv = hw->priv;
  5784. IWL_DEBUG_MAC80211("enter\n");
  5785. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5786. IWL_DEBUG_MAC80211("leave - monitor\n");
  5787. return -1;
  5788. }
  5789. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5790. ctl->tx_rate);
  5791. if (iwl_tx_skb(priv, skb, ctl))
  5792. dev_kfree_skb_any(skb);
  5793. IWL_DEBUG_MAC80211("leave\n");
  5794. return 0;
  5795. }
  5796. static int iwl_mac_add_interface(struct ieee80211_hw *hw,
  5797. struct ieee80211_if_init_conf *conf)
  5798. {
  5799. struct iwl_priv *priv = hw->priv;
  5800. unsigned long flags;
  5801. DECLARE_MAC_BUF(mac);
  5802. IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
  5803. if (priv->interface_id) {
  5804. IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
  5805. return -EOPNOTSUPP;
  5806. }
  5807. spin_lock_irqsave(&priv->lock, flags);
  5808. priv->interface_id = conf->if_id;
  5809. spin_unlock_irqrestore(&priv->lock, flags);
  5810. mutex_lock(&priv->mutex);
  5811. if (conf->mac_addr) {
  5812. IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
  5813. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  5814. }
  5815. iwl_set_mode(priv, conf->type);
  5816. IWL_DEBUG_MAC80211("leave\n");
  5817. mutex_unlock(&priv->mutex);
  5818. return 0;
  5819. }
  5820. /**
  5821. * iwl_mac_config - mac80211 config callback
  5822. *
  5823. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5824. * be set inappropriately and the driver currently sets the hardware up to
  5825. * use it whenever needed.
  5826. */
  5827. static int iwl_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5828. {
  5829. struct iwl_priv *priv = hw->priv;
  5830. const struct iwl_channel_info *ch_info;
  5831. unsigned long flags;
  5832. mutex_lock(&priv->mutex);
  5833. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  5834. if (!iwl_is_ready(priv)) {
  5835. IWL_DEBUG_MAC80211("leave - not ready\n");
  5836. mutex_unlock(&priv->mutex);
  5837. return -EIO;
  5838. }
  5839. /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
  5840. * what is exposed through include/ declarations */
  5841. if (unlikely(!iwl_param_disable_hw_scan &&
  5842. test_bit(STATUS_SCANNING, &priv->status))) {
  5843. IWL_DEBUG_MAC80211("leave - scanning\n");
  5844. mutex_unlock(&priv->mutex);
  5845. return 0;
  5846. }
  5847. spin_lock_irqsave(&priv->lock, flags);
  5848. ch_info = iwl_get_channel_info(priv, conf->phymode, conf->channel);
  5849. if (!is_channel_valid(ch_info)) {
  5850. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  5851. conf->channel, conf->phymode);
  5852. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5853. spin_unlock_irqrestore(&priv->lock, flags);
  5854. mutex_unlock(&priv->mutex);
  5855. return -EINVAL;
  5856. }
  5857. iwl_set_rxon_channel(priv, conf->phymode, conf->channel);
  5858. iwl_set_flags_for_phymode(priv, conf->phymode);
  5859. /* The list of supported rates and rate mask can be different
  5860. * for each phymode; since the phymode may have changed, reset
  5861. * the rate mask to what mac80211 lists */
  5862. iwl_set_rate(priv);
  5863. spin_unlock_irqrestore(&priv->lock, flags);
  5864. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5865. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  5866. iwl_hw_channel_switch(priv, conf->channel);
  5867. mutex_unlock(&priv->mutex);
  5868. return 0;
  5869. }
  5870. #endif
  5871. iwl_radio_kill_sw(priv, !conf->radio_enabled);
  5872. if (!conf->radio_enabled) {
  5873. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  5874. mutex_unlock(&priv->mutex);
  5875. return 0;
  5876. }
  5877. if (iwl_is_rfkill(priv)) {
  5878. IWL_DEBUG_MAC80211("leave - RF kill\n");
  5879. mutex_unlock(&priv->mutex);
  5880. return -EIO;
  5881. }
  5882. iwl_set_rate(priv);
  5883. if (memcmp(&priv->active_rxon,
  5884. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  5885. iwl_commit_rxon(priv);
  5886. else
  5887. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  5888. IWL_DEBUG_MAC80211("leave\n");
  5889. mutex_unlock(&priv->mutex);
  5890. return 0;
  5891. }
  5892. static void iwl_config_ap(struct iwl_priv *priv)
  5893. {
  5894. int rc = 0;
  5895. if (priv->status & STATUS_EXIT_PENDING)
  5896. return;
  5897. /* The following should be done only at AP bring up */
  5898. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  5899. /* RXON - unassoc (to set timing command) */
  5900. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5901. iwl_commit_rxon(priv);
  5902. /* RXON Timing */
  5903. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  5904. iwl_setup_rxon_timing(priv);
  5905. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5906. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5907. if (rc)
  5908. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5909. "Attempting to continue.\n");
  5910. /* FIXME: what should be the assoc_id for AP? */
  5911. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5912. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5913. priv->staging_rxon.flags |=
  5914. RXON_FLG_SHORT_PREAMBLE_MSK;
  5915. else
  5916. priv->staging_rxon.flags &=
  5917. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5918. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5919. if (priv->assoc_capability &
  5920. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5921. priv->staging_rxon.flags |=
  5922. RXON_FLG_SHORT_SLOT_MSK;
  5923. else
  5924. priv->staging_rxon.flags &=
  5925. ~RXON_FLG_SHORT_SLOT_MSK;
  5926. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5927. priv->staging_rxon.flags &=
  5928. ~RXON_FLG_SHORT_SLOT_MSK;
  5929. }
  5930. /* restore RXON assoc */
  5931. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5932. iwl_commit_rxon(priv);
  5933. iwl_add_station(priv, BROADCAST_ADDR, 0, 0);
  5934. }
  5935. iwl_send_beacon_cmd(priv);
  5936. /* FIXME - we need to add code here to detect a totally new
  5937. * configuration, reset the AP, unassoc, rxon timing, assoc,
  5938. * clear sta table, add BCAST sta... */
  5939. }
  5940. static int iwl_mac_config_interface(struct ieee80211_hw *hw, int if_id,
  5941. struct ieee80211_if_conf *conf)
  5942. {
  5943. struct iwl_priv *priv = hw->priv;
  5944. DECLARE_MAC_BUF(mac);
  5945. unsigned long flags;
  5946. int rc;
  5947. if (conf == NULL)
  5948. return -EIO;
  5949. /* XXX: this MUST use conf->mac_addr */
  5950. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  5951. (!conf->beacon || !conf->ssid_len)) {
  5952. IWL_DEBUG_MAC80211
  5953. ("Leaving in AP mode because HostAPD is not ready.\n");
  5954. return 0;
  5955. }
  5956. mutex_lock(&priv->mutex);
  5957. IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
  5958. if (conf->bssid)
  5959. IWL_DEBUG_MAC80211("bssid: %s\n",
  5960. print_mac(mac, conf->bssid));
  5961. /*
  5962. * very dubious code was here; the probe filtering flag is never set:
  5963. *
  5964. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  5965. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  5966. */
  5967. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  5968. IWL_DEBUG_MAC80211("leave - scanning\n");
  5969. mutex_unlock(&priv->mutex);
  5970. return 0;
  5971. }
  5972. if (priv->interface_id != if_id) {
  5973. IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
  5974. mutex_unlock(&priv->mutex);
  5975. return 0;
  5976. }
  5977. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5978. if (!conf->bssid) {
  5979. conf->bssid = priv->mac_addr;
  5980. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  5981. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  5982. print_mac(mac, conf->bssid));
  5983. }
  5984. if (priv->ibss_beacon)
  5985. dev_kfree_skb(priv->ibss_beacon);
  5986. priv->ibss_beacon = conf->beacon;
  5987. }
  5988. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  5989. !is_multicast_ether_addr(conf->bssid)) {
  5990. /* If there is currently a HW scan going on in the background
  5991. * then we need to cancel it else the RXON below will fail. */
  5992. if (iwl_scan_cancel_timeout(priv, 100)) {
  5993. IWL_WARNING("Aborted scan still in progress "
  5994. "after 100ms\n");
  5995. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  5996. mutex_unlock(&priv->mutex);
  5997. return -EAGAIN;
  5998. }
  5999. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6000. /* TODO: Audit driver for usage of these members and see
  6001. * if mac80211 deprecates them (priv->bssid looks like it
  6002. * shouldn't be there, but I haven't scanned the IBSS code
  6003. * to verify) - jpk */
  6004. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6005. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6006. iwl_config_ap(priv);
  6007. else {
  6008. rc = iwl_commit_rxon(priv);
  6009. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6010. iwl_add_station(priv,
  6011. priv->active_rxon.bssid_addr, 1, 0);
  6012. }
  6013. } else {
  6014. iwl_scan_cancel_timeout(priv, 100);
  6015. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6016. iwl_commit_rxon(priv);
  6017. }
  6018. spin_lock_irqsave(&priv->lock, flags);
  6019. if (!conf->ssid_len)
  6020. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6021. else
  6022. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6023. priv->essid_len = conf->ssid_len;
  6024. spin_unlock_irqrestore(&priv->lock, flags);
  6025. IWL_DEBUG_MAC80211("leave\n");
  6026. mutex_unlock(&priv->mutex);
  6027. return 0;
  6028. }
  6029. static void iwl_configure_filter(struct ieee80211_hw *hw,
  6030. unsigned int changed_flags,
  6031. unsigned int *total_flags,
  6032. int mc_count, struct dev_addr_list *mc_list)
  6033. {
  6034. /*
  6035. * XXX: dummy
  6036. * see also iwl_connection_init_rx_config
  6037. */
  6038. *total_flags = 0;
  6039. }
  6040. static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  6041. struct ieee80211_if_init_conf *conf)
  6042. {
  6043. struct iwl_priv *priv = hw->priv;
  6044. IWL_DEBUG_MAC80211("enter\n");
  6045. mutex_lock(&priv->mutex);
  6046. iwl_scan_cancel_timeout(priv, 100);
  6047. cancel_delayed_work(&priv->post_associate);
  6048. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6049. iwl_commit_rxon(priv);
  6050. if (priv->interface_id == conf->if_id) {
  6051. priv->interface_id = 0;
  6052. memset(priv->bssid, 0, ETH_ALEN);
  6053. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6054. priv->essid_len = 0;
  6055. }
  6056. mutex_unlock(&priv->mutex);
  6057. IWL_DEBUG_MAC80211("leave\n");
  6058. }
  6059. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  6060. static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6061. {
  6062. int rc = 0;
  6063. unsigned long flags;
  6064. struct iwl_priv *priv = hw->priv;
  6065. IWL_DEBUG_MAC80211("enter\n");
  6066. mutex_lock(&priv->mutex);
  6067. spin_lock_irqsave(&priv->lock, flags);
  6068. if (!iwl_is_ready_rf(priv)) {
  6069. rc = -EIO;
  6070. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6071. goto out_unlock;
  6072. }
  6073. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6074. rc = -EIO;
  6075. IWL_ERROR("ERROR: APs don't scan\n");
  6076. goto out_unlock;
  6077. }
  6078. /* if we just finished scan ask for delay */
  6079. if (priv->last_scan_jiffies &&
  6080. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  6081. jiffies)) {
  6082. rc = -EAGAIN;
  6083. goto out_unlock;
  6084. }
  6085. if (len) {
  6086. IWL_DEBUG_SCAN("direct scan for "
  6087. "%s [%d]\n ",
  6088. iwl_escape_essid(ssid, len), (int)len);
  6089. priv->one_direct_scan = 1;
  6090. priv->direct_ssid_len = (u8)
  6091. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6092. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6093. } else
  6094. priv->one_direct_scan = 0;
  6095. rc = iwl_scan_initiate(priv);
  6096. IWL_DEBUG_MAC80211("leave\n");
  6097. out_unlock:
  6098. spin_unlock_irqrestore(&priv->lock, flags);
  6099. mutex_unlock(&priv->mutex);
  6100. return rc;
  6101. }
  6102. static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6103. const u8 *local_addr, const u8 *addr,
  6104. struct ieee80211_key_conf *key)
  6105. {
  6106. struct iwl_priv *priv = hw->priv;
  6107. int rc = 0;
  6108. u8 sta_id;
  6109. IWL_DEBUG_MAC80211("enter\n");
  6110. if (!iwl_param_hwcrypto) {
  6111. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6112. return -EOPNOTSUPP;
  6113. }
  6114. if (is_zero_ether_addr(addr))
  6115. /* only support pairwise keys */
  6116. return -EOPNOTSUPP;
  6117. sta_id = iwl_hw_find_station(priv, addr);
  6118. if (sta_id == IWL_INVALID_STATION) {
  6119. DECLARE_MAC_BUF(mac);
  6120. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6121. print_mac(mac, addr));
  6122. return -EINVAL;
  6123. }
  6124. mutex_lock(&priv->mutex);
  6125. iwl_scan_cancel_timeout(priv, 100);
  6126. switch (cmd) {
  6127. case SET_KEY:
  6128. rc = iwl_update_sta_key_info(priv, key, sta_id);
  6129. if (!rc) {
  6130. iwl_set_rxon_hwcrypto(priv, 1);
  6131. iwl_commit_rxon(priv);
  6132. key->hw_key_idx = sta_id;
  6133. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6134. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6135. }
  6136. break;
  6137. case DISABLE_KEY:
  6138. rc = iwl_clear_sta_key_info(priv, sta_id);
  6139. if (!rc) {
  6140. iwl_set_rxon_hwcrypto(priv, 0);
  6141. iwl_commit_rxon(priv);
  6142. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6143. }
  6144. break;
  6145. default:
  6146. rc = -EINVAL;
  6147. }
  6148. IWL_DEBUG_MAC80211("leave\n");
  6149. mutex_unlock(&priv->mutex);
  6150. return rc;
  6151. }
  6152. static int iwl_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6153. const struct ieee80211_tx_queue_params *params)
  6154. {
  6155. struct iwl_priv *priv = hw->priv;
  6156. #ifdef CONFIG_IWLWIFI_QOS
  6157. unsigned long flags;
  6158. int q;
  6159. #endif /* CONFIG_IWL_QOS */
  6160. IWL_DEBUG_MAC80211("enter\n");
  6161. if (!iwl_is_ready_rf(priv)) {
  6162. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6163. return -EIO;
  6164. }
  6165. if (queue >= AC_NUM) {
  6166. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6167. return 0;
  6168. }
  6169. #ifdef CONFIG_IWLWIFI_QOS
  6170. if (!priv->qos_data.qos_enable) {
  6171. priv->qos_data.qos_active = 0;
  6172. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6173. return 0;
  6174. }
  6175. q = AC_NUM - 1 - queue;
  6176. spin_lock_irqsave(&priv->lock, flags);
  6177. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6178. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6179. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6180. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6181. cpu_to_le16((params->burst_time * 100));
  6182. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6183. priv->qos_data.qos_active = 1;
  6184. spin_unlock_irqrestore(&priv->lock, flags);
  6185. mutex_lock(&priv->mutex);
  6186. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6187. iwl_activate_qos(priv, 1);
  6188. else if (priv->assoc_id && iwl_is_associated(priv))
  6189. iwl_activate_qos(priv, 0);
  6190. mutex_unlock(&priv->mutex);
  6191. #endif /*CONFIG_IWLWIFI_QOS */
  6192. IWL_DEBUG_MAC80211("leave\n");
  6193. return 0;
  6194. }
  6195. static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
  6196. struct ieee80211_tx_queue_stats *stats)
  6197. {
  6198. struct iwl_priv *priv = hw->priv;
  6199. int i, avail;
  6200. struct iwl_tx_queue *txq;
  6201. struct iwl_queue *q;
  6202. unsigned long flags;
  6203. IWL_DEBUG_MAC80211("enter\n");
  6204. if (!iwl_is_ready_rf(priv)) {
  6205. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6206. return -EIO;
  6207. }
  6208. spin_lock_irqsave(&priv->lock, flags);
  6209. for (i = 0; i < AC_NUM; i++) {
  6210. txq = &priv->txq[i];
  6211. q = &txq->q;
  6212. avail = iwl_queue_space(q);
  6213. stats->data[i].len = q->n_window - avail;
  6214. stats->data[i].limit = q->n_window - q->high_mark;
  6215. stats->data[i].count = q->n_window;
  6216. }
  6217. spin_unlock_irqrestore(&priv->lock, flags);
  6218. IWL_DEBUG_MAC80211("leave\n");
  6219. return 0;
  6220. }
  6221. static int iwl_mac_get_stats(struct ieee80211_hw *hw,
  6222. struct ieee80211_low_level_stats *stats)
  6223. {
  6224. IWL_DEBUG_MAC80211("enter\n");
  6225. IWL_DEBUG_MAC80211("leave\n");
  6226. return 0;
  6227. }
  6228. static u64 iwl_mac_get_tsf(struct ieee80211_hw *hw)
  6229. {
  6230. IWL_DEBUG_MAC80211("enter\n");
  6231. IWL_DEBUG_MAC80211("leave\n");
  6232. return 0;
  6233. }
  6234. static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  6235. {
  6236. struct iwl_priv *priv = hw->priv;
  6237. unsigned long flags;
  6238. mutex_lock(&priv->mutex);
  6239. IWL_DEBUG_MAC80211("enter\n");
  6240. #ifdef CONFIG_IWLWIFI_QOS
  6241. iwl_reset_qos(priv);
  6242. #endif
  6243. cancel_delayed_work(&priv->post_associate);
  6244. spin_lock_irqsave(&priv->lock, flags);
  6245. priv->assoc_id = 0;
  6246. priv->assoc_capability = 0;
  6247. priv->call_post_assoc_from_beacon = 0;
  6248. /* new association get rid of ibss beacon skb */
  6249. if (priv->ibss_beacon)
  6250. dev_kfree_skb(priv->ibss_beacon);
  6251. priv->ibss_beacon = NULL;
  6252. priv->beacon_int = priv->hw->conf.beacon_int;
  6253. priv->timestamp1 = 0;
  6254. priv->timestamp0 = 0;
  6255. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6256. priv->beacon_int = 0;
  6257. spin_unlock_irqrestore(&priv->lock, flags);
  6258. /* we are restarting association process
  6259. * clear RXON_FILTER_ASSOC_MSK bit
  6260. */
  6261. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6262. iwl_scan_cancel_timeout(priv, 100);
  6263. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6264. iwl_commit_rxon(priv);
  6265. }
  6266. /* Per mac80211.h: This is only used in IBSS mode... */
  6267. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6268. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6269. mutex_unlock(&priv->mutex);
  6270. return;
  6271. }
  6272. if (!iwl_is_ready_rf(priv)) {
  6273. IWL_DEBUG_MAC80211("leave - not ready\n");
  6274. mutex_unlock(&priv->mutex);
  6275. return;
  6276. }
  6277. priv->only_active_channel = 0;
  6278. iwl_set_rate(priv);
  6279. mutex_unlock(&priv->mutex);
  6280. IWL_DEBUG_MAC80211("leave\n");
  6281. }
  6282. static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6283. struct ieee80211_tx_control *control)
  6284. {
  6285. struct iwl_priv *priv = hw->priv;
  6286. unsigned long flags;
  6287. mutex_lock(&priv->mutex);
  6288. IWL_DEBUG_MAC80211("enter\n");
  6289. if (!iwl_is_ready_rf(priv)) {
  6290. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6291. mutex_unlock(&priv->mutex);
  6292. return -EIO;
  6293. }
  6294. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6295. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6296. mutex_unlock(&priv->mutex);
  6297. return -EIO;
  6298. }
  6299. spin_lock_irqsave(&priv->lock, flags);
  6300. if (priv->ibss_beacon)
  6301. dev_kfree_skb(priv->ibss_beacon);
  6302. priv->ibss_beacon = skb;
  6303. priv->assoc_id = 0;
  6304. IWL_DEBUG_MAC80211("leave\n");
  6305. spin_unlock_irqrestore(&priv->lock, flags);
  6306. #ifdef CONFIG_IWLWIFI_QOS
  6307. iwl_reset_qos(priv);
  6308. #endif
  6309. queue_work(priv->workqueue, &priv->post_associate.work);
  6310. mutex_unlock(&priv->mutex);
  6311. return 0;
  6312. }
  6313. /*****************************************************************************
  6314. *
  6315. * sysfs attributes
  6316. *
  6317. *****************************************************************************/
  6318. #ifdef CONFIG_IWLWIFI_DEBUG
  6319. /*
  6320. * The following adds a new attribute to the sysfs representation
  6321. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6322. * used for controlling the debug level.
  6323. *
  6324. * See the level definitions in iwl for details.
  6325. */
  6326. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6327. {
  6328. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6329. }
  6330. static ssize_t store_debug_level(struct device_driver *d,
  6331. const char *buf, size_t count)
  6332. {
  6333. char *p = (char *)buf;
  6334. u32 val;
  6335. val = simple_strtoul(p, &p, 0);
  6336. if (p == buf)
  6337. printk(KERN_INFO DRV_NAME
  6338. ": %s is not in hex or decimal form.\n", buf);
  6339. else
  6340. iwl_debug_level = val;
  6341. return strnlen(buf, count);
  6342. }
  6343. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6344. show_debug_level, store_debug_level);
  6345. #endif /* CONFIG_IWLWIFI_DEBUG */
  6346. static ssize_t show_rf_kill(struct device *d,
  6347. struct device_attribute *attr, char *buf)
  6348. {
  6349. /*
  6350. * 0 - RF kill not enabled
  6351. * 1 - SW based RF kill active (sysfs)
  6352. * 2 - HW based RF kill active
  6353. * 3 - Both HW and SW based RF kill active
  6354. */
  6355. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6356. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6357. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6358. return sprintf(buf, "%i\n", val);
  6359. }
  6360. static ssize_t store_rf_kill(struct device *d,
  6361. struct device_attribute *attr,
  6362. const char *buf, size_t count)
  6363. {
  6364. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6365. mutex_lock(&priv->mutex);
  6366. iwl_radio_kill_sw(priv, buf[0] == '1');
  6367. mutex_unlock(&priv->mutex);
  6368. return count;
  6369. }
  6370. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6371. static ssize_t show_temperature(struct device *d,
  6372. struct device_attribute *attr, char *buf)
  6373. {
  6374. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6375. if (!iwl_is_alive(priv))
  6376. return -EAGAIN;
  6377. return sprintf(buf, "%d\n", iwl_hw_get_temperature(priv));
  6378. }
  6379. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6380. static ssize_t show_rs_window(struct device *d,
  6381. struct device_attribute *attr,
  6382. char *buf)
  6383. {
  6384. struct iwl_priv *priv = d->driver_data;
  6385. return iwl_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6386. }
  6387. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6388. static ssize_t show_tx_power(struct device *d,
  6389. struct device_attribute *attr, char *buf)
  6390. {
  6391. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6392. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6393. }
  6394. static ssize_t store_tx_power(struct device *d,
  6395. struct device_attribute *attr,
  6396. const char *buf, size_t count)
  6397. {
  6398. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6399. char *p = (char *)buf;
  6400. u32 val;
  6401. val = simple_strtoul(p, &p, 10);
  6402. if (p == buf)
  6403. printk(KERN_INFO DRV_NAME
  6404. ": %s is not in decimal form.\n", buf);
  6405. else
  6406. iwl_hw_reg_set_txpower(priv, val);
  6407. return count;
  6408. }
  6409. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6410. static ssize_t show_flags(struct device *d,
  6411. struct device_attribute *attr, char *buf)
  6412. {
  6413. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6414. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6415. }
  6416. static ssize_t store_flags(struct device *d,
  6417. struct device_attribute *attr,
  6418. const char *buf, size_t count)
  6419. {
  6420. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6421. u32 flags = simple_strtoul(buf, NULL, 0);
  6422. mutex_lock(&priv->mutex);
  6423. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6424. /* Cancel any currently running scans... */
  6425. if (iwl_scan_cancel_timeout(priv, 100))
  6426. IWL_WARNING("Could not cancel scan.\n");
  6427. else {
  6428. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6429. flags);
  6430. priv->staging_rxon.flags = cpu_to_le32(flags);
  6431. iwl_commit_rxon(priv);
  6432. }
  6433. }
  6434. mutex_unlock(&priv->mutex);
  6435. return count;
  6436. }
  6437. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6438. static ssize_t show_filter_flags(struct device *d,
  6439. struct device_attribute *attr, char *buf)
  6440. {
  6441. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6442. return sprintf(buf, "0x%04X\n",
  6443. le32_to_cpu(priv->active_rxon.filter_flags));
  6444. }
  6445. static ssize_t store_filter_flags(struct device *d,
  6446. struct device_attribute *attr,
  6447. const char *buf, size_t count)
  6448. {
  6449. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6450. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6451. mutex_lock(&priv->mutex);
  6452. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6453. /* Cancel any currently running scans... */
  6454. if (iwl_scan_cancel_timeout(priv, 100))
  6455. IWL_WARNING("Could not cancel scan.\n");
  6456. else {
  6457. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6458. "0x%04X\n", filter_flags);
  6459. priv->staging_rxon.filter_flags =
  6460. cpu_to_le32(filter_flags);
  6461. iwl_commit_rxon(priv);
  6462. }
  6463. }
  6464. mutex_unlock(&priv->mutex);
  6465. return count;
  6466. }
  6467. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6468. store_filter_flags);
  6469. static ssize_t show_tune(struct device *d,
  6470. struct device_attribute *attr, char *buf)
  6471. {
  6472. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6473. return sprintf(buf, "0x%04X\n",
  6474. (priv->phymode << 8) |
  6475. le16_to_cpu(priv->active_rxon.channel));
  6476. }
  6477. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode);
  6478. static ssize_t store_tune(struct device *d,
  6479. struct device_attribute *attr,
  6480. const char *buf, size_t count)
  6481. {
  6482. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6483. char *p = (char *)buf;
  6484. u16 tune = simple_strtoul(p, &p, 0);
  6485. u8 phymode = (tune >> 8) & 0xff;
  6486. u16 channel = tune & 0xff;
  6487. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  6488. mutex_lock(&priv->mutex);
  6489. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  6490. (priv->phymode != phymode)) {
  6491. const struct iwl_channel_info *ch_info;
  6492. ch_info = iwl_get_channel_info(priv, phymode, channel);
  6493. if (!ch_info) {
  6494. IWL_WARNING("Requested invalid phymode/channel "
  6495. "combination: %d %d\n", phymode, channel);
  6496. mutex_unlock(&priv->mutex);
  6497. return -EINVAL;
  6498. }
  6499. /* Cancel any currently running scans... */
  6500. if (iwl_scan_cancel_timeout(priv, 100))
  6501. IWL_WARNING("Could not cancel scan.\n");
  6502. else {
  6503. IWL_DEBUG_INFO("Committing phymode and "
  6504. "rxon.channel = %d %d\n",
  6505. phymode, channel);
  6506. iwl_set_rxon_channel(priv, phymode, channel);
  6507. iwl_set_flags_for_phymode(priv, phymode);
  6508. iwl_set_rate(priv);
  6509. iwl_commit_rxon(priv);
  6510. }
  6511. }
  6512. mutex_unlock(&priv->mutex);
  6513. return count;
  6514. }
  6515. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  6516. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  6517. static ssize_t show_measurement(struct device *d,
  6518. struct device_attribute *attr, char *buf)
  6519. {
  6520. struct iwl_priv *priv = dev_get_drvdata(d);
  6521. struct iwl_spectrum_notification measure_report;
  6522. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6523. u8 *data = (u8 *) & measure_report;
  6524. unsigned long flags;
  6525. spin_lock_irqsave(&priv->lock, flags);
  6526. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6527. spin_unlock_irqrestore(&priv->lock, flags);
  6528. return 0;
  6529. }
  6530. memcpy(&measure_report, &priv->measure_report, size);
  6531. priv->measurement_status = 0;
  6532. spin_unlock_irqrestore(&priv->lock, flags);
  6533. while (size && (PAGE_SIZE - len)) {
  6534. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6535. PAGE_SIZE - len, 1);
  6536. len = strlen(buf);
  6537. if (PAGE_SIZE - len)
  6538. buf[len++] = '\n';
  6539. ofs += 16;
  6540. size -= min(size, 16U);
  6541. }
  6542. return len;
  6543. }
  6544. static ssize_t store_measurement(struct device *d,
  6545. struct device_attribute *attr,
  6546. const char *buf, size_t count)
  6547. {
  6548. struct iwl_priv *priv = dev_get_drvdata(d);
  6549. struct ieee80211_measurement_params params = {
  6550. .channel = le16_to_cpu(priv->active_rxon.channel),
  6551. .start_time = cpu_to_le64(priv->last_tsf),
  6552. .duration = cpu_to_le16(1),
  6553. };
  6554. u8 type = IWL_MEASURE_BASIC;
  6555. u8 buffer[32];
  6556. u8 channel;
  6557. if (count) {
  6558. char *p = buffer;
  6559. strncpy(buffer, buf, min(sizeof(buffer), count));
  6560. channel = simple_strtoul(p, NULL, 0);
  6561. if (channel)
  6562. params.channel = channel;
  6563. p = buffer;
  6564. while (*p && *p != ' ')
  6565. p++;
  6566. if (*p)
  6567. type = simple_strtoul(p + 1, NULL, 0);
  6568. }
  6569. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6570. "channel %d (for '%s')\n", type, params.channel, buf);
  6571. iwl_get_measurement(priv, &params, type);
  6572. return count;
  6573. }
  6574. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6575. show_measurement, store_measurement);
  6576. #endif /* CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT */
  6577. static ssize_t show_rate(struct device *d,
  6578. struct device_attribute *attr, char *buf)
  6579. {
  6580. struct iwl_priv *priv = dev_get_drvdata(d);
  6581. unsigned long flags;
  6582. int i;
  6583. spin_lock_irqsave(&priv->sta_lock, flags);
  6584. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  6585. i = priv->stations[IWL_AP_ID].current_rate.s.rate;
  6586. else
  6587. i = priv->stations[IWL_STA_ID].current_rate.s.rate;
  6588. spin_unlock_irqrestore(&priv->sta_lock, flags);
  6589. i = iwl_rate_index_from_plcp(i);
  6590. if (i == -1)
  6591. return sprintf(buf, "0\n");
  6592. return sprintf(buf, "%d%s\n",
  6593. (iwl_rates[i].ieee >> 1),
  6594. (iwl_rates[i].ieee & 0x1) ? ".5" : "");
  6595. }
  6596. static DEVICE_ATTR(rate, S_IRUSR, show_rate, NULL);
  6597. static ssize_t store_retry_rate(struct device *d,
  6598. struct device_attribute *attr,
  6599. const char *buf, size_t count)
  6600. {
  6601. struct iwl_priv *priv = dev_get_drvdata(d);
  6602. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6603. if (priv->retry_rate <= 0)
  6604. priv->retry_rate = 1;
  6605. return count;
  6606. }
  6607. static ssize_t show_retry_rate(struct device *d,
  6608. struct device_attribute *attr, char *buf)
  6609. {
  6610. struct iwl_priv *priv = dev_get_drvdata(d);
  6611. return sprintf(buf, "%d", priv->retry_rate);
  6612. }
  6613. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6614. store_retry_rate);
  6615. static ssize_t store_power_level(struct device *d,
  6616. struct device_attribute *attr,
  6617. const char *buf, size_t count)
  6618. {
  6619. struct iwl_priv *priv = dev_get_drvdata(d);
  6620. int rc;
  6621. int mode;
  6622. mode = simple_strtoul(buf, NULL, 0);
  6623. mutex_lock(&priv->mutex);
  6624. if (!iwl_is_ready(priv)) {
  6625. rc = -EAGAIN;
  6626. goto out;
  6627. }
  6628. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6629. mode = IWL_POWER_AC;
  6630. else
  6631. mode |= IWL_POWER_ENABLED;
  6632. if (mode != priv->power_mode) {
  6633. rc = iwl_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6634. if (rc) {
  6635. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6636. goto out;
  6637. }
  6638. priv->power_mode = mode;
  6639. }
  6640. rc = count;
  6641. out:
  6642. mutex_unlock(&priv->mutex);
  6643. return rc;
  6644. }
  6645. #define MAX_WX_STRING 80
  6646. /* Values are in microsecond */
  6647. static const s32 timeout_duration[] = {
  6648. 350000,
  6649. 250000,
  6650. 75000,
  6651. 37000,
  6652. 25000,
  6653. };
  6654. static const s32 period_duration[] = {
  6655. 400000,
  6656. 700000,
  6657. 1000000,
  6658. 1000000,
  6659. 1000000
  6660. };
  6661. static ssize_t show_power_level(struct device *d,
  6662. struct device_attribute *attr, char *buf)
  6663. {
  6664. struct iwl_priv *priv = dev_get_drvdata(d);
  6665. int level = IWL_POWER_LEVEL(priv->power_mode);
  6666. char *p = buf;
  6667. p += sprintf(p, "%d ", level);
  6668. switch (level) {
  6669. case IWL_POWER_MODE_CAM:
  6670. case IWL_POWER_AC:
  6671. p += sprintf(p, "(AC)");
  6672. break;
  6673. case IWL_POWER_BATTERY:
  6674. p += sprintf(p, "(BATTERY)");
  6675. break;
  6676. default:
  6677. p += sprintf(p,
  6678. "(Timeout %dms, Period %dms)",
  6679. timeout_duration[level - 1] / 1000,
  6680. period_duration[level - 1] / 1000);
  6681. }
  6682. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6683. p += sprintf(p, " OFF\n");
  6684. else
  6685. p += sprintf(p, " \n");
  6686. return (p - buf + 1);
  6687. }
  6688. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6689. store_power_level);
  6690. static ssize_t show_channels(struct device *d,
  6691. struct device_attribute *attr, char *buf)
  6692. {
  6693. struct iwl_priv *priv = dev_get_drvdata(d);
  6694. int len = 0, i;
  6695. struct ieee80211_channel *channels = NULL;
  6696. const struct ieee80211_hw_mode *hw_mode = NULL;
  6697. int count = 0;
  6698. if (!iwl_is_ready(priv))
  6699. return -EAGAIN;
  6700. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211G);
  6701. if (!hw_mode)
  6702. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211B);
  6703. if (hw_mode) {
  6704. channels = hw_mode->channels;
  6705. count = hw_mode->num_channels;
  6706. }
  6707. len +=
  6708. sprintf(&buf[len],
  6709. "Displaying %d channels in 2.4GHz band "
  6710. "(802.11bg):\n", count);
  6711. for (i = 0; i < count; i++)
  6712. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  6713. channels[i].chan,
  6714. channels[i].power_level,
  6715. channels[i].
  6716. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  6717. " (IEEE 802.11h required)" : "",
  6718. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  6719. || (channels[i].
  6720. flag &
  6721. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  6722. ", IBSS",
  6723. channels[i].
  6724. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  6725. "active/passive" : "passive only");
  6726. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211A);
  6727. if (hw_mode) {
  6728. channels = hw_mode->channels;
  6729. count = hw_mode->num_channels;
  6730. } else {
  6731. channels = NULL;
  6732. count = 0;
  6733. }
  6734. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  6735. "(802.11a):\n", count);
  6736. for (i = 0; i < count; i++)
  6737. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  6738. channels[i].chan,
  6739. channels[i].power_level,
  6740. channels[i].
  6741. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  6742. " (IEEE 802.11h required)" : "",
  6743. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  6744. || (channels[i].
  6745. flag &
  6746. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  6747. ", IBSS",
  6748. channels[i].
  6749. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  6750. "active/passive" : "passive only");
  6751. return len;
  6752. }
  6753. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6754. static ssize_t show_statistics(struct device *d,
  6755. struct device_attribute *attr, char *buf)
  6756. {
  6757. struct iwl_priv *priv = dev_get_drvdata(d);
  6758. u32 size = sizeof(struct iwl_notif_statistics);
  6759. u32 len = 0, ofs = 0;
  6760. u8 *data = (u8 *) & priv->statistics;
  6761. int rc = 0;
  6762. if (!iwl_is_alive(priv))
  6763. return -EAGAIN;
  6764. mutex_lock(&priv->mutex);
  6765. rc = iwl_send_statistics_request(priv);
  6766. mutex_unlock(&priv->mutex);
  6767. if (rc) {
  6768. len = sprintf(buf,
  6769. "Error sending statistics request: 0x%08X\n", rc);
  6770. return len;
  6771. }
  6772. while (size && (PAGE_SIZE - len)) {
  6773. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6774. PAGE_SIZE - len, 1);
  6775. len = strlen(buf);
  6776. if (PAGE_SIZE - len)
  6777. buf[len++] = '\n';
  6778. ofs += 16;
  6779. size -= min(size, 16U);
  6780. }
  6781. return len;
  6782. }
  6783. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6784. static ssize_t show_antenna(struct device *d,
  6785. struct device_attribute *attr, char *buf)
  6786. {
  6787. struct iwl_priv *priv = dev_get_drvdata(d);
  6788. if (!iwl_is_alive(priv))
  6789. return -EAGAIN;
  6790. return sprintf(buf, "%d\n", priv->antenna);
  6791. }
  6792. static ssize_t store_antenna(struct device *d,
  6793. struct device_attribute *attr,
  6794. const char *buf, size_t count)
  6795. {
  6796. int ant;
  6797. struct iwl_priv *priv = dev_get_drvdata(d);
  6798. if (count == 0)
  6799. return 0;
  6800. if (sscanf(buf, "%1i", &ant) != 1) {
  6801. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6802. return count;
  6803. }
  6804. if ((ant >= 0) && (ant <= 2)) {
  6805. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6806. priv->antenna = (enum iwl_antenna)ant;
  6807. } else
  6808. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6809. return count;
  6810. }
  6811. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6812. static ssize_t show_status(struct device *d,
  6813. struct device_attribute *attr, char *buf)
  6814. {
  6815. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6816. if (!iwl_is_alive(priv))
  6817. return -EAGAIN;
  6818. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6819. }
  6820. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6821. static ssize_t dump_error_log(struct device *d,
  6822. struct device_attribute *attr,
  6823. const char *buf, size_t count)
  6824. {
  6825. char *p = (char *)buf;
  6826. if (p[0] == '1')
  6827. iwl_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  6828. return strnlen(buf, count);
  6829. }
  6830. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6831. static ssize_t dump_event_log(struct device *d,
  6832. struct device_attribute *attr,
  6833. const char *buf, size_t count)
  6834. {
  6835. char *p = (char *)buf;
  6836. if (p[0] == '1')
  6837. iwl_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  6838. return strnlen(buf, count);
  6839. }
  6840. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6841. /*****************************************************************************
  6842. *
  6843. * driver setup and teardown
  6844. *
  6845. *****************************************************************************/
  6846. static void iwl_setup_deferred_work(struct iwl_priv *priv)
  6847. {
  6848. priv->workqueue = create_workqueue(DRV_NAME);
  6849. init_waitqueue_head(&priv->wait_command_queue);
  6850. INIT_WORK(&priv->up, iwl_bg_up);
  6851. INIT_WORK(&priv->restart, iwl_bg_restart);
  6852. INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
  6853. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  6854. INIT_WORK(&priv->request_scan, iwl_bg_request_scan);
  6855. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  6856. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  6857. INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
  6858. INIT_DELAYED_WORK(&priv->post_associate, iwl_bg_post_associate);
  6859. INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
  6860. INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
  6861. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  6862. iwl_hw_setup_deferred_work(priv);
  6863. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6864. iwl_irq_tasklet, (unsigned long)priv);
  6865. }
  6866. static void iwl_cancel_deferred_work(struct iwl_priv *priv)
  6867. {
  6868. iwl_hw_cancel_deferred_work(priv);
  6869. cancel_delayed_work_sync(&priv->init_alive_start);
  6870. cancel_delayed_work(&priv->scan_check);
  6871. cancel_delayed_work(&priv->alive_start);
  6872. cancel_delayed_work(&priv->post_associate);
  6873. cancel_work_sync(&priv->beacon_update);
  6874. }
  6875. static struct attribute *iwl_sysfs_entries[] = {
  6876. &dev_attr_antenna.attr,
  6877. &dev_attr_channels.attr,
  6878. &dev_attr_dump_errors.attr,
  6879. &dev_attr_dump_events.attr,
  6880. &dev_attr_flags.attr,
  6881. &dev_attr_filter_flags.attr,
  6882. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  6883. &dev_attr_measurement.attr,
  6884. #endif
  6885. &dev_attr_power_level.attr,
  6886. &dev_attr_rate.attr,
  6887. &dev_attr_retry_rate.attr,
  6888. &dev_attr_rf_kill.attr,
  6889. &dev_attr_rs_window.attr,
  6890. &dev_attr_statistics.attr,
  6891. &dev_attr_status.attr,
  6892. &dev_attr_temperature.attr,
  6893. &dev_attr_tune.attr,
  6894. &dev_attr_tx_power.attr,
  6895. NULL
  6896. };
  6897. static struct attribute_group iwl_attribute_group = {
  6898. .name = NULL, /* put in device directory */
  6899. .attrs = iwl_sysfs_entries,
  6900. };
  6901. static struct ieee80211_ops iwl_hw_ops = {
  6902. .tx = iwl_mac_tx,
  6903. .start = iwl_mac_start,
  6904. .stop = iwl_mac_stop,
  6905. .add_interface = iwl_mac_add_interface,
  6906. .remove_interface = iwl_mac_remove_interface,
  6907. .config = iwl_mac_config,
  6908. .config_interface = iwl_mac_config_interface,
  6909. .configure_filter = iwl_configure_filter,
  6910. .set_key = iwl_mac_set_key,
  6911. .get_stats = iwl_mac_get_stats,
  6912. .get_tx_stats = iwl_mac_get_tx_stats,
  6913. .conf_tx = iwl_mac_conf_tx,
  6914. .get_tsf = iwl_mac_get_tsf,
  6915. .reset_tsf = iwl_mac_reset_tsf,
  6916. .beacon_update = iwl_mac_beacon_update,
  6917. .hw_scan = iwl_mac_hw_scan
  6918. };
  6919. static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  6920. {
  6921. int err = 0;
  6922. u32 pci_id;
  6923. struct iwl_priv *priv;
  6924. struct ieee80211_hw *hw;
  6925. int i;
  6926. if (iwl_param_disable_hw_scan) {
  6927. IWL_DEBUG_INFO("Disabling hw_scan\n");
  6928. iwl_hw_ops.hw_scan = NULL;
  6929. }
  6930. if ((iwl_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  6931. (iwl_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  6932. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  6933. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  6934. err = -EINVAL;
  6935. goto out;
  6936. }
  6937. /* mac80211 allocates memory for this device instance, including
  6938. * space for this driver's private structure */
  6939. hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl_hw_ops);
  6940. if (hw == NULL) {
  6941. IWL_ERROR("Can not allocate network device\n");
  6942. err = -ENOMEM;
  6943. goto out;
  6944. }
  6945. SET_IEEE80211_DEV(hw, &pdev->dev);
  6946. hw->rate_control_algorithm = "iwl-3945-rs";
  6947. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  6948. priv = hw->priv;
  6949. priv->hw = hw;
  6950. priv->pci_dev = pdev;
  6951. priv->antenna = (enum iwl_antenna)iwl_param_antenna;
  6952. #ifdef CONFIG_IWLWIFI_DEBUG
  6953. iwl_debug_level = iwl_param_debug;
  6954. atomic_set(&priv->restrict_refcnt, 0);
  6955. #endif
  6956. priv->retry_rate = 1;
  6957. priv->ibss_beacon = NULL;
  6958. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  6959. * the range of signal quality values that we'll provide.
  6960. * Negative values for level/noise indicate that we'll provide dBm.
  6961. * For WE, at least, non-0 values here *enable* display of values
  6962. * in app (iwconfig). */
  6963. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  6964. hw->max_noise = -20; /* noise level, negative indicates dBm */
  6965. hw->max_signal = 100; /* link quality indication (%) */
  6966. /* Tell mac80211 our Tx characteristics */
  6967. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  6968. hw->queues = 4;
  6969. spin_lock_init(&priv->lock);
  6970. spin_lock_init(&priv->power_data.lock);
  6971. spin_lock_init(&priv->sta_lock);
  6972. spin_lock_init(&priv->hcmd_lock);
  6973. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  6974. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  6975. INIT_LIST_HEAD(&priv->free_frames);
  6976. mutex_init(&priv->mutex);
  6977. if (pci_enable_device(pdev)) {
  6978. err = -ENODEV;
  6979. goto out_ieee80211_free_hw;
  6980. }
  6981. pci_set_master(pdev);
  6982. iwl_clear_stations_table(priv);
  6983. priv->data_retry_limit = -1;
  6984. priv->ieee_channels = NULL;
  6985. priv->ieee_rates = NULL;
  6986. priv->phymode = -1;
  6987. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  6988. if (!err)
  6989. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  6990. if (err) {
  6991. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  6992. goto out_pci_disable_device;
  6993. }
  6994. pci_set_drvdata(pdev, priv);
  6995. err = pci_request_regions(pdev, DRV_NAME);
  6996. if (err)
  6997. goto out_pci_disable_device;
  6998. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  6999. * PCI Tx retries from interfering with C3 CPU state */
  7000. pci_write_config_byte(pdev, 0x41, 0x00);
  7001. priv->hw_base = pci_iomap(pdev, 0, 0);
  7002. if (!priv->hw_base) {
  7003. err = -ENODEV;
  7004. goto out_pci_release_regions;
  7005. }
  7006. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7007. (unsigned long long) pci_resource_len(pdev, 0));
  7008. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7009. /* Initialize module parameter values here */
  7010. if (iwl_param_disable) {
  7011. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7012. IWL_DEBUG_INFO("Radio disabled.\n");
  7013. }
  7014. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7015. pci_id =
  7016. (priv->pci_dev->device << 16) | priv->pci_dev->subsystem_device;
  7017. switch (pci_id) {
  7018. case 0x42221005: /* 0x4222 0x8086 0x1005 is BG SKU */
  7019. case 0x42221034: /* 0x4222 0x8086 0x1034 is BG SKU */
  7020. case 0x42271014: /* 0x4227 0x8086 0x1014 is BG SKU */
  7021. case 0x42221044: /* 0x4222 0x8086 0x1044 is BG SKU */
  7022. priv->is_abg = 0;
  7023. break;
  7024. /*
  7025. * Rest are assumed ABG SKU -- if this is not the
  7026. * case then the card will get the wrong 'Detected'
  7027. * line in the kernel log however the code that
  7028. * initializes the GEO table will detect no A-band
  7029. * channels and remove the is_abg mask.
  7030. */
  7031. default:
  7032. priv->is_abg = 1;
  7033. break;
  7034. }
  7035. printk(KERN_INFO DRV_NAME
  7036. ": Detected Intel PRO/Wireless 3945%sBG Network Connection\n",
  7037. priv->is_abg ? "A" : "");
  7038. /* Device-specific setup */
  7039. if (iwl_hw_set_hw_setting(priv)) {
  7040. IWL_ERROR("failed to set hw settings\n");
  7041. mutex_unlock(&priv->mutex);
  7042. goto out_iounmap;
  7043. }
  7044. #ifdef CONFIG_IWLWIFI_QOS
  7045. if (iwl_param_qos_enable)
  7046. priv->qos_data.qos_enable = 1;
  7047. iwl_reset_qos(priv);
  7048. priv->qos_data.qos_active = 0;
  7049. priv->qos_data.qos_cap.val = 0;
  7050. #endif /* CONFIG_IWLWIFI_QOS */
  7051. iwl_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7052. iwl_setup_deferred_work(priv);
  7053. iwl_setup_rx_handlers(priv);
  7054. priv->rates_mask = IWL_RATES_MASK;
  7055. /* If power management is turned on, default to AC mode */
  7056. priv->power_mode = IWL_POWER_AC;
  7057. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7058. pci_enable_msi(pdev);
  7059. err = request_irq(pdev->irq, iwl_isr, IRQF_SHARED, DRV_NAME, priv);
  7060. if (err) {
  7061. IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
  7062. goto out_disable_msi;
  7063. }
  7064. mutex_lock(&priv->mutex);
  7065. err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
  7066. if (err) {
  7067. IWL_ERROR("failed to create sysfs device attributes\n");
  7068. mutex_unlock(&priv->mutex);
  7069. goto out_release_irq;
  7070. }
  7071. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  7072. * ucode filename and max sizes are card-specific. */
  7073. err = iwl_read_ucode(priv);
  7074. if (err) {
  7075. IWL_ERROR("Could not read microcode: %d\n", err);
  7076. mutex_unlock(&priv->mutex);
  7077. goto out_pci_alloc;
  7078. }
  7079. mutex_unlock(&priv->mutex);
  7080. IWL_DEBUG_INFO("Queueing UP work.\n");
  7081. queue_work(priv->workqueue, &priv->up);
  7082. return 0;
  7083. out_pci_alloc:
  7084. iwl_dealloc_ucode_pci(priv);
  7085. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7086. out_release_irq:
  7087. free_irq(pdev->irq, priv);
  7088. out_disable_msi:
  7089. pci_disable_msi(pdev);
  7090. destroy_workqueue(priv->workqueue);
  7091. priv->workqueue = NULL;
  7092. iwl_unset_hw_setting(priv);
  7093. out_iounmap:
  7094. pci_iounmap(pdev, priv->hw_base);
  7095. out_pci_release_regions:
  7096. pci_release_regions(pdev);
  7097. out_pci_disable_device:
  7098. pci_disable_device(pdev);
  7099. pci_set_drvdata(pdev, NULL);
  7100. out_ieee80211_free_hw:
  7101. ieee80211_free_hw(priv->hw);
  7102. out:
  7103. return err;
  7104. }
  7105. static void iwl_pci_remove(struct pci_dev *pdev)
  7106. {
  7107. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7108. struct list_head *p, *q;
  7109. int i;
  7110. if (!priv)
  7111. return;
  7112. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7113. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7114. iwl_down(priv);
  7115. /* Free MAC hash list for ADHOC */
  7116. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7117. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7118. list_del(p);
  7119. kfree(list_entry(p, struct iwl_ibss_seq, list));
  7120. }
  7121. }
  7122. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7123. iwl_dealloc_ucode_pci(priv);
  7124. if (priv->rxq.bd)
  7125. iwl_rx_queue_free(priv, &priv->rxq);
  7126. iwl_hw_txq_ctx_free(priv);
  7127. iwl_unset_hw_setting(priv);
  7128. iwl_clear_stations_table(priv);
  7129. if (priv->mac80211_registered) {
  7130. ieee80211_unregister_hw(priv->hw);
  7131. iwl_rate_control_unregister(priv->hw);
  7132. }
  7133. /*netif_stop_queue(dev); */
  7134. flush_workqueue(priv->workqueue);
  7135. /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
  7136. * priv->workqueue... so we can't take down the workqueue
  7137. * until now... */
  7138. destroy_workqueue(priv->workqueue);
  7139. priv->workqueue = NULL;
  7140. free_irq(pdev->irq, priv);
  7141. pci_disable_msi(pdev);
  7142. pci_iounmap(pdev, priv->hw_base);
  7143. pci_release_regions(pdev);
  7144. pci_disable_device(pdev);
  7145. pci_set_drvdata(pdev, NULL);
  7146. kfree(priv->channel_info);
  7147. kfree(priv->ieee_channels);
  7148. kfree(priv->ieee_rates);
  7149. if (priv->ibss_beacon)
  7150. dev_kfree_skb(priv->ibss_beacon);
  7151. ieee80211_free_hw(priv->hw);
  7152. }
  7153. #ifdef CONFIG_PM
  7154. static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7155. {
  7156. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7157. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7158. /* Take down the device; powers it off, etc. */
  7159. iwl_down(priv);
  7160. if (priv->mac80211_registered)
  7161. ieee80211_stop_queues(priv->hw);
  7162. pci_save_state(pdev);
  7163. pci_disable_device(pdev);
  7164. pci_set_power_state(pdev, PCI_D3hot);
  7165. return 0;
  7166. }
  7167. static void iwl_resume(struct iwl_priv *priv)
  7168. {
  7169. unsigned long flags;
  7170. /* The following it a temporary work around due to the
  7171. * suspend / resume not fully initializing the NIC correctly.
  7172. * Without all of the following, resume will not attempt to take
  7173. * down the NIC (it shouldn't really need to) and will just try
  7174. * and bring the NIC back up. However that fails during the
  7175. * ucode verification process. This then causes iwl_down to be
  7176. * called *after* iwl_hw_nic_init() has succeeded -- which
  7177. * then lets the next init sequence succeed. So, we've
  7178. * replicated all of that NIC init code here... */
  7179. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7180. iwl_hw_nic_init(priv);
  7181. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7182. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  7183. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  7184. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7185. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7186. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7187. /* tell the device to stop sending interrupts */
  7188. iwl_disable_interrupts(priv);
  7189. spin_lock_irqsave(&priv->lock, flags);
  7190. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  7191. if (!iwl_grab_restricted_access(priv)) {
  7192. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  7193. APMG_CLK_VAL_DMA_CLK_RQT);
  7194. iwl_release_restricted_access(priv);
  7195. }
  7196. spin_unlock_irqrestore(&priv->lock, flags);
  7197. udelay(5);
  7198. iwl_hw_nic_reset(priv);
  7199. /* Bring the device back up */
  7200. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7201. queue_work(priv->workqueue, &priv->up);
  7202. }
  7203. static int iwl_pci_resume(struct pci_dev *pdev)
  7204. {
  7205. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7206. int err;
  7207. printk(KERN_INFO "Coming out of suspend...\n");
  7208. pci_set_power_state(pdev, PCI_D0);
  7209. err = pci_enable_device(pdev);
  7210. pci_restore_state(pdev);
  7211. /*
  7212. * Suspend/Resume resets the PCI configuration space, so we have to
  7213. * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
  7214. * from interfering with C3 CPU state. pci_restore_state won't help
  7215. * here since it only restores the first 64 bytes pci config header.
  7216. */
  7217. pci_write_config_byte(pdev, 0x41, 0x00);
  7218. iwl_resume(priv);
  7219. return 0;
  7220. }
  7221. #endif /* CONFIG_PM */
  7222. /*****************************************************************************
  7223. *
  7224. * driver and module entry point
  7225. *
  7226. *****************************************************************************/
  7227. static struct pci_driver iwl_driver = {
  7228. .name = DRV_NAME,
  7229. .id_table = iwl_hw_card_ids,
  7230. .probe = iwl_pci_probe,
  7231. .remove = __devexit_p(iwl_pci_remove),
  7232. #ifdef CONFIG_PM
  7233. .suspend = iwl_pci_suspend,
  7234. .resume = iwl_pci_resume,
  7235. #endif
  7236. };
  7237. static int __init iwl_init(void)
  7238. {
  7239. int ret;
  7240. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7241. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7242. ret = pci_register_driver(&iwl_driver);
  7243. if (ret) {
  7244. IWL_ERROR("Unable to initialize PCI module\n");
  7245. return ret;
  7246. }
  7247. #ifdef CONFIG_IWLWIFI_DEBUG
  7248. ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level);
  7249. if (ret) {
  7250. IWL_ERROR("Unable to create driver sysfs file\n");
  7251. pci_unregister_driver(&iwl_driver);
  7252. return ret;
  7253. }
  7254. #endif
  7255. return ret;
  7256. }
  7257. static void __exit iwl_exit(void)
  7258. {
  7259. #ifdef CONFIG_IWLWIFI_DEBUG
  7260. driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level);
  7261. #endif
  7262. pci_unregister_driver(&iwl_driver);
  7263. }
  7264. module_param_named(antenna, iwl_param_antenna, int, 0444);
  7265. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7266. module_param_named(disable, iwl_param_disable, int, 0444);
  7267. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7268. module_param_named(hwcrypto, iwl_param_hwcrypto, int, 0444);
  7269. MODULE_PARM_DESC(hwcrypto,
  7270. "using hardware crypto engine (default 0 [software])\n");
  7271. module_param_named(debug, iwl_param_debug, int, 0444);
  7272. MODULE_PARM_DESC(debug, "debug output mask");
  7273. module_param_named(disable_hw_scan, iwl_param_disable_hw_scan, int, 0444);
  7274. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7275. module_param_named(queues_num, iwl_param_queues_num, int, 0444);
  7276. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7277. /* QoS */
  7278. module_param_named(qos_enable, iwl_param_qos_enable, int, 0444);
  7279. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7280. module_exit(iwl_exit);
  7281. module_init(iwl_init);