am335x-evm.dts 9.2 KB

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  1. /*
  2. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /dts-v1/;
  9. #include "am33xx.dtsi"
  10. / {
  11. model = "TI AM335x EVM";
  12. compatible = "ti,am335x-evm", "ti,am33xx";
  13. cpus {
  14. cpu@0 {
  15. cpu0-supply = <&vdd1_reg>;
  16. };
  17. };
  18. memory {
  19. device_type = "memory";
  20. reg = <0x80000000 0x10000000>; /* 256 MB */
  21. };
  22. am33xx_pinmux: pinmux@44e10800 {
  23. pinctrl-names = "default";
  24. pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
  25. matrix_keypad_s0: matrix_keypad_s0 {
  26. pinctrl-single,pins = <
  27. 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
  28. 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
  29. 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
  30. 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
  31. 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
  32. >;
  33. };
  34. volume_keys_s0: volume_keys_s0 {
  35. pinctrl-single,pins = <
  36. 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
  37. 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
  38. >;
  39. };
  40. i2c0_pins: pinmux_i2c0_pins {
  41. pinctrl-single,pins = <
  42. 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
  43. 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
  44. >;
  45. };
  46. i2c1_pins: pinmux_i2c1_pins {
  47. pinctrl-single,pins = <
  48. 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
  49. 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
  50. >;
  51. };
  52. uart0_pins: pinmux_uart0_pins {
  53. pinctrl-single,pins = <
  54. 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
  55. 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
  56. >;
  57. };
  58. clkout2_pin: pinmux_clkout2_pin {
  59. pinctrl-single,pins = <
  60. 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
  61. >;
  62. };
  63. nandflash_pins_s0: nandflash_pins_s0 {
  64. pinctrl-single,pins = <
  65. 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
  66. 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
  67. 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
  68. 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
  69. 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
  70. 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
  71. 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
  72. 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
  73. 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
  74. 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
  75. 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
  76. 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
  77. 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
  78. 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
  79. 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
  80. >;
  81. };
  82. ecap0_pins: backlight_pins {
  83. pinctrl-single,pins = <
  84. 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
  85. >;
  86. };
  87. };
  88. ocp {
  89. uart0: serial@44e09000 {
  90. pinctrl-names = "default";
  91. pinctrl-0 = <&uart0_pins>;
  92. status = "okay";
  93. };
  94. i2c0: i2c@44e0b000 {
  95. pinctrl-names = "default";
  96. pinctrl-0 = <&i2c0_pins>;
  97. status = "okay";
  98. clock-frequency = <400000>;
  99. tps: tps@2d {
  100. reg = <0x2d>;
  101. };
  102. };
  103. i2c1: i2c@4802a000 {
  104. pinctrl-names = "default";
  105. pinctrl-0 = <&i2c1_pins>;
  106. status = "okay";
  107. clock-frequency = <100000>;
  108. lis331dlh: lis331dlh@18 {
  109. compatible = "st,lis331dlh", "st,lis3lv02d";
  110. reg = <0x18>;
  111. Vdd-supply = <&lis3_reg>;
  112. Vdd_IO-supply = <&lis3_reg>;
  113. st,click-single-x;
  114. st,click-single-y;
  115. st,click-single-z;
  116. st,click-thresh-x = <10>;
  117. st,click-thresh-y = <10>;
  118. st,click-thresh-z = <10>;
  119. st,irq1-click;
  120. st,irq2-click;
  121. st,wakeup-x-lo;
  122. st,wakeup-x-hi;
  123. st,wakeup-y-lo;
  124. st,wakeup-y-hi;
  125. st,wakeup-z-lo;
  126. st,wakeup-z-hi;
  127. st,min-limit-x = <120>;
  128. st,min-limit-y = <120>;
  129. st,min-limit-z = <140>;
  130. st,max-limit-x = <550>;
  131. st,max-limit-y = <550>;
  132. st,max-limit-z = <750>;
  133. };
  134. tsl2550: tsl2550@39 {
  135. compatible = "taos,tsl2550";
  136. reg = <0x39>;
  137. };
  138. tmp275: tmp275@48 {
  139. compatible = "ti,tmp275";
  140. reg = <0x48>;
  141. };
  142. };
  143. elm: elm@48080000 {
  144. status = "okay";
  145. };
  146. epwmss0: epwmss@48300000 {
  147. status = "okay";
  148. ecap0: ecap@48300100 {
  149. status = "okay";
  150. pinctrl-names = "default";
  151. pinctrl-0 = <&ecap0_pins>;
  152. };
  153. };
  154. gpmc: gpmc@50000000 {
  155. status = "okay";
  156. pinctrl-names = "default";
  157. pinctrl-0 = <&nandflash_pins_s0>;
  158. ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
  159. nand@0,0 {
  160. reg = <0 0 0>; /* CS0, offset 0 */
  161. nand-bus-width = <8>;
  162. ti,nand-ecc-opt = "bch8";
  163. gpmc,device-nand = "true";
  164. gpmc,device-width = <1>;
  165. gpmc,sync-clk-ps = <0>;
  166. gpmc,cs-on-ns = <0>;
  167. gpmc,cs-rd-off-ns = <44>;
  168. gpmc,cs-wr-off-ns = <44>;
  169. gpmc,adv-on-ns = <6>;
  170. gpmc,adv-rd-off-ns = <34>;
  171. gpmc,adv-wr-off-ns = <44>;
  172. gpmc,we-on-ns = <0>;
  173. gpmc,we-off-ns = <40>;
  174. gpmc,oe-on-ns = <0>;
  175. gpmc,oe-off-ns = <54>;
  176. gpmc,access-ns = <64>;
  177. gpmc,rd-cycle-ns = <82>;
  178. gpmc,wr-cycle-ns = <82>;
  179. gpmc,wait-on-read = "true";
  180. gpmc,wait-on-write = "true";
  181. gpmc,bus-turnaround-ns = <0>;
  182. gpmc,cycle2cycle-delay-ns = <0>;
  183. gpmc,clk-activation-ns = <0>;
  184. gpmc,wait-monitoring-ns = <0>;
  185. gpmc,wr-access-ns = <40>;
  186. gpmc,wr-data-mux-bus-ns = <0>;
  187. #address-cells = <1>;
  188. #size-cells = <1>;
  189. elm_id = <&elm>;
  190. /* MTD partition table */
  191. partition@0 {
  192. label = "SPL1";
  193. reg = <0x00000000 0x000020000>;
  194. };
  195. partition@1 {
  196. label = "SPL2";
  197. reg = <0x00020000 0x00020000>;
  198. };
  199. partition@2 {
  200. label = "SPL3";
  201. reg = <0x00040000 0x00020000>;
  202. };
  203. partition@3 {
  204. label = "SPL4";
  205. reg = <0x00060000 0x00020000>;
  206. };
  207. partition@4 {
  208. label = "U-boot";
  209. reg = <0x00080000 0x001e0000>;
  210. };
  211. partition@5 {
  212. label = "environment";
  213. reg = <0x00260000 0x00020000>;
  214. };
  215. partition@6 {
  216. label = "Kernel";
  217. reg = <0x00280000 0x00500000>;
  218. };
  219. partition@7 {
  220. label = "File-System";
  221. reg = <0x00780000 0x0F880000>;
  222. };
  223. };
  224. };
  225. };
  226. vbat: fixedregulator@0 {
  227. compatible = "regulator-fixed";
  228. regulator-name = "vbat";
  229. regulator-min-microvolt = <5000000>;
  230. regulator-max-microvolt = <5000000>;
  231. regulator-boot-on;
  232. };
  233. lis3_reg: fixedregulator@1 {
  234. compatible = "regulator-fixed";
  235. regulator-name = "lis3_reg";
  236. regulator-boot-on;
  237. };
  238. matrix_keypad: matrix_keypad@0 {
  239. compatible = "gpio-matrix-keypad";
  240. debounce-delay-ms = <5>;
  241. col-scan-delay-us = <2>;
  242. row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH /* Bank1, pin25 */
  243. &gpio1 26 GPIO_ACTIVE_HIGH /* Bank1, pin26 */
  244. &gpio1 27 GPIO_ACTIVE_HIGH>; /* Bank1, pin27 */
  245. col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH /* Bank1, pin21 */
  246. &gpio1 22 GPIO_ACTIVE_HIGH>; /* Bank1, pin22 */
  247. linux,keymap = <0x0000008b /* MENU */
  248. 0x0100009e /* BACK */
  249. 0x02000069 /* LEFT */
  250. 0x0001006a /* RIGHT */
  251. 0x0101001c /* ENTER */
  252. 0x0201006c>; /* DOWN */
  253. };
  254. gpio_keys: volume_keys@0 {
  255. compatible = "gpio-keys";
  256. #address-cells = <1>;
  257. #size-cells = <0>;
  258. autorepeat;
  259. switch@9 {
  260. label = "volume-up";
  261. linux,code = <115>;
  262. gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  263. gpio-key,wakeup;
  264. };
  265. switch@10 {
  266. label = "volume-down";
  267. linux,code = <114>;
  268. gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
  269. gpio-key,wakeup;
  270. };
  271. };
  272. backlight {
  273. compatible = "pwm-backlight";
  274. pwms = <&ecap0 0 50000 0>;
  275. brightness-levels = <0 51 53 56 62 75 101 152 255>;
  276. default-brightness-level = <8>;
  277. };
  278. };
  279. #include "tps65910.dtsi"
  280. &tps {
  281. vcc1-supply = <&vbat>;
  282. vcc2-supply = <&vbat>;
  283. vcc3-supply = <&vbat>;
  284. vcc4-supply = <&vbat>;
  285. vcc5-supply = <&vbat>;
  286. vcc6-supply = <&vbat>;
  287. vcc7-supply = <&vbat>;
  288. vccio-supply = <&vbat>;
  289. regulators {
  290. vrtc_reg: regulator@0 {
  291. regulator-always-on;
  292. };
  293. vio_reg: regulator@1 {
  294. regulator-always-on;
  295. };
  296. vdd1_reg: regulator@2 {
  297. /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
  298. regulator-name = "vdd_mpu";
  299. regulator-min-microvolt = <912500>;
  300. regulator-max-microvolt = <1312500>;
  301. regulator-boot-on;
  302. regulator-always-on;
  303. };
  304. vdd2_reg: regulator@3 {
  305. /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
  306. regulator-name = "vdd_core";
  307. regulator-min-microvolt = <912500>;
  308. regulator-max-microvolt = <1150000>;
  309. regulator-boot-on;
  310. regulator-always-on;
  311. };
  312. vdd3_reg: regulator@4 {
  313. regulator-always-on;
  314. };
  315. vdig1_reg: regulator@5 {
  316. regulator-always-on;
  317. };
  318. vdig2_reg: regulator@6 {
  319. regulator-always-on;
  320. };
  321. vpll_reg: regulator@7 {
  322. regulator-always-on;
  323. };
  324. vdac_reg: regulator@8 {
  325. regulator-always-on;
  326. };
  327. vaux1_reg: regulator@9 {
  328. regulator-always-on;
  329. };
  330. vaux2_reg: regulator@10 {
  331. regulator-always-on;
  332. };
  333. vaux33_reg: regulator@11 {
  334. regulator-always-on;
  335. };
  336. vmmc_reg: regulator@12 {
  337. regulator-always-on;
  338. };
  339. };
  340. };
  341. &cpsw_emac0 {
  342. phy_id = <&davinci_mdio>, <0>;
  343. };
  344. &cpsw_emac1 {
  345. phy_id = <&davinci_mdio>, <1>;
  346. };