iwl4965-base.c 228 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-eeprom.h"
  45. #include "iwl-4965.h"
  46. #include "iwl-core.h"
  47. #include "iwl-io.h"
  48. #include "iwl-helpers.h"
  49. #include "iwl-sta.h"
  50. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  51. struct iwl4965_tx_queue *txq);
  52. /******************************************************************************
  53. *
  54. * module boiler plate
  55. *
  56. ******************************************************************************/
  57. /*
  58. * module name, copyright, version, etc.
  59. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  60. */
  61. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  62. #ifdef CONFIG_IWLWIFI_DEBUG
  63. #define VD "d"
  64. #else
  65. #define VD
  66. #endif
  67. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  68. #define VS "s"
  69. #else
  70. #define VS
  71. #endif
  72. #define DRV_VERSION IWLWIFI_VERSION VD VS
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT);
  76. MODULE_LICENSE("GPL");
  77. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  78. {
  79. u16 fc = le16_to_cpu(hdr->frame_control);
  80. int hdr_len = ieee80211_get_hdrlen(fc);
  81. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  82. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  83. return NULL;
  84. }
  85. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  86. struct iwl_priv *priv, enum ieee80211_band band)
  87. {
  88. return priv->hw->wiphy->bands[band];
  89. }
  90. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  91. {
  92. /* Single white space is for Linksys APs */
  93. if (essid_len == 1 && essid[0] == ' ')
  94. return 1;
  95. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  96. while (essid_len) {
  97. essid_len--;
  98. if (essid[essid_len] != '\0')
  99. return 0;
  100. }
  101. return 1;
  102. }
  103. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  104. {
  105. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  106. const char *s = essid;
  107. char *d = escaped;
  108. if (iwl4965_is_empty_essid(essid, essid_len)) {
  109. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  110. return escaped;
  111. }
  112. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  113. while (essid_len--) {
  114. if (*s == '\0') {
  115. *d++ = '\\';
  116. *d++ = '0';
  117. s++;
  118. } else
  119. *d++ = *s++;
  120. }
  121. *d = '\0';
  122. return escaped;
  123. }
  124. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  125. * DMA services
  126. *
  127. * Theory of operation
  128. *
  129. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  130. * of buffer descriptors, each of which points to one or more data buffers for
  131. * the device to read from or fill. Driver and device exchange status of each
  132. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  133. * entries in each circular buffer, to protect against confusing empty and full
  134. * queue states.
  135. *
  136. * The device reads or writes the data in the queues via the device's several
  137. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  138. *
  139. * For Tx queue, there are low mark and high mark limits. If, after queuing
  140. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  141. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  142. * Tx queue resumed.
  143. *
  144. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  145. * queue (#4) for sending commands to the device firmware, and 15 other
  146. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  147. *
  148. * See more detailed info in iwl-4965-hw.h.
  149. ***************************************************/
  150. int iwl4965_queue_space(const struct iwl4965_queue *q)
  151. {
  152. int s = q->read_ptr - q->write_ptr;
  153. if (q->read_ptr > q->write_ptr)
  154. s -= q->n_bd;
  155. if (s <= 0)
  156. s += q->n_window;
  157. /* keep some reserve to not confuse empty and full situations */
  158. s -= 2;
  159. if (s < 0)
  160. s = 0;
  161. return s;
  162. }
  163. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  164. {
  165. return q->write_ptr > q->read_ptr ?
  166. (i >= q->read_ptr && i < q->write_ptr) :
  167. !(i < q->read_ptr && i >= q->write_ptr);
  168. }
  169. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  170. {
  171. /* This is for scan command, the big buffer at end of command array */
  172. if (is_huge)
  173. return q->n_window; /* must be power of 2 */
  174. /* Otherwise, use normal size buffers */
  175. return index & (q->n_window - 1);
  176. }
  177. /**
  178. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  179. */
  180. static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
  181. int count, int slots_num, u32 id)
  182. {
  183. q->n_bd = count;
  184. q->n_window = slots_num;
  185. q->id = id;
  186. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  187. * and iwl_queue_dec_wrap are broken. */
  188. BUG_ON(!is_power_of_2(count));
  189. /* slots_num must be power-of-two size, otherwise
  190. * get_cmd_index is broken. */
  191. BUG_ON(!is_power_of_2(slots_num));
  192. q->low_mark = q->n_window / 4;
  193. if (q->low_mark < 4)
  194. q->low_mark = 4;
  195. q->high_mark = q->n_window / 8;
  196. if (q->high_mark < 2)
  197. q->high_mark = 2;
  198. q->write_ptr = q->read_ptr = 0;
  199. return 0;
  200. }
  201. /**
  202. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  203. */
  204. static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
  205. struct iwl4965_tx_queue *txq, u32 id)
  206. {
  207. struct pci_dev *dev = priv->pci_dev;
  208. /* Driver private data, only for Tx (not command) queues,
  209. * not shared with device. */
  210. if (id != IWL_CMD_QUEUE_NUM) {
  211. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  212. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  213. if (!txq->txb) {
  214. IWL_ERROR("kmalloc for auxiliary BD "
  215. "structures failed\n");
  216. goto error;
  217. }
  218. } else
  219. txq->txb = NULL;
  220. /* Circular buffer of transmit frame descriptors (TFDs),
  221. * shared with device */
  222. txq->bd = pci_alloc_consistent(dev,
  223. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  224. &txq->q.dma_addr);
  225. if (!txq->bd) {
  226. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  227. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  228. goto error;
  229. }
  230. txq->q.id = id;
  231. return 0;
  232. error:
  233. if (txq->txb) {
  234. kfree(txq->txb);
  235. txq->txb = NULL;
  236. }
  237. return -ENOMEM;
  238. }
  239. /**
  240. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  241. */
  242. int iwl4965_tx_queue_init(struct iwl_priv *priv,
  243. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  244. {
  245. struct pci_dev *dev = priv->pci_dev;
  246. int len;
  247. int rc = 0;
  248. /*
  249. * Alloc buffer array for commands (Tx or other types of commands).
  250. * For the command queue (#4), allocate command space + one big
  251. * command for scan, since scan command is very huge; the system will
  252. * not have two scans at the same time, so only one is needed.
  253. * For normal Tx queues (all other queues), no super-size command
  254. * space is needed.
  255. */
  256. len = sizeof(struct iwl_cmd) * slots_num;
  257. if (txq_id == IWL_CMD_QUEUE_NUM)
  258. len += IWL_MAX_SCAN_SIZE;
  259. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  260. if (!txq->cmd)
  261. return -ENOMEM;
  262. /* Alloc driver data array and TFD circular buffer */
  263. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  264. if (rc) {
  265. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  266. return -ENOMEM;
  267. }
  268. txq->need_update = 0;
  269. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  270. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  271. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  272. /* Initialize queue's high/low-water marks, and head/tail indexes */
  273. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  274. /* Tell device where to find queue */
  275. iwl4965_hw_tx_queue_init(priv, txq);
  276. return 0;
  277. }
  278. /**
  279. * iwl4965_tx_queue_free - Deallocate DMA queue.
  280. * @txq: Transmit queue to deallocate.
  281. *
  282. * Empty queue by removing and destroying all BD's.
  283. * Free all buffers.
  284. * 0-fill, but do not free "txq" descriptor structure.
  285. */
  286. void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
  287. {
  288. struct iwl4965_queue *q = &txq->q;
  289. struct pci_dev *dev = priv->pci_dev;
  290. int len;
  291. if (q->n_bd == 0)
  292. return;
  293. /* first, empty all BD's */
  294. for (; q->write_ptr != q->read_ptr;
  295. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  296. iwl4965_hw_txq_free_tfd(priv, txq);
  297. len = sizeof(struct iwl_cmd) * q->n_window;
  298. if (q->id == IWL_CMD_QUEUE_NUM)
  299. len += IWL_MAX_SCAN_SIZE;
  300. /* De-alloc array of command/tx buffers */
  301. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  302. /* De-alloc circular buffer of TFDs */
  303. if (txq->q.n_bd)
  304. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  305. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  306. /* De-alloc array of per-TFD driver data */
  307. if (txq->txb) {
  308. kfree(txq->txb);
  309. txq->txb = NULL;
  310. }
  311. /* 0-fill queue descriptor structure */
  312. memset(txq, 0, sizeof(*txq));
  313. }
  314. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  315. /*************** STATION TABLE MANAGEMENT ****
  316. * mac80211 should be examined to determine if sta_info is duplicating
  317. * the functionality provided here
  318. */
  319. /**************************************************************/
  320. #if 0 /* temporary disable till we add real remove station */
  321. /**
  322. * iwl4965_remove_station - Remove driver's knowledge of station.
  323. *
  324. * NOTE: This does not remove station from device's station table.
  325. */
  326. static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  327. {
  328. int index = IWL_INVALID_STATION;
  329. int i;
  330. unsigned long flags;
  331. spin_lock_irqsave(&priv->sta_lock, flags);
  332. if (is_ap)
  333. index = IWL_AP_ID;
  334. else if (is_broadcast_ether_addr(addr))
  335. index = priv->hw_setting.bcast_sta_id;
  336. else
  337. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  338. if (priv->stations[i].used &&
  339. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  340. addr)) {
  341. index = i;
  342. break;
  343. }
  344. if (unlikely(index == IWL_INVALID_STATION))
  345. goto out;
  346. if (priv->stations[index].used) {
  347. priv->stations[index].used = 0;
  348. priv->num_stations--;
  349. }
  350. BUG_ON(priv->num_stations < 0);
  351. out:
  352. spin_unlock_irqrestore(&priv->sta_lock, flags);
  353. return 0;
  354. }
  355. #endif
  356. /**
  357. * iwl4965_add_station_flags - Add station to tables in driver and device
  358. */
  359. u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
  360. int is_ap, u8 flags, void *ht_data)
  361. {
  362. int i;
  363. int index = IWL_INVALID_STATION;
  364. struct iwl4965_station_entry *station;
  365. unsigned long flags_spin;
  366. DECLARE_MAC_BUF(mac);
  367. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  368. if (is_ap)
  369. index = IWL_AP_ID;
  370. else if (is_broadcast_ether_addr(addr))
  371. index = priv->hw_setting.bcast_sta_id;
  372. else
  373. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  374. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  375. addr)) {
  376. index = i;
  377. break;
  378. }
  379. if (!priv->stations[i].used &&
  380. index == IWL_INVALID_STATION)
  381. index = i;
  382. }
  383. /* These two conditions have the same outcome, but keep them separate
  384. since they have different meanings */
  385. if (unlikely(index == IWL_INVALID_STATION)) {
  386. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  387. return index;
  388. }
  389. if (priv->stations[index].used &&
  390. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  391. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  392. return index;
  393. }
  394. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  395. station = &priv->stations[index];
  396. station->used = 1;
  397. priv->num_stations++;
  398. /* Set up the REPLY_ADD_STA command to send to device */
  399. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  400. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  401. station->sta.mode = 0;
  402. station->sta.sta.sta_id = index;
  403. station->sta.station_flags = 0;
  404. #ifdef CONFIG_IWL4965_HT
  405. /* BCAST station and IBSS stations do not work in HT mode */
  406. if (index != priv->hw_setting.bcast_sta_id &&
  407. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  408. iwl4965_set_ht_add_station(priv, index,
  409. (struct ieee80211_ht_info *) ht_data);
  410. #endif /*CONFIG_IWL4965_HT*/
  411. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  412. /* Add station to device's station table */
  413. iwl4965_send_add_station(priv, &station->sta, flags);
  414. return index;
  415. }
  416. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  417. /**
  418. * iwl4965_enqueue_hcmd - enqueue a uCode command
  419. * @priv: device private data point
  420. * @cmd: a point to the ucode command structure
  421. *
  422. * The function returns < 0 values to indicate the operation is
  423. * failed. On success, it turns the index (> 0) of command in the
  424. * command queue.
  425. */
  426. int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  427. {
  428. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  429. struct iwl4965_queue *q = &txq->q;
  430. struct iwl4965_tfd_frame *tfd;
  431. u32 *control_flags;
  432. struct iwl_cmd *out_cmd;
  433. u32 idx;
  434. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  435. dma_addr_t phys_addr;
  436. int ret;
  437. unsigned long flags;
  438. /* If any of the command structures end up being larger than
  439. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  440. * we will need to increase the size of the TFD entries */
  441. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  442. !(cmd->meta.flags & CMD_SIZE_HUGE));
  443. if (iwl_is_rfkill(priv)) {
  444. IWL_DEBUG_INFO("Not sending command - RF KILL");
  445. return -EIO;
  446. }
  447. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  448. IWL_ERROR("No space for Tx\n");
  449. return -ENOSPC;
  450. }
  451. spin_lock_irqsave(&priv->hcmd_lock, flags);
  452. tfd = &txq->bd[q->write_ptr];
  453. memset(tfd, 0, sizeof(*tfd));
  454. control_flags = (u32 *) tfd;
  455. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  456. out_cmd = &txq->cmd[idx];
  457. out_cmd->hdr.cmd = cmd->id;
  458. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  459. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  460. /* At this point, the out_cmd now has all of the incoming cmd
  461. * information */
  462. out_cmd->hdr.flags = 0;
  463. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  464. INDEX_TO_SEQ(q->write_ptr));
  465. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  466. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  467. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  468. offsetof(struct iwl_cmd, hdr);
  469. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  470. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  471. "%d bytes at %d[%d]:%d\n",
  472. get_cmd_string(out_cmd->hdr.cmd),
  473. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  474. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  475. txq->need_update = 1;
  476. /* Set up entry in queue's byte count circular buffer */
  477. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  478. /* Increment and update queue's write index */
  479. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  480. iwl4965_tx_queue_update_write_ptr(priv, txq);
  481. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  482. return ret ? ret : idx;
  483. }
  484. static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  485. {
  486. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  487. if (hw_decrypt)
  488. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  489. else
  490. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  491. }
  492. int iwl4965_send_statistics_request(struct iwl_priv *priv)
  493. {
  494. u32 flags = 0;
  495. return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
  496. sizeof(flags), &flags);
  497. }
  498. /**
  499. * iwl4965_rxon_add_station - add station into station table.
  500. *
  501. * there is only one AP station with id= IWL_AP_ID
  502. * NOTE: mutex must be held before calling this fnction
  503. */
  504. static int iwl4965_rxon_add_station(struct iwl_priv *priv,
  505. const u8 *addr, int is_ap)
  506. {
  507. u8 sta_id;
  508. /* Add station to device's station table */
  509. #ifdef CONFIG_IWL4965_HT
  510. struct ieee80211_conf *conf = &priv->hw->conf;
  511. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  512. if ((is_ap) &&
  513. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  514. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  515. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  516. 0, cur_ht_config);
  517. else
  518. #endif /* CONFIG_IWL4965_HT */
  519. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  520. 0, NULL);
  521. /* Set up default rate scaling table in device's station table */
  522. iwl4965_add_station(priv, addr, is_ap);
  523. return sta_id;
  524. }
  525. /**
  526. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  527. *
  528. * NOTE: This is really only useful during development and can eventually
  529. * be #ifdef'd out once the driver is stable and folks aren't actively
  530. * making changes
  531. */
  532. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  533. {
  534. int error = 0;
  535. int counter = 1;
  536. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  537. error |= le32_to_cpu(rxon->flags &
  538. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  539. RXON_FLG_RADAR_DETECT_MSK));
  540. if (error)
  541. IWL_WARNING("check 24G fields %d | %d\n",
  542. counter++, error);
  543. } else {
  544. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  545. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  546. if (error)
  547. IWL_WARNING("check 52 fields %d | %d\n",
  548. counter++, error);
  549. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  550. if (error)
  551. IWL_WARNING("check 52 CCK %d | %d\n",
  552. counter++, error);
  553. }
  554. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  555. if (error)
  556. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  557. /* make sure basic rates 6Mbps and 1Mbps are supported */
  558. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  559. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  560. if (error)
  561. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  562. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  563. if (error)
  564. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  565. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  566. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  567. if (error)
  568. IWL_WARNING("check CCK and short slot %d | %d\n",
  569. counter++, error);
  570. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  571. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  572. if (error)
  573. IWL_WARNING("check CCK & auto detect %d | %d\n",
  574. counter++, error);
  575. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  576. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  577. if (error)
  578. IWL_WARNING("check TGG and auto detect %d | %d\n",
  579. counter++, error);
  580. if (error)
  581. IWL_WARNING("Tuning to channel %d\n",
  582. le16_to_cpu(rxon->channel));
  583. if (error) {
  584. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  585. return -1;
  586. }
  587. return 0;
  588. }
  589. /**
  590. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  591. * @priv: staging_rxon is compared to active_rxon
  592. *
  593. * If the RXON structure is changing enough to require a new tune,
  594. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  595. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  596. */
  597. static int iwl4965_full_rxon_required(struct iwl_priv *priv)
  598. {
  599. /* These items are only settable from the full RXON command */
  600. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  601. compare_ether_addr(priv->staging_rxon.bssid_addr,
  602. priv->active_rxon.bssid_addr) ||
  603. compare_ether_addr(priv->staging_rxon.node_addr,
  604. priv->active_rxon.node_addr) ||
  605. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  606. priv->active_rxon.wlap_bssid_addr) ||
  607. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  608. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  609. (priv->staging_rxon.air_propagation !=
  610. priv->active_rxon.air_propagation) ||
  611. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  612. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  613. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  614. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  615. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  616. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  617. return 1;
  618. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  619. * be updated with the RXON_ASSOC command -- however only some
  620. * flag transitions are allowed using RXON_ASSOC */
  621. /* Check if we are not switching bands */
  622. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  623. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  624. return 1;
  625. /* Check if we are switching association toggle */
  626. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  627. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  628. return 1;
  629. return 0;
  630. }
  631. static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
  632. {
  633. int rc = 0;
  634. struct iwl4965_rx_packet *res = NULL;
  635. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  636. struct iwl_host_cmd cmd = {
  637. .id = REPLY_RXON_ASSOC,
  638. .len = sizeof(rxon_assoc),
  639. .meta.flags = CMD_WANT_SKB,
  640. .data = &rxon_assoc,
  641. };
  642. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  643. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  644. if ((rxon1->flags == rxon2->flags) &&
  645. (rxon1->filter_flags == rxon2->filter_flags) &&
  646. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  647. (rxon1->ofdm_ht_single_stream_basic_rates ==
  648. rxon2->ofdm_ht_single_stream_basic_rates) &&
  649. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  650. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  651. (rxon1->rx_chain == rxon2->rx_chain) &&
  652. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  653. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  654. return 0;
  655. }
  656. rxon_assoc.flags = priv->staging_rxon.flags;
  657. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  658. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  659. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  660. rxon_assoc.reserved = 0;
  661. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  662. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  663. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  664. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  665. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  666. rc = iwl_send_cmd_sync(priv, &cmd);
  667. if (rc)
  668. return rc;
  669. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  670. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  671. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  672. rc = -EIO;
  673. }
  674. priv->alloc_rxb_skb--;
  675. dev_kfree_skb_any(cmd.meta.u.skb);
  676. return rc;
  677. }
  678. /**
  679. * iwl4965_commit_rxon - commit staging_rxon to hardware
  680. *
  681. * The RXON command in staging_rxon is committed to the hardware and
  682. * the active_rxon structure is updated with the new data. This
  683. * function correctly transitions out of the RXON_ASSOC_MSK state if
  684. * a HW tune is required based on the RXON structure changes.
  685. */
  686. static int iwl4965_commit_rxon(struct iwl_priv *priv)
  687. {
  688. /* cast away the const for active_rxon in this function */
  689. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  690. DECLARE_MAC_BUF(mac);
  691. int rc = 0;
  692. if (!iwl_is_alive(priv))
  693. return -1;
  694. /* always get timestamp with Rx frame */
  695. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  696. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  697. if (rc) {
  698. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  699. return -EINVAL;
  700. }
  701. /* If we don't need to send a full RXON, we can use
  702. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  703. * and other flags for the current radio configuration. */
  704. if (!iwl4965_full_rxon_required(priv)) {
  705. rc = iwl4965_send_rxon_assoc(priv);
  706. if (rc) {
  707. IWL_ERROR("Error setting RXON_ASSOC "
  708. "configuration (%d).\n", rc);
  709. return rc;
  710. }
  711. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  712. return 0;
  713. }
  714. /* station table will be cleared */
  715. priv->assoc_station_added = 0;
  716. #ifdef CONFIG_IWL4965_SENSITIVITY
  717. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  718. if (!priv->error_recovering)
  719. priv->start_calib = 0;
  720. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  721. #endif /* CONFIG_IWL4965_SENSITIVITY */
  722. /* If we are currently associated and the new config requires
  723. * an RXON_ASSOC and the new config wants the associated mask enabled,
  724. * we must clear the associated from the active configuration
  725. * before we apply the new config */
  726. if (iwl_is_associated(priv) &&
  727. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  728. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  729. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  730. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  731. sizeof(struct iwl4965_rxon_cmd),
  732. &priv->active_rxon);
  733. /* If the mask clearing failed then we set
  734. * active_rxon back to what it was previously */
  735. if (rc) {
  736. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  737. IWL_ERROR("Error clearing ASSOC_MSK on current "
  738. "configuration (%d).\n", rc);
  739. return rc;
  740. }
  741. }
  742. IWL_DEBUG_INFO("Sending RXON\n"
  743. "* with%s RXON_FILTER_ASSOC_MSK\n"
  744. "* channel = %d\n"
  745. "* bssid = %s\n",
  746. ((priv->staging_rxon.filter_flags &
  747. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  748. le16_to_cpu(priv->staging_rxon.channel),
  749. print_mac(mac, priv->staging_rxon.bssid_addr));
  750. iwl4965_set_rxon_hwcrypto(priv, priv->cfg->mod_params->hw_crypto);
  751. /* Apply the new configuration */
  752. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  753. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  754. if (rc) {
  755. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  756. return rc;
  757. }
  758. iwlcore_clear_stations_table(priv);
  759. #ifdef CONFIG_IWL4965_SENSITIVITY
  760. if (!priv->error_recovering)
  761. priv->start_calib = 0;
  762. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  763. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  764. #endif /* CONFIG_IWL4965_SENSITIVITY */
  765. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  766. /* If we issue a new RXON command which required a tune then we must
  767. * send a new TXPOWER command or we won't be able to Tx any frames */
  768. rc = iwl4965_hw_reg_send_txpower(priv);
  769. if (rc) {
  770. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  771. return rc;
  772. }
  773. /* Add the broadcast address so we can send broadcast frames */
  774. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  775. IWL_INVALID_STATION) {
  776. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  777. return -EIO;
  778. }
  779. /* If we have set the ASSOC_MSK and we are in BSS mode then
  780. * add the IWL_AP_ID to the station rate table */
  781. if (iwl_is_associated(priv) &&
  782. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  783. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  784. == IWL_INVALID_STATION) {
  785. IWL_ERROR("Error adding AP address for transmit.\n");
  786. return -EIO;
  787. }
  788. priv->assoc_station_added = 1;
  789. if (priv->default_wep_key &&
  790. iwl_send_static_wepkey_cmd(priv, 0))
  791. IWL_ERROR("Could not send WEP static key.\n");
  792. }
  793. return 0;
  794. }
  795. static int iwl4965_send_bt_config(struct iwl_priv *priv)
  796. {
  797. struct iwl4965_bt_cmd bt_cmd = {
  798. .flags = 3,
  799. .lead_time = 0xAA,
  800. .max_kill = 1,
  801. .kill_ack_mask = 0,
  802. .kill_cts_mask = 0,
  803. };
  804. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  805. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  806. }
  807. static int iwl4965_send_scan_abort(struct iwl_priv *priv)
  808. {
  809. int rc = 0;
  810. struct iwl4965_rx_packet *res;
  811. struct iwl_host_cmd cmd = {
  812. .id = REPLY_SCAN_ABORT_CMD,
  813. .meta.flags = CMD_WANT_SKB,
  814. };
  815. /* If there isn't a scan actively going on in the hardware
  816. * then we are in between scan bands and not actually
  817. * actively scanning, so don't send the abort command */
  818. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  819. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  820. return 0;
  821. }
  822. rc = iwl_send_cmd_sync(priv, &cmd);
  823. if (rc) {
  824. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  825. return rc;
  826. }
  827. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  828. if (res->u.status != CAN_ABORT_STATUS) {
  829. /* The scan abort will return 1 for success or
  830. * 2 for "failure". A failure condition can be
  831. * due to simply not being in an active scan which
  832. * can occur if we send the scan abort before we
  833. * the microcode has notified us that a scan is
  834. * completed. */
  835. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  836. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  837. clear_bit(STATUS_SCAN_HW, &priv->status);
  838. }
  839. dev_kfree_skb_any(cmd.meta.u.skb);
  840. return rc;
  841. }
  842. static int iwl4965_card_state_sync_callback(struct iwl_priv *priv,
  843. struct iwl_cmd *cmd,
  844. struct sk_buff *skb)
  845. {
  846. return 1;
  847. }
  848. /*
  849. * CARD_STATE_CMD
  850. *
  851. * Use: Sets the device's internal card state to enable, disable, or halt
  852. *
  853. * When in the 'enable' state the card operates as normal.
  854. * When in the 'disable' state, the card enters into a low power mode.
  855. * When in the 'halt' state, the card is shut down and must be fully
  856. * restarted to come back on.
  857. */
  858. static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  859. {
  860. struct iwl_host_cmd cmd = {
  861. .id = REPLY_CARD_STATE_CMD,
  862. .len = sizeof(u32),
  863. .data = &flags,
  864. .meta.flags = meta_flag,
  865. };
  866. if (meta_flag & CMD_ASYNC)
  867. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  868. return iwl_send_cmd(priv, &cmd);
  869. }
  870. static int iwl4965_add_sta_sync_callback(struct iwl_priv *priv,
  871. struct iwl_cmd *cmd, struct sk_buff *skb)
  872. {
  873. struct iwl4965_rx_packet *res = NULL;
  874. if (!skb) {
  875. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  876. return 1;
  877. }
  878. res = (struct iwl4965_rx_packet *)skb->data;
  879. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  880. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  881. res->hdr.flags);
  882. return 1;
  883. }
  884. switch (res->u.add_sta.status) {
  885. case ADD_STA_SUCCESS_MSK:
  886. break;
  887. default:
  888. break;
  889. }
  890. /* We didn't cache the SKB; let the caller free it */
  891. return 1;
  892. }
  893. int iwl4965_send_add_station(struct iwl_priv *priv,
  894. struct iwl4965_addsta_cmd *sta, u8 flags)
  895. {
  896. struct iwl4965_rx_packet *res = NULL;
  897. int rc = 0;
  898. struct iwl_host_cmd cmd = {
  899. .id = REPLY_ADD_STA,
  900. .len = sizeof(struct iwl4965_addsta_cmd),
  901. .meta.flags = flags,
  902. .data = sta,
  903. };
  904. if (flags & CMD_ASYNC)
  905. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  906. else
  907. cmd.meta.flags |= CMD_WANT_SKB;
  908. rc = iwl_send_cmd(priv, &cmd);
  909. if (rc || (flags & CMD_ASYNC))
  910. return rc;
  911. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  912. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  913. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  914. res->hdr.flags);
  915. rc = -EIO;
  916. }
  917. if (rc == 0) {
  918. switch (res->u.add_sta.status) {
  919. case ADD_STA_SUCCESS_MSK:
  920. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  921. break;
  922. default:
  923. rc = -EIO;
  924. IWL_WARNING("REPLY_ADD_STA failed\n");
  925. break;
  926. }
  927. }
  928. priv->alloc_rxb_skb--;
  929. dev_kfree_skb_any(cmd.meta.u.skb);
  930. return rc;
  931. }
  932. static int iwl4965_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  933. struct ieee80211_key_conf *keyconf,
  934. u8 sta_id)
  935. {
  936. unsigned long flags;
  937. __le16 key_flags = 0;
  938. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  939. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  940. if (sta_id == priv->hw_setting.bcast_sta_id)
  941. key_flags |= STA_KEY_MULTICAST_MSK;
  942. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  943. keyconf->hw_key_idx = keyconf->keyidx;
  944. key_flags &= ~STA_KEY_FLG_INVALID;
  945. spin_lock_irqsave(&priv->sta_lock, flags);
  946. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  947. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  948. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  949. keyconf->keylen);
  950. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  951. keyconf->keylen);
  952. priv->stations[sta_id].sta.key.key_offset
  953. = (sta_id % STA_KEY_MAX_NUM);/*FIXME*/
  954. priv->stations[sta_id].sta.key.key_flags = key_flags;
  955. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  956. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  957. spin_unlock_irqrestore(&priv->sta_lock, flags);
  958. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  959. return iwl4965_send_add_station(priv,
  960. &priv->stations[sta_id].sta, CMD_ASYNC);
  961. }
  962. static int iwl4965_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  963. struct ieee80211_key_conf *keyconf,
  964. u8 sta_id)
  965. {
  966. unsigned long flags;
  967. int ret = 0;
  968. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  969. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  970. keyconf->hw_key_idx = keyconf->keyidx;
  971. spin_lock_irqsave(&priv->sta_lock, flags);
  972. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  973. priv->stations[sta_id].keyinfo.conf = keyconf;
  974. priv->stations[sta_id].keyinfo.keylen = 16;
  975. /* This copy is acutally not needed: we get the key with each TX */
  976. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, 16);
  977. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key, 16);
  978. spin_unlock_irqrestore(&priv->sta_lock, flags);
  979. return ret;
  980. }
  981. static int iwl4965_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  982. {
  983. unsigned long flags;
  984. priv->key_mapping_key = 0;
  985. spin_lock_irqsave(&priv->sta_lock, flags);
  986. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  987. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  988. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  989. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  990. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  991. spin_unlock_irqrestore(&priv->sta_lock, flags);
  992. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  993. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  994. return 0;
  995. }
  996. static int iwl4965_set_dynamic_key(struct iwl_priv *priv,
  997. struct ieee80211_key_conf *key, u8 sta_id)
  998. {
  999. int ret;
  1000. priv->key_mapping_key = 1;
  1001. switch (key->alg) {
  1002. case ALG_CCMP:
  1003. ret = iwl4965_set_ccmp_dynamic_key_info(priv, key, sta_id);
  1004. break;
  1005. case ALG_TKIP:
  1006. ret = iwl4965_set_tkip_dynamic_key_info(priv, key, sta_id);
  1007. break;
  1008. case ALG_WEP:
  1009. ret = -EOPNOTSUPP;
  1010. break;
  1011. default:
  1012. IWL_ERROR("Unknown alg: %s alg = %d\n", __func__, key->alg);
  1013. ret = -EINVAL;
  1014. }
  1015. return ret;
  1016. }
  1017. static void iwl4965_clear_free_frames(struct iwl_priv *priv)
  1018. {
  1019. struct list_head *element;
  1020. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1021. priv->frames_count);
  1022. while (!list_empty(&priv->free_frames)) {
  1023. element = priv->free_frames.next;
  1024. list_del(element);
  1025. kfree(list_entry(element, struct iwl4965_frame, list));
  1026. priv->frames_count--;
  1027. }
  1028. if (priv->frames_count) {
  1029. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1030. priv->frames_count);
  1031. priv->frames_count = 0;
  1032. }
  1033. }
  1034. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
  1035. {
  1036. struct iwl4965_frame *frame;
  1037. struct list_head *element;
  1038. if (list_empty(&priv->free_frames)) {
  1039. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1040. if (!frame) {
  1041. IWL_ERROR("Could not allocate frame!\n");
  1042. return NULL;
  1043. }
  1044. priv->frames_count++;
  1045. return frame;
  1046. }
  1047. element = priv->free_frames.next;
  1048. list_del(element);
  1049. return list_entry(element, struct iwl4965_frame, list);
  1050. }
  1051. static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
  1052. {
  1053. memset(frame, 0, sizeof(*frame));
  1054. list_add(&frame->list, &priv->free_frames);
  1055. }
  1056. unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
  1057. struct ieee80211_hdr *hdr,
  1058. const u8 *dest, int left)
  1059. {
  1060. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  1061. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1062. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1063. return 0;
  1064. if (priv->ibss_beacon->len > left)
  1065. return 0;
  1066. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1067. return priv->ibss_beacon->len;
  1068. }
  1069. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1070. {
  1071. u8 i;
  1072. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1073. i = iwl4965_rates[i].next_ieee) {
  1074. if (rate_mask & (1 << i))
  1075. return iwl4965_rates[i].plcp;
  1076. }
  1077. return IWL_RATE_INVALID;
  1078. }
  1079. static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
  1080. {
  1081. struct iwl4965_frame *frame;
  1082. unsigned int frame_size;
  1083. int rc;
  1084. u8 rate;
  1085. frame = iwl4965_get_free_frame(priv);
  1086. if (!frame) {
  1087. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1088. "command.\n");
  1089. return -ENOMEM;
  1090. }
  1091. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1092. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1093. 0xFF0);
  1094. if (rate == IWL_INVALID_RATE)
  1095. rate = IWL_RATE_6M_PLCP;
  1096. } else {
  1097. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1098. if (rate == IWL_INVALID_RATE)
  1099. rate = IWL_RATE_1M_PLCP;
  1100. }
  1101. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1102. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1103. &frame->u.cmd[0]);
  1104. iwl4965_free_frame(priv, frame);
  1105. return rc;
  1106. }
  1107. /******************************************************************************
  1108. *
  1109. * Misc. internal state and helper functions
  1110. *
  1111. ******************************************************************************/
  1112. static void iwl4965_unset_hw_setting(struct iwl_priv *priv)
  1113. {
  1114. if (priv->hw_setting.shared_virt)
  1115. pci_free_consistent(priv->pci_dev,
  1116. sizeof(struct iwl4965_shared),
  1117. priv->hw_setting.shared_virt,
  1118. priv->hw_setting.shared_phys);
  1119. }
  1120. /**
  1121. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1122. *
  1123. * return : set the bit for each supported rate insert in ie
  1124. */
  1125. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1126. u16 basic_rate, int *left)
  1127. {
  1128. u16 ret_rates = 0, bit;
  1129. int i;
  1130. u8 *cnt = ie;
  1131. u8 *rates = ie + 1;
  1132. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1133. if (bit & supported_rate) {
  1134. ret_rates |= bit;
  1135. rates[*cnt] = iwl4965_rates[i].ieee |
  1136. ((bit & basic_rate) ? 0x80 : 0x00);
  1137. (*cnt)++;
  1138. (*left)--;
  1139. if ((*left <= 0) ||
  1140. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1141. break;
  1142. }
  1143. }
  1144. return ret_rates;
  1145. }
  1146. /**
  1147. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1148. */
  1149. static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
  1150. enum ieee80211_band band,
  1151. struct ieee80211_mgmt *frame,
  1152. int left, int is_direct)
  1153. {
  1154. int len = 0;
  1155. u8 *pos = NULL;
  1156. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1157. #ifdef CONFIG_IWL4965_HT
  1158. const struct ieee80211_supported_band *sband =
  1159. iwl4965_get_hw_mode(priv, band);
  1160. #endif /* CONFIG_IWL4965_HT */
  1161. /* Make sure there is enough space for the probe request,
  1162. * two mandatory IEs and the data */
  1163. left -= 24;
  1164. if (left < 0)
  1165. return 0;
  1166. len += 24;
  1167. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1168. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1169. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1170. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1171. frame->seq_ctrl = 0;
  1172. /* fill in our indirect SSID IE */
  1173. /* ...next IE... */
  1174. left -= 2;
  1175. if (left < 0)
  1176. return 0;
  1177. len += 2;
  1178. pos = &(frame->u.probe_req.variable[0]);
  1179. *pos++ = WLAN_EID_SSID;
  1180. *pos++ = 0;
  1181. /* fill in our direct SSID IE... */
  1182. if (is_direct) {
  1183. /* ...next IE... */
  1184. left -= 2 + priv->essid_len;
  1185. if (left < 0)
  1186. return 0;
  1187. /* ... fill it in... */
  1188. *pos++ = WLAN_EID_SSID;
  1189. *pos++ = priv->essid_len;
  1190. memcpy(pos, priv->essid, priv->essid_len);
  1191. pos += priv->essid_len;
  1192. len += 2 + priv->essid_len;
  1193. }
  1194. /* fill in supported rate */
  1195. /* ...next IE... */
  1196. left -= 2;
  1197. if (left < 0)
  1198. return 0;
  1199. /* ... fill it in... */
  1200. *pos++ = WLAN_EID_SUPP_RATES;
  1201. *pos = 0;
  1202. /* exclude 60M rate */
  1203. active_rates = priv->rates_mask;
  1204. active_rates &= ~IWL_RATE_60M_MASK;
  1205. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1206. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1207. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1208. active_rate_basic, &left);
  1209. active_rates &= ~ret_rates;
  1210. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1211. active_rate_basic, &left);
  1212. active_rates &= ~ret_rates;
  1213. len += 2 + *pos;
  1214. pos += (*pos) + 1;
  1215. if (active_rates == 0)
  1216. goto fill_end;
  1217. /* fill in supported extended rate */
  1218. /* ...next IE... */
  1219. left -= 2;
  1220. if (left < 0)
  1221. return 0;
  1222. /* ... fill it in... */
  1223. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1224. *pos = 0;
  1225. iwl4965_supported_rate_to_ie(pos, active_rates,
  1226. active_rate_basic, &left);
  1227. if (*pos > 0)
  1228. len += 2 + *pos;
  1229. #ifdef CONFIG_IWL4965_HT
  1230. if (sband && sband->ht_info.ht_supported) {
  1231. struct ieee80211_ht_cap *ht_cap;
  1232. pos += (*pos) + 1;
  1233. *pos++ = WLAN_EID_HT_CAPABILITY;
  1234. *pos++ = sizeof(struct ieee80211_ht_cap);
  1235. ht_cap = (struct ieee80211_ht_cap *)pos;
  1236. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1237. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1238. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1239. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1240. ((sband->ht_info.ampdu_density << 2) &
  1241. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1242. len += 2 + sizeof(struct ieee80211_ht_cap);
  1243. }
  1244. #endif /*CONFIG_IWL4965_HT */
  1245. fill_end:
  1246. return (u16)len;
  1247. }
  1248. /*
  1249. * QoS support
  1250. */
  1251. static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
  1252. struct iwl4965_qosparam_cmd *qos)
  1253. {
  1254. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1255. sizeof(struct iwl4965_qosparam_cmd), qos);
  1256. }
  1257. static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
  1258. {
  1259. unsigned long flags;
  1260. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1261. return;
  1262. if (!priv->qos_data.qos_enable)
  1263. return;
  1264. spin_lock_irqsave(&priv->lock, flags);
  1265. priv->qos_data.def_qos_parm.qos_flags = 0;
  1266. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1267. !priv->qos_data.qos_cap.q_AP.txop_request)
  1268. priv->qos_data.def_qos_parm.qos_flags |=
  1269. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1270. if (priv->qos_data.qos_active)
  1271. priv->qos_data.def_qos_parm.qos_flags |=
  1272. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1273. #ifdef CONFIG_IWL4965_HT
  1274. if (priv->current_ht_config.is_ht)
  1275. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1276. #endif /* CONFIG_IWL4965_HT */
  1277. spin_unlock_irqrestore(&priv->lock, flags);
  1278. if (force || iwl_is_associated(priv)) {
  1279. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1280. priv->qos_data.qos_active,
  1281. priv->qos_data.def_qos_parm.qos_flags);
  1282. iwl4965_send_qos_params_command(priv,
  1283. &(priv->qos_data.def_qos_parm));
  1284. }
  1285. }
  1286. /*
  1287. * Power management (not Tx power!) functions
  1288. */
  1289. #define MSEC_TO_USEC 1024
  1290. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1291. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1292. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1293. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1294. __constant_cpu_to_le32(X1), \
  1295. __constant_cpu_to_le32(X2), \
  1296. __constant_cpu_to_le32(X3), \
  1297. __constant_cpu_to_le32(X4)}
  1298. /* default power management (not Tx power) table values */
  1299. /* for tim 0-10 */
  1300. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1301. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1302. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1303. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1304. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1305. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1306. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1307. };
  1308. /* for tim > 10 */
  1309. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1310. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1311. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1312. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1313. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1314. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1315. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1316. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1317. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1318. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1319. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1320. };
  1321. int iwl4965_power_init_handle(struct iwl_priv *priv)
  1322. {
  1323. int rc = 0, i;
  1324. struct iwl4965_power_mgr *pow_data;
  1325. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1326. u16 pci_pm;
  1327. IWL_DEBUG_POWER("Initialize power \n");
  1328. pow_data = &(priv->power_data);
  1329. memset(pow_data, 0, sizeof(*pow_data));
  1330. pow_data->active_index = IWL_POWER_RANGE_0;
  1331. pow_data->dtim_val = 0xffff;
  1332. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1333. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1334. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1335. if (rc != 0)
  1336. return 0;
  1337. else {
  1338. struct iwl4965_powertable_cmd *cmd;
  1339. IWL_DEBUG_POWER("adjust power command flags\n");
  1340. for (i = 0; i < IWL_POWER_AC; i++) {
  1341. cmd = &pow_data->pwr_range_0[i].cmd;
  1342. if (pci_pm & 0x1)
  1343. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1344. else
  1345. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1346. }
  1347. }
  1348. return rc;
  1349. }
  1350. static int iwl4965_update_power_cmd(struct iwl_priv *priv,
  1351. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1352. {
  1353. int rc = 0, i;
  1354. u8 skip;
  1355. u32 max_sleep = 0;
  1356. struct iwl4965_power_vec_entry *range;
  1357. u8 period = 0;
  1358. struct iwl4965_power_mgr *pow_data;
  1359. if (mode > IWL_POWER_INDEX_5) {
  1360. IWL_DEBUG_POWER("Error invalid power mode \n");
  1361. return -1;
  1362. }
  1363. pow_data = &(priv->power_data);
  1364. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1365. range = &pow_data->pwr_range_0[0];
  1366. else
  1367. range = &pow_data->pwr_range_1[1];
  1368. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1369. #ifdef IWL_MAC80211_DISABLE
  1370. if (priv->assoc_network != NULL) {
  1371. unsigned long flags;
  1372. period = priv->assoc_network->tim.tim_period;
  1373. }
  1374. #endif /*IWL_MAC80211_DISABLE */
  1375. skip = range[mode].no_dtim;
  1376. if (period == 0) {
  1377. period = 1;
  1378. skip = 0;
  1379. }
  1380. if (skip == 0) {
  1381. max_sleep = period;
  1382. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1383. } else {
  1384. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1385. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1386. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1387. }
  1388. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1389. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1390. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1391. }
  1392. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1393. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1394. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1395. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1396. le32_to_cpu(cmd->sleep_interval[0]),
  1397. le32_to_cpu(cmd->sleep_interval[1]),
  1398. le32_to_cpu(cmd->sleep_interval[2]),
  1399. le32_to_cpu(cmd->sleep_interval[3]),
  1400. le32_to_cpu(cmd->sleep_interval[4]));
  1401. return rc;
  1402. }
  1403. static int iwl4965_send_power_mode(struct iwl_priv *priv, u32 mode)
  1404. {
  1405. u32 uninitialized_var(final_mode);
  1406. int rc;
  1407. struct iwl4965_powertable_cmd cmd;
  1408. /* If on battery, set to 3,
  1409. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1410. * else user level */
  1411. switch (mode) {
  1412. case IWL_POWER_BATTERY:
  1413. final_mode = IWL_POWER_INDEX_3;
  1414. break;
  1415. case IWL_POWER_AC:
  1416. final_mode = IWL_POWER_MODE_CAM;
  1417. break;
  1418. default:
  1419. final_mode = mode;
  1420. break;
  1421. }
  1422. cmd.keep_alive_beacons = 0;
  1423. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1424. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1425. if (final_mode == IWL_POWER_MODE_CAM)
  1426. clear_bit(STATUS_POWER_PMI, &priv->status);
  1427. else
  1428. set_bit(STATUS_POWER_PMI, &priv->status);
  1429. return rc;
  1430. }
  1431. int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1432. {
  1433. /* Filter incoming packets to determine if they are targeted toward
  1434. * this network, discarding packets coming from ourselves */
  1435. switch (priv->iw_mode) {
  1436. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1437. /* packets from our adapter are dropped (echo) */
  1438. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1439. return 0;
  1440. /* {broad,multi}cast packets to our IBSS go through */
  1441. if (is_multicast_ether_addr(header->addr1))
  1442. return !compare_ether_addr(header->addr3, priv->bssid);
  1443. /* packets to our adapter go through */
  1444. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1445. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1446. /* packets from our adapter are dropped (echo) */
  1447. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1448. return 0;
  1449. /* {broad,multi}cast packets to our BSS go through */
  1450. if (is_multicast_ether_addr(header->addr1))
  1451. return !compare_ether_addr(header->addr2, priv->bssid);
  1452. /* packets to our adapter go through */
  1453. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1454. default:
  1455. break;
  1456. }
  1457. return 1;
  1458. }
  1459. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1460. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1461. {
  1462. switch (status & TX_STATUS_MSK) {
  1463. case TX_STATUS_SUCCESS:
  1464. return "SUCCESS";
  1465. TX_STATUS_ENTRY(SHORT_LIMIT);
  1466. TX_STATUS_ENTRY(LONG_LIMIT);
  1467. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1468. TX_STATUS_ENTRY(MGMNT_ABORT);
  1469. TX_STATUS_ENTRY(NEXT_FRAG);
  1470. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1471. TX_STATUS_ENTRY(DEST_PS);
  1472. TX_STATUS_ENTRY(ABORTED);
  1473. TX_STATUS_ENTRY(BT_RETRY);
  1474. TX_STATUS_ENTRY(STA_INVALID);
  1475. TX_STATUS_ENTRY(FRAG_DROPPED);
  1476. TX_STATUS_ENTRY(TID_DISABLE);
  1477. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1478. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1479. TX_STATUS_ENTRY(TX_LOCKED);
  1480. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1481. }
  1482. return "UNKNOWN";
  1483. }
  1484. /**
  1485. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1486. *
  1487. * NOTE: priv->mutex is not required before calling this function
  1488. */
  1489. static int iwl4965_scan_cancel(struct iwl_priv *priv)
  1490. {
  1491. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1492. clear_bit(STATUS_SCANNING, &priv->status);
  1493. return 0;
  1494. }
  1495. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1496. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1497. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1498. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1499. queue_work(priv->workqueue, &priv->abort_scan);
  1500. } else
  1501. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1502. return test_bit(STATUS_SCANNING, &priv->status);
  1503. }
  1504. return 0;
  1505. }
  1506. /**
  1507. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1508. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1509. *
  1510. * NOTE: priv->mutex must be held before calling this function
  1511. */
  1512. static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1513. {
  1514. unsigned long now = jiffies;
  1515. int ret;
  1516. ret = iwl4965_scan_cancel(priv);
  1517. if (ret && ms) {
  1518. mutex_unlock(&priv->mutex);
  1519. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1520. test_bit(STATUS_SCANNING, &priv->status))
  1521. msleep(1);
  1522. mutex_lock(&priv->mutex);
  1523. return test_bit(STATUS_SCANNING, &priv->status);
  1524. }
  1525. return ret;
  1526. }
  1527. static void iwl4965_sequence_reset(struct iwl_priv *priv)
  1528. {
  1529. /* Reset ieee stats */
  1530. /* We don't reset the net_device_stats (ieee->stats) on
  1531. * re-association */
  1532. priv->last_seq_num = -1;
  1533. priv->last_frag_num = -1;
  1534. priv->last_packet_time = 0;
  1535. iwl4965_scan_cancel(priv);
  1536. }
  1537. #define MAX_UCODE_BEACON_INTERVAL 4096
  1538. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1539. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1540. {
  1541. u16 new_val = 0;
  1542. u16 beacon_factor = 0;
  1543. beacon_factor =
  1544. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1545. / MAX_UCODE_BEACON_INTERVAL;
  1546. new_val = beacon_val / beacon_factor;
  1547. return cpu_to_le16(new_val);
  1548. }
  1549. static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
  1550. {
  1551. u64 interval_tm_unit;
  1552. u64 tsf, result;
  1553. unsigned long flags;
  1554. struct ieee80211_conf *conf = NULL;
  1555. u16 beacon_int = 0;
  1556. conf = ieee80211_get_hw_conf(priv->hw);
  1557. spin_lock_irqsave(&priv->lock, flags);
  1558. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
  1559. priv->rxon_timing.timestamp.dw[0] =
  1560. cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
  1561. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1562. tsf = priv->timestamp;
  1563. beacon_int = priv->beacon_int;
  1564. spin_unlock_irqrestore(&priv->lock, flags);
  1565. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1566. if (beacon_int == 0) {
  1567. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1568. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1569. } else {
  1570. priv->rxon_timing.beacon_interval =
  1571. cpu_to_le16(beacon_int);
  1572. priv->rxon_timing.beacon_interval =
  1573. iwl4965_adjust_beacon_interval(
  1574. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1575. }
  1576. priv->rxon_timing.atim_window = 0;
  1577. } else {
  1578. priv->rxon_timing.beacon_interval =
  1579. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1580. /* TODO: we need to get atim_window from upper stack
  1581. * for now we set to 0 */
  1582. priv->rxon_timing.atim_window = 0;
  1583. }
  1584. interval_tm_unit =
  1585. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1586. result = do_div(tsf, interval_tm_unit);
  1587. priv->rxon_timing.beacon_init_val =
  1588. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1589. IWL_DEBUG_ASSOC
  1590. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1591. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1592. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1593. le16_to_cpu(priv->rxon_timing.atim_window));
  1594. }
  1595. static int iwl4965_scan_initiate(struct iwl_priv *priv)
  1596. {
  1597. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1598. IWL_ERROR("APs don't scan.\n");
  1599. return 0;
  1600. }
  1601. if (!iwl_is_ready_rf(priv)) {
  1602. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1603. return -EIO;
  1604. }
  1605. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1606. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1607. return -EAGAIN;
  1608. }
  1609. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1610. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1611. "Queuing.\n");
  1612. return -EAGAIN;
  1613. }
  1614. IWL_DEBUG_INFO("Starting scan...\n");
  1615. priv->scan_bands = 2;
  1616. set_bit(STATUS_SCANNING, &priv->status);
  1617. priv->scan_start = jiffies;
  1618. priv->scan_pass_start = priv->scan_start;
  1619. queue_work(priv->workqueue, &priv->request_scan);
  1620. return 0;
  1621. }
  1622. static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
  1623. enum ieee80211_band band)
  1624. {
  1625. if (band == IEEE80211_BAND_5GHZ) {
  1626. priv->staging_rxon.flags &=
  1627. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1628. | RXON_FLG_CCK_MSK);
  1629. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1630. } else {
  1631. /* Copied from iwl4965_bg_post_associate() */
  1632. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1633. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1634. else
  1635. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1636. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  1637. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1638. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1639. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1640. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1641. }
  1642. }
  1643. /*
  1644. * initialize rxon structure with default values from eeprom
  1645. */
  1646. static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
  1647. {
  1648. const struct iwl_channel_info *ch_info;
  1649. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  1650. switch (priv->iw_mode) {
  1651. case IEEE80211_IF_TYPE_AP:
  1652. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  1653. break;
  1654. case IEEE80211_IF_TYPE_STA:
  1655. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1656. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1657. break;
  1658. case IEEE80211_IF_TYPE_IBSS:
  1659. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1660. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1661. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1662. RXON_FILTER_ACCEPT_GRP_MSK;
  1663. break;
  1664. case IEEE80211_IF_TYPE_MNTR:
  1665. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1666. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1667. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1668. break;
  1669. default:
  1670. IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
  1671. break;
  1672. }
  1673. #if 0
  1674. /* TODO: Figure out when short_preamble would be set and cache from
  1675. * that */
  1676. if (!hw_to_local(priv->hw)->short_preamble)
  1677. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1678. else
  1679. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1680. #endif
  1681. ch_info = iwl_get_channel_info(priv, priv->band,
  1682. le16_to_cpu(priv->staging_rxon.channel));
  1683. if (!ch_info)
  1684. ch_info = &priv->channel_info[0];
  1685. /*
  1686. * in some case A channels are all non IBSS
  1687. * in this case force B/G channel
  1688. */
  1689. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  1690. !(is_channel_ibss(ch_info)))
  1691. ch_info = &priv->channel_info[0];
  1692. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  1693. priv->band = ch_info->band;
  1694. iwl4965_set_flags_for_phymode(priv, priv->band);
  1695. priv->staging_rxon.ofdm_basic_rates =
  1696. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1697. priv->staging_rxon.cck_basic_rates =
  1698. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1699. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  1700. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  1701. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1702. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  1703. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  1704. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  1705. iwl4965_set_rxon_chain(priv);
  1706. }
  1707. static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
  1708. {
  1709. if (mode == IEEE80211_IF_TYPE_IBSS) {
  1710. const struct iwl_channel_info *ch_info;
  1711. ch_info = iwl_get_channel_info(priv,
  1712. priv->band,
  1713. le16_to_cpu(priv->staging_rxon.channel));
  1714. if (!ch_info || !is_channel_ibss(ch_info)) {
  1715. IWL_ERROR("channel %d not IBSS channel\n",
  1716. le16_to_cpu(priv->staging_rxon.channel));
  1717. return -EINVAL;
  1718. }
  1719. }
  1720. priv->iw_mode = mode;
  1721. iwl4965_connection_init_rx_config(priv);
  1722. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1723. iwlcore_clear_stations_table(priv);
  1724. /* dont commit rxon if rf-kill is on*/
  1725. if (!iwl_is_ready_rf(priv))
  1726. return -EAGAIN;
  1727. cancel_delayed_work(&priv->scan_check);
  1728. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  1729. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  1730. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  1731. return -EAGAIN;
  1732. }
  1733. iwl4965_commit_rxon(priv);
  1734. return 0;
  1735. }
  1736. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  1737. struct ieee80211_tx_control *ctl,
  1738. struct iwl_cmd *cmd,
  1739. struct sk_buff *skb_frag,
  1740. int sta_id)
  1741. {
  1742. struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  1743. struct iwl_wep_key *wepkey;
  1744. int keyidx = 0;
  1745. BUG_ON(ctl->key_idx > 3);
  1746. switch (keyinfo->alg) {
  1747. case ALG_CCMP:
  1748. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  1749. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  1750. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1751. cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
  1752. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  1753. break;
  1754. case ALG_TKIP:
  1755. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  1756. ieee80211_get_tkip_key(keyinfo->conf, skb_frag,
  1757. IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key);
  1758. IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n");
  1759. break;
  1760. case ALG_WEP:
  1761. wepkey = &priv->wep_keys[ctl->key_idx];
  1762. cmd->cmd.tx.sec_ctl = 0;
  1763. if (priv->default_wep_key) {
  1764. /* the WEP key was sent as static */
  1765. keyidx = ctl->key_idx;
  1766. memcpy(&cmd->cmd.tx.key[3], wepkey->key,
  1767. wepkey->key_size);
  1768. if (wepkey->key_size == WEP_KEY_LEN_128)
  1769. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  1770. } else {
  1771. IWL_ERROR("No support for WEP key mappings key\n");
  1772. }
  1773. cmd->cmd.tx.sec_ctl |= (TX_CMD_SEC_WEP |
  1774. (keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT);
  1775. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  1776. "with key %d\n", keyidx);
  1777. break;
  1778. default:
  1779. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  1780. break;
  1781. }
  1782. }
  1783. /*
  1784. * handle build REPLY_TX command notification.
  1785. */
  1786. static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
  1787. struct iwl_cmd *cmd,
  1788. struct ieee80211_tx_control *ctrl,
  1789. struct ieee80211_hdr *hdr,
  1790. int is_unicast, u8 std_id)
  1791. {
  1792. __le16 *qc;
  1793. u16 fc = le16_to_cpu(hdr->frame_control);
  1794. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  1795. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1796. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  1797. tx_flags |= TX_CMD_FLG_ACK_MSK;
  1798. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  1799. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1800. if (ieee80211_is_probe_response(fc) &&
  1801. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  1802. tx_flags |= TX_CMD_FLG_TSF_MSK;
  1803. } else {
  1804. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  1805. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1806. }
  1807. if (ieee80211_is_back_request(fc))
  1808. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  1809. cmd->cmd.tx.sta_id = std_id;
  1810. if (ieee80211_get_morefrag(hdr))
  1811. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  1812. qc = ieee80211_get_qos_ctrl(hdr);
  1813. if (qc) {
  1814. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  1815. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  1816. } else
  1817. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1818. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  1819. tx_flags |= TX_CMD_FLG_RTS_MSK;
  1820. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  1821. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  1822. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  1823. tx_flags |= TX_CMD_FLG_CTS_MSK;
  1824. }
  1825. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  1826. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  1827. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  1828. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  1829. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  1830. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  1831. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  1832. else
  1833. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  1834. } else {
  1835. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  1836. }
  1837. cmd->cmd.tx.driver_txop = 0;
  1838. cmd->cmd.tx.tx_flags = tx_flags;
  1839. cmd->cmd.tx.next_frame_len = 0;
  1840. }
  1841. static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
  1842. {
  1843. /* 0 - mgmt, 1 - cnt, 2 - data */
  1844. int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
  1845. priv->tx_stats[idx].cnt++;
  1846. priv->tx_stats[idx].bytes += len;
  1847. }
  1848. /**
  1849. * iwl4965_get_sta_id - Find station's index within station table
  1850. *
  1851. * If new IBSS station, create new entry in station table
  1852. */
  1853. static int iwl4965_get_sta_id(struct iwl_priv *priv,
  1854. struct ieee80211_hdr *hdr)
  1855. {
  1856. int sta_id;
  1857. u16 fc = le16_to_cpu(hdr->frame_control);
  1858. DECLARE_MAC_BUF(mac);
  1859. /* If this frame is broadcast or management, use broadcast station id */
  1860. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  1861. is_multicast_ether_addr(hdr->addr1))
  1862. return priv->hw_setting.bcast_sta_id;
  1863. switch (priv->iw_mode) {
  1864. /* If we are a client station in a BSS network, use the special
  1865. * AP station entry (that's the only station we communicate with) */
  1866. case IEEE80211_IF_TYPE_STA:
  1867. return IWL_AP_ID;
  1868. /* If we are an AP, then find the station, or use BCAST */
  1869. case IEEE80211_IF_TYPE_AP:
  1870. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  1871. if (sta_id != IWL_INVALID_STATION)
  1872. return sta_id;
  1873. return priv->hw_setting.bcast_sta_id;
  1874. /* If this frame is going out to an IBSS network, find the station,
  1875. * or create a new station table entry */
  1876. case IEEE80211_IF_TYPE_IBSS:
  1877. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  1878. if (sta_id != IWL_INVALID_STATION)
  1879. return sta_id;
  1880. /* Create new station table entry */
  1881. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  1882. 0, CMD_ASYNC, NULL);
  1883. if (sta_id != IWL_INVALID_STATION)
  1884. return sta_id;
  1885. IWL_DEBUG_DROP("Station %s not in station map. "
  1886. "Defaulting to broadcast...\n",
  1887. print_mac(mac, hdr->addr1));
  1888. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  1889. return priv->hw_setting.bcast_sta_id;
  1890. default:
  1891. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  1892. return priv->hw_setting.bcast_sta_id;
  1893. }
  1894. }
  1895. /*
  1896. * start REPLY_TX command process
  1897. */
  1898. static int iwl4965_tx_skb(struct iwl_priv *priv,
  1899. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  1900. {
  1901. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1902. struct iwl4965_tfd_frame *tfd;
  1903. u32 *control_flags;
  1904. int txq_id = ctl->queue;
  1905. struct iwl4965_tx_queue *txq = NULL;
  1906. struct iwl4965_queue *q = NULL;
  1907. dma_addr_t phys_addr;
  1908. dma_addr_t txcmd_phys;
  1909. dma_addr_t scratch_phys;
  1910. struct iwl_cmd *out_cmd = NULL;
  1911. u16 len, idx, len_org;
  1912. u8 id, hdr_len, unicast;
  1913. u8 sta_id;
  1914. u16 seq_number = 0;
  1915. u16 fc;
  1916. __le16 *qc;
  1917. u8 wait_write_ptr = 0;
  1918. unsigned long flags;
  1919. int rc;
  1920. spin_lock_irqsave(&priv->lock, flags);
  1921. if (iwl_is_rfkill(priv)) {
  1922. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  1923. goto drop_unlock;
  1924. }
  1925. if (!priv->vif) {
  1926. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  1927. goto drop_unlock;
  1928. }
  1929. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  1930. IWL_ERROR("ERROR: No TX rate available.\n");
  1931. goto drop_unlock;
  1932. }
  1933. unicast = !is_multicast_ether_addr(hdr->addr1);
  1934. id = 0;
  1935. fc = le16_to_cpu(hdr->frame_control);
  1936. #ifdef CONFIG_IWLWIFI_DEBUG
  1937. if (ieee80211_is_auth(fc))
  1938. IWL_DEBUG_TX("Sending AUTH frame\n");
  1939. else if (ieee80211_is_assoc_request(fc))
  1940. IWL_DEBUG_TX("Sending ASSOC frame\n");
  1941. else if (ieee80211_is_reassoc_request(fc))
  1942. IWL_DEBUG_TX("Sending REASSOC frame\n");
  1943. #endif
  1944. /* drop all data frame if we are not associated */
  1945. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  1946. (!iwl_is_associated(priv) ||
  1947. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  1948. !priv->assoc_station_added)) {
  1949. IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
  1950. goto drop_unlock;
  1951. }
  1952. spin_unlock_irqrestore(&priv->lock, flags);
  1953. hdr_len = ieee80211_get_hdrlen(fc);
  1954. /* Find (or create) index into station table for destination station */
  1955. sta_id = iwl4965_get_sta_id(priv, hdr);
  1956. if (sta_id == IWL_INVALID_STATION) {
  1957. DECLARE_MAC_BUF(mac);
  1958. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  1959. print_mac(mac, hdr->addr1));
  1960. goto drop;
  1961. }
  1962. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  1963. qc = ieee80211_get_qos_ctrl(hdr);
  1964. if (qc) {
  1965. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  1966. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  1967. IEEE80211_SCTL_SEQ;
  1968. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  1969. (hdr->seq_ctrl &
  1970. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  1971. seq_number += 0x10;
  1972. #ifdef CONFIG_IWL4965_HT
  1973. /* aggregation is on for this <sta,tid> */
  1974. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1975. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  1976. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  1977. #endif /* CONFIG_IWL4965_HT */
  1978. }
  1979. /* Descriptor for chosen Tx queue */
  1980. txq = &priv->txq[txq_id];
  1981. q = &txq->q;
  1982. spin_lock_irqsave(&priv->lock, flags);
  1983. /* Set up first empty TFD within this queue's circular TFD buffer */
  1984. tfd = &txq->bd[q->write_ptr];
  1985. memset(tfd, 0, sizeof(*tfd));
  1986. control_flags = (u32 *) tfd;
  1987. idx = get_cmd_index(q, q->write_ptr, 0);
  1988. /* Set up driver data for this TFD */
  1989. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  1990. txq->txb[q->write_ptr].skb[0] = skb;
  1991. memcpy(&(txq->txb[q->write_ptr].status.control),
  1992. ctl, sizeof(struct ieee80211_tx_control));
  1993. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  1994. out_cmd = &txq->cmd[idx];
  1995. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  1996. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  1997. /*
  1998. * Set up the Tx-command (not MAC!) header.
  1999. * Store the chosen Tx queue and TFD index within the sequence field;
  2000. * after Tx, uCode's Tx response will return this value so driver can
  2001. * locate the frame within the tx queue and do post-tx processing.
  2002. */
  2003. out_cmd->hdr.cmd = REPLY_TX;
  2004. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2005. INDEX_TO_SEQ(q->write_ptr)));
  2006. /* Copy MAC header from skb into command buffer */
  2007. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2008. /*
  2009. * Use the first empty entry in this queue's command buffer array
  2010. * to contain the Tx command and MAC header concatenated together
  2011. * (payload data will be in another buffer).
  2012. * Size of this varies, due to varying MAC header length.
  2013. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2014. * of the MAC header (device reads on dword boundaries).
  2015. * We'll tell device about this padding later.
  2016. */
  2017. len = priv->hw_setting.tx_cmd_len +
  2018. sizeof(struct iwl_cmd_header) + hdr_len;
  2019. len_org = len;
  2020. len = (len + 3) & ~3;
  2021. if (len_org != len)
  2022. len_org = 1;
  2023. else
  2024. len_org = 0;
  2025. /* Physical address of this Tx command's header (not MAC header!),
  2026. * within command buffer array. */
  2027. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  2028. offsetof(struct iwl_cmd, hdr);
  2029. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2030. * first entry */
  2031. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2032. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2033. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id);
  2034. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2035. * if any (802.11 null frames have no payload). */
  2036. len = skb->len - hdr_len;
  2037. if (len) {
  2038. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2039. len, PCI_DMA_TODEVICE);
  2040. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2041. }
  2042. /* Tell 4965 about any 2-byte padding after MAC header */
  2043. if (len_org)
  2044. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2045. /* Total # bytes to be transmitted */
  2046. len = (u16)skb->len;
  2047. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2048. /* TODO need this for burst mode later on */
  2049. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2050. /* set is_hcca to 0; it probably will never be implemented */
  2051. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2052. iwl_update_tx_stats(priv, fc, len);
  2053. scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
  2054. offsetof(struct iwl4965_tx_cmd, scratch);
  2055. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2056. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2057. if (!ieee80211_get_morefrag(hdr)) {
  2058. txq->need_update = 1;
  2059. if (qc) {
  2060. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2061. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2062. }
  2063. } else {
  2064. wait_write_ptr = 1;
  2065. txq->need_update = 0;
  2066. }
  2067. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2068. sizeof(out_cmd->cmd.tx));
  2069. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2070. ieee80211_get_hdrlen(fc));
  2071. /* Set up entry for this TFD in Tx byte-count array */
  2072. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2073. /* Tell device the write index *just past* this latest filled TFD */
  2074. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  2075. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2076. spin_unlock_irqrestore(&priv->lock, flags);
  2077. if (rc)
  2078. return rc;
  2079. if ((iwl4965_queue_space(q) < q->high_mark)
  2080. && priv->mac80211_registered) {
  2081. if (wait_write_ptr) {
  2082. spin_lock_irqsave(&priv->lock, flags);
  2083. txq->need_update = 1;
  2084. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2085. spin_unlock_irqrestore(&priv->lock, flags);
  2086. }
  2087. ieee80211_stop_queue(priv->hw, ctl->queue);
  2088. }
  2089. return 0;
  2090. drop_unlock:
  2091. spin_unlock_irqrestore(&priv->lock, flags);
  2092. drop:
  2093. return -1;
  2094. }
  2095. static void iwl4965_set_rate(struct iwl_priv *priv)
  2096. {
  2097. const struct ieee80211_supported_band *hw = NULL;
  2098. struct ieee80211_rate *rate;
  2099. int i;
  2100. hw = iwl4965_get_hw_mode(priv, priv->band);
  2101. if (!hw) {
  2102. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2103. return;
  2104. }
  2105. priv->active_rate = 0;
  2106. priv->active_rate_basic = 0;
  2107. for (i = 0; i < hw->n_bitrates; i++) {
  2108. rate = &(hw->bitrates[i]);
  2109. if (rate->hw_value < IWL_RATE_COUNT)
  2110. priv->active_rate |= (1 << rate->hw_value);
  2111. }
  2112. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2113. priv->active_rate, priv->active_rate_basic);
  2114. /*
  2115. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2116. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2117. * OFDM
  2118. */
  2119. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2120. priv->staging_rxon.cck_basic_rates =
  2121. ((priv->active_rate_basic &
  2122. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2123. else
  2124. priv->staging_rxon.cck_basic_rates =
  2125. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2126. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2127. priv->staging_rxon.ofdm_basic_rates =
  2128. ((priv->active_rate_basic &
  2129. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2130. IWL_FIRST_OFDM_RATE) & 0xFF;
  2131. else
  2132. priv->staging_rxon.ofdm_basic_rates =
  2133. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2134. }
  2135. void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2136. {
  2137. unsigned long flags;
  2138. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2139. return;
  2140. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2141. disable_radio ? "OFF" : "ON");
  2142. if (disable_radio) {
  2143. iwl4965_scan_cancel(priv);
  2144. /* FIXME: This is a workaround for AP */
  2145. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2146. spin_lock_irqsave(&priv->lock, flags);
  2147. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2148. CSR_UCODE_SW_BIT_RFKILL);
  2149. spin_unlock_irqrestore(&priv->lock, flags);
  2150. /* call the host command only if no hw rf-kill set */
  2151. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  2152. iwl4965_send_card_state(priv,
  2153. CARD_STATE_CMD_DISABLE,
  2154. 0);
  2155. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2156. /* make sure mac80211 stop sending Tx frame */
  2157. if (priv->mac80211_registered)
  2158. ieee80211_stop_queues(priv->hw);
  2159. }
  2160. return;
  2161. }
  2162. spin_lock_irqsave(&priv->lock, flags);
  2163. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2164. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2165. spin_unlock_irqrestore(&priv->lock, flags);
  2166. /* wake up ucode */
  2167. msleep(10);
  2168. spin_lock_irqsave(&priv->lock, flags);
  2169. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2170. if (!iwl_grab_nic_access(priv))
  2171. iwl_release_nic_access(priv);
  2172. spin_unlock_irqrestore(&priv->lock, flags);
  2173. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2174. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2175. "disabled by HW switch\n");
  2176. return;
  2177. }
  2178. queue_work(priv->workqueue, &priv->restart);
  2179. return;
  2180. }
  2181. void iwl4965_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2182. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2183. {
  2184. u16 fc =
  2185. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2186. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2187. return;
  2188. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2189. return;
  2190. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2191. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2192. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2193. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2194. * Decryption will be done in SW. */
  2195. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2196. RX_RES_STATUS_BAD_KEY_TTAK)
  2197. break;
  2198. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2199. RX_RES_STATUS_BAD_ICV_MIC)
  2200. stats->flag |= RX_FLAG_MMIC_ERROR;
  2201. case RX_RES_STATUS_SEC_TYPE_WEP:
  2202. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2203. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2204. RX_RES_STATUS_DECRYPT_OK) {
  2205. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2206. stats->flag |= RX_FLAG_DECRYPTED;
  2207. }
  2208. break;
  2209. default:
  2210. break;
  2211. }
  2212. }
  2213. #define IWL_PACKET_RETRY_TIME HZ
  2214. int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2215. {
  2216. u16 sc = le16_to_cpu(header->seq_ctrl);
  2217. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2218. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2219. u16 *last_seq, *last_frag;
  2220. unsigned long *last_time;
  2221. switch (priv->iw_mode) {
  2222. case IEEE80211_IF_TYPE_IBSS:{
  2223. struct list_head *p;
  2224. struct iwl4965_ibss_seq *entry = NULL;
  2225. u8 *mac = header->addr2;
  2226. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2227. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2228. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2229. if (!compare_ether_addr(entry->mac, mac))
  2230. break;
  2231. }
  2232. if (p == &priv->ibss_mac_hash[index]) {
  2233. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2234. if (!entry) {
  2235. IWL_ERROR("Cannot malloc new mac entry\n");
  2236. return 0;
  2237. }
  2238. memcpy(entry->mac, mac, ETH_ALEN);
  2239. entry->seq_num = seq;
  2240. entry->frag_num = frag;
  2241. entry->packet_time = jiffies;
  2242. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2243. return 0;
  2244. }
  2245. last_seq = &entry->seq_num;
  2246. last_frag = &entry->frag_num;
  2247. last_time = &entry->packet_time;
  2248. break;
  2249. }
  2250. case IEEE80211_IF_TYPE_STA:
  2251. last_seq = &priv->last_seq_num;
  2252. last_frag = &priv->last_frag_num;
  2253. last_time = &priv->last_packet_time;
  2254. break;
  2255. default:
  2256. return 0;
  2257. }
  2258. if ((*last_seq == seq) &&
  2259. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2260. if (*last_frag == frag)
  2261. goto drop;
  2262. if (*last_frag + 1 != frag)
  2263. /* out-of-order fragment */
  2264. goto drop;
  2265. } else
  2266. *last_seq = seq;
  2267. *last_frag = frag;
  2268. *last_time = jiffies;
  2269. return 0;
  2270. drop:
  2271. return 1;
  2272. }
  2273. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2274. #include "iwl-spectrum.h"
  2275. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2276. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2277. #define TIME_UNIT 1024
  2278. /*
  2279. * extended beacon time format
  2280. * time in usec will be changed into a 32-bit value in 8:24 format
  2281. * the high 1 byte is the beacon counts
  2282. * the lower 3 bytes is the time in usec within one beacon interval
  2283. */
  2284. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2285. {
  2286. u32 quot;
  2287. u32 rem;
  2288. u32 interval = beacon_interval * 1024;
  2289. if (!interval || !usec)
  2290. return 0;
  2291. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2292. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2293. return (quot << 24) + rem;
  2294. }
  2295. /* base is usually what we get from ucode with each received frame,
  2296. * the same as HW timer counter counting down
  2297. */
  2298. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2299. {
  2300. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2301. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2302. u32 interval = beacon_interval * TIME_UNIT;
  2303. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2304. (addon & BEACON_TIME_MASK_HIGH);
  2305. if (base_low > addon_low)
  2306. res += base_low - addon_low;
  2307. else if (base_low < addon_low) {
  2308. res += interval + base_low - addon_low;
  2309. res += (1 << 24);
  2310. } else
  2311. res += (1 << 24);
  2312. return cpu_to_le32(res);
  2313. }
  2314. static int iwl4965_get_measurement(struct iwl_priv *priv,
  2315. struct ieee80211_measurement_params *params,
  2316. u8 type)
  2317. {
  2318. struct iwl4965_spectrum_cmd spectrum;
  2319. struct iwl4965_rx_packet *res;
  2320. struct iwl_host_cmd cmd = {
  2321. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2322. .data = (void *)&spectrum,
  2323. .meta.flags = CMD_WANT_SKB,
  2324. };
  2325. u32 add_time = le64_to_cpu(params->start_time);
  2326. int rc;
  2327. int spectrum_resp_status;
  2328. int duration = le16_to_cpu(params->duration);
  2329. if (iwl_is_associated(priv))
  2330. add_time =
  2331. iwl4965_usecs_to_beacons(
  2332. le64_to_cpu(params->start_time) - priv->last_tsf,
  2333. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2334. memset(&spectrum, 0, sizeof(spectrum));
  2335. spectrum.channel_count = cpu_to_le16(1);
  2336. spectrum.flags =
  2337. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2338. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2339. cmd.len = sizeof(spectrum);
  2340. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2341. if (iwl_is_associated(priv))
  2342. spectrum.start_time =
  2343. iwl4965_add_beacon_time(priv->last_beacon_time,
  2344. add_time,
  2345. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2346. else
  2347. spectrum.start_time = 0;
  2348. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2349. spectrum.channels[0].channel = params->channel;
  2350. spectrum.channels[0].type = type;
  2351. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2352. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2353. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2354. rc = iwl_send_cmd_sync(priv, &cmd);
  2355. if (rc)
  2356. return rc;
  2357. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2358. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2359. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2360. rc = -EIO;
  2361. }
  2362. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2363. switch (spectrum_resp_status) {
  2364. case 0: /* Command will be handled */
  2365. if (res->u.spectrum.id != 0xff) {
  2366. IWL_DEBUG_INFO
  2367. ("Replaced existing measurement: %d\n",
  2368. res->u.spectrum.id);
  2369. priv->measurement_status &= ~MEASUREMENT_READY;
  2370. }
  2371. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2372. rc = 0;
  2373. break;
  2374. case 1: /* Command will not be handled */
  2375. rc = -EAGAIN;
  2376. break;
  2377. }
  2378. dev_kfree_skb_any(cmd.meta.u.skb);
  2379. return rc;
  2380. }
  2381. #endif
  2382. static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
  2383. struct iwl4965_tx_info *tx_sta)
  2384. {
  2385. tx_sta->status.ack_signal = 0;
  2386. tx_sta->status.excessive_retries = 0;
  2387. tx_sta->status.queue_length = 0;
  2388. tx_sta->status.queue_number = 0;
  2389. if (in_interrupt())
  2390. ieee80211_tx_status_irqsafe(priv->hw,
  2391. tx_sta->skb[0], &(tx_sta->status));
  2392. else
  2393. ieee80211_tx_status(priv->hw,
  2394. tx_sta->skb[0], &(tx_sta->status));
  2395. tx_sta->skb[0] = NULL;
  2396. }
  2397. /**
  2398. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2399. *
  2400. * When FW advances 'R' index, all entries between old and new 'R' index
  2401. * need to be reclaimed. As result, some free space forms. If there is
  2402. * enough free space (> low mark), wake the stack that feeds us.
  2403. */
  2404. int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2405. {
  2406. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2407. struct iwl4965_queue *q = &txq->q;
  2408. int nfreed = 0;
  2409. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2410. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2411. "is out of range [0-%d] %d %d.\n", txq_id,
  2412. index, q->n_bd, q->write_ptr, q->read_ptr);
  2413. return 0;
  2414. }
  2415. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2416. q->read_ptr != index;
  2417. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2418. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2419. iwl4965_txstatus_to_ieee(priv,
  2420. &(txq->txb[txq->q.read_ptr]));
  2421. iwl4965_hw_txq_free_tfd(priv, txq);
  2422. } else if (nfreed > 1) {
  2423. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2424. q->write_ptr, q->read_ptr);
  2425. queue_work(priv->workqueue, &priv->restart);
  2426. }
  2427. nfreed++;
  2428. }
  2429. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2430. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2431. priv->mac80211_registered)
  2432. ieee80211_wake_queue(priv->hw, txq_id); */
  2433. return nfreed;
  2434. }
  2435. static int iwl4965_is_tx_success(u32 status)
  2436. {
  2437. status &= TX_STATUS_MSK;
  2438. return (status == TX_STATUS_SUCCESS)
  2439. || (status == TX_STATUS_DIRECT_DONE);
  2440. }
  2441. /******************************************************************************
  2442. *
  2443. * Generic RX handler implementations
  2444. *
  2445. ******************************************************************************/
  2446. #ifdef CONFIG_IWL4965_HT
  2447. static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
  2448. struct ieee80211_hdr *hdr)
  2449. {
  2450. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2451. return IWL_AP_ID;
  2452. else {
  2453. u8 *da = ieee80211_get_DA(hdr);
  2454. return iwl4965_hw_find_station(priv, da);
  2455. }
  2456. }
  2457. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2458. struct iwl_priv *priv, int txq_id, int idx)
  2459. {
  2460. if (priv->txq[txq_id].txb[idx].skb[0])
  2461. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2462. txb[idx].skb[0]->data;
  2463. return NULL;
  2464. }
  2465. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2466. {
  2467. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2468. tx_resp->frame_count);
  2469. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2470. }
  2471. /**
  2472. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2473. */
  2474. static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
  2475. struct iwl4965_ht_agg *agg,
  2476. struct iwl4965_tx_resp_agg *tx_resp,
  2477. u16 start_idx)
  2478. {
  2479. u16 status;
  2480. struct agg_tx_status *frame_status = &tx_resp->status;
  2481. struct ieee80211_tx_status *tx_status = NULL;
  2482. struct ieee80211_hdr *hdr = NULL;
  2483. int i, sh;
  2484. int txq_id, idx;
  2485. u16 seq;
  2486. if (agg->wait_for_ba)
  2487. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2488. agg->frame_count = tx_resp->frame_count;
  2489. agg->start_idx = start_idx;
  2490. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2491. agg->bitmap = 0;
  2492. /* # frames attempted by Tx command */
  2493. if (agg->frame_count == 1) {
  2494. /* Only one frame was attempted; no block-ack will arrive */
  2495. status = le16_to_cpu(frame_status[0].status);
  2496. seq = le16_to_cpu(frame_status[0].sequence);
  2497. idx = SEQ_TO_INDEX(seq);
  2498. txq_id = SEQ_TO_QUEUE(seq);
  2499. /* FIXME: code repetition */
  2500. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2501. agg->frame_count, agg->start_idx, idx);
  2502. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2503. tx_status->retry_count = tx_resp->failure_frame;
  2504. tx_status->queue_number = status & 0xff;
  2505. tx_status->queue_length = tx_resp->failure_rts;
  2506. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2507. tx_status->flags = iwl4965_is_tx_success(status)?
  2508. IEEE80211_TX_STATUS_ACK : 0;
  2509. iwl4965_hwrate_to_tx_control(priv,
  2510. le32_to_cpu(tx_resp->rate_n_flags),
  2511. &tx_status->control);
  2512. /* FIXME: code repetition end */
  2513. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2514. status & 0xff, tx_resp->failure_frame);
  2515. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2516. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2517. agg->wait_for_ba = 0;
  2518. } else {
  2519. /* Two or more frames were attempted; expect block-ack */
  2520. u64 bitmap = 0;
  2521. int start = agg->start_idx;
  2522. /* Construct bit-map of pending frames within Tx window */
  2523. for (i = 0; i < agg->frame_count; i++) {
  2524. u16 sc;
  2525. status = le16_to_cpu(frame_status[i].status);
  2526. seq = le16_to_cpu(frame_status[i].sequence);
  2527. idx = SEQ_TO_INDEX(seq);
  2528. txq_id = SEQ_TO_QUEUE(seq);
  2529. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2530. AGG_TX_STATE_ABORT_MSK))
  2531. continue;
  2532. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2533. agg->frame_count, txq_id, idx);
  2534. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2535. sc = le16_to_cpu(hdr->seq_ctrl);
  2536. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2537. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2538. " idx=%d, seq_idx=%d, seq=%d\n",
  2539. idx, SEQ_TO_SN(sc),
  2540. hdr->seq_ctrl);
  2541. return -1;
  2542. }
  2543. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2544. i, idx, SEQ_TO_SN(sc));
  2545. sh = idx - start;
  2546. if (sh > 64) {
  2547. sh = (start - idx) + 0xff;
  2548. bitmap = bitmap << sh;
  2549. sh = 0;
  2550. start = idx;
  2551. } else if (sh < -64)
  2552. sh = 0xff - (start - idx);
  2553. else if (sh < 0) {
  2554. sh = start - idx;
  2555. start = idx;
  2556. bitmap = bitmap << sh;
  2557. sh = 0;
  2558. }
  2559. bitmap |= (1 << sh);
  2560. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2561. start, (u32)(bitmap & 0xFFFFFFFF));
  2562. }
  2563. agg->bitmap = bitmap;
  2564. agg->start_idx = start;
  2565. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2566. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2567. agg->frame_count, agg->start_idx,
  2568. (unsigned long long)agg->bitmap);
  2569. if (bitmap)
  2570. agg->wait_for_ba = 1;
  2571. }
  2572. return 0;
  2573. }
  2574. #endif
  2575. /**
  2576. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2577. */
  2578. static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
  2579. struct iwl4965_rx_mem_buffer *rxb)
  2580. {
  2581. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2582. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2583. int txq_id = SEQ_TO_QUEUE(sequence);
  2584. int index = SEQ_TO_INDEX(sequence);
  2585. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2586. struct ieee80211_tx_status *tx_status;
  2587. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2588. u32 status = le32_to_cpu(tx_resp->status);
  2589. #ifdef CONFIG_IWL4965_HT
  2590. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2591. struct ieee80211_hdr *hdr;
  2592. __le16 *qc;
  2593. #endif
  2594. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2595. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2596. "is out of range [0-%d] %d %d\n", txq_id,
  2597. index, txq->q.n_bd, txq->q.write_ptr,
  2598. txq->q.read_ptr);
  2599. return;
  2600. }
  2601. #ifdef CONFIG_IWL4965_HT
  2602. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2603. qc = ieee80211_get_qos_ctrl(hdr);
  2604. if (qc)
  2605. tid = le16_to_cpu(*qc) & 0xf;
  2606. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2607. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2608. IWL_ERROR("Station not known\n");
  2609. return;
  2610. }
  2611. if (txq->sched_retry) {
  2612. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2613. struct iwl4965_ht_agg *agg = NULL;
  2614. if (!qc)
  2615. return;
  2616. agg = &priv->stations[sta_id].tid[tid].agg;
  2617. iwl4965_tx_status_reply_tx(priv, agg,
  2618. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2619. if ((tx_resp->frame_count == 1) &&
  2620. !iwl4965_is_tx_success(status)) {
  2621. /* TODO: send BAR */
  2622. }
  2623. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2624. int freed;
  2625. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2626. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2627. "%d index %d\n", scd_ssn , index);
  2628. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2629. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2630. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2631. txq_id >= 0 && priv->mac80211_registered &&
  2632. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2633. ieee80211_wake_queue(priv->hw, txq_id);
  2634. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2635. }
  2636. } else {
  2637. #endif /* CONFIG_IWL4965_HT */
  2638. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2639. tx_status->retry_count = tx_resp->failure_frame;
  2640. tx_status->queue_number = status;
  2641. tx_status->queue_length = tx_resp->bt_kill_count;
  2642. tx_status->queue_length |= tx_resp->failure_rts;
  2643. tx_status->flags =
  2644. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2645. iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  2646. &tx_status->control);
  2647. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2648. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2649. status, le32_to_cpu(tx_resp->rate_n_flags),
  2650. tx_resp->failure_frame);
  2651. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2652. if (index != -1) {
  2653. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2654. #ifdef CONFIG_IWL4965_HT
  2655. if (tid != MAX_TID_COUNT)
  2656. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2657. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2658. (txq_id >= 0) &&
  2659. priv->mac80211_registered)
  2660. ieee80211_wake_queue(priv->hw, txq_id);
  2661. if (tid != MAX_TID_COUNT)
  2662. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2663. #endif
  2664. }
  2665. #ifdef CONFIG_IWL4965_HT
  2666. }
  2667. #endif /* CONFIG_IWL4965_HT */
  2668. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2669. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2670. }
  2671. static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
  2672. struct iwl4965_rx_mem_buffer *rxb)
  2673. {
  2674. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2675. struct iwl4965_alive_resp *palive;
  2676. struct delayed_work *pwork;
  2677. palive = &pkt->u.alive_frame;
  2678. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2679. "0x%01X 0x%01X\n",
  2680. palive->is_valid, palive->ver_type,
  2681. palive->ver_subtype);
  2682. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2683. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2684. memcpy(&priv->card_alive_init,
  2685. &pkt->u.alive_frame,
  2686. sizeof(struct iwl4965_init_alive_resp));
  2687. pwork = &priv->init_alive_start;
  2688. } else {
  2689. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2690. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2691. sizeof(struct iwl4965_alive_resp));
  2692. pwork = &priv->alive_start;
  2693. }
  2694. /* We delay the ALIVE response by 5ms to
  2695. * give the HW RF Kill time to activate... */
  2696. if (palive->is_valid == UCODE_VALID_OK)
  2697. queue_delayed_work(priv->workqueue, pwork,
  2698. msecs_to_jiffies(5));
  2699. else
  2700. IWL_WARNING("uCode did not respond OK.\n");
  2701. }
  2702. static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
  2703. struct iwl4965_rx_mem_buffer *rxb)
  2704. {
  2705. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2706. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2707. return;
  2708. }
  2709. static void iwl4965_rx_reply_error(struct iwl_priv *priv,
  2710. struct iwl4965_rx_mem_buffer *rxb)
  2711. {
  2712. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2713. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2714. "seq 0x%04X ser 0x%08X\n",
  2715. le32_to_cpu(pkt->u.err_resp.error_type),
  2716. get_cmd_string(pkt->u.err_resp.cmd_id),
  2717. pkt->u.err_resp.cmd_id,
  2718. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2719. le32_to_cpu(pkt->u.err_resp.error_info));
  2720. }
  2721. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2722. static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  2723. {
  2724. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2725. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2726. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  2727. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2728. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2729. rxon->channel = csa->channel;
  2730. priv->staging_rxon.channel = csa->channel;
  2731. }
  2732. static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2733. struct iwl4965_rx_mem_buffer *rxb)
  2734. {
  2735. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2736. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2737. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2738. if (!report->state) {
  2739. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2740. "Spectrum Measure Notification: Start\n");
  2741. return;
  2742. }
  2743. memcpy(&priv->measure_report, report, sizeof(*report));
  2744. priv->measurement_status |= MEASUREMENT_READY;
  2745. #endif
  2746. }
  2747. static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
  2748. struct iwl4965_rx_mem_buffer *rxb)
  2749. {
  2750. #ifdef CONFIG_IWLWIFI_DEBUG
  2751. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2752. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2753. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2754. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2755. #endif
  2756. }
  2757. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2758. struct iwl4965_rx_mem_buffer *rxb)
  2759. {
  2760. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2761. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2762. "notification for %s:\n",
  2763. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2764. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  2765. }
  2766. static void iwl4965_bg_beacon_update(struct work_struct *work)
  2767. {
  2768. struct iwl_priv *priv =
  2769. container_of(work, struct iwl_priv, beacon_update);
  2770. struct sk_buff *beacon;
  2771. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2772. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  2773. if (!beacon) {
  2774. IWL_ERROR("update beacon failed\n");
  2775. return;
  2776. }
  2777. mutex_lock(&priv->mutex);
  2778. /* new beacon skb is allocated every time; dispose previous.*/
  2779. if (priv->ibss_beacon)
  2780. dev_kfree_skb(priv->ibss_beacon);
  2781. priv->ibss_beacon = beacon;
  2782. mutex_unlock(&priv->mutex);
  2783. iwl4965_send_beacon_cmd(priv);
  2784. }
  2785. static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
  2786. struct iwl4965_rx_mem_buffer *rxb)
  2787. {
  2788. #ifdef CONFIG_IWLWIFI_DEBUG
  2789. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2790. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  2791. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  2792. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  2793. "tsf %d %d rate %d\n",
  2794. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  2795. beacon->beacon_notify_hdr.failure_frame,
  2796. le32_to_cpu(beacon->ibss_mgr_status),
  2797. le32_to_cpu(beacon->high_tsf),
  2798. le32_to_cpu(beacon->low_tsf), rate);
  2799. #endif
  2800. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  2801. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  2802. queue_work(priv->workqueue, &priv->beacon_update);
  2803. }
  2804. /* Service response to REPLY_SCAN_CMD (0x80) */
  2805. static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
  2806. struct iwl4965_rx_mem_buffer *rxb)
  2807. {
  2808. #ifdef CONFIG_IWLWIFI_DEBUG
  2809. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2810. struct iwl4965_scanreq_notification *notif =
  2811. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  2812. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  2813. #endif
  2814. }
  2815. /* Service SCAN_START_NOTIFICATION (0x82) */
  2816. static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
  2817. struct iwl4965_rx_mem_buffer *rxb)
  2818. {
  2819. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2820. struct iwl4965_scanstart_notification *notif =
  2821. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  2822. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  2823. IWL_DEBUG_SCAN("Scan start: "
  2824. "%d [802.11%s] "
  2825. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  2826. notif->channel,
  2827. notif->band ? "bg" : "a",
  2828. notif->tsf_high,
  2829. notif->tsf_low, notif->status, notif->beacon_timer);
  2830. }
  2831. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  2832. static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
  2833. struct iwl4965_rx_mem_buffer *rxb)
  2834. {
  2835. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2836. struct iwl4965_scanresults_notification *notif =
  2837. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  2838. IWL_DEBUG_SCAN("Scan ch.res: "
  2839. "%d [802.11%s] "
  2840. "(TSF: 0x%08X:%08X) - %d "
  2841. "elapsed=%lu usec (%dms since last)\n",
  2842. notif->channel,
  2843. notif->band ? "bg" : "a",
  2844. le32_to_cpu(notif->tsf_high),
  2845. le32_to_cpu(notif->tsf_low),
  2846. le32_to_cpu(notif->statistics[0]),
  2847. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  2848. jiffies_to_msecs(elapsed_jiffies
  2849. (priv->last_scan_jiffies, jiffies)));
  2850. priv->last_scan_jiffies = jiffies;
  2851. priv->next_scan_jiffies = 0;
  2852. }
  2853. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  2854. static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
  2855. struct iwl4965_rx_mem_buffer *rxb)
  2856. {
  2857. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2858. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  2859. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  2860. scan_notif->scanned_channels,
  2861. scan_notif->tsf_low,
  2862. scan_notif->tsf_high, scan_notif->status);
  2863. /* The HW is no longer scanning */
  2864. clear_bit(STATUS_SCAN_HW, &priv->status);
  2865. /* The scan completion notification came in, so kill that timer... */
  2866. cancel_delayed_work(&priv->scan_check);
  2867. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  2868. (priv->scan_bands == 2) ? "2.4" : "5.2",
  2869. jiffies_to_msecs(elapsed_jiffies
  2870. (priv->scan_pass_start, jiffies)));
  2871. /* Remove this scanned band from the list
  2872. * of pending bands to scan */
  2873. priv->scan_bands--;
  2874. /* If a request to abort was given, or the scan did not succeed
  2875. * then we reset the scan state machine and terminate,
  2876. * re-queuing another scan if one has been requested */
  2877. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2878. IWL_DEBUG_INFO("Aborted scan completed.\n");
  2879. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  2880. } else {
  2881. /* If there are more bands on this scan pass reschedule */
  2882. if (priv->scan_bands > 0)
  2883. goto reschedule;
  2884. }
  2885. priv->last_scan_jiffies = jiffies;
  2886. priv->next_scan_jiffies = 0;
  2887. IWL_DEBUG_INFO("Setting scan to off\n");
  2888. clear_bit(STATUS_SCANNING, &priv->status);
  2889. IWL_DEBUG_INFO("Scan took %dms\n",
  2890. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  2891. queue_work(priv->workqueue, &priv->scan_completed);
  2892. return;
  2893. reschedule:
  2894. priv->scan_pass_start = jiffies;
  2895. queue_work(priv->workqueue, &priv->request_scan);
  2896. }
  2897. /* Handle notification from uCode that card's power state is changing
  2898. * due to software, hardware, or critical temperature RFKILL */
  2899. static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
  2900. struct iwl4965_rx_mem_buffer *rxb)
  2901. {
  2902. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2903. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  2904. unsigned long status = priv->status;
  2905. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  2906. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  2907. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  2908. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  2909. RF_CARD_DISABLED)) {
  2910. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2911. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2912. if (!iwl_grab_nic_access(priv)) {
  2913. iwl_write_direct32(
  2914. priv, HBUS_TARG_MBX_C,
  2915. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  2916. iwl_release_nic_access(priv);
  2917. }
  2918. if (!(flags & RXON_CARD_DISABLED)) {
  2919. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2920. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2921. if (!iwl_grab_nic_access(priv)) {
  2922. iwl_write_direct32(
  2923. priv, HBUS_TARG_MBX_C,
  2924. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  2925. iwl_release_nic_access(priv);
  2926. }
  2927. }
  2928. if (flags & RF_CARD_DISABLED) {
  2929. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2930. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  2931. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2932. if (!iwl_grab_nic_access(priv))
  2933. iwl_release_nic_access(priv);
  2934. }
  2935. }
  2936. if (flags & HW_CARD_DISABLED)
  2937. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2938. else
  2939. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2940. if (flags & SW_CARD_DISABLED)
  2941. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2942. else
  2943. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2944. if (!(flags & RXON_CARD_DISABLED))
  2945. iwl4965_scan_cancel(priv);
  2946. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  2947. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  2948. (test_bit(STATUS_RF_KILL_SW, &status) !=
  2949. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  2950. queue_work(priv->workqueue, &priv->rf_kill);
  2951. else
  2952. wake_up_interruptible(&priv->wait_command_queue);
  2953. }
  2954. /**
  2955. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  2956. *
  2957. * Setup the RX handlers for each of the reply types sent from the uCode
  2958. * to the host.
  2959. *
  2960. * This function chains into the hardware specific files for them to setup
  2961. * any hardware specific handlers as well.
  2962. */
  2963. static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
  2964. {
  2965. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  2966. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  2967. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  2968. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  2969. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  2970. iwl4965_rx_spectrum_measure_notif;
  2971. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  2972. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  2973. iwl4965_rx_pm_debug_statistics_notif;
  2974. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  2975. /*
  2976. * The same handler is used for both the REPLY to a discrete
  2977. * statistics request from the host as well as for the periodic
  2978. * statistics notifications (after received beacons) from the uCode.
  2979. */
  2980. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  2981. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  2982. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  2983. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  2984. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  2985. iwl4965_rx_scan_results_notif;
  2986. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  2987. iwl4965_rx_scan_complete_notif;
  2988. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  2989. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  2990. /* Set up hardware specific Rx handlers */
  2991. iwl4965_hw_rx_handler_setup(priv);
  2992. }
  2993. /**
  2994. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  2995. * @rxb: Rx buffer to reclaim
  2996. *
  2997. * If an Rx buffer has an async callback associated with it the callback
  2998. * will be executed. The attached skb (if present) will only be freed
  2999. * if the callback returns 1
  3000. */
  3001. static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
  3002. struct iwl4965_rx_mem_buffer *rxb)
  3003. {
  3004. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3005. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3006. int txq_id = SEQ_TO_QUEUE(sequence);
  3007. int index = SEQ_TO_INDEX(sequence);
  3008. int huge = sequence & SEQ_HUGE_FRAME;
  3009. int cmd_index;
  3010. struct iwl_cmd *cmd;
  3011. /* If a Tx command is being handled and it isn't in the actual
  3012. * command queue then there a command routing bug has been introduced
  3013. * in the queue management code. */
  3014. if (txq_id != IWL_CMD_QUEUE_NUM)
  3015. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3016. txq_id, pkt->hdr.cmd);
  3017. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3018. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3019. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3020. /* Input error checking is done when commands are added to queue. */
  3021. if (cmd->meta.flags & CMD_WANT_SKB) {
  3022. cmd->meta.source->u.skb = rxb->skb;
  3023. rxb->skb = NULL;
  3024. } else if (cmd->meta.u.callback &&
  3025. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3026. rxb->skb = NULL;
  3027. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3028. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3029. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3030. wake_up_interruptible(&priv->wait_command_queue);
  3031. }
  3032. }
  3033. /************************** RX-FUNCTIONS ****************************/
  3034. /*
  3035. * Rx theory of operation
  3036. *
  3037. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3038. * each of which point to Receive Buffers to be filled by 4965. These get
  3039. * used not only for Rx frames, but for any command response or notification
  3040. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3041. * of indexes into the circular buffer.
  3042. *
  3043. * Rx Queue Indexes
  3044. * The host/firmware share two index registers for managing the Rx buffers.
  3045. *
  3046. * The READ index maps to the first position that the firmware may be writing
  3047. * to -- the driver can read up to (but not including) this position and get
  3048. * good data.
  3049. * The READ index is managed by the firmware once the card is enabled.
  3050. *
  3051. * The WRITE index maps to the last position the driver has read from -- the
  3052. * position preceding WRITE is the last slot the firmware can place a packet.
  3053. *
  3054. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3055. * WRITE = READ.
  3056. *
  3057. * During initialization, the host sets up the READ queue position to the first
  3058. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3059. *
  3060. * When the firmware places a packet in a buffer, it will advance the READ index
  3061. * and fire the RX interrupt. The driver can then query the READ index and
  3062. * process as many packets as possible, moving the WRITE index forward as it
  3063. * resets the Rx queue buffers with new memory.
  3064. *
  3065. * The management in the driver is as follows:
  3066. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3067. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3068. * to replenish the iwl->rxq->rx_free.
  3069. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3070. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3071. * 'processed' and 'read' driver indexes as well)
  3072. * + A received packet is processed and handed to the kernel network stack,
  3073. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3074. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3075. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3076. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3077. * were enough free buffers and RX_STALLED is set it is cleared.
  3078. *
  3079. *
  3080. * Driver sequence:
  3081. *
  3082. * iwl4965_rx_queue_alloc() Allocates rx_free
  3083. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3084. * iwl4965_rx_queue_restock
  3085. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3086. * queue, updates firmware pointers, and updates
  3087. * the WRITE index. If insufficient rx_free buffers
  3088. * are available, schedules iwl4965_rx_replenish
  3089. *
  3090. * -- enable interrupts --
  3091. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3092. * READ INDEX, detaching the SKB from the pool.
  3093. * Moves the packet buffer from queue to rx_used.
  3094. * Calls iwl4965_rx_queue_restock to refill any empty
  3095. * slots.
  3096. * ...
  3097. *
  3098. */
  3099. /**
  3100. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3101. */
  3102. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3103. {
  3104. int s = q->read - q->write;
  3105. if (s <= 0)
  3106. s += RX_QUEUE_SIZE;
  3107. /* keep some buffer to not confuse full and empty queue */
  3108. s -= 2;
  3109. if (s < 0)
  3110. s = 0;
  3111. return s;
  3112. }
  3113. /**
  3114. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3115. */
  3116. int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
  3117. {
  3118. u32 reg = 0;
  3119. int rc = 0;
  3120. unsigned long flags;
  3121. spin_lock_irqsave(&q->lock, flags);
  3122. if (q->need_update == 0)
  3123. goto exit_unlock;
  3124. /* If power-saving is in use, make sure device is awake */
  3125. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3126. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3127. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3128. iwl_set_bit(priv, CSR_GP_CNTRL,
  3129. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3130. goto exit_unlock;
  3131. }
  3132. rc = iwl_grab_nic_access(priv);
  3133. if (rc)
  3134. goto exit_unlock;
  3135. /* Device expects a multiple of 8 */
  3136. iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3137. q->write & ~0x7);
  3138. iwl_release_nic_access(priv);
  3139. /* Else device is assumed to be awake */
  3140. } else
  3141. /* Device expects a multiple of 8 */
  3142. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3143. q->need_update = 0;
  3144. exit_unlock:
  3145. spin_unlock_irqrestore(&q->lock, flags);
  3146. return rc;
  3147. }
  3148. /**
  3149. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3150. */
  3151. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3152. dma_addr_t dma_addr)
  3153. {
  3154. return cpu_to_le32((u32)(dma_addr >> 8));
  3155. }
  3156. /**
  3157. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3158. *
  3159. * If there are slots in the RX queue that need to be restocked,
  3160. * and we have free pre-allocated buffers, fill the ranks as much
  3161. * as we can, pulling from rx_free.
  3162. *
  3163. * This moves the 'write' index forward to catch up with 'processed', and
  3164. * also updates the memory address in the firmware to reference the new
  3165. * target buffer.
  3166. */
  3167. static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
  3168. {
  3169. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3170. struct list_head *element;
  3171. struct iwl4965_rx_mem_buffer *rxb;
  3172. unsigned long flags;
  3173. int write, rc;
  3174. spin_lock_irqsave(&rxq->lock, flags);
  3175. write = rxq->write & ~0x7;
  3176. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3177. /* Get next free Rx buffer, remove from free list */
  3178. element = rxq->rx_free.next;
  3179. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3180. list_del(element);
  3181. /* Point to Rx buffer via next RBD in circular buffer */
  3182. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3183. rxq->queue[rxq->write] = rxb;
  3184. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3185. rxq->free_count--;
  3186. }
  3187. spin_unlock_irqrestore(&rxq->lock, flags);
  3188. /* If the pre-allocated buffer pool is dropping low, schedule to
  3189. * refill it */
  3190. if (rxq->free_count <= RX_LOW_WATERMARK)
  3191. queue_work(priv->workqueue, &priv->rx_replenish);
  3192. /* If we've added more space for the firmware to place data, tell it.
  3193. * Increment device's write pointer in multiples of 8. */
  3194. if ((write != (rxq->write & ~0x7))
  3195. || (abs(rxq->write - rxq->read) > 7)) {
  3196. spin_lock_irqsave(&rxq->lock, flags);
  3197. rxq->need_update = 1;
  3198. spin_unlock_irqrestore(&rxq->lock, flags);
  3199. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3200. if (rc)
  3201. return rc;
  3202. }
  3203. return 0;
  3204. }
  3205. /**
  3206. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3207. *
  3208. * When moving to rx_free an SKB is allocated for the slot.
  3209. *
  3210. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3211. * This is called as a scheduled work item (except for during initialization)
  3212. */
  3213. static void iwl4965_rx_allocate(struct iwl_priv *priv)
  3214. {
  3215. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3216. struct list_head *element;
  3217. struct iwl4965_rx_mem_buffer *rxb;
  3218. unsigned long flags;
  3219. spin_lock_irqsave(&rxq->lock, flags);
  3220. while (!list_empty(&rxq->rx_used)) {
  3221. element = rxq->rx_used.next;
  3222. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3223. /* Alloc a new receive buffer */
  3224. rxb->skb =
  3225. alloc_skb(priv->hw_setting.rx_buf_size,
  3226. __GFP_NOWARN | GFP_ATOMIC);
  3227. if (!rxb->skb) {
  3228. if (net_ratelimit())
  3229. printk(KERN_CRIT DRV_NAME
  3230. ": Can not allocate SKB buffers\n");
  3231. /* We don't reschedule replenish work here -- we will
  3232. * call the restock method and if it still needs
  3233. * more buffers it will schedule replenish */
  3234. break;
  3235. }
  3236. priv->alloc_rxb_skb++;
  3237. list_del(element);
  3238. /* Get physical address of RB/SKB */
  3239. rxb->dma_addr =
  3240. pci_map_single(priv->pci_dev, rxb->skb->data,
  3241. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3242. list_add_tail(&rxb->list, &rxq->rx_free);
  3243. rxq->free_count++;
  3244. }
  3245. spin_unlock_irqrestore(&rxq->lock, flags);
  3246. }
  3247. /*
  3248. * this should be called while priv->lock is locked
  3249. */
  3250. static void __iwl4965_rx_replenish(void *data)
  3251. {
  3252. struct iwl_priv *priv = data;
  3253. iwl4965_rx_allocate(priv);
  3254. iwl4965_rx_queue_restock(priv);
  3255. }
  3256. void iwl4965_rx_replenish(void *data)
  3257. {
  3258. struct iwl_priv *priv = data;
  3259. unsigned long flags;
  3260. iwl4965_rx_allocate(priv);
  3261. spin_lock_irqsave(&priv->lock, flags);
  3262. iwl4965_rx_queue_restock(priv);
  3263. spin_unlock_irqrestore(&priv->lock, flags);
  3264. }
  3265. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3266. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3267. * This free routine walks the list of POOL entries and if SKB is set to
  3268. * non NULL it is unmapped and freed
  3269. */
  3270. static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3271. {
  3272. int i;
  3273. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3274. if (rxq->pool[i].skb != NULL) {
  3275. pci_unmap_single(priv->pci_dev,
  3276. rxq->pool[i].dma_addr,
  3277. priv->hw_setting.rx_buf_size,
  3278. PCI_DMA_FROMDEVICE);
  3279. dev_kfree_skb(rxq->pool[i].skb);
  3280. }
  3281. }
  3282. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3283. rxq->dma_addr);
  3284. rxq->bd = NULL;
  3285. }
  3286. int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
  3287. {
  3288. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3289. struct pci_dev *dev = priv->pci_dev;
  3290. int i;
  3291. spin_lock_init(&rxq->lock);
  3292. INIT_LIST_HEAD(&rxq->rx_free);
  3293. INIT_LIST_HEAD(&rxq->rx_used);
  3294. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3295. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3296. if (!rxq->bd)
  3297. return -ENOMEM;
  3298. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3299. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3300. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3301. /* Set us so that we have processed and used all buffers, but have
  3302. * not restocked the Rx queue with fresh buffers */
  3303. rxq->read = rxq->write = 0;
  3304. rxq->free_count = 0;
  3305. rxq->need_update = 0;
  3306. return 0;
  3307. }
  3308. void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3309. {
  3310. unsigned long flags;
  3311. int i;
  3312. spin_lock_irqsave(&rxq->lock, flags);
  3313. INIT_LIST_HEAD(&rxq->rx_free);
  3314. INIT_LIST_HEAD(&rxq->rx_used);
  3315. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3316. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3317. /* In the reset function, these buffers may have been allocated
  3318. * to an SKB, so we need to unmap and free potential storage */
  3319. if (rxq->pool[i].skb != NULL) {
  3320. pci_unmap_single(priv->pci_dev,
  3321. rxq->pool[i].dma_addr,
  3322. priv->hw_setting.rx_buf_size,
  3323. PCI_DMA_FROMDEVICE);
  3324. priv->alloc_rxb_skb--;
  3325. dev_kfree_skb(rxq->pool[i].skb);
  3326. rxq->pool[i].skb = NULL;
  3327. }
  3328. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3329. }
  3330. /* Set us so that we have processed and used all buffers, but have
  3331. * not restocked the Rx queue with fresh buffers */
  3332. rxq->read = rxq->write = 0;
  3333. rxq->free_count = 0;
  3334. spin_unlock_irqrestore(&rxq->lock, flags);
  3335. }
  3336. /* Convert linear signal-to-noise ratio into dB */
  3337. static u8 ratio2dB[100] = {
  3338. /* 0 1 2 3 4 5 6 7 8 9 */
  3339. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3340. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3341. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3342. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3343. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3344. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3345. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3346. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3347. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3348. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3349. };
  3350. /* Calculates a relative dB value from a ratio of linear
  3351. * (i.e. not dB) signal levels.
  3352. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3353. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3354. {
  3355. /* 1000:1 or higher just report as 60 dB */
  3356. if (sig_ratio >= 1000)
  3357. return 60;
  3358. /* 100:1 or higher, divide by 10 and use table,
  3359. * add 20 dB to make up for divide by 10 */
  3360. if (sig_ratio >= 100)
  3361. return (20 + (int)ratio2dB[sig_ratio/10]);
  3362. /* We shouldn't see this */
  3363. if (sig_ratio < 1)
  3364. return 0;
  3365. /* Use table for ratios 1:1 - 99:1 */
  3366. return (int)ratio2dB[sig_ratio];
  3367. }
  3368. #define PERFECT_RSSI (-20) /* dBm */
  3369. #define WORST_RSSI (-95) /* dBm */
  3370. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3371. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3372. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3373. * about formulas used below. */
  3374. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3375. {
  3376. int sig_qual;
  3377. int degradation = PERFECT_RSSI - rssi_dbm;
  3378. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3379. * as indicator; formula is (signal dbm - noise dbm).
  3380. * SNR at or above 40 is a great signal (100%).
  3381. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3382. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3383. if (noise_dbm) {
  3384. if (rssi_dbm - noise_dbm >= 40)
  3385. return 100;
  3386. else if (rssi_dbm < noise_dbm)
  3387. return 0;
  3388. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3389. /* Else use just the signal level.
  3390. * This formula is a least squares fit of data points collected and
  3391. * compared with a reference system that had a percentage (%) display
  3392. * for signal quality. */
  3393. } else
  3394. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3395. (15 * RSSI_RANGE + 62 * degradation)) /
  3396. (RSSI_RANGE * RSSI_RANGE);
  3397. if (sig_qual > 100)
  3398. sig_qual = 100;
  3399. else if (sig_qual < 1)
  3400. sig_qual = 0;
  3401. return sig_qual;
  3402. }
  3403. /**
  3404. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3405. *
  3406. * Uses the priv->rx_handlers callback function array to invoke
  3407. * the appropriate handlers, including command responses,
  3408. * frame-received notifications, and other notifications.
  3409. */
  3410. static void iwl4965_rx_handle(struct iwl_priv *priv)
  3411. {
  3412. struct iwl4965_rx_mem_buffer *rxb;
  3413. struct iwl4965_rx_packet *pkt;
  3414. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3415. u32 r, i;
  3416. int reclaim;
  3417. unsigned long flags;
  3418. u8 fill_rx = 0;
  3419. u32 count = 8;
  3420. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3421. * buffer that the driver may process (last buffer filled by ucode). */
  3422. r = iwl4965_hw_get_rx_read(priv);
  3423. i = rxq->read;
  3424. /* Rx interrupt, but nothing sent from uCode */
  3425. if (i == r)
  3426. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3427. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3428. fill_rx = 1;
  3429. while (i != r) {
  3430. rxb = rxq->queue[i];
  3431. /* If an RXB doesn't have a Rx queue slot associated with it,
  3432. * then a bug has been introduced in the queue refilling
  3433. * routines -- catch it here */
  3434. BUG_ON(rxb == NULL);
  3435. rxq->queue[i] = NULL;
  3436. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3437. priv->hw_setting.rx_buf_size,
  3438. PCI_DMA_FROMDEVICE);
  3439. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3440. /* Reclaim a command buffer only if this packet is a response
  3441. * to a (driver-originated) command.
  3442. * If the packet (e.g. Rx frame) originated from uCode,
  3443. * there is no command buffer to reclaim.
  3444. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3445. * but apparently a few don't get set; catch them here. */
  3446. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3447. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3448. (pkt->hdr.cmd != REPLY_RX) &&
  3449. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3450. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3451. (pkt->hdr.cmd != REPLY_TX);
  3452. /* Based on type of command response or notification,
  3453. * handle those that need handling via function in
  3454. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3455. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3456. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3457. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3458. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3459. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3460. } else {
  3461. /* No handling needed */
  3462. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3463. "r %d i %d No handler needed for %s, 0x%02x\n",
  3464. r, i, get_cmd_string(pkt->hdr.cmd),
  3465. pkt->hdr.cmd);
  3466. }
  3467. if (reclaim) {
  3468. /* Invoke any callbacks, transfer the skb to caller, and
  3469. * fire off the (possibly) blocking iwl_send_cmd()
  3470. * as we reclaim the driver command queue */
  3471. if (rxb && rxb->skb)
  3472. iwl4965_tx_cmd_complete(priv, rxb);
  3473. else
  3474. IWL_WARNING("Claim null rxb?\n");
  3475. }
  3476. /* For now we just don't re-use anything. We can tweak this
  3477. * later to try and re-use notification packets and SKBs that
  3478. * fail to Rx correctly */
  3479. if (rxb->skb != NULL) {
  3480. priv->alloc_rxb_skb--;
  3481. dev_kfree_skb_any(rxb->skb);
  3482. rxb->skb = NULL;
  3483. }
  3484. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3485. priv->hw_setting.rx_buf_size,
  3486. PCI_DMA_FROMDEVICE);
  3487. spin_lock_irqsave(&rxq->lock, flags);
  3488. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3489. spin_unlock_irqrestore(&rxq->lock, flags);
  3490. i = (i + 1) & RX_QUEUE_MASK;
  3491. /* If there are a lot of unused frames,
  3492. * restock the Rx queue so ucode wont assert. */
  3493. if (fill_rx) {
  3494. count++;
  3495. if (count >= 8) {
  3496. priv->rxq.read = i;
  3497. __iwl4965_rx_replenish(priv);
  3498. count = 0;
  3499. }
  3500. }
  3501. }
  3502. /* Backtrack one entry */
  3503. priv->rxq.read = i;
  3504. iwl4965_rx_queue_restock(priv);
  3505. }
  3506. /**
  3507. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3508. */
  3509. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3510. struct iwl4965_tx_queue *txq)
  3511. {
  3512. u32 reg = 0;
  3513. int rc = 0;
  3514. int txq_id = txq->q.id;
  3515. if (txq->need_update == 0)
  3516. return rc;
  3517. /* if we're trying to save power */
  3518. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3519. /* wake up nic if it's powered down ...
  3520. * uCode will wake up, and interrupt us again, so next
  3521. * time we'll skip this part. */
  3522. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3523. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3524. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3525. iwl_set_bit(priv, CSR_GP_CNTRL,
  3526. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3527. return rc;
  3528. }
  3529. /* restore this queue's parameters in nic hardware. */
  3530. rc = iwl_grab_nic_access(priv);
  3531. if (rc)
  3532. return rc;
  3533. iwl_write_direct32(priv, HBUS_TARG_WRPTR,
  3534. txq->q.write_ptr | (txq_id << 8));
  3535. iwl_release_nic_access(priv);
  3536. /* else not in power-save mode, uCode will never sleep when we're
  3537. * trying to tx (during RFKILL, we're not trying to tx). */
  3538. } else
  3539. iwl_write32(priv, HBUS_TARG_WRPTR,
  3540. txq->q.write_ptr | (txq_id << 8));
  3541. txq->need_update = 0;
  3542. return rc;
  3543. }
  3544. #ifdef CONFIG_IWLWIFI_DEBUG
  3545. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3546. {
  3547. DECLARE_MAC_BUF(mac);
  3548. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3549. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3550. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3551. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3552. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3553. le32_to_cpu(rxon->filter_flags));
  3554. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3555. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3556. rxon->ofdm_basic_rates);
  3557. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3558. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3559. print_mac(mac, rxon->node_addr));
  3560. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3561. print_mac(mac, rxon->bssid_addr));
  3562. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3563. }
  3564. #endif
  3565. static void iwl4965_enable_interrupts(struct iwl_priv *priv)
  3566. {
  3567. IWL_DEBUG_ISR("Enabling interrupts\n");
  3568. set_bit(STATUS_INT_ENABLED, &priv->status);
  3569. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3570. }
  3571. /* call this function to flush any scheduled tasklet */
  3572. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  3573. {
  3574. /* wait to make sure we flush pedding tasklet*/
  3575. synchronize_irq(priv->pci_dev->irq);
  3576. tasklet_kill(&priv->irq_tasklet);
  3577. }
  3578. static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
  3579. {
  3580. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3581. /* disable interrupts from uCode/NIC to host */
  3582. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3583. /* acknowledge/clear/reset any interrupts still pending
  3584. * from uCode or flow handler (Rx/Tx DMA) */
  3585. iwl_write32(priv, CSR_INT, 0xffffffff);
  3586. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3587. IWL_DEBUG_ISR("Disabled interrupts\n");
  3588. }
  3589. static const char *desc_lookup(int i)
  3590. {
  3591. switch (i) {
  3592. case 1:
  3593. return "FAIL";
  3594. case 2:
  3595. return "BAD_PARAM";
  3596. case 3:
  3597. return "BAD_CHECKSUM";
  3598. case 4:
  3599. return "NMI_INTERRUPT";
  3600. case 5:
  3601. return "SYSASSERT";
  3602. case 6:
  3603. return "FATAL_ERROR";
  3604. }
  3605. return "UNKNOWN";
  3606. }
  3607. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3608. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3609. static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
  3610. {
  3611. u32 data2, line;
  3612. u32 desc, time, count, base, data1;
  3613. u32 blink1, blink2, ilink1, ilink2;
  3614. int rc;
  3615. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3616. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  3617. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3618. return;
  3619. }
  3620. rc = iwl_grab_nic_access(priv);
  3621. if (rc) {
  3622. IWL_WARNING("Can not read from adapter at this time.\n");
  3623. return;
  3624. }
  3625. count = iwl_read_targ_mem(priv, base);
  3626. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3627. IWL_ERROR("Start IWL Error Log Dump:\n");
  3628. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3629. }
  3630. desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
  3631. blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
  3632. blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
  3633. ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
  3634. ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
  3635. data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
  3636. data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
  3637. line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
  3638. time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
  3639. IWL_ERROR("Desc Time "
  3640. "data1 data2 line\n");
  3641. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3642. desc_lookup(desc), desc, time, data1, data2, line);
  3643. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3644. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3645. ilink1, ilink2);
  3646. iwl_release_nic_access(priv);
  3647. }
  3648. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3649. /**
  3650. * iwl4965_print_event_log - Dump error event log to syslog
  3651. *
  3652. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  3653. */
  3654. static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3655. u32 num_events, u32 mode)
  3656. {
  3657. u32 i;
  3658. u32 base; /* SRAM byte address of event log header */
  3659. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3660. u32 ptr; /* SRAM byte address of log data */
  3661. u32 ev, time, data; /* event log data */
  3662. if (num_events == 0)
  3663. return;
  3664. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3665. if (mode == 0)
  3666. event_size = 2 * sizeof(u32);
  3667. else
  3668. event_size = 3 * sizeof(u32);
  3669. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3670. /* "time" is actually "data" for mode 0 (no timestamp).
  3671. * place event id # at far right for easier visual parsing. */
  3672. for (i = 0; i < num_events; i++) {
  3673. ev = iwl_read_targ_mem(priv, ptr);
  3674. ptr += sizeof(u32);
  3675. time = iwl_read_targ_mem(priv, ptr);
  3676. ptr += sizeof(u32);
  3677. if (mode == 0)
  3678. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3679. else {
  3680. data = iwl_read_targ_mem(priv, ptr);
  3681. ptr += sizeof(u32);
  3682. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3683. }
  3684. }
  3685. }
  3686. static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
  3687. {
  3688. int rc;
  3689. u32 base; /* SRAM byte address of event log header */
  3690. u32 capacity; /* event log capacity in # entries */
  3691. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3692. u32 num_wraps; /* # times uCode wrapped to top of log */
  3693. u32 next_entry; /* index of next entry to be written by uCode */
  3694. u32 size; /* # entries that we'll print */
  3695. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3696. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  3697. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3698. return;
  3699. }
  3700. rc = iwl_grab_nic_access(priv);
  3701. if (rc) {
  3702. IWL_WARNING("Can not read from adapter at this time.\n");
  3703. return;
  3704. }
  3705. /* event log header */
  3706. capacity = iwl_read_targ_mem(priv, base);
  3707. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  3708. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  3709. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  3710. size = num_wraps ? capacity : next_entry;
  3711. /* bail out if nothing in log */
  3712. if (size == 0) {
  3713. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  3714. iwl_release_nic_access(priv);
  3715. return;
  3716. }
  3717. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  3718. size, num_wraps);
  3719. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3720. * i.e the next one that uCode would fill. */
  3721. if (num_wraps)
  3722. iwl4965_print_event_log(priv, next_entry,
  3723. capacity - next_entry, mode);
  3724. /* (then/else) start at top of log */
  3725. iwl4965_print_event_log(priv, 0, next_entry, mode);
  3726. iwl_release_nic_access(priv);
  3727. }
  3728. /**
  3729. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  3730. */
  3731. static void iwl4965_irq_handle_error(struct iwl_priv *priv)
  3732. {
  3733. /* Set the FW error flag -- cleared on iwl4965_down */
  3734. set_bit(STATUS_FW_ERROR, &priv->status);
  3735. /* Cancel currently queued command. */
  3736. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3737. #ifdef CONFIG_IWLWIFI_DEBUG
  3738. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  3739. iwl4965_dump_nic_error_log(priv);
  3740. iwl4965_dump_nic_event_log(priv);
  3741. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  3742. }
  3743. #endif
  3744. wake_up_interruptible(&priv->wait_command_queue);
  3745. /* Keep the restart process from trying to send host
  3746. * commands by clearing the INIT status bit */
  3747. clear_bit(STATUS_READY, &priv->status);
  3748. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3749. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3750. "Restarting adapter due to uCode error.\n");
  3751. if (iwl_is_associated(priv)) {
  3752. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  3753. sizeof(priv->recovery_rxon));
  3754. priv->error_recovering = 1;
  3755. }
  3756. queue_work(priv->workqueue, &priv->restart);
  3757. }
  3758. }
  3759. static void iwl4965_error_recovery(struct iwl_priv *priv)
  3760. {
  3761. unsigned long flags;
  3762. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  3763. sizeof(priv->staging_rxon));
  3764. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3765. iwl4965_commit_rxon(priv);
  3766. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  3767. spin_lock_irqsave(&priv->lock, flags);
  3768. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  3769. priv->error_recovering = 0;
  3770. spin_unlock_irqrestore(&priv->lock, flags);
  3771. }
  3772. static void iwl4965_irq_tasklet(struct iwl_priv *priv)
  3773. {
  3774. u32 inta, handled = 0;
  3775. u32 inta_fh;
  3776. unsigned long flags;
  3777. #ifdef CONFIG_IWLWIFI_DEBUG
  3778. u32 inta_mask;
  3779. #endif
  3780. spin_lock_irqsave(&priv->lock, flags);
  3781. /* Ack/clear/reset pending uCode interrupts.
  3782. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  3783. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  3784. inta = iwl_read32(priv, CSR_INT);
  3785. iwl_write32(priv, CSR_INT, inta);
  3786. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  3787. * Any new interrupts that happen after this, either while we're
  3788. * in this tasklet, or later, will show up in next ISR/tasklet. */
  3789. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3790. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  3791. #ifdef CONFIG_IWLWIFI_DEBUG
  3792. if (iwl_debug_level & IWL_DL_ISR) {
  3793. /* just for debug */
  3794. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3795. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3796. inta, inta_mask, inta_fh);
  3797. }
  3798. #endif
  3799. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  3800. * atomic, make sure that inta covers all the interrupts that
  3801. * we've discovered, even if FH interrupt came in just after
  3802. * reading CSR_INT. */
  3803. if (inta_fh & CSR49_FH_INT_RX_MASK)
  3804. inta |= CSR_INT_BIT_FH_RX;
  3805. if (inta_fh & CSR49_FH_INT_TX_MASK)
  3806. inta |= CSR_INT_BIT_FH_TX;
  3807. /* Now service all interrupt bits discovered above. */
  3808. if (inta & CSR_INT_BIT_HW_ERR) {
  3809. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  3810. /* Tell the device to stop sending interrupts */
  3811. iwl4965_disable_interrupts(priv);
  3812. iwl4965_irq_handle_error(priv);
  3813. handled |= CSR_INT_BIT_HW_ERR;
  3814. spin_unlock_irqrestore(&priv->lock, flags);
  3815. return;
  3816. }
  3817. #ifdef CONFIG_IWLWIFI_DEBUG
  3818. if (iwl_debug_level & (IWL_DL_ISR)) {
  3819. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3820. if (inta & CSR_INT_BIT_SCD)
  3821. IWL_DEBUG_ISR("Scheduler finished to transmit "
  3822. "the frame/frames.\n");
  3823. /* Alive notification via Rx interrupt will do the real work */
  3824. if (inta & CSR_INT_BIT_ALIVE)
  3825. IWL_DEBUG_ISR("Alive interrupt\n");
  3826. }
  3827. #endif
  3828. /* Safely ignore these bits for debug checks below */
  3829. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  3830. /* HW RF KILL switch toggled */
  3831. if (inta & CSR_INT_BIT_RF_KILL) {
  3832. int hw_rf_kill = 0;
  3833. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  3834. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  3835. hw_rf_kill = 1;
  3836. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  3837. "RF_KILL bit toggled to %s.\n",
  3838. hw_rf_kill ? "disable radio":"enable radio");
  3839. /* Queue restart only if RF_KILL switch was set to "kill"
  3840. * when we loaded driver, and is now set to "enable".
  3841. * After we're Alive, RF_KILL gets handled by
  3842. * iwl4965_rx_card_state_notif() */
  3843. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  3844. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3845. queue_work(priv->workqueue, &priv->restart);
  3846. }
  3847. handled |= CSR_INT_BIT_RF_KILL;
  3848. }
  3849. /* Chip got too hot and stopped itself */
  3850. if (inta & CSR_INT_BIT_CT_KILL) {
  3851. IWL_ERROR("Microcode CT kill error detected.\n");
  3852. handled |= CSR_INT_BIT_CT_KILL;
  3853. }
  3854. /* Error detected by uCode */
  3855. if (inta & CSR_INT_BIT_SW_ERR) {
  3856. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  3857. inta);
  3858. iwl4965_irq_handle_error(priv);
  3859. handled |= CSR_INT_BIT_SW_ERR;
  3860. }
  3861. /* uCode wakes up after power-down sleep */
  3862. if (inta & CSR_INT_BIT_WAKEUP) {
  3863. IWL_DEBUG_ISR("Wakeup interrupt\n");
  3864. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  3865. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  3866. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  3867. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  3868. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  3869. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  3870. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  3871. handled |= CSR_INT_BIT_WAKEUP;
  3872. }
  3873. /* All uCode command responses, including Tx command responses,
  3874. * Rx "responses" (frame-received notification), and other
  3875. * notifications from uCode come through here*/
  3876. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  3877. iwl4965_rx_handle(priv);
  3878. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  3879. }
  3880. if (inta & CSR_INT_BIT_FH_TX) {
  3881. IWL_DEBUG_ISR("Tx interrupt\n");
  3882. handled |= CSR_INT_BIT_FH_TX;
  3883. }
  3884. if (inta & ~handled)
  3885. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  3886. if (inta & ~CSR_INI_SET_MASK) {
  3887. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  3888. inta & ~CSR_INI_SET_MASK);
  3889. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  3890. }
  3891. /* Re-enable all interrupts */
  3892. /* only Re-enable if diabled by irq */
  3893. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3894. iwl4965_enable_interrupts(priv);
  3895. #ifdef CONFIG_IWLWIFI_DEBUG
  3896. if (iwl_debug_level & (IWL_DL_ISR)) {
  3897. inta = iwl_read32(priv, CSR_INT);
  3898. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3899. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3900. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  3901. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  3902. }
  3903. #endif
  3904. spin_unlock_irqrestore(&priv->lock, flags);
  3905. }
  3906. static irqreturn_t iwl4965_isr(int irq, void *data)
  3907. {
  3908. struct iwl_priv *priv = data;
  3909. u32 inta, inta_mask;
  3910. u32 inta_fh;
  3911. if (!priv)
  3912. return IRQ_NONE;
  3913. spin_lock(&priv->lock);
  3914. /* Disable (but don't clear!) interrupts here to avoid
  3915. * back-to-back ISRs and sporadic interrupts from our NIC.
  3916. * If we have something to service, the tasklet will re-enable ints.
  3917. * If we *don't* have something, we'll re-enable before leaving here. */
  3918. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  3919. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3920. /* Discover which interrupts are active/pending */
  3921. inta = iwl_read32(priv, CSR_INT);
  3922. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3923. /* Ignore interrupt if there's nothing in NIC to service.
  3924. * This may be due to IRQ shared with another device,
  3925. * or due to sporadic interrupts thrown from our NIC. */
  3926. if (!inta && !inta_fh) {
  3927. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  3928. goto none;
  3929. }
  3930. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  3931. /* Hardware disappeared. It might have already raised
  3932. * an interrupt */
  3933. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  3934. goto unplugged;
  3935. }
  3936. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3937. inta, inta_mask, inta_fh);
  3938. inta &= ~CSR_INT_BIT_SCD;
  3939. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  3940. if (likely(inta || inta_fh))
  3941. tasklet_schedule(&priv->irq_tasklet);
  3942. unplugged:
  3943. spin_unlock(&priv->lock);
  3944. return IRQ_HANDLED;
  3945. none:
  3946. /* re-enable interrupts here since we don't have anything to service. */
  3947. /* only Re-enable if diabled by irq */
  3948. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3949. iwl4965_enable_interrupts(priv);
  3950. spin_unlock(&priv->lock);
  3951. return IRQ_NONE;
  3952. }
  3953. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  3954. * sending probe req. This should be set long enough to hear probe responses
  3955. * from more than one AP. */
  3956. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  3957. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  3958. /* For faster active scanning, scan will move to the next channel if fewer than
  3959. * PLCP_QUIET_THRESH packets are heard on this channel within
  3960. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  3961. * time if it's a quiet channel (nothing responded to our probe, and there's
  3962. * no other traffic).
  3963. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  3964. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  3965. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  3966. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  3967. * Must be set longer than active dwell time.
  3968. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  3969. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  3970. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  3971. #define IWL_PASSIVE_DWELL_BASE (100)
  3972. #define IWL_CHANNEL_TUNE_TIME 5
  3973. static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
  3974. enum ieee80211_band band)
  3975. {
  3976. if (band == IEEE80211_BAND_5GHZ)
  3977. return IWL_ACTIVE_DWELL_TIME_52;
  3978. else
  3979. return IWL_ACTIVE_DWELL_TIME_24;
  3980. }
  3981. static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
  3982. enum ieee80211_band band)
  3983. {
  3984. u16 active = iwl4965_get_active_dwell_time(priv, band);
  3985. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  3986. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  3987. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  3988. if (iwl_is_associated(priv)) {
  3989. /* If we're associated, we clamp the maximum passive
  3990. * dwell time to be 98% of the beacon interval (minus
  3991. * 2 * channel tune time) */
  3992. passive = priv->beacon_int;
  3993. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  3994. passive = IWL_PASSIVE_DWELL_BASE;
  3995. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  3996. }
  3997. if (passive <= active)
  3998. passive = active + 1;
  3999. return passive;
  4000. }
  4001. static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
  4002. enum ieee80211_band band,
  4003. u8 is_active, u8 direct_mask,
  4004. struct iwl4965_scan_channel *scan_ch)
  4005. {
  4006. const struct ieee80211_channel *channels = NULL;
  4007. const struct ieee80211_supported_band *sband;
  4008. const struct iwl_channel_info *ch_info;
  4009. u16 passive_dwell = 0;
  4010. u16 active_dwell = 0;
  4011. int added, i;
  4012. sband = iwl4965_get_hw_mode(priv, band);
  4013. if (!sband)
  4014. return 0;
  4015. channels = sband->channels;
  4016. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  4017. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  4018. for (i = 0, added = 0; i < sband->n_channels; i++) {
  4019. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  4020. continue;
  4021. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  4022. le16_to_cpu(priv->active_rxon.channel)) {
  4023. if (iwl_is_associated(priv)) {
  4024. IWL_DEBUG_SCAN
  4025. ("Skipping current channel %d\n",
  4026. le16_to_cpu(priv->active_rxon.channel));
  4027. continue;
  4028. }
  4029. } else if (priv->only_active_channel)
  4030. continue;
  4031. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  4032. ch_info = iwl_get_channel_info(priv, band,
  4033. scan_ch->channel);
  4034. if (!is_channel_valid(ch_info)) {
  4035. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4036. scan_ch->channel);
  4037. continue;
  4038. }
  4039. if (!is_active || is_channel_passive(ch_info) ||
  4040. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  4041. scan_ch->type = 0; /* passive */
  4042. else
  4043. scan_ch->type = 1; /* active */
  4044. if (scan_ch->type & 1)
  4045. scan_ch->type |= (direct_mask << 1);
  4046. if (is_channel_narrow(ch_info))
  4047. scan_ch->type |= (1 << 7);
  4048. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4049. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4050. /* Set txpower levels to defaults */
  4051. scan_ch->tpc.dsp_atten = 110;
  4052. /* scan_pwr_info->tpc.dsp_atten; */
  4053. /*scan_pwr_info->tpc.tx_gain; */
  4054. if (band == IEEE80211_BAND_5GHZ)
  4055. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4056. else {
  4057. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4058. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4059. * power level:
  4060. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4061. */
  4062. }
  4063. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4064. scan_ch->channel,
  4065. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4066. (scan_ch->type & 1) ?
  4067. active_dwell : passive_dwell);
  4068. scan_ch++;
  4069. added++;
  4070. }
  4071. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4072. return added;
  4073. }
  4074. static void iwl4965_init_hw_rates(struct iwl_priv *priv,
  4075. struct ieee80211_rate *rates)
  4076. {
  4077. int i;
  4078. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4079. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  4080. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  4081. rates[i].hw_value_short = i;
  4082. rates[i].flags = 0;
  4083. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  4084. /*
  4085. * If CCK != 1M then set short preamble rate flag.
  4086. */
  4087. rates[i].flags |=
  4088. (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  4089. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  4090. }
  4091. }
  4092. }
  4093. /**
  4094. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4095. */
  4096. int iwl4965_init_geos(struct iwl_priv *priv)
  4097. {
  4098. struct iwl_channel_info *ch;
  4099. struct ieee80211_supported_band *sband;
  4100. struct ieee80211_channel *channels;
  4101. struct ieee80211_channel *geo_ch;
  4102. struct ieee80211_rate *rates;
  4103. int i = 0;
  4104. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4105. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4106. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4107. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4108. return 0;
  4109. }
  4110. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4111. priv->channel_count, GFP_KERNEL);
  4112. if (!channels)
  4113. return -ENOMEM;
  4114. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4115. GFP_KERNEL);
  4116. if (!rates) {
  4117. kfree(channels);
  4118. return -ENOMEM;
  4119. }
  4120. /* 5.2GHz channels start after the 2.4GHz channels */
  4121. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4122. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4123. /* just OFDM */
  4124. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4125. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4126. iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_5GHZ);
  4127. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4128. sband->channels = channels;
  4129. /* OFDM & CCK */
  4130. sband->bitrates = rates;
  4131. sband->n_bitrates = IWL_RATE_COUNT;
  4132. iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_2GHZ);
  4133. priv->ieee_channels = channels;
  4134. priv->ieee_rates = rates;
  4135. iwl4965_init_hw_rates(priv, rates);
  4136. for (i = 0; i < priv->channel_count; i++) {
  4137. ch = &priv->channel_info[i];
  4138. /* FIXME: might be removed if scan is OK */
  4139. if (!is_channel_valid(ch))
  4140. continue;
  4141. if (is_channel_a_band(ch))
  4142. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4143. else
  4144. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4145. geo_ch = &sband->channels[sband->n_channels++];
  4146. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4147. geo_ch->max_power = ch->max_power_avg;
  4148. geo_ch->max_antenna_gain = 0xff;
  4149. geo_ch->hw_value = ch->channel;
  4150. if (is_channel_valid(ch)) {
  4151. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4152. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4153. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4154. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4155. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4156. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4157. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4158. priv->max_channel_txpower_limit =
  4159. ch->max_power_avg;
  4160. } else {
  4161. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4162. }
  4163. /* Save flags for reg domain usage */
  4164. geo_ch->orig_flags = geo_ch->flags;
  4165. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4166. ch->channel, geo_ch->center_freq,
  4167. is_channel_a_band(ch) ? "5.2" : "2.4",
  4168. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4169. "restricted" : "valid",
  4170. geo_ch->flags);
  4171. }
  4172. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  4173. priv->cfg->sku & IWL_SKU_A) {
  4174. printk(KERN_INFO DRV_NAME
  4175. ": Incorrectly detected BG card as ABG. Please send "
  4176. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4177. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4178. priv->cfg->sku &= ~IWL_SKU_A;
  4179. }
  4180. printk(KERN_INFO DRV_NAME
  4181. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4182. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4183. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4184. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  4185. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  4186. &priv->bands[IEEE80211_BAND_2GHZ];
  4187. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  4188. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  4189. &priv->bands[IEEE80211_BAND_5GHZ];
  4190. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4191. return 0;
  4192. }
  4193. /*
  4194. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4195. */
  4196. void iwl4965_free_geos(struct iwl_priv *priv)
  4197. {
  4198. kfree(priv->ieee_channels);
  4199. kfree(priv->ieee_rates);
  4200. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4201. }
  4202. /******************************************************************************
  4203. *
  4204. * uCode download functions
  4205. *
  4206. ******************************************************************************/
  4207. static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
  4208. {
  4209. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4210. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4211. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4212. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4213. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4214. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4215. }
  4216. /**
  4217. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4218. * looking at all data.
  4219. */
  4220. static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  4221. u32 len)
  4222. {
  4223. u32 val;
  4224. u32 save_len = len;
  4225. int rc = 0;
  4226. u32 errcnt;
  4227. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4228. rc = iwl_grab_nic_access(priv);
  4229. if (rc)
  4230. return rc;
  4231. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4232. errcnt = 0;
  4233. for (; len > 0; len -= sizeof(u32), image++) {
  4234. /* read data comes through single port, auto-incr addr */
  4235. /* NOTE: Use the debugless read so we don't flood kernel log
  4236. * if IWL_DL_IO is set */
  4237. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4238. if (val != le32_to_cpu(*image)) {
  4239. IWL_ERROR("uCode INST section is invalid at "
  4240. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4241. save_len - len, val, le32_to_cpu(*image));
  4242. rc = -EIO;
  4243. errcnt++;
  4244. if (errcnt >= 20)
  4245. break;
  4246. }
  4247. }
  4248. iwl_release_nic_access(priv);
  4249. if (!errcnt)
  4250. IWL_DEBUG_INFO
  4251. ("ucode image in INSTRUCTION memory is good\n");
  4252. return rc;
  4253. }
  4254. /**
  4255. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4256. * using sample data 100 bytes apart. If these sample points are good,
  4257. * it's a pretty good bet that everything between them is good, too.
  4258. */
  4259. static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4260. {
  4261. u32 val;
  4262. int rc = 0;
  4263. u32 errcnt = 0;
  4264. u32 i;
  4265. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4266. rc = iwl_grab_nic_access(priv);
  4267. if (rc)
  4268. return rc;
  4269. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4270. /* read data comes through single port, auto-incr addr */
  4271. /* NOTE: Use the debugless read so we don't flood kernel log
  4272. * if IWL_DL_IO is set */
  4273. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4274. i + RTC_INST_LOWER_BOUND);
  4275. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4276. if (val != le32_to_cpu(*image)) {
  4277. #if 0 /* Enable this if you want to see details */
  4278. IWL_ERROR("uCode INST section is invalid at "
  4279. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4280. i, val, *image);
  4281. #endif
  4282. rc = -EIO;
  4283. errcnt++;
  4284. if (errcnt >= 3)
  4285. break;
  4286. }
  4287. }
  4288. iwl_release_nic_access(priv);
  4289. return rc;
  4290. }
  4291. /**
  4292. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4293. * and verify its contents
  4294. */
  4295. static int iwl4965_verify_ucode(struct iwl_priv *priv)
  4296. {
  4297. __le32 *image;
  4298. u32 len;
  4299. int rc = 0;
  4300. /* Try bootstrap */
  4301. image = (__le32 *)priv->ucode_boot.v_addr;
  4302. len = priv->ucode_boot.len;
  4303. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4304. if (rc == 0) {
  4305. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4306. return 0;
  4307. }
  4308. /* Try initialize */
  4309. image = (__le32 *)priv->ucode_init.v_addr;
  4310. len = priv->ucode_init.len;
  4311. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4312. if (rc == 0) {
  4313. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4314. return 0;
  4315. }
  4316. /* Try runtime/protocol */
  4317. image = (__le32 *)priv->ucode_code.v_addr;
  4318. len = priv->ucode_code.len;
  4319. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4320. if (rc == 0) {
  4321. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4322. return 0;
  4323. }
  4324. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4325. /* Since nothing seems to match, show first several data entries in
  4326. * instruction SRAM, so maybe visual inspection will give a clue.
  4327. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4328. image = (__le32 *)priv->ucode_boot.v_addr;
  4329. len = priv->ucode_boot.len;
  4330. rc = iwl4965_verify_inst_full(priv, image, len);
  4331. return rc;
  4332. }
  4333. static void iwl4965_nic_start(struct iwl_priv *priv)
  4334. {
  4335. /* Remove all resets to allow NIC to operate */
  4336. iwl_write32(priv, CSR_RESET, 0);
  4337. }
  4338. /**
  4339. * iwl4965_read_ucode - Read uCode images from disk file.
  4340. *
  4341. * Copy into buffers for card to fetch via bus-mastering
  4342. */
  4343. static int iwl4965_read_ucode(struct iwl_priv *priv)
  4344. {
  4345. struct iwl4965_ucode *ucode;
  4346. int ret;
  4347. const struct firmware *ucode_raw;
  4348. const char *name = priv->cfg->fw_name;
  4349. u8 *src;
  4350. size_t len;
  4351. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4352. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4353. * request_firmware() is synchronous, file is in memory on return. */
  4354. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4355. if (ret < 0) {
  4356. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  4357. name, ret);
  4358. goto error;
  4359. }
  4360. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4361. name, ucode_raw->size);
  4362. /* Make sure that we got at least our header! */
  4363. if (ucode_raw->size < sizeof(*ucode)) {
  4364. IWL_ERROR("File size way too small!\n");
  4365. ret = -EINVAL;
  4366. goto err_release;
  4367. }
  4368. /* Data from ucode file: header followed by uCode images */
  4369. ucode = (void *)ucode_raw->data;
  4370. ver = le32_to_cpu(ucode->ver);
  4371. inst_size = le32_to_cpu(ucode->inst_size);
  4372. data_size = le32_to_cpu(ucode->data_size);
  4373. init_size = le32_to_cpu(ucode->init_size);
  4374. init_data_size = le32_to_cpu(ucode->init_data_size);
  4375. boot_size = le32_to_cpu(ucode->boot_size);
  4376. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  4377. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  4378. inst_size);
  4379. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  4380. data_size);
  4381. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  4382. init_size);
  4383. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  4384. init_data_size);
  4385. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  4386. boot_size);
  4387. /* Verify size of file vs. image size info in file's header */
  4388. if (ucode_raw->size < sizeof(*ucode) +
  4389. inst_size + data_size + init_size +
  4390. init_data_size + boot_size) {
  4391. IWL_DEBUG_INFO("uCode file size %d too small\n",
  4392. (int)ucode_raw->size);
  4393. ret = -EINVAL;
  4394. goto err_release;
  4395. }
  4396. /* Verify that uCode images will fit in card's SRAM */
  4397. if (inst_size > IWL_MAX_INST_SIZE) {
  4398. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  4399. inst_size);
  4400. ret = -EINVAL;
  4401. goto err_release;
  4402. }
  4403. if (data_size > IWL_MAX_DATA_SIZE) {
  4404. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  4405. data_size);
  4406. ret = -EINVAL;
  4407. goto err_release;
  4408. }
  4409. if (init_size > IWL_MAX_INST_SIZE) {
  4410. IWL_DEBUG_INFO
  4411. ("uCode init instr len %d too large to fit in\n",
  4412. init_size);
  4413. ret = -EINVAL;
  4414. goto err_release;
  4415. }
  4416. if (init_data_size > IWL_MAX_DATA_SIZE) {
  4417. IWL_DEBUG_INFO
  4418. ("uCode init data len %d too large to fit in\n",
  4419. init_data_size);
  4420. ret = -EINVAL;
  4421. goto err_release;
  4422. }
  4423. if (boot_size > IWL_MAX_BSM_SIZE) {
  4424. IWL_DEBUG_INFO
  4425. ("uCode boot instr len %d too large to fit in\n",
  4426. boot_size);
  4427. ret = -EINVAL;
  4428. goto err_release;
  4429. }
  4430. /* Allocate ucode buffers for card's bus-master loading ... */
  4431. /* Runtime instructions and 2 copies of data:
  4432. * 1) unmodified from disk
  4433. * 2) backup cache for save/restore during power-downs */
  4434. priv->ucode_code.len = inst_size;
  4435. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  4436. priv->ucode_data.len = data_size;
  4437. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  4438. priv->ucode_data_backup.len = data_size;
  4439. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4440. /* Initialization instructions and data */
  4441. if (init_size && init_data_size) {
  4442. priv->ucode_init.len = init_size;
  4443. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  4444. priv->ucode_init_data.len = init_data_size;
  4445. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4446. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  4447. goto err_pci_alloc;
  4448. }
  4449. /* Bootstrap (instructions only, no data) */
  4450. if (boot_size) {
  4451. priv->ucode_boot.len = boot_size;
  4452. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4453. if (!priv->ucode_boot.v_addr)
  4454. goto err_pci_alloc;
  4455. }
  4456. /* Copy images into buffers for card's bus-master reads ... */
  4457. /* Runtime instructions (first block of data in file) */
  4458. src = &ucode->data[0];
  4459. len = priv->ucode_code.len;
  4460. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  4461. memcpy(priv->ucode_code.v_addr, src, len);
  4462. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  4463. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  4464. /* Runtime data (2nd block)
  4465. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  4466. src = &ucode->data[inst_size];
  4467. len = priv->ucode_data.len;
  4468. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  4469. memcpy(priv->ucode_data.v_addr, src, len);
  4470. memcpy(priv->ucode_data_backup.v_addr, src, len);
  4471. /* Initialization instructions (3rd block) */
  4472. if (init_size) {
  4473. src = &ucode->data[inst_size + data_size];
  4474. len = priv->ucode_init.len;
  4475. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  4476. len);
  4477. memcpy(priv->ucode_init.v_addr, src, len);
  4478. }
  4479. /* Initialization data (4th block) */
  4480. if (init_data_size) {
  4481. src = &ucode->data[inst_size + data_size + init_size];
  4482. len = priv->ucode_init_data.len;
  4483. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  4484. len);
  4485. memcpy(priv->ucode_init_data.v_addr, src, len);
  4486. }
  4487. /* Bootstrap instructions (5th block) */
  4488. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  4489. len = priv->ucode_boot.len;
  4490. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  4491. memcpy(priv->ucode_boot.v_addr, src, len);
  4492. /* We have our copies now, allow OS release its copies */
  4493. release_firmware(ucode_raw);
  4494. return 0;
  4495. err_pci_alloc:
  4496. IWL_ERROR("failed to allocate pci memory\n");
  4497. ret = -ENOMEM;
  4498. iwl4965_dealloc_ucode_pci(priv);
  4499. err_release:
  4500. release_firmware(ucode_raw);
  4501. error:
  4502. return ret;
  4503. }
  4504. /**
  4505. * iwl4965_set_ucode_ptrs - Set uCode address location
  4506. *
  4507. * Tell initialization uCode where to find runtime uCode.
  4508. *
  4509. * BSM registers initially contain pointers to initialization uCode.
  4510. * We need to replace them to load runtime uCode inst and data,
  4511. * and to save runtime data when powering down.
  4512. */
  4513. static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
  4514. {
  4515. dma_addr_t pinst;
  4516. dma_addr_t pdata;
  4517. int rc = 0;
  4518. unsigned long flags;
  4519. /* bits 35:4 for 4965 */
  4520. pinst = priv->ucode_code.p_addr >> 4;
  4521. pdata = priv->ucode_data_backup.p_addr >> 4;
  4522. spin_lock_irqsave(&priv->lock, flags);
  4523. rc = iwl_grab_nic_access(priv);
  4524. if (rc) {
  4525. spin_unlock_irqrestore(&priv->lock, flags);
  4526. return rc;
  4527. }
  4528. /* Tell bootstrap uCode where to find image to load */
  4529. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4530. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4531. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  4532. priv->ucode_data.len);
  4533. /* Inst bytecount must be last to set up, bit 31 signals uCode
  4534. * that all new ptr/size info is in place */
  4535. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  4536. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  4537. iwl_release_nic_access(priv);
  4538. spin_unlock_irqrestore(&priv->lock, flags);
  4539. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  4540. return rc;
  4541. }
  4542. /**
  4543. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  4544. *
  4545. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  4546. *
  4547. * The 4965 "initialize" ALIVE reply contains calibration data for:
  4548. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  4549. * (3945 does not contain this data).
  4550. *
  4551. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  4552. */
  4553. static void iwl4965_init_alive_start(struct iwl_priv *priv)
  4554. {
  4555. /* Check alive response for "valid" sign from uCode */
  4556. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  4557. /* We had an error bringing up the hardware, so take it
  4558. * all the way back down so we can try again */
  4559. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  4560. goto restart;
  4561. }
  4562. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  4563. * This is a paranoid check, because we would not have gotten the
  4564. * "initialize" alive if code weren't properly loaded. */
  4565. if (iwl4965_verify_ucode(priv)) {
  4566. /* Runtime instruction load was bad;
  4567. * take it all the way back down so we can try again */
  4568. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  4569. goto restart;
  4570. }
  4571. /* Calculate temperature */
  4572. priv->temperature = iwl4965_get_temperature(priv);
  4573. /* Send pointers to protocol/runtime uCode image ... init code will
  4574. * load and launch runtime uCode, which will send us another "Alive"
  4575. * notification. */
  4576. IWL_DEBUG_INFO("Initialization Alive received.\n");
  4577. if (iwl4965_set_ucode_ptrs(priv)) {
  4578. /* Runtime instruction load won't happen;
  4579. * take it all the way back down so we can try again */
  4580. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  4581. goto restart;
  4582. }
  4583. return;
  4584. restart:
  4585. queue_work(priv->workqueue, &priv->restart);
  4586. }
  4587. /**
  4588. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  4589. * from protocol/runtime uCode (initialization uCode's
  4590. * Alive gets handled by iwl4965_init_alive_start()).
  4591. */
  4592. static void iwl4965_alive_start(struct iwl_priv *priv)
  4593. {
  4594. int ret = 0;
  4595. IWL_DEBUG_INFO("Runtime Alive received.\n");
  4596. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  4597. /* We had an error bringing up the hardware, so take it
  4598. * all the way back down so we can try again */
  4599. IWL_DEBUG_INFO("Alive failed.\n");
  4600. goto restart;
  4601. }
  4602. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  4603. * This is a paranoid check, because we would not have gotten the
  4604. * "runtime" alive if code weren't properly loaded. */
  4605. if (iwl4965_verify_ucode(priv)) {
  4606. /* Runtime instruction load was bad;
  4607. * take it all the way back down so we can try again */
  4608. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  4609. goto restart;
  4610. }
  4611. iwlcore_clear_stations_table(priv);
  4612. ret = priv->cfg->ops->lib->alive_notify(priv);
  4613. if (ret) {
  4614. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  4615. ret);
  4616. goto restart;
  4617. }
  4618. /* After the ALIVE response, we can send host commands to 4965 uCode */
  4619. set_bit(STATUS_ALIVE, &priv->status);
  4620. /* Clear out the uCode error bit if it is set */
  4621. clear_bit(STATUS_FW_ERROR, &priv->status);
  4622. if (iwl_is_rfkill(priv))
  4623. return;
  4624. ieee80211_start_queues(priv->hw);
  4625. priv->active_rate = priv->rates_mask;
  4626. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  4627. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  4628. if (iwl_is_associated(priv)) {
  4629. struct iwl4965_rxon_cmd *active_rxon =
  4630. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  4631. memcpy(&priv->staging_rxon, &priv->active_rxon,
  4632. sizeof(priv->staging_rxon));
  4633. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4634. } else {
  4635. /* Initialize our rx_config data */
  4636. iwl4965_connection_init_rx_config(priv);
  4637. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  4638. }
  4639. /* Configure Bluetooth device coexistence support */
  4640. iwl4965_send_bt_config(priv);
  4641. /* Configure the adapter for unassociated operation */
  4642. iwl4965_commit_rxon(priv);
  4643. /* At this point, the NIC is initialized and operational */
  4644. priv->notif_missed_beacons = 0;
  4645. iwl4965_rf_kill_ct_config(priv);
  4646. iwl_leds_register(priv);
  4647. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  4648. set_bit(STATUS_READY, &priv->status);
  4649. wake_up_interruptible(&priv->wait_command_queue);
  4650. if (priv->error_recovering)
  4651. iwl4965_error_recovery(priv);
  4652. iwlcore_low_level_notify(priv, IWLCORE_START_EVT);
  4653. ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
  4654. return;
  4655. restart:
  4656. queue_work(priv->workqueue, &priv->restart);
  4657. }
  4658. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
  4659. static void __iwl4965_down(struct iwl_priv *priv)
  4660. {
  4661. unsigned long flags;
  4662. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  4663. struct ieee80211_conf *conf = NULL;
  4664. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  4665. conf = ieee80211_get_hw_conf(priv->hw);
  4666. if (!exit_pending)
  4667. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4668. iwl_leds_unregister(priv);
  4669. iwlcore_low_level_notify(priv, IWLCORE_STOP_EVT);
  4670. iwlcore_clear_stations_table(priv);
  4671. /* Unblock any waiting calls */
  4672. wake_up_interruptible_all(&priv->wait_command_queue);
  4673. /* Wipe out the EXIT_PENDING status bit if we are not actually
  4674. * exiting the module */
  4675. if (!exit_pending)
  4676. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4677. /* stop and reset the on-board processor */
  4678. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  4679. /* tell the device to stop sending interrupts */
  4680. spin_lock_irqsave(&priv->lock, flags);
  4681. iwl4965_disable_interrupts(priv);
  4682. spin_unlock_irqrestore(&priv->lock, flags);
  4683. iwl_synchronize_irq(priv);
  4684. if (priv->mac80211_registered)
  4685. ieee80211_stop_queues(priv->hw);
  4686. /* If we have not previously called iwl4965_init() then
  4687. * clear all bits but the RF Kill and SUSPEND bits and return */
  4688. if (!iwl_is_init(priv)) {
  4689. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4690. STATUS_RF_KILL_HW |
  4691. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4692. STATUS_RF_KILL_SW |
  4693. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4694. STATUS_GEO_CONFIGURED |
  4695. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4696. STATUS_IN_SUSPEND;
  4697. goto exit;
  4698. }
  4699. /* ...otherwise clear out all the status bits but the RF Kill and
  4700. * SUSPEND bits and continue taking the NIC down. */
  4701. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4702. STATUS_RF_KILL_HW |
  4703. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4704. STATUS_RF_KILL_SW |
  4705. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4706. STATUS_GEO_CONFIGURED |
  4707. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4708. STATUS_IN_SUSPEND |
  4709. test_bit(STATUS_FW_ERROR, &priv->status) <<
  4710. STATUS_FW_ERROR;
  4711. spin_lock_irqsave(&priv->lock, flags);
  4712. iwl_clear_bit(priv, CSR_GP_CNTRL,
  4713. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4714. spin_unlock_irqrestore(&priv->lock, flags);
  4715. iwl4965_hw_txq_ctx_stop(priv);
  4716. iwl4965_hw_rxq_stop(priv);
  4717. spin_lock_irqsave(&priv->lock, flags);
  4718. if (!iwl_grab_nic_access(priv)) {
  4719. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  4720. APMG_CLK_VAL_DMA_CLK_RQT);
  4721. iwl_release_nic_access(priv);
  4722. }
  4723. spin_unlock_irqrestore(&priv->lock, flags);
  4724. udelay(5);
  4725. iwl4965_hw_nic_stop_master(priv);
  4726. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  4727. iwl4965_hw_nic_reset(priv);
  4728. exit:
  4729. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  4730. if (priv->ibss_beacon)
  4731. dev_kfree_skb(priv->ibss_beacon);
  4732. priv->ibss_beacon = NULL;
  4733. /* clear out any free frames */
  4734. iwl4965_clear_free_frames(priv);
  4735. }
  4736. static void iwl4965_down(struct iwl_priv *priv)
  4737. {
  4738. mutex_lock(&priv->mutex);
  4739. __iwl4965_down(priv);
  4740. mutex_unlock(&priv->mutex);
  4741. iwl4965_cancel_deferred_work(priv);
  4742. }
  4743. #define MAX_HW_RESTARTS 5
  4744. static int __iwl4965_up(struct iwl_priv *priv)
  4745. {
  4746. int i;
  4747. int ret;
  4748. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4749. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  4750. return -EIO;
  4751. }
  4752. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  4753. IWL_WARNING("Radio disabled by SW RF kill (module "
  4754. "parameter)\n");
  4755. iwl_rfkill_set_hw_state(priv);
  4756. return -ENODEV;
  4757. }
  4758. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  4759. IWL_ERROR("ucode not available for device bringup\n");
  4760. return -EIO;
  4761. }
  4762. /* If platform's RF_KILL switch is NOT set to KILL */
  4763. if (iwl_read32(priv, CSR_GP_CNTRL) &
  4764. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  4765. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4766. else {
  4767. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4768. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  4769. iwl_rfkill_set_hw_state(priv);
  4770. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  4771. return -ENODEV;
  4772. }
  4773. }
  4774. iwl_rfkill_set_hw_state(priv);
  4775. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4776. ret = priv->cfg->ops->lib->hw_nic_init(priv);
  4777. if (ret) {
  4778. IWL_ERROR("Unable to init nic\n");
  4779. return ret;
  4780. }
  4781. /* make sure rfkill handshake bits are cleared */
  4782. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4783. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  4784. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  4785. /* clear (again), then enable host interrupts */
  4786. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4787. iwl4965_enable_interrupts(priv);
  4788. /* really make sure rfkill handshake bits are cleared */
  4789. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4790. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4791. /* Copy original ucode data image from disk into backup cache.
  4792. * This will be used to initialize the on-board processor's
  4793. * data SRAM for a clean start when the runtime program first loads. */
  4794. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  4795. priv->ucode_data.len);
  4796. /* We return success when we resume from suspend and rf_kill is on. */
  4797. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  4798. return 0;
  4799. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  4800. iwlcore_clear_stations_table(priv);
  4801. /* load bootstrap state machine,
  4802. * load bootstrap program into processor's memory,
  4803. * prepare to load the "initialize" uCode */
  4804. ret = priv->cfg->ops->lib->load_ucode(priv);
  4805. if (ret) {
  4806. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
  4807. continue;
  4808. }
  4809. /* start card; "initialize" will load runtime ucode */
  4810. iwl4965_nic_start(priv);
  4811. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  4812. return 0;
  4813. }
  4814. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4815. __iwl4965_down(priv);
  4816. /* tried to restart and config the device for as long as our
  4817. * patience could withstand */
  4818. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  4819. return -EIO;
  4820. }
  4821. /*****************************************************************************
  4822. *
  4823. * Workqueue callbacks
  4824. *
  4825. *****************************************************************************/
  4826. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  4827. {
  4828. struct iwl_priv *priv =
  4829. container_of(data, struct iwl_priv, init_alive_start.work);
  4830. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4831. return;
  4832. mutex_lock(&priv->mutex);
  4833. iwl4965_init_alive_start(priv);
  4834. mutex_unlock(&priv->mutex);
  4835. }
  4836. static void iwl4965_bg_alive_start(struct work_struct *data)
  4837. {
  4838. struct iwl_priv *priv =
  4839. container_of(data, struct iwl_priv, alive_start.work);
  4840. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4841. return;
  4842. mutex_lock(&priv->mutex);
  4843. iwl4965_alive_start(priv);
  4844. mutex_unlock(&priv->mutex);
  4845. }
  4846. static void iwl4965_bg_rf_kill(struct work_struct *work)
  4847. {
  4848. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  4849. wake_up_interruptible(&priv->wait_command_queue);
  4850. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4851. return;
  4852. mutex_lock(&priv->mutex);
  4853. if (!iwl_is_rfkill(priv)) {
  4854. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  4855. "HW and/or SW RF Kill no longer active, restarting "
  4856. "device\n");
  4857. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  4858. queue_work(priv->workqueue, &priv->restart);
  4859. } else {
  4860. /* make sure mac80211 stop sending Tx frame */
  4861. if (priv->mac80211_registered)
  4862. ieee80211_stop_queues(priv->hw);
  4863. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  4864. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  4865. "disabled by SW switch\n");
  4866. else
  4867. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  4868. "Kill switch must be turned off for "
  4869. "wireless networking to work.\n");
  4870. }
  4871. iwl_rfkill_set_hw_state(priv);
  4872. mutex_unlock(&priv->mutex);
  4873. }
  4874. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  4875. static void iwl4965_bg_scan_check(struct work_struct *data)
  4876. {
  4877. struct iwl_priv *priv =
  4878. container_of(data, struct iwl_priv, scan_check.work);
  4879. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4880. return;
  4881. mutex_lock(&priv->mutex);
  4882. if (test_bit(STATUS_SCANNING, &priv->status) ||
  4883. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4884. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  4885. "Scan completion watchdog resetting adapter (%dms)\n",
  4886. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  4887. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  4888. iwl4965_send_scan_abort(priv);
  4889. }
  4890. mutex_unlock(&priv->mutex);
  4891. }
  4892. static void iwl4965_bg_request_scan(struct work_struct *data)
  4893. {
  4894. struct iwl_priv *priv =
  4895. container_of(data, struct iwl_priv, request_scan);
  4896. struct iwl_host_cmd cmd = {
  4897. .id = REPLY_SCAN_CMD,
  4898. .len = sizeof(struct iwl4965_scan_cmd),
  4899. .meta.flags = CMD_SIZE_HUGE,
  4900. };
  4901. struct iwl4965_scan_cmd *scan;
  4902. struct ieee80211_conf *conf = NULL;
  4903. u16 cmd_len;
  4904. enum ieee80211_band band;
  4905. u8 direct_mask;
  4906. int ret = 0;
  4907. conf = ieee80211_get_hw_conf(priv->hw);
  4908. mutex_lock(&priv->mutex);
  4909. if (!iwl_is_ready(priv)) {
  4910. IWL_WARNING("request scan called when driver not ready.\n");
  4911. goto done;
  4912. }
  4913. /* Make sure the scan wasn't cancelled before this queued work
  4914. * was given the chance to run... */
  4915. if (!test_bit(STATUS_SCANNING, &priv->status))
  4916. goto done;
  4917. /* This should never be called or scheduled if there is currently
  4918. * a scan active in the hardware. */
  4919. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  4920. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  4921. "Ignoring second request.\n");
  4922. ret = -EIO;
  4923. goto done;
  4924. }
  4925. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4926. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  4927. goto done;
  4928. }
  4929. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4930. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  4931. goto done;
  4932. }
  4933. if (iwl_is_rfkill(priv)) {
  4934. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  4935. goto done;
  4936. }
  4937. if (!test_bit(STATUS_READY, &priv->status)) {
  4938. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  4939. goto done;
  4940. }
  4941. if (!priv->scan_bands) {
  4942. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  4943. goto done;
  4944. }
  4945. if (!priv->scan) {
  4946. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  4947. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  4948. if (!priv->scan) {
  4949. ret = -ENOMEM;
  4950. goto done;
  4951. }
  4952. }
  4953. scan = priv->scan;
  4954. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  4955. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  4956. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  4957. if (iwl_is_associated(priv)) {
  4958. u16 interval = 0;
  4959. u32 extra;
  4960. u32 suspend_time = 100;
  4961. u32 scan_suspend_time = 100;
  4962. unsigned long flags;
  4963. IWL_DEBUG_INFO("Scanning while associated...\n");
  4964. spin_lock_irqsave(&priv->lock, flags);
  4965. interval = priv->beacon_int;
  4966. spin_unlock_irqrestore(&priv->lock, flags);
  4967. scan->suspend_time = 0;
  4968. scan->max_out_time = cpu_to_le32(200 * 1024);
  4969. if (!interval)
  4970. interval = suspend_time;
  4971. extra = (suspend_time / interval) << 22;
  4972. scan_suspend_time = (extra |
  4973. ((suspend_time % interval) * 1024));
  4974. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  4975. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  4976. scan_suspend_time, interval);
  4977. }
  4978. /* We should add the ability for user to lock to PASSIVE ONLY */
  4979. if (priv->one_direct_scan) {
  4980. IWL_DEBUG_SCAN
  4981. ("Kicking off one direct scan for '%s'\n",
  4982. iwl4965_escape_essid(priv->direct_ssid,
  4983. priv->direct_ssid_len));
  4984. scan->direct_scan[0].id = WLAN_EID_SSID;
  4985. scan->direct_scan[0].len = priv->direct_ssid_len;
  4986. memcpy(scan->direct_scan[0].ssid,
  4987. priv->direct_ssid, priv->direct_ssid_len);
  4988. direct_mask = 1;
  4989. } else if (!iwl_is_associated(priv) && priv->essid_len) {
  4990. scan->direct_scan[0].id = WLAN_EID_SSID;
  4991. scan->direct_scan[0].len = priv->essid_len;
  4992. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  4993. direct_mask = 1;
  4994. } else {
  4995. direct_mask = 0;
  4996. }
  4997. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  4998. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  4999. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5000. switch (priv->scan_bands) {
  5001. case 2:
  5002. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5003. scan->tx_cmd.rate_n_flags =
  5004. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5005. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5006. scan->good_CRC_th = 0;
  5007. band = IEEE80211_BAND_2GHZ;
  5008. break;
  5009. case 1:
  5010. scan->tx_cmd.rate_n_flags =
  5011. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5012. RATE_MCS_ANT_B_MSK);
  5013. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5014. band = IEEE80211_BAND_5GHZ;
  5015. break;
  5016. default:
  5017. IWL_WARNING("Invalid scan band count\n");
  5018. goto done;
  5019. }
  5020. /* We don't build a direct scan probe request; the uCode will do
  5021. * that based on the direct_mask added to each channel entry */
  5022. cmd_len = iwl4965_fill_probe_req(priv, band,
  5023. (struct ieee80211_mgmt *)scan->data,
  5024. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  5025. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  5026. /* select Rx chains */
  5027. /* Force use of chains B and C (0x6) for scan Rx.
  5028. * Avoid A (0x1) because of its off-channel reception on A-band.
  5029. * MIMO is not used here, but value is required to make uCode happy. */
  5030. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5031. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5032. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5033. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5034. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5035. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5036. if (direct_mask) {
  5037. IWL_DEBUG_SCAN
  5038. ("Initiating direct scan for %s.\n",
  5039. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5040. scan->channel_count =
  5041. iwl4965_get_channels_for_scan(
  5042. priv, band, 1, /* active */
  5043. direct_mask,
  5044. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5045. } else {
  5046. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5047. scan->channel_count =
  5048. iwl4965_get_channels_for_scan(
  5049. priv, band, 0, /* passive */
  5050. direct_mask,
  5051. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5052. }
  5053. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5054. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5055. cmd.data = scan;
  5056. scan->len = cpu_to_le16(cmd.len);
  5057. set_bit(STATUS_SCAN_HW, &priv->status);
  5058. ret = iwl_send_cmd_sync(priv, &cmd);
  5059. if (ret)
  5060. goto done;
  5061. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5062. IWL_SCAN_CHECK_WATCHDOG);
  5063. mutex_unlock(&priv->mutex);
  5064. return;
  5065. done:
  5066. /* inform mac80211 scan aborted */
  5067. queue_work(priv->workqueue, &priv->scan_completed);
  5068. mutex_unlock(&priv->mutex);
  5069. }
  5070. static void iwl4965_bg_up(struct work_struct *data)
  5071. {
  5072. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5073. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5074. return;
  5075. mutex_lock(&priv->mutex);
  5076. __iwl4965_up(priv);
  5077. mutex_unlock(&priv->mutex);
  5078. }
  5079. static void iwl4965_bg_restart(struct work_struct *data)
  5080. {
  5081. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5082. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5083. return;
  5084. iwl4965_down(priv);
  5085. queue_work(priv->workqueue, &priv->up);
  5086. }
  5087. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5088. {
  5089. struct iwl_priv *priv =
  5090. container_of(data, struct iwl_priv, rx_replenish);
  5091. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5092. return;
  5093. mutex_lock(&priv->mutex);
  5094. iwl4965_rx_replenish(priv);
  5095. mutex_unlock(&priv->mutex);
  5096. }
  5097. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5098. static void iwl4965_bg_post_associate(struct work_struct *data)
  5099. {
  5100. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5101. post_associate.work);
  5102. struct ieee80211_conf *conf = NULL;
  5103. int ret = 0;
  5104. DECLARE_MAC_BUF(mac);
  5105. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5106. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5107. return;
  5108. }
  5109. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5110. priv->assoc_id,
  5111. print_mac(mac, priv->active_rxon.bssid_addr));
  5112. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5113. return;
  5114. mutex_lock(&priv->mutex);
  5115. if (!priv->vif || !priv->is_open) {
  5116. mutex_unlock(&priv->mutex);
  5117. return;
  5118. }
  5119. iwl4965_scan_cancel_timeout(priv, 200);
  5120. conf = ieee80211_get_hw_conf(priv->hw);
  5121. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5122. iwl4965_commit_rxon(priv);
  5123. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5124. iwl4965_setup_rxon_timing(priv);
  5125. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5126. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5127. if (ret)
  5128. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5129. "Attempting to continue.\n");
  5130. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5131. #ifdef CONFIG_IWL4965_HT
  5132. if (priv->current_ht_config.is_ht)
  5133. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5134. #endif /* CONFIG_IWL4965_HT*/
  5135. iwl4965_set_rxon_chain(priv);
  5136. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5137. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5138. priv->assoc_id, priv->beacon_int);
  5139. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5140. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5141. else
  5142. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5143. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5144. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5145. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5146. else
  5147. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5148. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5149. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5150. }
  5151. iwl4965_commit_rxon(priv);
  5152. switch (priv->iw_mode) {
  5153. case IEEE80211_IF_TYPE_STA:
  5154. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5155. break;
  5156. case IEEE80211_IF_TYPE_IBSS:
  5157. /* clear out the station table */
  5158. iwlcore_clear_stations_table(priv);
  5159. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5160. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5161. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5162. iwl4965_send_beacon_cmd(priv);
  5163. break;
  5164. default:
  5165. IWL_ERROR("%s Should not be called in %d mode\n",
  5166. __FUNCTION__, priv->iw_mode);
  5167. break;
  5168. }
  5169. iwl4965_sequence_reset(priv);
  5170. #ifdef CONFIG_IWL4965_SENSITIVITY
  5171. /* Enable Rx differential gain and sensitivity calibrations */
  5172. iwl4965_chain_noise_reset(priv);
  5173. priv->start_calib = 1;
  5174. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5175. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5176. priv->assoc_station_added = 1;
  5177. iwl4965_activate_qos(priv, 0);
  5178. /* we have just associated, don't start scan too early */
  5179. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5180. mutex_unlock(&priv->mutex);
  5181. }
  5182. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5183. {
  5184. struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
  5185. if (!iwl_is_ready(priv))
  5186. return;
  5187. mutex_lock(&priv->mutex);
  5188. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5189. iwl4965_send_scan_abort(priv);
  5190. mutex_unlock(&priv->mutex);
  5191. }
  5192. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5193. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5194. {
  5195. struct iwl_priv *priv =
  5196. container_of(work, struct iwl_priv, scan_completed);
  5197. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5198. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5199. return;
  5200. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5201. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5202. ieee80211_scan_completed(priv->hw);
  5203. /* Since setting the TXPOWER may have been deferred while
  5204. * performing the scan, fire one off */
  5205. mutex_lock(&priv->mutex);
  5206. iwl4965_hw_reg_send_txpower(priv);
  5207. mutex_unlock(&priv->mutex);
  5208. }
  5209. /*****************************************************************************
  5210. *
  5211. * mac80211 entry point functions
  5212. *
  5213. *****************************************************************************/
  5214. #define UCODE_READY_TIMEOUT (2 * HZ)
  5215. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5216. {
  5217. struct iwl_priv *priv = hw->priv;
  5218. int ret;
  5219. IWL_DEBUG_MAC80211("enter\n");
  5220. if (pci_enable_device(priv->pci_dev)) {
  5221. IWL_ERROR("Fail to pci_enable_device\n");
  5222. return -ENODEV;
  5223. }
  5224. pci_restore_state(priv->pci_dev);
  5225. pci_enable_msi(priv->pci_dev);
  5226. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5227. DRV_NAME, priv);
  5228. if (ret) {
  5229. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5230. goto out_disable_msi;
  5231. }
  5232. /* we should be verifying the device is ready to be opened */
  5233. mutex_lock(&priv->mutex);
  5234. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5235. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5236. * ucode filename and max sizes are card-specific. */
  5237. if (!priv->ucode_code.len) {
  5238. ret = iwl4965_read_ucode(priv);
  5239. if (ret) {
  5240. IWL_ERROR("Could not read microcode: %d\n", ret);
  5241. mutex_unlock(&priv->mutex);
  5242. goto out_release_irq;
  5243. }
  5244. }
  5245. ret = __iwl4965_up(priv);
  5246. mutex_unlock(&priv->mutex);
  5247. if (ret)
  5248. goto out_release_irq;
  5249. IWL_DEBUG_INFO("Start UP work done.\n");
  5250. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5251. return 0;
  5252. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5253. * mac80211 will not be run successfully. */
  5254. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5255. test_bit(STATUS_READY, &priv->status),
  5256. UCODE_READY_TIMEOUT);
  5257. if (!ret) {
  5258. if (!test_bit(STATUS_READY, &priv->status)) {
  5259. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5260. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5261. ret = -ETIMEDOUT;
  5262. goto out_release_irq;
  5263. }
  5264. }
  5265. priv->is_open = 1;
  5266. IWL_DEBUG_MAC80211("leave\n");
  5267. return 0;
  5268. out_release_irq:
  5269. free_irq(priv->pci_dev->irq, priv);
  5270. out_disable_msi:
  5271. pci_disable_msi(priv->pci_dev);
  5272. pci_disable_device(priv->pci_dev);
  5273. priv->is_open = 0;
  5274. IWL_DEBUG_MAC80211("leave - failed\n");
  5275. return ret;
  5276. }
  5277. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5278. {
  5279. struct iwl_priv *priv = hw->priv;
  5280. IWL_DEBUG_MAC80211("enter\n");
  5281. if (!priv->is_open) {
  5282. IWL_DEBUG_MAC80211("leave - skip\n");
  5283. return;
  5284. }
  5285. priv->is_open = 0;
  5286. if (iwl_is_ready_rf(priv)) {
  5287. /* stop mac, cancel any scan request and clear
  5288. * RXON_FILTER_ASSOC_MSK BIT
  5289. */
  5290. mutex_lock(&priv->mutex);
  5291. iwl4965_scan_cancel_timeout(priv, 100);
  5292. cancel_delayed_work(&priv->post_associate);
  5293. mutex_unlock(&priv->mutex);
  5294. }
  5295. iwl4965_down(priv);
  5296. flush_workqueue(priv->workqueue);
  5297. free_irq(priv->pci_dev->irq, priv);
  5298. pci_disable_msi(priv->pci_dev);
  5299. pci_save_state(priv->pci_dev);
  5300. pci_disable_device(priv->pci_dev);
  5301. IWL_DEBUG_MAC80211("leave\n");
  5302. }
  5303. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5304. struct ieee80211_tx_control *ctl)
  5305. {
  5306. struct iwl_priv *priv = hw->priv;
  5307. IWL_DEBUG_MAC80211("enter\n");
  5308. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5309. IWL_DEBUG_MAC80211("leave - monitor\n");
  5310. return -1;
  5311. }
  5312. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5313. ctl->tx_rate->bitrate);
  5314. if (iwl4965_tx_skb(priv, skb, ctl))
  5315. dev_kfree_skb_any(skb);
  5316. IWL_DEBUG_MAC80211("leave\n");
  5317. return 0;
  5318. }
  5319. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  5320. struct ieee80211_if_init_conf *conf)
  5321. {
  5322. struct iwl_priv *priv = hw->priv;
  5323. unsigned long flags;
  5324. DECLARE_MAC_BUF(mac);
  5325. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  5326. if (priv->vif) {
  5327. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  5328. return -EOPNOTSUPP;
  5329. }
  5330. spin_lock_irqsave(&priv->lock, flags);
  5331. priv->vif = conf->vif;
  5332. spin_unlock_irqrestore(&priv->lock, flags);
  5333. mutex_lock(&priv->mutex);
  5334. if (conf->mac_addr) {
  5335. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  5336. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  5337. }
  5338. if (iwl_is_ready(priv))
  5339. iwl4965_set_mode(priv, conf->type);
  5340. mutex_unlock(&priv->mutex);
  5341. IWL_DEBUG_MAC80211("leave\n");
  5342. return 0;
  5343. }
  5344. /**
  5345. * iwl4965_mac_config - mac80211 config callback
  5346. *
  5347. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5348. * be set inappropriately and the driver currently sets the hardware up to
  5349. * use it whenever needed.
  5350. */
  5351. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5352. {
  5353. struct iwl_priv *priv = hw->priv;
  5354. const struct iwl_channel_info *ch_info;
  5355. unsigned long flags;
  5356. int ret = 0;
  5357. mutex_lock(&priv->mutex);
  5358. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  5359. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  5360. if (!iwl_is_ready(priv)) {
  5361. IWL_DEBUG_MAC80211("leave - not ready\n");
  5362. ret = -EIO;
  5363. goto out;
  5364. }
  5365. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  5366. test_bit(STATUS_SCANNING, &priv->status))) {
  5367. IWL_DEBUG_MAC80211("leave - scanning\n");
  5368. set_bit(STATUS_CONF_PENDING, &priv->status);
  5369. mutex_unlock(&priv->mutex);
  5370. return 0;
  5371. }
  5372. spin_lock_irqsave(&priv->lock, flags);
  5373. ch_info = iwl_get_channel_info(priv, conf->channel->band,
  5374. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5375. if (!is_channel_valid(ch_info)) {
  5376. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5377. spin_unlock_irqrestore(&priv->lock, flags);
  5378. ret = -EINVAL;
  5379. goto out;
  5380. }
  5381. #ifdef CONFIG_IWL4965_HT
  5382. /* if we are switching from ht to 2.4 clear flags
  5383. * from any ht related info since 2.4 does not
  5384. * support ht */
  5385. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  5386. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5387. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  5388. #endif
  5389. )
  5390. priv->staging_rxon.flags = 0;
  5391. #endif /* CONFIG_IWL4965_HT */
  5392. iwlcore_set_rxon_channel(priv, conf->channel->band,
  5393. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5394. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  5395. /* The list of supported rates and rate mask can be different
  5396. * for each band; since the band may have changed, reset
  5397. * the rate mask to what mac80211 lists */
  5398. iwl4965_set_rate(priv);
  5399. spin_unlock_irqrestore(&priv->lock, flags);
  5400. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5401. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  5402. iwl4965_hw_channel_switch(priv, conf->channel);
  5403. goto out;
  5404. }
  5405. #endif
  5406. if (priv->cfg->ops->lib->radio_kill_sw)
  5407. priv->cfg->ops->lib->radio_kill_sw(priv, !conf->radio_enabled);
  5408. if (!conf->radio_enabled) {
  5409. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  5410. goto out;
  5411. }
  5412. if (iwl_is_rfkill(priv)) {
  5413. IWL_DEBUG_MAC80211("leave - RF kill\n");
  5414. ret = -EIO;
  5415. goto out;
  5416. }
  5417. iwl4965_set_rate(priv);
  5418. if (memcmp(&priv->active_rxon,
  5419. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  5420. iwl4965_commit_rxon(priv);
  5421. else
  5422. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  5423. IWL_DEBUG_MAC80211("leave\n");
  5424. out:
  5425. clear_bit(STATUS_CONF_PENDING, &priv->status);
  5426. mutex_unlock(&priv->mutex);
  5427. return ret;
  5428. }
  5429. static void iwl4965_config_ap(struct iwl_priv *priv)
  5430. {
  5431. int ret = 0;
  5432. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5433. return;
  5434. /* The following should be done only at AP bring up */
  5435. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  5436. /* RXON - unassoc (to set timing command) */
  5437. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5438. iwl4965_commit_rxon(priv);
  5439. /* RXON Timing */
  5440. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5441. iwl4965_setup_rxon_timing(priv);
  5442. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5443. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5444. if (ret)
  5445. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5446. "Attempting to continue.\n");
  5447. iwl4965_set_rxon_chain(priv);
  5448. /* FIXME: what should be the assoc_id for AP? */
  5449. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5450. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5451. priv->staging_rxon.flags |=
  5452. RXON_FLG_SHORT_PREAMBLE_MSK;
  5453. else
  5454. priv->staging_rxon.flags &=
  5455. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5456. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5457. if (priv->assoc_capability &
  5458. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5459. priv->staging_rxon.flags |=
  5460. RXON_FLG_SHORT_SLOT_MSK;
  5461. else
  5462. priv->staging_rxon.flags &=
  5463. ~RXON_FLG_SHORT_SLOT_MSK;
  5464. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5465. priv->staging_rxon.flags &=
  5466. ~RXON_FLG_SHORT_SLOT_MSK;
  5467. }
  5468. /* restore RXON assoc */
  5469. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5470. iwl4965_commit_rxon(priv);
  5471. iwl4965_activate_qos(priv, 1);
  5472. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5473. }
  5474. iwl4965_send_beacon_cmd(priv);
  5475. /* FIXME - we need to add code here to detect a totally new
  5476. * configuration, reset the AP, unassoc, rxon timing, assoc,
  5477. * clear sta table, add BCAST sta... */
  5478. }
  5479. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  5480. struct ieee80211_vif *vif,
  5481. struct ieee80211_if_conf *conf)
  5482. {
  5483. struct iwl_priv *priv = hw->priv;
  5484. DECLARE_MAC_BUF(mac);
  5485. unsigned long flags;
  5486. int rc;
  5487. if (conf == NULL)
  5488. return -EIO;
  5489. if (priv->vif != vif) {
  5490. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  5491. mutex_unlock(&priv->mutex);
  5492. return 0;
  5493. }
  5494. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  5495. (!conf->beacon || !conf->ssid_len)) {
  5496. IWL_DEBUG_MAC80211
  5497. ("Leaving in AP mode because HostAPD is not ready.\n");
  5498. return 0;
  5499. }
  5500. if (!iwl_is_alive(priv))
  5501. return -EAGAIN;
  5502. mutex_lock(&priv->mutex);
  5503. if (conf->bssid)
  5504. IWL_DEBUG_MAC80211("bssid: %s\n",
  5505. print_mac(mac, conf->bssid));
  5506. /*
  5507. * very dubious code was here; the probe filtering flag is never set:
  5508. *
  5509. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  5510. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  5511. */
  5512. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5513. if (!conf->bssid) {
  5514. conf->bssid = priv->mac_addr;
  5515. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  5516. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  5517. print_mac(mac, conf->bssid));
  5518. }
  5519. if (priv->ibss_beacon)
  5520. dev_kfree_skb(priv->ibss_beacon);
  5521. priv->ibss_beacon = conf->beacon;
  5522. }
  5523. if (iwl_is_rfkill(priv))
  5524. goto done;
  5525. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  5526. !is_multicast_ether_addr(conf->bssid)) {
  5527. /* If there is currently a HW scan going on in the background
  5528. * then we need to cancel it else the RXON below will fail. */
  5529. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  5530. IWL_WARNING("Aborted scan still in progress "
  5531. "after 100ms\n");
  5532. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  5533. mutex_unlock(&priv->mutex);
  5534. return -EAGAIN;
  5535. }
  5536. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  5537. /* TODO: Audit driver for usage of these members and see
  5538. * if mac80211 deprecates them (priv->bssid looks like it
  5539. * shouldn't be there, but I haven't scanned the IBSS code
  5540. * to verify) - jpk */
  5541. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  5542. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5543. iwl4965_config_ap(priv);
  5544. else {
  5545. rc = iwl4965_commit_rxon(priv);
  5546. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  5547. iwl4965_rxon_add_station(
  5548. priv, priv->active_rxon.bssid_addr, 1);
  5549. }
  5550. } else {
  5551. iwl4965_scan_cancel_timeout(priv, 100);
  5552. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5553. iwl4965_commit_rxon(priv);
  5554. }
  5555. done:
  5556. spin_lock_irqsave(&priv->lock, flags);
  5557. if (!conf->ssid_len)
  5558. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5559. else
  5560. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  5561. priv->essid_len = conf->ssid_len;
  5562. spin_unlock_irqrestore(&priv->lock, flags);
  5563. IWL_DEBUG_MAC80211("leave\n");
  5564. mutex_unlock(&priv->mutex);
  5565. return 0;
  5566. }
  5567. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  5568. unsigned int changed_flags,
  5569. unsigned int *total_flags,
  5570. int mc_count, struct dev_addr_list *mc_list)
  5571. {
  5572. /*
  5573. * XXX: dummy
  5574. * see also iwl4965_connection_init_rx_config
  5575. */
  5576. *total_flags = 0;
  5577. }
  5578. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  5579. struct ieee80211_if_init_conf *conf)
  5580. {
  5581. struct iwl_priv *priv = hw->priv;
  5582. IWL_DEBUG_MAC80211("enter\n");
  5583. mutex_lock(&priv->mutex);
  5584. if (iwl_is_ready_rf(priv)) {
  5585. iwl4965_scan_cancel_timeout(priv, 100);
  5586. cancel_delayed_work(&priv->post_associate);
  5587. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5588. iwl4965_commit_rxon(priv);
  5589. }
  5590. if (priv->vif == conf->vif) {
  5591. priv->vif = NULL;
  5592. memset(priv->bssid, 0, ETH_ALEN);
  5593. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5594. priv->essid_len = 0;
  5595. }
  5596. mutex_unlock(&priv->mutex);
  5597. IWL_DEBUG_MAC80211("leave\n");
  5598. }
  5599. #ifdef CONFIG_IWL4965_HT
  5600. static void iwl4965_ht_conf(struct iwl_priv *priv,
  5601. struct ieee80211_bss_conf *bss_conf)
  5602. {
  5603. struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
  5604. struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
  5605. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  5606. IWL_DEBUG_MAC80211("enter: \n");
  5607. iwl_conf->is_ht = bss_conf->assoc_ht;
  5608. if (!iwl_conf->is_ht)
  5609. return;
  5610. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  5611. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  5612. iwl_conf->sgf |= 0x1;
  5613. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  5614. iwl_conf->sgf |= 0x2;
  5615. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  5616. iwl_conf->max_amsdu_size =
  5617. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  5618. iwl_conf->supported_chan_width =
  5619. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  5620. iwl_conf->extension_chan_offset =
  5621. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  5622. /* If no above or below channel supplied disable FAT channel */
  5623. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  5624. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  5625. iwl_conf->supported_chan_width = 0;
  5626. iwl_conf->tx_mimo_ps_mode =
  5627. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  5628. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  5629. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  5630. iwl_conf->tx_chan_width =
  5631. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  5632. iwl_conf->ht_protection =
  5633. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  5634. iwl_conf->non_GF_STA_present =
  5635. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  5636. IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
  5637. IWL_DEBUG_MAC80211("leave\n");
  5638. }
  5639. #else
  5640. static inline void iwl4965_ht_conf(struct iwl_priv *priv,
  5641. struct ieee80211_bss_conf *bss_conf)
  5642. {
  5643. }
  5644. #endif
  5645. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  5646. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  5647. struct ieee80211_vif *vif,
  5648. struct ieee80211_bss_conf *bss_conf,
  5649. u32 changes)
  5650. {
  5651. struct iwl_priv *priv = hw->priv;
  5652. IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
  5653. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  5654. IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
  5655. bss_conf->use_short_preamble);
  5656. if (bss_conf->use_short_preamble)
  5657. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5658. else
  5659. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5660. }
  5661. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  5662. IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
  5663. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  5664. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  5665. else
  5666. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  5667. }
  5668. if (changes & BSS_CHANGED_HT) {
  5669. IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
  5670. iwl4965_ht_conf(priv, bss_conf);
  5671. iwl4965_set_rxon_chain(priv);
  5672. }
  5673. if (changes & BSS_CHANGED_ASSOC) {
  5674. IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
  5675. if (bss_conf->assoc) {
  5676. priv->assoc_id = bss_conf->aid;
  5677. priv->beacon_int = bss_conf->beacon_int;
  5678. priv->timestamp = bss_conf->timestamp;
  5679. priv->assoc_capability = bss_conf->assoc_capability;
  5680. priv->next_scan_jiffies = jiffies +
  5681. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  5682. queue_work(priv->workqueue, &priv->post_associate.work);
  5683. } else {
  5684. priv->assoc_id = 0;
  5685. IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
  5686. }
  5687. } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
  5688. IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
  5689. iwl4965_send_rxon_assoc(priv);
  5690. }
  5691. }
  5692. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  5693. {
  5694. int rc = 0;
  5695. unsigned long flags;
  5696. struct iwl_priv *priv = hw->priv;
  5697. IWL_DEBUG_MAC80211("enter\n");
  5698. mutex_lock(&priv->mutex);
  5699. spin_lock_irqsave(&priv->lock, flags);
  5700. if (!iwl_is_ready_rf(priv)) {
  5701. rc = -EIO;
  5702. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  5703. goto out_unlock;
  5704. }
  5705. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  5706. rc = -EIO;
  5707. IWL_ERROR("ERROR: APs don't scan\n");
  5708. goto out_unlock;
  5709. }
  5710. /* we don't schedule scan within next_scan_jiffies period */
  5711. if (priv->next_scan_jiffies &&
  5712. time_after(priv->next_scan_jiffies, jiffies)) {
  5713. rc = -EAGAIN;
  5714. goto out_unlock;
  5715. }
  5716. /* if we just finished scan ask for delay */
  5717. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  5718. IWL_DELAY_NEXT_SCAN, jiffies)) {
  5719. rc = -EAGAIN;
  5720. goto out_unlock;
  5721. }
  5722. if (len) {
  5723. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  5724. iwl4965_escape_essid(ssid, len), (int)len);
  5725. priv->one_direct_scan = 1;
  5726. priv->direct_ssid_len = (u8)
  5727. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  5728. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  5729. } else
  5730. priv->one_direct_scan = 0;
  5731. rc = iwl4965_scan_initiate(priv);
  5732. IWL_DEBUG_MAC80211("leave\n");
  5733. out_unlock:
  5734. spin_unlock_irqrestore(&priv->lock, flags);
  5735. mutex_unlock(&priv->mutex);
  5736. return rc;
  5737. }
  5738. static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
  5739. struct ieee80211_key_conf *keyconf, const u8 *addr,
  5740. u32 iv32, u16 *phase1key)
  5741. {
  5742. struct iwl_priv *priv = hw->priv;
  5743. u8 sta_id = IWL_INVALID_STATION;
  5744. unsigned long flags;
  5745. __le16 key_flags = 0;
  5746. int i;
  5747. DECLARE_MAC_BUF(mac);
  5748. IWL_DEBUG_MAC80211("enter\n");
  5749. sta_id = iwl4965_hw_find_station(priv, addr);
  5750. if (sta_id == IWL_INVALID_STATION) {
  5751. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5752. print_mac(mac, addr));
  5753. return;
  5754. }
  5755. iwl4965_scan_cancel_timeout(priv, 100);
  5756. key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
  5757. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  5758. key_flags &= ~STA_KEY_FLG_INVALID;
  5759. if (sta_id == priv->hw_setting.bcast_sta_id)
  5760. key_flags |= STA_KEY_MULTICAST_MSK;
  5761. spin_lock_irqsave(&priv->sta_lock, flags);
  5762. priv->stations[sta_id].sta.key.key_offset =
  5763. (sta_id % STA_KEY_MAX_NUM);/* FIXME */
  5764. priv->stations[sta_id].sta.key.key_flags = key_flags;
  5765. priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
  5766. for (i = 0; i < 5; i++)
  5767. priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
  5768. cpu_to_le16(phase1key[i]);
  5769. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  5770. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  5771. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  5772. spin_unlock_irqrestore(&priv->sta_lock, flags);
  5773. IWL_DEBUG_MAC80211("leave\n");
  5774. }
  5775. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  5776. const u8 *local_addr, const u8 *addr,
  5777. struct ieee80211_key_conf *key)
  5778. {
  5779. struct iwl_priv *priv = hw->priv;
  5780. DECLARE_MAC_BUF(mac);
  5781. int ret = 0;
  5782. u8 sta_id = IWL_INVALID_STATION;
  5783. u8 is_default_wep_key = 0;
  5784. IWL_DEBUG_MAC80211("enter\n");
  5785. if (!priv->cfg->mod_params->hw_crypto) {
  5786. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  5787. return -EOPNOTSUPP;
  5788. }
  5789. if (is_zero_ether_addr(addr))
  5790. /* only support pairwise keys */
  5791. return -EOPNOTSUPP;
  5792. sta_id = iwl4965_hw_find_station(priv, addr);
  5793. if (sta_id == IWL_INVALID_STATION) {
  5794. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5795. print_mac(mac, addr));
  5796. return -EINVAL;
  5797. }
  5798. mutex_lock(&priv->mutex);
  5799. iwl4965_scan_cancel_timeout(priv, 100);
  5800. mutex_unlock(&priv->mutex);
  5801. /* If we are getting WEP group key and we didn't receive any key mapping
  5802. * so far, we are in legacy wep mode (group key only), otherwise we are
  5803. * in 1X mode.
  5804. * In legacy wep mode, we use another host command to the uCode */
  5805. if (key->alg == ALG_WEP && sta_id == priv->hw_setting.bcast_sta_id &&
  5806. priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  5807. if (cmd == SET_KEY)
  5808. is_default_wep_key = !priv->key_mapping_key;
  5809. else
  5810. is_default_wep_key = priv->default_wep_key;
  5811. }
  5812. switch (cmd) {
  5813. case SET_KEY:
  5814. if (is_default_wep_key)
  5815. ret = iwl_set_default_wep_key(priv, key);
  5816. else
  5817. ret = iwl4965_set_dynamic_key(priv, key, sta_id);
  5818. IWL_DEBUG_MAC80211("enable hwcrypto key\n");
  5819. break;
  5820. case DISABLE_KEY:
  5821. if (is_default_wep_key)
  5822. ret = iwl_remove_default_wep_key(priv, key);
  5823. else
  5824. ret = iwl4965_clear_sta_key_info(priv, sta_id);
  5825. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  5826. break;
  5827. default:
  5828. ret = -EINVAL;
  5829. }
  5830. IWL_DEBUG_MAC80211("leave\n");
  5831. return ret;
  5832. }
  5833. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  5834. const struct ieee80211_tx_queue_params *params)
  5835. {
  5836. struct iwl_priv *priv = hw->priv;
  5837. unsigned long flags;
  5838. int q;
  5839. IWL_DEBUG_MAC80211("enter\n");
  5840. if (!iwl_is_ready_rf(priv)) {
  5841. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5842. return -EIO;
  5843. }
  5844. if (queue >= AC_NUM) {
  5845. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  5846. return 0;
  5847. }
  5848. if (!priv->qos_data.qos_enable) {
  5849. priv->qos_data.qos_active = 0;
  5850. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  5851. return 0;
  5852. }
  5853. q = AC_NUM - 1 - queue;
  5854. spin_lock_irqsave(&priv->lock, flags);
  5855. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  5856. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  5857. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  5858. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  5859. cpu_to_le16((params->txop * 32));
  5860. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  5861. priv->qos_data.qos_active = 1;
  5862. spin_unlock_irqrestore(&priv->lock, flags);
  5863. mutex_lock(&priv->mutex);
  5864. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5865. iwl4965_activate_qos(priv, 1);
  5866. else if (priv->assoc_id && iwl_is_associated(priv))
  5867. iwl4965_activate_qos(priv, 0);
  5868. mutex_unlock(&priv->mutex);
  5869. IWL_DEBUG_MAC80211("leave\n");
  5870. return 0;
  5871. }
  5872. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  5873. struct ieee80211_tx_queue_stats *stats)
  5874. {
  5875. struct iwl_priv *priv = hw->priv;
  5876. int i, avail;
  5877. struct iwl4965_tx_queue *txq;
  5878. struct iwl4965_queue *q;
  5879. unsigned long flags;
  5880. IWL_DEBUG_MAC80211("enter\n");
  5881. if (!iwl_is_ready_rf(priv)) {
  5882. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5883. return -EIO;
  5884. }
  5885. spin_lock_irqsave(&priv->lock, flags);
  5886. for (i = 0; i < AC_NUM; i++) {
  5887. txq = &priv->txq[i];
  5888. q = &txq->q;
  5889. avail = iwl4965_queue_space(q);
  5890. stats->data[i].len = q->n_window - avail;
  5891. stats->data[i].limit = q->n_window - q->high_mark;
  5892. stats->data[i].count = q->n_window;
  5893. }
  5894. spin_unlock_irqrestore(&priv->lock, flags);
  5895. IWL_DEBUG_MAC80211("leave\n");
  5896. return 0;
  5897. }
  5898. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  5899. struct ieee80211_low_level_stats *stats)
  5900. {
  5901. IWL_DEBUG_MAC80211("enter\n");
  5902. IWL_DEBUG_MAC80211("leave\n");
  5903. return 0;
  5904. }
  5905. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  5906. {
  5907. IWL_DEBUG_MAC80211("enter\n");
  5908. IWL_DEBUG_MAC80211("leave\n");
  5909. return 0;
  5910. }
  5911. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  5912. {
  5913. struct iwl_priv *priv = hw->priv;
  5914. unsigned long flags;
  5915. mutex_lock(&priv->mutex);
  5916. IWL_DEBUG_MAC80211("enter\n");
  5917. priv->lq_mngr.lq_ready = 0;
  5918. #ifdef CONFIG_IWL4965_HT
  5919. spin_lock_irqsave(&priv->lock, flags);
  5920. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  5921. spin_unlock_irqrestore(&priv->lock, flags);
  5922. #endif /* CONFIG_IWL4965_HT */
  5923. iwlcore_reset_qos(priv);
  5924. cancel_delayed_work(&priv->post_associate);
  5925. spin_lock_irqsave(&priv->lock, flags);
  5926. priv->assoc_id = 0;
  5927. priv->assoc_capability = 0;
  5928. priv->assoc_station_added = 0;
  5929. /* new association get rid of ibss beacon skb */
  5930. if (priv->ibss_beacon)
  5931. dev_kfree_skb(priv->ibss_beacon);
  5932. priv->ibss_beacon = NULL;
  5933. priv->beacon_int = priv->hw->conf.beacon_int;
  5934. priv->timestamp = 0;
  5935. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  5936. priv->beacon_int = 0;
  5937. spin_unlock_irqrestore(&priv->lock, flags);
  5938. if (!iwl_is_ready_rf(priv)) {
  5939. IWL_DEBUG_MAC80211("leave - not ready\n");
  5940. mutex_unlock(&priv->mutex);
  5941. return;
  5942. }
  5943. /* we are restarting association process
  5944. * clear RXON_FILTER_ASSOC_MSK bit
  5945. */
  5946. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  5947. iwl4965_scan_cancel_timeout(priv, 100);
  5948. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5949. iwl4965_commit_rxon(priv);
  5950. }
  5951. /* Per mac80211.h: This is only used in IBSS mode... */
  5952. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  5953. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  5954. mutex_unlock(&priv->mutex);
  5955. return;
  5956. }
  5957. priv->only_active_channel = 0;
  5958. iwl4965_set_rate(priv);
  5959. mutex_unlock(&priv->mutex);
  5960. IWL_DEBUG_MAC80211("leave\n");
  5961. }
  5962. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  5963. struct ieee80211_tx_control *control)
  5964. {
  5965. struct iwl_priv *priv = hw->priv;
  5966. unsigned long flags;
  5967. mutex_lock(&priv->mutex);
  5968. IWL_DEBUG_MAC80211("enter\n");
  5969. if (!iwl_is_ready_rf(priv)) {
  5970. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5971. mutex_unlock(&priv->mutex);
  5972. return -EIO;
  5973. }
  5974. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  5975. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  5976. mutex_unlock(&priv->mutex);
  5977. return -EIO;
  5978. }
  5979. spin_lock_irqsave(&priv->lock, flags);
  5980. if (priv->ibss_beacon)
  5981. dev_kfree_skb(priv->ibss_beacon);
  5982. priv->ibss_beacon = skb;
  5983. priv->assoc_id = 0;
  5984. IWL_DEBUG_MAC80211("leave\n");
  5985. spin_unlock_irqrestore(&priv->lock, flags);
  5986. iwlcore_reset_qos(priv);
  5987. queue_work(priv->workqueue, &priv->post_associate.work);
  5988. mutex_unlock(&priv->mutex);
  5989. return 0;
  5990. }
  5991. /*****************************************************************************
  5992. *
  5993. * sysfs attributes
  5994. *
  5995. *****************************************************************************/
  5996. #ifdef CONFIG_IWLWIFI_DEBUG
  5997. /*
  5998. * The following adds a new attribute to the sysfs representation
  5999. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6000. * used for controlling the debug level.
  6001. *
  6002. * See the level definitions in iwl for details.
  6003. */
  6004. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6005. {
  6006. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6007. }
  6008. static ssize_t store_debug_level(struct device_driver *d,
  6009. const char *buf, size_t count)
  6010. {
  6011. char *p = (char *)buf;
  6012. u32 val;
  6013. val = simple_strtoul(p, &p, 0);
  6014. if (p == buf)
  6015. printk(KERN_INFO DRV_NAME
  6016. ": %s is not in hex or decimal form.\n", buf);
  6017. else
  6018. iwl_debug_level = val;
  6019. return strnlen(buf, count);
  6020. }
  6021. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6022. show_debug_level, store_debug_level);
  6023. #endif /* CONFIG_IWLWIFI_DEBUG */
  6024. static ssize_t show_temperature(struct device *d,
  6025. struct device_attribute *attr, char *buf)
  6026. {
  6027. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6028. if (!iwl_is_alive(priv))
  6029. return -EAGAIN;
  6030. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6031. }
  6032. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6033. static ssize_t show_rs_window(struct device *d,
  6034. struct device_attribute *attr,
  6035. char *buf)
  6036. {
  6037. struct iwl_priv *priv = d->driver_data;
  6038. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6039. }
  6040. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6041. static ssize_t show_tx_power(struct device *d,
  6042. struct device_attribute *attr, char *buf)
  6043. {
  6044. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6045. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6046. }
  6047. static ssize_t store_tx_power(struct device *d,
  6048. struct device_attribute *attr,
  6049. const char *buf, size_t count)
  6050. {
  6051. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6052. char *p = (char *)buf;
  6053. u32 val;
  6054. val = simple_strtoul(p, &p, 10);
  6055. if (p == buf)
  6056. printk(KERN_INFO DRV_NAME
  6057. ": %s is not in decimal form.\n", buf);
  6058. else
  6059. iwl4965_hw_reg_set_txpower(priv, val);
  6060. return count;
  6061. }
  6062. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6063. static ssize_t show_flags(struct device *d,
  6064. struct device_attribute *attr, char *buf)
  6065. {
  6066. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6067. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6068. }
  6069. static ssize_t store_flags(struct device *d,
  6070. struct device_attribute *attr,
  6071. const char *buf, size_t count)
  6072. {
  6073. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6074. u32 flags = simple_strtoul(buf, NULL, 0);
  6075. mutex_lock(&priv->mutex);
  6076. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6077. /* Cancel any currently running scans... */
  6078. if (iwl4965_scan_cancel_timeout(priv, 100))
  6079. IWL_WARNING("Could not cancel scan.\n");
  6080. else {
  6081. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6082. flags);
  6083. priv->staging_rxon.flags = cpu_to_le32(flags);
  6084. iwl4965_commit_rxon(priv);
  6085. }
  6086. }
  6087. mutex_unlock(&priv->mutex);
  6088. return count;
  6089. }
  6090. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6091. static ssize_t show_filter_flags(struct device *d,
  6092. struct device_attribute *attr, char *buf)
  6093. {
  6094. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6095. return sprintf(buf, "0x%04X\n",
  6096. le32_to_cpu(priv->active_rxon.filter_flags));
  6097. }
  6098. static ssize_t store_filter_flags(struct device *d,
  6099. struct device_attribute *attr,
  6100. const char *buf, size_t count)
  6101. {
  6102. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6103. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6104. mutex_lock(&priv->mutex);
  6105. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6106. /* Cancel any currently running scans... */
  6107. if (iwl4965_scan_cancel_timeout(priv, 100))
  6108. IWL_WARNING("Could not cancel scan.\n");
  6109. else {
  6110. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6111. "0x%04X\n", filter_flags);
  6112. priv->staging_rxon.filter_flags =
  6113. cpu_to_le32(filter_flags);
  6114. iwl4965_commit_rxon(priv);
  6115. }
  6116. }
  6117. mutex_unlock(&priv->mutex);
  6118. return count;
  6119. }
  6120. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6121. store_filter_flags);
  6122. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6123. static ssize_t show_measurement(struct device *d,
  6124. struct device_attribute *attr, char *buf)
  6125. {
  6126. struct iwl_priv *priv = dev_get_drvdata(d);
  6127. struct iwl4965_spectrum_notification measure_report;
  6128. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6129. u8 *data = (u8 *) & measure_report;
  6130. unsigned long flags;
  6131. spin_lock_irqsave(&priv->lock, flags);
  6132. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6133. spin_unlock_irqrestore(&priv->lock, flags);
  6134. return 0;
  6135. }
  6136. memcpy(&measure_report, &priv->measure_report, size);
  6137. priv->measurement_status = 0;
  6138. spin_unlock_irqrestore(&priv->lock, flags);
  6139. while (size && (PAGE_SIZE - len)) {
  6140. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6141. PAGE_SIZE - len, 1);
  6142. len = strlen(buf);
  6143. if (PAGE_SIZE - len)
  6144. buf[len++] = '\n';
  6145. ofs += 16;
  6146. size -= min(size, 16U);
  6147. }
  6148. return len;
  6149. }
  6150. static ssize_t store_measurement(struct device *d,
  6151. struct device_attribute *attr,
  6152. const char *buf, size_t count)
  6153. {
  6154. struct iwl_priv *priv = dev_get_drvdata(d);
  6155. struct ieee80211_measurement_params params = {
  6156. .channel = le16_to_cpu(priv->active_rxon.channel),
  6157. .start_time = cpu_to_le64(priv->last_tsf),
  6158. .duration = cpu_to_le16(1),
  6159. };
  6160. u8 type = IWL_MEASURE_BASIC;
  6161. u8 buffer[32];
  6162. u8 channel;
  6163. if (count) {
  6164. char *p = buffer;
  6165. strncpy(buffer, buf, min(sizeof(buffer), count));
  6166. channel = simple_strtoul(p, NULL, 0);
  6167. if (channel)
  6168. params.channel = channel;
  6169. p = buffer;
  6170. while (*p && *p != ' ')
  6171. p++;
  6172. if (*p)
  6173. type = simple_strtoul(p + 1, NULL, 0);
  6174. }
  6175. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6176. "channel %d (for '%s')\n", type, params.channel, buf);
  6177. iwl4965_get_measurement(priv, &params, type);
  6178. return count;
  6179. }
  6180. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6181. show_measurement, store_measurement);
  6182. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6183. static ssize_t store_retry_rate(struct device *d,
  6184. struct device_attribute *attr,
  6185. const char *buf, size_t count)
  6186. {
  6187. struct iwl_priv *priv = dev_get_drvdata(d);
  6188. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6189. if (priv->retry_rate <= 0)
  6190. priv->retry_rate = 1;
  6191. return count;
  6192. }
  6193. static ssize_t show_retry_rate(struct device *d,
  6194. struct device_attribute *attr, char *buf)
  6195. {
  6196. struct iwl_priv *priv = dev_get_drvdata(d);
  6197. return sprintf(buf, "%d", priv->retry_rate);
  6198. }
  6199. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6200. store_retry_rate);
  6201. static ssize_t store_power_level(struct device *d,
  6202. struct device_attribute *attr,
  6203. const char *buf, size_t count)
  6204. {
  6205. struct iwl_priv *priv = dev_get_drvdata(d);
  6206. int rc;
  6207. int mode;
  6208. mode = simple_strtoul(buf, NULL, 0);
  6209. mutex_lock(&priv->mutex);
  6210. if (!iwl_is_ready(priv)) {
  6211. rc = -EAGAIN;
  6212. goto out;
  6213. }
  6214. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6215. mode = IWL_POWER_AC;
  6216. else
  6217. mode |= IWL_POWER_ENABLED;
  6218. if (mode != priv->power_mode) {
  6219. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6220. if (rc) {
  6221. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6222. goto out;
  6223. }
  6224. priv->power_mode = mode;
  6225. }
  6226. rc = count;
  6227. out:
  6228. mutex_unlock(&priv->mutex);
  6229. return rc;
  6230. }
  6231. #define MAX_WX_STRING 80
  6232. /* Values are in microsecond */
  6233. static const s32 timeout_duration[] = {
  6234. 350000,
  6235. 250000,
  6236. 75000,
  6237. 37000,
  6238. 25000,
  6239. };
  6240. static const s32 period_duration[] = {
  6241. 400000,
  6242. 700000,
  6243. 1000000,
  6244. 1000000,
  6245. 1000000
  6246. };
  6247. static ssize_t show_power_level(struct device *d,
  6248. struct device_attribute *attr, char *buf)
  6249. {
  6250. struct iwl_priv *priv = dev_get_drvdata(d);
  6251. int level = IWL_POWER_LEVEL(priv->power_mode);
  6252. char *p = buf;
  6253. p += sprintf(p, "%d ", level);
  6254. switch (level) {
  6255. case IWL_POWER_MODE_CAM:
  6256. case IWL_POWER_AC:
  6257. p += sprintf(p, "(AC)");
  6258. break;
  6259. case IWL_POWER_BATTERY:
  6260. p += sprintf(p, "(BATTERY)");
  6261. break;
  6262. default:
  6263. p += sprintf(p,
  6264. "(Timeout %dms, Period %dms)",
  6265. timeout_duration[level - 1] / 1000,
  6266. period_duration[level - 1] / 1000);
  6267. }
  6268. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6269. p += sprintf(p, " OFF\n");
  6270. else
  6271. p += sprintf(p, " \n");
  6272. return (p - buf + 1);
  6273. }
  6274. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6275. store_power_level);
  6276. static ssize_t show_channels(struct device *d,
  6277. struct device_attribute *attr, char *buf)
  6278. {
  6279. /* all this shit doesn't belong into sysfs anyway */
  6280. return 0;
  6281. }
  6282. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6283. static ssize_t show_statistics(struct device *d,
  6284. struct device_attribute *attr, char *buf)
  6285. {
  6286. struct iwl_priv *priv = dev_get_drvdata(d);
  6287. u32 size = sizeof(struct iwl4965_notif_statistics);
  6288. u32 len = 0, ofs = 0;
  6289. u8 *data = (u8 *) & priv->statistics;
  6290. int rc = 0;
  6291. if (!iwl_is_alive(priv))
  6292. return -EAGAIN;
  6293. mutex_lock(&priv->mutex);
  6294. rc = iwl4965_send_statistics_request(priv);
  6295. mutex_unlock(&priv->mutex);
  6296. if (rc) {
  6297. len = sprintf(buf,
  6298. "Error sending statistics request: 0x%08X\n", rc);
  6299. return len;
  6300. }
  6301. while (size && (PAGE_SIZE - len)) {
  6302. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6303. PAGE_SIZE - len, 1);
  6304. len = strlen(buf);
  6305. if (PAGE_SIZE - len)
  6306. buf[len++] = '\n';
  6307. ofs += 16;
  6308. size -= min(size, 16U);
  6309. }
  6310. return len;
  6311. }
  6312. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6313. static ssize_t show_antenna(struct device *d,
  6314. struct device_attribute *attr, char *buf)
  6315. {
  6316. struct iwl_priv *priv = dev_get_drvdata(d);
  6317. if (!iwl_is_alive(priv))
  6318. return -EAGAIN;
  6319. return sprintf(buf, "%d\n", priv->antenna);
  6320. }
  6321. static ssize_t store_antenna(struct device *d,
  6322. struct device_attribute *attr,
  6323. const char *buf, size_t count)
  6324. {
  6325. int ant;
  6326. struct iwl_priv *priv = dev_get_drvdata(d);
  6327. if (count == 0)
  6328. return 0;
  6329. if (sscanf(buf, "%1i", &ant) != 1) {
  6330. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6331. return count;
  6332. }
  6333. if ((ant >= 0) && (ant <= 2)) {
  6334. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6335. priv->antenna = (enum iwl4965_antenna)ant;
  6336. } else
  6337. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6338. return count;
  6339. }
  6340. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6341. static ssize_t show_status(struct device *d,
  6342. struct device_attribute *attr, char *buf)
  6343. {
  6344. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6345. if (!iwl_is_alive(priv))
  6346. return -EAGAIN;
  6347. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6348. }
  6349. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6350. static ssize_t dump_error_log(struct device *d,
  6351. struct device_attribute *attr,
  6352. const char *buf, size_t count)
  6353. {
  6354. char *p = (char *)buf;
  6355. if (p[0] == '1')
  6356. iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  6357. return strnlen(buf, count);
  6358. }
  6359. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6360. static ssize_t dump_event_log(struct device *d,
  6361. struct device_attribute *attr,
  6362. const char *buf, size_t count)
  6363. {
  6364. char *p = (char *)buf;
  6365. if (p[0] == '1')
  6366. iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  6367. return strnlen(buf, count);
  6368. }
  6369. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6370. /*****************************************************************************
  6371. *
  6372. * driver setup and teardown
  6373. *
  6374. *****************************************************************************/
  6375. static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
  6376. {
  6377. priv->workqueue = create_workqueue(DRV_NAME);
  6378. init_waitqueue_head(&priv->wait_command_queue);
  6379. INIT_WORK(&priv->up, iwl4965_bg_up);
  6380. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  6381. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  6382. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  6383. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  6384. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  6385. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  6386. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  6387. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  6388. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  6389. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  6390. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  6391. iwl4965_hw_setup_deferred_work(priv);
  6392. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6393. iwl4965_irq_tasklet, (unsigned long)priv);
  6394. }
  6395. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
  6396. {
  6397. iwl4965_hw_cancel_deferred_work(priv);
  6398. cancel_delayed_work_sync(&priv->init_alive_start);
  6399. cancel_delayed_work(&priv->scan_check);
  6400. cancel_delayed_work(&priv->alive_start);
  6401. cancel_delayed_work(&priv->post_associate);
  6402. cancel_work_sync(&priv->beacon_update);
  6403. }
  6404. static struct attribute *iwl4965_sysfs_entries[] = {
  6405. &dev_attr_antenna.attr,
  6406. &dev_attr_channels.attr,
  6407. &dev_attr_dump_errors.attr,
  6408. &dev_attr_dump_events.attr,
  6409. &dev_attr_flags.attr,
  6410. &dev_attr_filter_flags.attr,
  6411. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6412. &dev_attr_measurement.attr,
  6413. #endif
  6414. &dev_attr_power_level.attr,
  6415. &dev_attr_retry_rate.attr,
  6416. &dev_attr_rs_window.attr,
  6417. &dev_attr_statistics.attr,
  6418. &dev_attr_status.attr,
  6419. &dev_attr_temperature.attr,
  6420. &dev_attr_tx_power.attr,
  6421. NULL
  6422. };
  6423. static struct attribute_group iwl4965_attribute_group = {
  6424. .name = NULL, /* put in device directory */
  6425. .attrs = iwl4965_sysfs_entries,
  6426. };
  6427. static struct ieee80211_ops iwl4965_hw_ops = {
  6428. .tx = iwl4965_mac_tx,
  6429. .start = iwl4965_mac_start,
  6430. .stop = iwl4965_mac_stop,
  6431. .add_interface = iwl4965_mac_add_interface,
  6432. .remove_interface = iwl4965_mac_remove_interface,
  6433. .config = iwl4965_mac_config,
  6434. .config_interface = iwl4965_mac_config_interface,
  6435. .configure_filter = iwl4965_configure_filter,
  6436. .set_key = iwl4965_mac_set_key,
  6437. .update_tkip_key = iwl4965_mac_update_tkip_key,
  6438. .get_stats = iwl4965_mac_get_stats,
  6439. .get_tx_stats = iwl4965_mac_get_tx_stats,
  6440. .conf_tx = iwl4965_mac_conf_tx,
  6441. .get_tsf = iwl4965_mac_get_tsf,
  6442. .reset_tsf = iwl4965_mac_reset_tsf,
  6443. .beacon_update = iwl4965_mac_beacon_update,
  6444. .bss_info_changed = iwl4965_bss_info_changed,
  6445. #ifdef CONFIG_IWL4965_HT
  6446. .ampdu_action = iwl4965_mac_ampdu_action,
  6447. #endif /* CONFIG_IWL4965_HT */
  6448. .hw_scan = iwl4965_mac_hw_scan
  6449. };
  6450. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  6451. {
  6452. int err = 0;
  6453. struct iwl_priv *priv;
  6454. struct ieee80211_hw *hw;
  6455. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  6456. unsigned long flags;
  6457. DECLARE_MAC_BUF(mac);
  6458. /************************
  6459. * 1. Allocating HW data
  6460. ************************/
  6461. /* Disabling hardware scan means that mac80211 will perform scans
  6462. * "the hard way", rather than using device's scan. */
  6463. if (cfg->mod_params->disable_hw_scan) {
  6464. IWL_DEBUG_INFO("Disabling hw_scan\n");
  6465. iwl4965_hw_ops.hw_scan = NULL;
  6466. }
  6467. hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
  6468. if (!hw) {
  6469. err = -ENOMEM;
  6470. goto out;
  6471. }
  6472. priv = hw->priv;
  6473. /* At this point both hw and priv are allocated. */
  6474. SET_IEEE80211_DEV(hw, &pdev->dev);
  6475. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  6476. priv->cfg = cfg;
  6477. priv->pci_dev = pdev;
  6478. #ifdef CONFIG_IWLWIFI_DEBUG
  6479. iwl_debug_level = priv->cfg->mod_params->debug;
  6480. atomic_set(&priv->restrict_refcnt, 0);
  6481. #endif
  6482. /**************************
  6483. * 2. Initializing PCI bus
  6484. **************************/
  6485. if (pci_enable_device(pdev)) {
  6486. err = -ENODEV;
  6487. goto out_ieee80211_free_hw;
  6488. }
  6489. pci_set_master(pdev);
  6490. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  6491. if (!err)
  6492. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  6493. if (err) {
  6494. printk(KERN_WARNING DRV_NAME
  6495. ": No suitable DMA available.\n");
  6496. goto out_pci_disable_device;
  6497. }
  6498. err = pci_request_regions(pdev, DRV_NAME);
  6499. if (err)
  6500. goto out_pci_disable_device;
  6501. pci_set_drvdata(pdev, priv);
  6502. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  6503. * PCI Tx retries from interfering with C3 CPU state */
  6504. pci_write_config_byte(pdev, 0x41, 0x00);
  6505. /***********************
  6506. * 3. Read REV register
  6507. ***********************/
  6508. priv->hw_base = pci_iomap(pdev, 0, 0);
  6509. if (!priv->hw_base) {
  6510. err = -ENODEV;
  6511. goto out_pci_release_regions;
  6512. }
  6513. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  6514. (unsigned long long) pci_resource_len(pdev, 0));
  6515. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  6516. printk(KERN_INFO DRV_NAME
  6517. ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
  6518. /*****************
  6519. * 4. Read EEPROM
  6520. *****************/
  6521. /* nic init */
  6522. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  6523. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  6524. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  6525. err = iwl_poll_bit(priv, CSR_GP_CNTRL,
  6526. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  6527. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  6528. if (err < 0) {
  6529. IWL_DEBUG_INFO("Failed to init the card\n");
  6530. goto out_iounmap;
  6531. }
  6532. /* Read the EEPROM */
  6533. err = iwl_eeprom_init(priv);
  6534. if (err) {
  6535. IWL_ERROR("Unable to init EEPROM\n");
  6536. goto out_iounmap;
  6537. }
  6538. /* MAC Address location in EEPROM same for 3945/4965 */
  6539. iwl_eeprom_get_mac(priv, priv->mac_addr);
  6540. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  6541. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  6542. /************************
  6543. * 5. Setup HW constants
  6544. ************************/
  6545. /* Device-specific setup */
  6546. if (iwl4965_hw_set_hw_setting(priv)) {
  6547. IWL_ERROR("failed to set hw settings\n");
  6548. goto out_iounmap;
  6549. }
  6550. /*******************
  6551. * 6. Setup hw/priv
  6552. *******************/
  6553. err = iwl_setup(priv);
  6554. if (err)
  6555. goto out_unset_hw_settings;
  6556. /* At this point both hw and priv are initialized. */
  6557. /**********************************
  6558. * 7. Initialize module parameters
  6559. **********************************/
  6560. /* Disable radio (SW RF KILL) via parameter when loading driver */
  6561. if (priv->cfg->mod_params->disable) {
  6562. set_bit(STATUS_RF_KILL_SW, &priv->status);
  6563. IWL_DEBUG_INFO("Radio disabled.\n");
  6564. }
  6565. if (priv->cfg->mod_params->enable_qos)
  6566. priv->qos_data.qos_enable = 1;
  6567. /********************
  6568. * 8. Setup services
  6569. ********************/
  6570. spin_lock_irqsave(&priv->lock, flags);
  6571. iwl4965_disable_interrupts(priv);
  6572. spin_unlock_irqrestore(&priv->lock, flags);
  6573. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6574. if (err) {
  6575. IWL_ERROR("failed to create sysfs device attributes\n");
  6576. goto out_unset_hw_settings;
  6577. }
  6578. err = iwl_dbgfs_register(priv, DRV_NAME);
  6579. if (err) {
  6580. IWL_ERROR("failed to create debugfs files\n");
  6581. goto out_remove_sysfs;
  6582. }
  6583. iwl4965_setup_deferred_work(priv);
  6584. iwl4965_setup_rx_handlers(priv);
  6585. /********************
  6586. * 9. Conclude
  6587. ********************/
  6588. pci_save_state(pdev);
  6589. pci_disable_device(pdev);
  6590. /* notify iwlcore to init */
  6591. iwlcore_low_level_notify(priv, IWLCORE_INIT_EVT);
  6592. return 0;
  6593. out_remove_sysfs:
  6594. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6595. out_unset_hw_settings:
  6596. iwl4965_unset_hw_setting(priv);
  6597. out_iounmap:
  6598. pci_iounmap(pdev, priv->hw_base);
  6599. out_pci_release_regions:
  6600. pci_release_regions(pdev);
  6601. pci_set_drvdata(pdev, NULL);
  6602. out_pci_disable_device:
  6603. pci_disable_device(pdev);
  6604. out_ieee80211_free_hw:
  6605. ieee80211_free_hw(priv->hw);
  6606. out:
  6607. return err;
  6608. }
  6609. static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
  6610. {
  6611. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6612. struct list_head *p, *q;
  6613. int i;
  6614. unsigned long flags;
  6615. if (!priv)
  6616. return;
  6617. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  6618. if (priv->mac80211_registered) {
  6619. ieee80211_unregister_hw(priv->hw);
  6620. priv->mac80211_registered = 0;
  6621. }
  6622. set_bit(STATUS_EXIT_PENDING, &priv->status);
  6623. iwl4965_down(priv);
  6624. /* make sure we flush any pending irq or
  6625. * tasklet for the driver
  6626. */
  6627. spin_lock_irqsave(&priv->lock, flags);
  6628. iwl4965_disable_interrupts(priv);
  6629. spin_unlock_irqrestore(&priv->lock, flags);
  6630. iwl_synchronize_irq(priv);
  6631. /* Free MAC hash list for ADHOC */
  6632. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  6633. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  6634. list_del(p);
  6635. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  6636. }
  6637. }
  6638. iwlcore_low_level_notify(priv, IWLCORE_REMOVE_EVT);
  6639. iwl_dbgfs_unregister(priv);
  6640. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6641. iwl4965_dealloc_ucode_pci(priv);
  6642. if (priv->rxq.bd)
  6643. iwl4965_rx_queue_free(priv, &priv->rxq);
  6644. iwl4965_hw_txq_ctx_free(priv);
  6645. iwl4965_unset_hw_setting(priv);
  6646. iwlcore_clear_stations_table(priv);
  6647. /*netif_stop_queue(dev); */
  6648. flush_workqueue(priv->workqueue);
  6649. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  6650. * priv->workqueue... so we can't take down the workqueue
  6651. * until now... */
  6652. destroy_workqueue(priv->workqueue);
  6653. priv->workqueue = NULL;
  6654. pci_iounmap(pdev, priv->hw_base);
  6655. pci_release_regions(pdev);
  6656. pci_disable_device(pdev);
  6657. pci_set_drvdata(pdev, NULL);
  6658. iwl_free_channel_map(priv);
  6659. iwl4965_free_geos(priv);
  6660. if (priv->ibss_beacon)
  6661. dev_kfree_skb(priv->ibss_beacon);
  6662. ieee80211_free_hw(priv->hw);
  6663. }
  6664. #ifdef CONFIG_PM
  6665. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  6666. {
  6667. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6668. if (priv->is_open) {
  6669. set_bit(STATUS_IN_SUSPEND, &priv->status);
  6670. iwl4965_mac_stop(priv->hw);
  6671. priv->is_open = 1;
  6672. }
  6673. pci_set_power_state(pdev, PCI_D3hot);
  6674. return 0;
  6675. }
  6676. static int iwl4965_pci_resume(struct pci_dev *pdev)
  6677. {
  6678. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6679. pci_set_power_state(pdev, PCI_D0);
  6680. if (priv->is_open)
  6681. iwl4965_mac_start(priv->hw);
  6682. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  6683. return 0;
  6684. }
  6685. #endif /* CONFIG_PM */
  6686. /*****************************************************************************
  6687. *
  6688. * driver and module entry point
  6689. *
  6690. *****************************************************************************/
  6691. static struct pci_driver iwl4965_driver = {
  6692. .name = DRV_NAME,
  6693. .id_table = iwl4965_hw_card_ids,
  6694. .probe = iwl4965_pci_probe,
  6695. .remove = __devexit_p(iwl4965_pci_remove),
  6696. #ifdef CONFIG_PM
  6697. .suspend = iwl4965_pci_suspend,
  6698. .resume = iwl4965_pci_resume,
  6699. #endif
  6700. };
  6701. static int __init iwl4965_init(void)
  6702. {
  6703. int ret;
  6704. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  6705. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  6706. ret = iwl4965_rate_control_register();
  6707. if (ret) {
  6708. IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
  6709. return ret;
  6710. }
  6711. ret = pci_register_driver(&iwl4965_driver);
  6712. if (ret) {
  6713. IWL_ERROR("Unable to initialize PCI module\n");
  6714. goto error_register;
  6715. }
  6716. #ifdef CONFIG_IWLWIFI_DEBUG
  6717. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6718. if (ret) {
  6719. IWL_ERROR("Unable to create driver sysfs file\n");
  6720. goto error_debug;
  6721. }
  6722. #endif
  6723. return ret;
  6724. #ifdef CONFIG_IWLWIFI_DEBUG
  6725. error_debug:
  6726. pci_unregister_driver(&iwl4965_driver);
  6727. #endif
  6728. error_register:
  6729. iwl4965_rate_control_unregister();
  6730. return ret;
  6731. }
  6732. static void __exit iwl4965_exit(void)
  6733. {
  6734. #ifdef CONFIG_IWLWIFI_DEBUG
  6735. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6736. #endif
  6737. pci_unregister_driver(&iwl4965_driver);
  6738. iwl4965_rate_control_unregister();
  6739. }
  6740. module_exit(iwl4965_exit);
  6741. module_init(iwl4965_init);