nouveau_fence.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617
  1. /*
  2. * Copyright (C) 2007 Ben Skeggs.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include "drmP.h"
  27. #include "drm.h"
  28. #include <linux/ktime.h>
  29. #include <linux/hrtimer.h>
  30. #include "nouveau_drv.h"
  31. #include "nouveau_ramht.h"
  32. #include "nouveau_dma.h"
  33. #define USE_REFCNT(dev) (nouveau_private(dev)->chipset >= 0x10)
  34. #define USE_SEMA(dev) (nouveau_private(dev)->chipset >= 0x17)
  35. struct nouveau_fence {
  36. struct nouveau_channel *channel;
  37. struct kref refcount;
  38. struct list_head entry;
  39. uint32_t sequence;
  40. bool signalled;
  41. unsigned long timeout;
  42. void (*work)(void *priv, bool signalled);
  43. void *priv;
  44. };
  45. struct nouveau_semaphore {
  46. struct kref ref;
  47. struct drm_device *dev;
  48. struct drm_mm_node *mem;
  49. };
  50. static inline struct nouveau_fence *
  51. nouveau_fence(void *sync_obj)
  52. {
  53. return (struct nouveau_fence *)sync_obj;
  54. }
  55. static void
  56. nouveau_fence_del(struct kref *ref)
  57. {
  58. struct nouveau_fence *fence =
  59. container_of(ref, struct nouveau_fence, refcount);
  60. nouveau_channel_ref(NULL, &fence->channel);
  61. kfree(fence);
  62. }
  63. void
  64. nouveau_fence_update(struct nouveau_channel *chan)
  65. {
  66. struct drm_device *dev = chan->dev;
  67. struct nouveau_fence *tmp, *fence;
  68. uint32_t sequence;
  69. spin_lock(&chan->fence.lock);
  70. /* Fetch the last sequence if the channel is still up and running */
  71. if (likely(!list_empty(&chan->fence.pending))) {
  72. if (USE_REFCNT(dev))
  73. sequence = nvchan_rd32(chan, 0x48);
  74. else
  75. sequence = atomic_read(&chan->fence.last_sequence_irq);
  76. if (chan->fence.sequence_ack == sequence)
  77. goto out;
  78. chan->fence.sequence_ack = sequence;
  79. }
  80. list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) {
  81. if (fence->sequence > chan->fence.sequence_ack)
  82. break;
  83. fence->signalled = true;
  84. list_del(&fence->entry);
  85. if (fence->work)
  86. fence->work(fence->priv, true);
  87. kref_put(&fence->refcount, nouveau_fence_del);
  88. }
  89. out:
  90. spin_unlock(&chan->fence.lock);
  91. }
  92. int
  93. nouveau_fence_new(struct nouveau_channel *chan, struct nouveau_fence **pfence,
  94. bool emit)
  95. {
  96. struct nouveau_fence *fence;
  97. int ret = 0;
  98. fence = kzalloc(sizeof(*fence), GFP_KERNEL);
  99. if (!fence)
  100. return -ENOMEM;
  101. kref_init(&fence->refcount);
  102. nouveau_channel_ref(chan, &fence->channel);
  103. if (emit)
  104. ret = nouveau_fence_emit(fence);
  105. if (ret)
  106. nouveau_fence_unref(&fence);
  107. *pfence = fence;
  108. return ret;
  109. }
  110. struct nouveau_channel *
  111. nouveau_fence_channel(struct nouveau_fence *fence)
  112. {
  113. return fence ? nouveau_channel_get_unlocked(fence->channel) : NULL;
  114. }
  115. int
  116. nouveau_fence_emit(struct nouveau_fence *fence)
  117. {
  118. struct nouveau_channel *chan = fence->channel;
  119. struct drm_device *dev = chan->dev;
  120. struct drm_nouveau_private *dev_priv = dev->dev_private;
  121. int ret;
  122. ret = RING_SPACE(chan, 2);
  123. if (ret)
  124. return ret;
  125. if (unlikely(chan->fence.sequence == chan->fence.sequence_ack - 1)) {
  126. nouveau_fence_update(chan);
  127. BUG_ON(chan->fence.sequence ==
  128. chan->fence.sequence_ack - 1);
  129. }
  130. fence->sequence = ++chan->fence.sequence;
  131. kref_get(&fence->refcount);
  132. spin_lock(&chan->fence.lock);
  133. list_add_tail(&fence->entry, &chan->fence.pending);
  134. spin_unlock(&chan->fence.lock);
  135. if (USE_REFCNT(dev)) {
  136. if (dev_priv->card_type < NV_C0)
  137. BEGIN_NV04(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
  138. else
  139. BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
  140. } else {
  141. BEGIN_NV04(chan, NvSubSw, 0x0150, 1);
  142. }
  143. OUT_RING (chan, fence->sequence);
  144. FIRE_RING(chan);
  145. fence->timeout = jiffies + 3 * DRM_HZ;
  146. return 0;
  147. }
  148. void
  149. nouveau_fence_work(struct nouveau_fence *fence,
  150. void (*work)(void *priv, bool signalled),
  151. void *priv)
  152. {
  153. BUG_ON(fence->work);
  154. spin_lock(&fence->channel->fence.lock);
  155. if (fence->signalled) {
  156. work(priv, true);
  157. } else {
  158. fence->work = work;
  159. fence->priv = priv;
  160. }
  161. spin_unlock(&fence->channel->fence.lock);
  162. }
  163. void
  164. __nouveau_fence_unref(void **sync_obj)
  165. {
  166. struct nouveau_fence *fence = nouveau_fence(*sync_obj);
  167. if (fence)
  168. kref_put(&fence->refcount, nouveau_fence_del);
  169. *sync_obj = NULL;
  170. }
  171. void *
  172. __nouveau_fence_ref(void *sync_obj)
  173. {
  174. struct nouveau_fence *fence = nouveau_fence(sync_obj);
  175. kref_get(&fence->refcount);
  176. return sync_obj;
  177. }
  178. bool
  179. __nouveau_fence_signalled(void *sync_obj, void *sync_arg)
  180. {
  181. struct nouveau_fence *fence = nouveau_fence(sync_obj);
  182. struct nouveau_channel *chan = fence->channel;
  183. if (fence->signalled)
  184. return true;
  185. nouveau_fence_update(chan);
  186. return fence->signalled;
  187. }
  188. int
  189. __nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)
  190. {
  191. struct nouveau_fence *fence = nouveau_fence(sync_obj);
  192. unsigned long timeout = fence->timeout;
  193. unsigned long sleep_time = NSEC_PER_MSEC / 1000;
  194. ktime_t t;
  195. int ret = 0;
  196. while (1) {
  197. if (__nouveau_fence_signalled(sync_obj, sync_arg))
  198. break;
  199. if (time_after_eq(jiffies, timeout)) {
  200. ret = -EBUSY;
  201. break;
  202. }
  203. __set_current_state(intr ? TASK_INTERRUPTIBLE
  204. : TASK_UNINTERRUPTIBLE);
  205. if (lazy) {
  206. t = ktime_set(0, sleep_time);
  207. schedule_hrtimeout(&t, HRTIMER_MODE_REL);
  208. sleep_time *= 2;
  209. if (sleep_time > NSEC_PER_MSEC)
  210. sleep_time = NSEC_PER_MSEC;
  211. }
  212. if (intr && signal_pending(current)) {
  213. ret = -ERESTARTSYS;
  214. break;
  215. }
  216. }
  217. __set_current_state(TASK_RUNNING);
  218. return ret;
  219. }
  220. static struct nouveau_semaphore *
  221. semaphore_alloc(struct drm_device *dev)
  222. {
  223. struct drm_nouveau_private *dev_priv = dev->dev_private;
  224. struct nouveau_semaphore *sema;
  225. int size = (dev_priv->chipset < 0x84) ? 4 : 16;
  226. int ret, i;
  227. if (!USE_SEMA(dev))
  228. return NULL;
  229. sema = kmalloc(sizeof(*sema), GFP_KERNEL);
  230. if (!sema)
  231. goto fail;
  232. ret = drm_mm_pre_get(&dev_priv->fence.heap);
  233. if (ret)
  234. goto fail;
  235. spin_lock(&dev_priv->fence.lock);
  236. sema->mem = drm_mm_search_free(&dev_priv->fence.heap, size, 0, 0);
  237. if (sema->mem)
  238. sema->mem = drm_mm_get_block_atomic(sema->mem, size, 0);
  239. spin_unlock(&dev_priv->fence.lock);
  240. if (!sema->mem)
  241. goto fail;
  242. kref_init(&sema->ref);
  243. sema->dev = dev;
  244. for (i = sema->mem->start; i < sema->mem->start + size; i += 4)
  245. nouveau_bo_wr32(dev_priv->fence.bo, i / 4, 0);
  246. return sema;
  247. fail:
  248. kfree(sema);
  249. return NULL;
  250. }
  251. static void
  252. semaphore_free(struct kref *ref)
  253. {
  254. struct nouveau_semaphore *sema =
  255. container_of(ref, struct nouveau_semaphore, ref);
  256. struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
  257. spin_lock(&dev_priv->fence.lock);
  258. drm_mm_put_block(sema->mem);
  259. spin_unlock(&dev_priv->fence.lock);
  260. kfree(sema);
  261. }
  262. static void
  263. semaphore_work(void *priv, bool signalled)
  264. {
  265. struct nouveau_semaphore *sema = priv;
  266. struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
  267. if (unlikely(!signalled))
  268. nouveau_bo_wr32(dev_priv->fence.bo, sema->mem->start / 4, 1);
  269. kref_put(&sema->ref, semaphore_free);
  270. }
  271. static int
  272. semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
  273. {
  274. struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
  275. struct nouveau_fence *fence = NULL;
  276. u64 offset = chan->fence.vma.offset + sema->mem->start;
  277. int ret;
  278. if (dev_priv->chipset < 0x84) {
  279. ret = RING_SPACE(chan, 4);
  280. if (ret)
  281. return ret;
  282. BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 3);
  283. OUT_RING (chan, NvSema);
  284. OUT_RING (chan, offset);
  285. OUT_RING (chan, 1);
  286. } else
  287. if (dev_priv->chipset < 0xc0) {
  288. ret = RING_SPACE(chan, 7);
  289. if (ret)
  290. return ret;
  291. BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);
  292. OUT_RING (chan, chan->vram_handle);
  293. BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
  294. OUT_RING (chan, upper_32_bits(offset));
  295. OUT_RING (chan, lower_32_bits(offset));
  296. OUT_RING (chan, 1);
  297. OUT_RING (chan, 1); /* ACQUIRE_EQ */
  298. } else {
  299. ret = RING_SPACE(chan, 5);
  300. if (ret)
  301. return ret;
  302. BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
  303. OUT_RING (chan, upper_32_bits(offset));
  304. OUT_RING (chan, lower_32_bits(offset));
  305. OUT_RING (chan, 1);
  306. OUT_RING (chan, 0x1001); /* ACQUIRE_EQ */
  307. }
  308. /* Delay semaphore destruction until its work is done */
  309. ret = nouveau_fence_new(chan, &fence, true);
  310. if (ret)
  311. return ret;
  312. kref_get(&sema->ref);
  313. nouveau_fence_work(fence, semaphore_work, sema);
  314. nouveau_fence_unref(&fence);
  315. return 0;
  316. }
  317. static int
  318. semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
  319. {
  320. struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
  321. struct nouveau_fence *fence = NULL;
  322. u64 offset = chan->fence.vma.offset + sema->mem->start;
  323. int ret;
  324. if (dev_priv->chipset < 0x84) {
  325. ret = RING_SPACE(chan, 5);
  326. if (ret)
  327. return ret;
  328. BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 2);
  329. OUT_RING (chan, NvSema);
  330. OUT_RING (chan, offset);
  331. BEGIN_NV04(chan, 0, NV11_SUBCHAN_SEMAPHORE_RELEASE, 1);
  332. OUT_RING (chan, 1);
  333. } else
  334. if (dev_priv->chipset < 0xc0) {
  335. ret = RING_SPACE(chan, 7);
  336. if (ret)
  337. return ret;
  338. BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);
  339. OUT_RING (chan, chan->vram_handle);
  340. BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
  341. OUT_RING (chan, upper_32_bits(offset));
  342. OUT_RING (chan, lower_32_bits(offset));
  343. OUT_RING (chan, 1);
  344. OUT_RING (chan, 2); /* RELEASE */
  345. } else {
  346. ret = RING_SPACE(chan, 5);
  347. if (ret)
  348. return ret;
  349. BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
  350. OUT_RING (chan, upper_32_bits(offset));
  351. OUT_RING (chan, lower_32_bits(offset));
  352. OUT_RING (chan, 1);
  353. OUT_RING (chan, 0x1002); /* RELEASE */
  354. }
  355. /* Delay semaphore destruction until its work is done */
  356. ret = nouveau_fence_new(chan, &fence, true);
  357. if (ret)
  358. return ret;
  359. kref_get(&sema->ref);
  360. nouveau_fence_work(fence, semaphore_work, sema);
  361. nouveau_fence_unref(&fence);
  362. return 0;
  363. }
  364. int
  365. nouveau_fence_sync(struct nouveau_fence *fence,
  366. struct nouveau_channel *wchan)
  367. {
  368. struct nouveau_channel *chan = nouveau_fence_channel(fence);
  369. struct drm_device *dev = wchan->dev;
  370. struct nouveau_semaphore *sema;
  371. int ret = 0;
  372. if (likely(!chan || chan == wchan ||
  373. nouveau_fence_signalled(fence)))
  374. goto out;
  375. sema = semaphore_alloc(dev);
  376. if (!sema) {
  377. /* Early card or broken userspace, fall back to
  378. * software sync. */
  379. ret = nouveau_fence_wait(fence, true, false);
  380. goto out;
  381. }
  382. /* try to take chan's mutex, if we can't take it right away
  383. * we have to fallback to software sync to prevent locking
  384. * order issues
  385. */
  386. if (!mutex_trylock(&chan->mutex)) {
  387. ret = nouveau_fence_wait(fence, true, false);
  388. goto out_unref;
  389. }
  390. /* Make wchan wait until it gets signalled */
  391. ret = semaphore_acquire(wchan, sema);
  392. if (ret)
  393. goto out_unlock;
  394. /* Signal the semaphore from chan */
  395. ret = semaphore_release(chan, sema);
  396. out_unlock:
  397. mutex_unlock(&chan->mutex);
  398. out_unref:
  399. kref_put(&sema->ref, semaphore_free);
  400. out:
  401. if (chan)
  402. nouveau_channel_put_unlocked(&chan);
  403. return ret;
  404. }
  405. int
  406. __nouveau_fence_flush(void *sync_obj, void *sync_arg)
  407. {
  408. return 0;
  409. }
  410. int
  411. nouveau_fence_channel_init(struct nouveau_channel *chan)
  412. {
  413. struct drm_device *dev = chan->dev;
  414. struct drm_nouveau_private *dev_priv = dev->dev_private;
  415. struct nouveau_gpuobj *obj = NULL;
  416. int ret;
  417. if (dev_priv->card_type < NV_C0) {
  418. /* Create an NV_SW object for various sync purposes */
  419. ret = nouveau_gpuobj_gr_new(chan, NvSw, NV_SW);
  420. if (ret)
  421. return ret;
  422. ret = RING_SPACE(chan, 2);
  423. if (ret)
  424. return ret;
  425. BEGIN_NV04(chan, NvSubSw, NV01_SUBCHAN_OBJECT, 1);
  426. OUT_RING (chan, NvSw);
  427. FIRE_RING (chan);
  428. }
  429. /* Setup area of memory shared between all channels for x-chan sync */
  430. if (USE_SEMA(dev) && dev_priv->chipset < 0x84) {
  431. struct ttm_mem_reg *mem = &dev_priv->fence.bo->bo.mem;
  432. ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_FROM_MEMORY,
  433. mem->start << PAGE_SHIFT,
  434. mem->size, NV_MEM_ACCESS_RW,
  435. NV_MEM_TARGET_VRAM, &obj);
  436. if (ret)
  437. return ret;
  438. ret = nouveau_ramht_insert(chan, NvSema, obj);
  439. nouveau_gpuobj_ref(NULL, &obj);
  440. if (ret)
  441. return ret;
  442. } else
  443. if (USE_SEMA(dev)) {
  444. /* map fence bo into channel's vm */
  445. ret = nouveau_bo_vma_add(dev_priv->fence.bo, chan->vm,
  446. &chan->fence.vma);
  447. if (ret)
  448. return ret;
  449. }
  450. atomic_set(&chan->fence.last_sequence_irq, 0);
  451. return 0;
  452. }
  453. void
  454. nouveau_fence_channel_fini(struct nouveau_channel *chan)
  455. {
  456. struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
  457. struct nouveau_fence *tmp, *fence;
  458. spin_lock(&chan->fence.lock);
  459. list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) {
  460. fence->signalled = true;
  461. list_del(&fence->entry);
  462. if (unlikely(fence->work))
  463. fence->work(fence->priv, false);
  464. kref_put(&fence->refcount, nouveau_fence_del);
  465. }
  466. spin_unlock(&chan->fence.lock);
  467. nouveau_bo_vma_del(dev_priv->fence.bo, &chan->fence.vma);
  468. }
  469. int
  470. nouveau_fence_init(struct drm_device *dev)
  471. {
  472. struct drm_nouveau_private *dev_priv = dev->dev_private;
  473. int size = (dev_priv->chipset < 0x84) ? 4096 : 16384;
  474. int ret;
  475. /* Create a shared VRAM heap for cross-channel sync. */
  476. if (USE_SEMA(dev)) {
  477. ret = nouveau_bo_new(dev, size, 0, TTM_PL_FLAG_VRAM,
  478. 0, 0, NULL, &dev_priv->fence.bo);
  479. if (ret)
  480. return ret;
  481. ret = nouveau_bo_pin(dev_priv->fence.bo, TTM_PL_FLAG_VRAM);
  482. if (ret)
  483. goto fail;
  484. ret = nouveau_bo_map(dev_priv->fence.bo);
  485. if (ret)
  486. goto fail;
  487. ret = drm_mm_init(&dev_priv->fence.heap, 0,
  488. dev_priv->fence.bo->bo.mem.size);
  489. if (ret)
  490. goto fail;
  491. spin_lock_init(&dev_priv->fence.lock);
  492. }
  493. return 0;
  494. fail:
  495. nouveau_bo_unmap(dev_priv->fence.bo);
  496. nouveau_bo_ref(NULL, &dev_priv->fence.bo);
  497. return ret;
  498. }
  499. void
  500. nouveau_fence_fini(struct drm_device *dev)
  501. {
  502. struct drm_nouveau_private *dev_priv = dev->dev_private;
  503. if (USE_SEMA(dev)) {
  504. drm_mm_takedown(&dev_priv->fence.heap);
  505. nouveau_bo_unmap(dev_priv->fence.bo);
  506. nouveau_bo_unpin(dev_priv->fence.bo);
  507. nouveau_bo_ref(NULL, &dev_priv->fence.bo);
  508. }
  509. }