dma-default.c 8.3 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
  7. * Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org>
  8. * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
  9. */
  10. #include <linux/types.h>
  11. #include <linux/dma-mapping.h>
  12. #include <linux/mm.h>
  13. #include <linux/module.h>
  14. #include <linux/string.h>
  15. #include <asm/cache.h>
  16. #include <asm/io.h>
  17. #include <dma-coherence.h>
  18. static inline unsigned long dma_addr_to_virt(dma_addr_t dma_addr)
  19. {
  20. unsigned long addr = plat_dma_addr_to_phys(dma_addr);
  21. return (unsigned long)phys_to_virt(addr);
  22. }
  23. /*
  24. * Warning on the terminology - Linux calls an uncached area coherent;
  25. * MIPS terminology calls memory areas with hardware maintained coherency
  26. * coherent.
  27. */
  28. static inline int cpu_is_noncoherent_r10000(struct device *dev)
  29. {
  30. return !plat_device_is_coherent(dev) &&
  31. (current_cpu_type() == CPU_R10000 ||
  32. current_cpu_type() == CPU_R12000);
  33. }
  34. void *dma_alloc_noncoherent(struct device *dev, size_t size,
  35. dma_addr_t * dma_handle, gfp_t gfp)
  36. {
  37. void *ret;
  38. /* ignore region specifiers */
  39. gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
  40. if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
  41. gfp |= GFP_DMA;
  42. ret = (void *) __get_free_pages(gfp, get_order(size));
  43. if (ret != NULL) {
  44. memset(ret, 0, size);
  45. *dma_handle = plat_map_dma_mem(dev, ret, size);
  46. }
  47. return ret;
  48. }
  49. EXPORT_SYMBOL(dma_alloc_noncoherent);
  50. void *dma_alloc_coherent(struct device *dev, size_t size,
  51. dma_addr_t * dma_handle, gfp_t gfp)
  52. {
  53. void *ret;
  54. /* ignore region specifiers */
  55. gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
  56. if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
  57. gfp |= GFP_DMA;
  58. ret = (void *) __get_free_pages(gfp, get_order(size));
  59. if (ret) {
  60. memset(ret, 0, size);
  61. *dma_handle = plat_map_dma_mem(dev, ret, size);
  62. if (!plat_device_is_coherent(dev)) {
  63. dma_cache_wback_inv((unsigned long) ret, size);
  64. ret = UNCAC_ADDR(ret);
  65. }
  66. }
  67. return ret;
  68. }
  69. EXPORT_SYMBOL(dma_alloc_coherent);
  70. void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
  71. dma_addr_t dma_handle)
  72. {
  73. free_pages((unsigned long) vaddr, get_order(size));
  74. }
  75. EXPORT_SYMBOL(dma_free_noncoherent);
  76. void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
  77. dma_addr_t dma_handle)
  78. {
  79. unsigned long addr = (unsigned long) vaddr;
  80. if (!plat_device_is_coherent(dev))
  81. addr = CAC_ADDR(addr);
  82. free_pages(addr, get_order(size));
  83. }
  84. EXPORT_SYMBOL(dma_free_coherent);
  85. static inline void __dma_sync(unsigned long addr, size_t size,
  86. enum dma_data_direction direction)
  87. {
  88. switch (direction) {
  89. case DMA_TO_DEVICE:
  90. dma_cache_wback(addr, size);
  91. break;
  92. case DMA_FROM_DEVICE:
  93. dma_cache_inv(addr, size);
  94. break;
  95. case DMA_BIDIRECTIONAL:
  96. dma_cache_wback_inv(addr, size);
  97. break;
  98. default:
  99. BUG();
  100. }
  101. }
  102. dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
  103. enum dma_data_direction direction)
  104. {
  105. unsigned long addr = (unsigned long) ptr;
  106. if (!plat_device_is_coherent(dev))
  107. __dma_sync(addr, size, direction);
  108. return plat_map_dma_mem(dev, ptr, size);
  109. }
  110. EXPORT_SYMBOL(dma_map_single);
  111. void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
  112. enum dma_data_direction direction)
  113. {
  114. if (cpu_is_noncoherent_r10000(dev))
  115. __dma_sync(dma_addr_to_virt(dma_addr), size,
  116. direction);
  117. plat_unmap_dma_mem(dma_addr);
  118. }
  119. EXPORT_SYMBOL(dma_unmap_single);
  120. int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
  121. enum dma_data_direction direction)
  122. {
  123. int i;
  124. BUG_ON(direction == DMA_NONE);
  125. for (i = 0; i < nents; i++, sg++) {
  126. unsigned long addr;
  127. addr = (unsigned long) sg_virt(sg);
  128. if (!plat_device_is_coherent(dev) && addr)
  129. __dma_sync(addr, sg->length, direction);
  130. sg->dma_address = plat_map_dma_mem(dev,
  131. (void *)addr, sg->length);
  132. }
  133. return nents;
  134. }
  135. EXPORT_SYMBOL(dma_map_sg);
  136. dma_addr_t dma_map_page(struct device *dev, struct page *page,
  137. unsigned long offset, size_t size, enum dma_data_direction direction)
  138. {
  139. BUG_ON(direction == DMA_NONE);
  140. if (!plat_device_is_coherent(dev)) {
  141. unsigned long addr;
  142. addr = (unsigned long) page_address(page) + offset;
  143. dma_cache_wback_inv(addr, size);
  144. }
  145. return plat_map_dma_mem_page(dev, page) + offset;
  146. }
  147. EXPORT_SYMBOL(dma_map_page);
  148. void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
  149. enum dma_data_direction direction)
  150. {
  151. BUG_ON(direction == DMA_NONE);
  152. if (!plat_device_is_coherent(dev) && direction != DMA_TO_DEVICE) {
  153. unsigned long addr;
  154. addr = plat_dma_addr_to_phys(dma_address);
  155. dma_cache_wback_inv(addr, size);
  156. }
  157. plat_unmap_dma_mem(dma_address);
  158. }
  159. EXPORT_SYMBOL(dma_unmap_page);
  160. void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
  161. enum dma_data_direction direction)
  162. {
  163. unsigned long addr;
  164. int i;
  165. BUG_ON(direction == DMA_NONE);
  166. for (i = 0; i < nhwentries; i++, sg++) {
  167. if (!plat_device_is_coherent(dev) &&
  168. direction != DMA_TO_DEVICE) {
  169. addr = (unsigned long) sg_virt(sg);
  170. if (addr)
  171. __dma_sync(addr, sg->length, direction);
  172. }
  173. plat_unmap_dma_mem(sg->dma_address);
  174. }
  175. }
  176. EXPORT_SYMBOL(dma_unmap_sg);
  177. void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
  178. size_t size, enum dma_data_direction direction)
  179. {
  180. BUG_ON(direction == DMA_NONE);
  181. if (cpu_is_noncoherent_r10000(dev)) {
  182. unsigned long addr;
  183. addr = dma_addr_to_virt(dma_handle);
  184. __dma_sync(addr, size, direction);
  185. }
  186. }
  187. EXPORT_SYMBOL(dma_sync_single_for_cpu);
  188. void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
  189. size_t size, enum dma_data_direction direction)
  190. {
  191. BUG_ON(direction == DMA_NONE);
  192. if (!plat_device_is_coherent(dev)) {
  193. unsigned long addr;
  194. addr = dma_addr_to_virt(dma_handle);
  195. __dma_sync(addr, size, direction);
  196. }
  197. }
  198. EXPORT_SYMBOL(dma_sync_single_for_device);
  199. void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
  200. unsigned long offset, size_t size, enum dma_data_direction direction)
  201. {
  202. BUG_ON(direction == DMA_NONE);
  203. if (cpu_is_noncoherent_r10000(dev)) {
  204. unsigned long addr;
  205. addr = dma_addr_to_virt(dma_handle);
  206. __dma_sync(addr + offset, size, direction);
  207. }
  208. }
  209. EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
  210. void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
  211. unsigned long offset, size_t size, enum dma_data_direction direction)
  212. {
  213. BUG_ON(direction == DMA_NONE);
  214. if (!plat_device_is_coherent(dev)) {
  215. unsigned long addr;
  216. addr = dma_addr_to_virt(dma_handle);
  217. __dma_sync(addr + offset, size, direction);
  218. }
  219. }
  220. EXPORT_SYMBOL(dma_sync_single_range_for_device);
  221. void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
  222. enum dma_data_direction direction)
  223. {
  224. int i;
  225. BUG_ON(direction == DMA_NONE);
  226. /* Make sure that gcc doesn't leave the empty loop body. */
  227. for (i = 0; i < nelems; i++, sg++) {
  228. if (cpu_is_noncoherent_r10000(dev))
  229. __dma_sync((unsigned long)page_address(sg_page(sg)),
  230. sg->length, direction);
  231. plat_unmap_dma_mem(sg->dma_address);
  232. }
  233. }
  234. EXPORT_SYMBOL(dma_sync_sg_for_cpu);
  235. void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
  236. enum dma_data_direction direction)
  237. {
  238. int i;
  239. BUG_ON(direction == DMA_NONE);
  240. /* Make sure that gcc doesn't leave the empty loop body. */
  241. for (i = 0; i < nelems; i++, sg++) {
  242. if (!plat_device_is_coherent(dev))
  243. __dma_sync((unsigned long)page_address(sg_page(sg)),
  244. sg->length, direction);
  245. plat_unmap_dma_mem(sg->dma_address);
  246. }
  247. }
  248. EXPORT_SYMBOL(dma_sync_sg_for_device);
  249. int dma_mapping_error(dma_addr_t dma_addr)
  250. {
  251. return 0;
  252. }
  253. EXPORT_SYMBOL(dma_mapping_error);
  254. int dma_supported(struct device *dev, u64 mask)
  255. {
  256. /*
  257. * we fall back to GFP_DMA when the mask isn't all 1s,
  258. * so we can't guarantee allocations that must be
  259. * within a tighter range than GFP_DMA..
  260. */
  261. if (mask < 0x00ffffff)
  262. return 0;
  263. return 1;
  264. }
  265. EXPORT_SYMBOL(dma_supported);
  266. int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
  267. {
  268. return plat_device_is_coherent(dev);
  269. }
  270. EXPORT_SYMBOL(dma_is_consistent);
  271. void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  272. enum dma_data_direction direction)
  273. {
  274. BUG_ON(direction == DMA_NONE);
  275. if (!plat_device_is_coherent(dev))
  276. dma_cache_wback_inv((unsigned long)vaddr, size);
  277. }
  278. EXPORT_SYMBOL(dma_cache_sync);