cputable.c 31 KB

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  1. /*
  2. * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
  3. *
  4. * Modifications for ppc64:
  5. * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/config.h>
  13. #include <linux/string.h>
  14. #include <linux/sched.h>
  15. #include <linux/threads.h>
  16. #include <linux/init.h>
  17. #include <linux/module.h>
  18. #include <asm/oprofile_impl.h>
  19. #include <asm/cputable.h>
  20. struct cpu_spec* cur_cpu_spec = NULL;
  21. EXPORT_SYMBOL(cur_cpu_spec);
  22. /* NOTE:
  23. * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
  24. * the responsibility of the appropriate CPU save/restore functions to
  25. * eventually copy these settings over. Those save/restore aren't yet
  26. * part of the cputable though. That has to be fixed for both ppc32
  27. * and ppc64
  28. */
  29. #ifdef CONFIG_PPC32
  30. extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
  31. extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
  32. extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
  33. extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
  34. extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
  35. extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
  36. extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
  37. extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
  38. #endif /* CONFIG_PPC32 */
  39. extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
  40. /* This table only contains "desktop" CPUs, it need to be filled with embedded
  41. * ones as well...
  42. */
  43. #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
  44. PPC_FEATURE_HAS_MMU)
  45. #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
  46. #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
  47. #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
  48. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  49. #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
  50. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  51. #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
  52. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  53. PPC_FEATURE_TRUE_LE)
  54. #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
  55. PPC_FEATURE_BOOKE)
  56. /* We only set the spe features if the kernel was compiled with
  57. * spe support
  58. */
  59. #ifdef CONFIG_SPE
  60. #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
  61. #else
  62. #define PPC_FEATURE_SPE_COMP 0
  63. #endif
  64. struct cpu_spec cpu_specs[] = {
  65. #ifdef CONFIG_PPC64
  66. { /* Power3 */
  67. .pvr_mask = 0xffff0000,
  68. .pvr_value = 0x00400000,
  69. .cpu_name = "POWER3 (630)",
  70. .cpu_features = CPU_FTRS_POWER3,
  71. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  72. .icache_bsize = 128,
  73. .dcache_bsize = 128,
  74. .num_pmcs = 8,
  75. .oprofile_cpu_type = "ppc64/power3",
  76. .oprofile_type = PPC_OPROFILE_RS64,
  77. .platform = "power3",
  78. },
  79. { /* Power3+ */
  80. .pvr_mask = 0xffff0000,
  81. .pvr_value = 0x00410000,
  82. .cpu_name = "POWER3 (630+)",
  83. .cpu_features = CPU_FTRS_POWER3,
  84. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  85. .icache_bsize = 128,
  86. .dcache_bsize = 128,
  87. .num_pmcs = 8,
  88. .oprofile_cpu_type = "ppc64/power3",
  89. .oprofile_type = PPC_OPROFILE_RS64,
  90. .platform = "power3",
  91. },
  92. { /* Northstar */
  93. .pvr_mask = 0xffff0000,
  94. .pvr_value = 0x00330000,
  95. .cpu_name = "RS64-II (northstar)",
  96. .cpu_features = CPU_FTRS_RS64,
  97. .cpu_user_features = COMMON_USER_PPC64,
  98. .icache_bsize = 128,
  99. .dcache_bsize = 128,
  100. .num_pmcs = 8,
  101. .oprofile_cpu_type = "ppc64/rs64",
  102. .oprofile_type = PPC_OPROFILE_RS64,
  103. .platform = "rs64",
  104. },
  105. { /* Pulsar */
  106. .pvr_mask = 0xffff0000,
  107. .pvr_value = 0x00340000,
  108. .cpu_name = "RS64-III (pulsar)",
  109. .cpu_features = CPU_FTRS_RS64,
  110. .cpu_user_features = COMMON_USER_PPC64,
  111. .icache_bsize = 128,
  112. .dcache_bsize = 128,
  113. .num_pmcs = 8,
  114. .oprofile_cpu_type = "ppc64/rs64",
  115. .oprofile_type = PPC_OPROFILE_RS64,
  116. .platform = "rs64",
  117. },
  118. { /* I-star */
  119. .pvr_mask = 0xffff0000,
  120. .pvr_value = 0x00360000,
  121. .cpu_name = "RS64-III (icestar)",
  122. .cpu_features = CPU_FTRS_RS64,
  123. .cpu_user_features = COMMON_USER_PPC64,
  124. .icache_bsize = 128,
  125. .dcache_bsize = 128,
  126. .num_pmcs = 8,
  127. .oprofile_cpu_type = "ppc64/rs64",
  128. .oprofile_type = PPC_OPROFILE_RS64,
  129. .platform = "rs64",
  130. },
  131. { /* S-star */
  132. .pvr_mask = 0xffff0000,
  133. .pvr_value = 0x00370000,
  134. .cpu_name = "RS64-IV (sstar)",
  135. .cpu_features = CPU_FTRS_RS64,
  136. .cpu_user_features = COMMON_USER_PPC64,
  137. .icache_bsize = 128,
  138. .dcache_bsize = 128,
  139. .num_pmcs = 8,
  140. .oprofile_cpu_type = "ppc64/rs64",
  141. .oprofile_type = PPC_OPROFILE_RS64,
  142. .platform = "rs64",
  143. },
  144. { /* Power4 */
  145. .pvr_mask = 0xffff0000,
  146. .pvr_value = 0x00350000,
  147. .cpu_name = "POWER4 (gp)",
  148. .cpu_features = CPU_FTRS_POWER4,
  149. .cpu_user_features = COMMON_USER_POWER4,
  150. .icache_bsize = 128,
  151. .dcache_bsize = 128,
  152. .num_pmcs = 8,
  153. .oprofile_cpu_type = "ppc64/power4",
  154. .oprofile_type = PPC_OPROFILE_POWER4,
  155. .platform = "power4",
  156. },
  157. { /* Power4+ */
  158. .pvr_mask = 0xffff0000,
  159. .pvr_value = 0x00380000,
  160. .cpu_name = "POWER4+ (gq)",
  161. .cpu_features = CPU_FTRS_POWER4,
  162. .cpu_user_features = COMMON_USER_POWER4,
  163. .icache_bsize = 128,
  164. .dcache_bsize = 128,
  165. .num_pmcs = 8,
  166. .oprofile_cpu_type = "ppc64/power4",
  167. .oprofile_type = PPC_OPROFILE_POWER4,
  168. .platform = "power4",
  169. },
  170. { /* PPC970 */
  171. .pvr_mask = 0xffff0000,
  172. .pvr_value = 0x00390000,
  173. .cpu_name = "PPC970",
  174. .cpu_features = CPU_FTRS_PPC970,
  175. .cpu_user_features = COMMON_USER_POWER4 |
  176. PPC_FEATURE_HAS_ALTIVEC_COMP,
  177. .icache_bsize = 128,
  178. .dcache_bsize = 128,
  179. .num_pmcs = 8,
  180. .cpu_setup = __setup_cpu_ppc970,
  181. .oprofile_cpu_type = "ppc64/970",
  182. .oprofile_type = PPC_OPROFILE_POWER4,
  183. .platform = "ppc970",
  184. },
  185. { /* PPC970FX */
  186. .pvr_mask = 0xffff0000,
  187. .pvr_value = 0x003c0000,
  188. .cpu_name = "PPC970FX",
  189. .cpu_features = CPU_FTRS_PPC970,
  190. .cpu_user_features = COMMON_USER_POWER4 |
  191. PPC_FEATURE_HAS_ALTIVEC_COMP,
  192. .icache_bsize = 128,
  193. .dcache_bsize = 128,
  194. .num_pmcs = 8,
  195. .cpu_setup = __setup_cpu_ppc970,
  196. .oprofile_cpu_type = "ppc64/970",
  197. .oprofile_type = PPC_OPROFILE_POWER4,
  198. .platform = "ppc970",
  199. },
  200. { /* PPC970MP */
  201. .pvr_mask = 0xffff0000,
  202. .pvr_value = 0x00440000,
  203. .cpu_name = "PPC970MP",
  204. .cpu_features = CPU_FTRS_PPC970,
  205. .cpu_user_features = COMMON_USER_POWER4 |
  206. PPC_FEATURE_HAS_ALTIVEC_COMP,
  207. .icache_bsize = 128,
  208. .dcache_bsize = 128,
  209. .num_pmcs = 8,
  210. .cpu_setup = __setup_cpu_ppc970,
  211. .oprofile_cpu_type = "ppc64/970",
  212. .oprofile_type = PPC_OPROFILE_POWER4,
  213. .platform = "ppc970",
  214. },
  215. { /* Power5 GR */
  216. .pvr_mask = 0xffff0000,
  217. .pvr_value = 0x003a0000,
  218. .cpu_name = "POWER5 (gr)",
  219. .cpu_features = CPU_FTRS_POWER5,
  220. .cpu_user_features = COMMON_USER_POWER5,
  221. .icache_bsize = 128,
  222. .dcache_bsize = 128,
  223. .num_pmcs = 6,
  224. .oprofile_cpu_type = "ppc64/power5",
  225. .oprofile_type = PPC_OPROFILE_POWER4,
  226. /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
  227. * and above but only works on POWER5 and above
  228. */
  229. .oprofile_mmcra_sihv = MMCRA_SIHV,
  230. .oprofile_mmcra_sipr = MMCRA_SIPR,
  231. .platform = "power5",
  232. },
  233. { /* Power5 GS */
  234. .pvr_mask = 0xffff0000,
  235. .pvr_value = 0x003b0000,
  236. .cpu_name = "POWER5+ (gs)",
  237. .cpu_features = CPU_FTRS_POWER5,
  238. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  239. .icache_bsize = 128,
  240. .dcache_bsize = 128,
  241. .num_pmcs = 6,
  242. .oprofile_cpu_type = "ppc64/power5+",
  243. .oprofile_type = PPC_OPROFILE_POWER4,
  244. .oprofile_mmcra_sihv = MMCRA_SIHV,
  245. .oprofile_mmcra_sipr = MMCRA_SIPR,
  246. .platform = "power5+",
  247. },
  248. { /* Power6 */
  249. .pvr_mask = 0xffff0000,
  250. .pvr_value = 0x003e0000,
  251. .cpu_name = "POWER6",
  252. .cpu_features = CPU_FTRS_POWER6,
  253. .cpu_user_features = COMMON_USER_POWER6,
  254. .icache_bsize = 128,
  255. .dcache_bsize = 128,
  256. .num_pmcs = 8,
  257. .oprofile_cpu_type = "ppc64/power6",
  258. .oprofile_type = PPC_OPROFILE_POWER4,
  259. .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
  260. .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
  261. .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
  262. POWER6_MMCRA_OTHER,
  263. .platform = "power6",
  264. },
  265. { /* Cell Broadband Engine */
  266. .pvr_mask = 0xffff0000,
  267. .pvr_value = 0x00700000,
  268. .cpu_name = "Cell Broadband Engine",
  269. .cpu_features = CPU_FTRS_CELL,
  270. .cpu_user_features = COMMON_USER_PPC64 |
  271. PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
  272. PPC_FEATURE_SMT,
  273. .icache_bsize = 128,
  274. .dcache_bsize = 128,
  275. .platform = "ppc-cell-be",
  276. },
  277. { /* default match */
  278. .pvr_mask = 0x00000000,
  279. .pvr_value = 0x00000000,
  280. .cpu_name = "POWER4 (compatible)",
  281. .cpu_features = CPU_FTRS_COMPATIBLE,
  282. .cpu_user_features = COMMON_USER_PPC64,
  283. .icache_bsize = 128,
  284. .dcache_bsize = 128,
  285. .num_pmcs = 6,
  286. .platform = "power4",
  287. }
  288. #endif /* CONFIG_PPC64 */
  289. #ifdef CONFIG_PPC32
  290. #if CLASSIC_PPC
  291. { /* 601 */
  292. .pvr_mask = 0xffff0000,
  293. .pvr_value = 0x00010000,
  294. .cpu_name = "601",
  295. .cpu_features = CPU_FTRS_PPC601,
  296. .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
  297. PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
  298. .icache_bsize = 32,
  299. .dcache_bsize = 32,
  300. .platform = "ppc601",
  301. },
  302. { /* 603 */
  303. .pvr_mask = 0xffff0000,
  304. .pvr_value = 0x00030000,
  305. .cpu_name = "603",
  306. .cpu_features = CPU_FTRS_603,
  307. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  308. .icache_bsize = 32,
  309. .dcache_bsize = 32,
  310. .cpu_setup = __setup_cpu_603,
  311. .platform = "ppc603",
  312. },
  313. { /* 603e */
  314. .pvr_mask = 0xffff0000,
  315. .pvr_value = 0x00060000,
  316. .cpu_name = "603e",
  317. .cpu_features = CPU_FTRS_603,
  318. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  319. .icache_bsize = 32,
  320. .dcache_bsize = 32,
  321. .cpu_setup = __setup_cpu_603,
  322. .platform = "ppc603",
  323. },
  324. { /* 603ev */
  325. .pvr_mask = 0xffff0000,
  326. .pvr_value = 0x00070000,
  327. .cpu_name = "603ev",
  328. .cpu_features = CPU_FTRS_603,
  329. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  330. .icache_bsize = 32,
  331. .dcache_bsize = 32,
  332. .cpu_setup = __setup_cpu_603,
  333. .platform = "ppc603",
  334. },
  335. { /* 604 */
  336. .pvr_mask = 0xffff0000,
  337. .pvr_value = 0x00040000,
  338. .cpu_name = "604",
  339. .cpu_features = CPU_FTRS_604,
  340. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  341. .icache_bsize = 32,
  342. .dcache_bsize = 32,
  343. .num_pmcs = 2,
  344. .cpu_setup = __setup_cpu_604,
  345. .platform = "ppc604",
  346. },
  347. { /* 604e */
  348. .pvr_mask = 0xfffff000,
  349. .pvr_value = 0x00090000,
  350. .cpu_name = "604e",
  351. .cpu_features = CPU_FTRS_604,
  352. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  353. .icache_bsize = 32,
  354. .dcache_bsize = 32,
  355. .num_pmcs = 4,
  356. .cpu_setup = __setup_cpu_604,
  357. .platform = "ppc604",
  358. },
  359. { /* 604r */
  360. .pvr_mask = 0xffff0000,
  361. .pvr_value = 0x00090000,
  362. .cpu_name = "604r",
  363. .cpu_features = CPU_FTRS_604,
  364. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  365. .icache_bsize = 32,
  366. .dcache_bsize = 32,
  367. .num_pmcs = 4,
  368. .cpu_setup = __setup_cpu_604,
  369. .platform = "ppc604",
  370. },
  371. { /* 604ev */
  372. .pvr_mask = 0xffff0000,
  373. .pvr_value = 0x000a0000,
  374. .cpu_name = "604ev",
  375. .cpu_features = CPU_FTRS_604,
  376. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  377. .icache_bsize = 32,
  378. .dcache_bsize = 32,
  379. .num_pmcs = 4,
  380. .cpu_setup = __setup_cpu_604,
  381. .platform = "ppc604",
  382. },
  383. { /* 740/750 (0x4202, don't support TAU ?) */
  384. .pvr_mask = 0xffffffff,
  385. .pvr_value = 0x00084202,
  386. .cpu_name = "740/750",
  387. .cpu_features = CPU_FTRS_740_NOTAU,
  388. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  389. .icache_bsize = 32,
  390. .dcache_bsize = 32,
  391. .num_pmcs = 4,
  392. .cpu_setup = __setup_cpu_750,
  393. .platform = "ppc750",
  394. },
  395. { /* 750CX (80100 and 8010x?) */
  396. .pvr_mask = 0xfffffff0,
  397. .pvr_value = 0x00080100,
  398. .cpu_name = "750CX",
  399. .cpu_features = CPU_FTRS_750,
  400. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  401. .icache_bsize = 32,
  402. .dcache_bsize = 32,
  403. .num_pmcs = 4,
  404. .cpu_setup = __setup_cpu_750cx,
  405. .platform = "ppc750",
  406. },
  407. { /* 750CX (82201 and 82202) */
  408. .pvr_mask = 0xfffffff0,
  409. .pvr_value = 0x00082200,
  410. .cpu_name = "750CX",
  411. .cpu_features = CPU_FTRS_750,
  412. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  413. .icache_bsize = 32,
  414. .dcache_bsize = 32,
  415. .num_pmcs = 4,
  416. .cpu_setup = __setup_cpu_750cx,
  417. .platform = "ppc750",
  418. },
  419. { /* 750CXe (82214) */
  420. .pvr_mask = 0xfffffff0,
  421. .pvr_value = 0x00082210,
  422. .cpu_name = "750CXe",
  423. .cpu_features = CPU_FTRS_750,
  424. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  425. .icache_bsize = 32,
  426. .dcache_bsize = 32,
  427. .num_pmcs = 4,
  428. .cpu_setup = __setup_cpu_750cx,
  429. .platform = "ppc750",
  430. },
  431. { /* 750CXe "Gekko" (83214) */
  432. .pvr_mask = 0xffffffff,
  433. .pvr_value = 0x00083214,
  434. .cpu_name = "750CXe",
  435. .cpu_features = CPU_FTRS_750,
  436. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  437. .icache_bsize = 32,
  438. .dcache_bsize = 32,
  439. .num_pmcs = 4,
  440. .cpu_setup = __setup_cpu_750cx,
  441. .platform = "ppc750",
  442. },
  443. { /* 745/755 */
  444. .pvr_mask = 0xfffff000,
  445. .pvr_value = 0x00083000,
  446. .cpu_name = "745/755",
  447. .cpu_features = CPU_FTRS_750,
  448. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  449. .icache_bsize = 32,
  450. .dcache_bsize = 32,
  451. .num_pmcs = 4,
  452. .cpu_setup = __setup_cpu_750,
  453. .platform = "ppc750",
  454. },
  455. { /* 750FX rev 1.x */
  456. .pvr_mask = 0xffffff00,
  457. .pvr_value = 0x70000100,
  458. .cpu_name = "750FX",
  459. .cpu_features = CPU_FTRS_750FX1,
  460. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  461. .icache_bsize = 32,
  462. .dcache_bsize = 32,
  463. .num_pmcs = 4,
  464. .cpu_setup = __setup_cpu_750,
  465. .platform = "ppc750",
  466. },
  467. { /* 750FX rev 2.0 must disable HID0[DPM] */
  468. .pvr_mask = 0xffffffff,
  469. .pvr_value = 0x70000200,
  470. .cpu_name = "750FX",
  471. .cpu_features = CPU_FTRS_750FX2,
  472. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  473. .icache_bsize = 32,
  474. .dcache_bsize = 32,
  475. .num_pmcs = 4,
  476. .cpu_setup = __setup_cpu_750,
  477. .platform = "ppc750",
  478. },
  479. { /* 750FX (All revs except 2.0) */
  480. .pvr_mask = 0xffff0000,
  481. .pvr_value = 0x70000000,
  482. .cpu_name = "750FX",
  483. .cpu_features = CPU_FTRS_750FX,
  484. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  485. .icache_bsize = 32,
  486. .dcache_bsize = 32,
  487. .num_pmcs = 4,
  488. .cpu_setup = __setup_cpu_750fx,
  489. .platform = "ppc750",
  490. },
  491. { /* 750GX */
  492. .pvr_mask = 0xffff0000,
  493. .pvr_value = 0x70020000,
  494. .cpu_name = "750GX",
  495. .cpu_features = CPU_FTRS_750GX,
  496. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  497. .icache_bsize = 32,
  498. .dcache_bsize = 32,
  499. .num_pmcs = 4,
  500. .cpu_setup = __setup_cpu_750fx,
  501. .platform = "ppc750",
  502. },
  503. { /* 740/750 (L2CR bit need fixup for 740) */
  504. .pvr_mask = 0xffff0000,
  505. .pvr_value = 0x00080000,
  506. .cpu_name = "740/750",
  507. .cpu_features = CPU_FTRS_740,
  508. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  509. .icache_bsize = 32,
  510. .dcache_bsize = 32,
  511. .num_pmcs = 4,
  512. .cpu_setup = __setup_cpu_750,
  513. .platform = "ppc750",
  514. },
  515. { /* 7400 rev 1.1 ? (no TAU) */
  516. .pvr_mask = 0xffffffff,
  517. .pvr_value = 0x000c1101,
  518. .cpu_name = "7400 (1.1)",
  519. .cpu_features = CPU_FTRS_7400_NOTAU,
  520. .cpu_user_features = COMMON_USER |
  521. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  522. .icache_bsize = 32,
  523. .dcache_bsize = 32,
  524. .num_pmcs = 4,
  525. .cpu_setup = __setup_cpu_7400,
  526. .platform = "ppc7400",
  527. },
  528. { /* 7400 */
  529. .pvr_mask = 0xffff0000,
  530. .pvr_value = 0x000c0000,
  531. .cpu_name = "7400",
  532. .cpu_features = CPU_FTRS_7400,
  533. .cpu_user_features = COMMON_USER |
  534. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  535. .icache_bsize = 32,
  536. .dcache_bsize = 32,
  537. .num_pmcs = 4,
  538. .cpu_setup = __setup_cpu_7400,
  539. .platform = "ppc7400",
  540. },
  541. { /* 7410 */
  542. .pvr_mask = 0xffff0000,
  543. .pvr_value = 0x800c0000,
  544. .cpu_name = "7410",
  545. .cpu_features = CPU_FTRS_7400,
  546. .cpu_user_features = COMMON_USER |
  547. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  548. .icache_bsize = 32,
  549. .dcache_bsize = 32,
  550. .num_pmcs = 4,
  551. .cpu_setup = __setup_cpu_7410,
  552. .platform = "ppc7400",
  553. },
  554. { /* 7450 2.0 - no doze/nap */
  555. .pvr_mask = 0xffffffff,
  556. .pvr_value = 0x80000200,
  557. .cpu_name = "7450",
  558. .cpu_features = CPU_FTRS_7450_20,
  559. .cpu_user_features = COMMON_USER |
  560. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  561. .icache_bsize = 32,
  562. .dcache_bsize = 32,
  563. .num_pmcs = 6,
  564. .cpu_setup = __setup_cpu_745x,
  565. .oprofile_cpu_type = "ppc/7450",
  566. .oprofile_type = PPC_OPROFILE_G4,
  567. .platform = "ppc7450",
  568. },
  569. { /* 7450 2.1 */
  570. .pvr_mask = 0xffffffff,
  571. .pvr_value = 0x80000201,
  572. .cpu_name = "7450",
  573. .cpu_features = CPU_FTRS_7450_21,
  574. .cpu_user_features = COMMON_USER |
  575. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  576. .icache_bsize = 32,
  577. .dcache_bsize = 32,
  578. .num_pmcs = 6,
  579. .cpu_setup = __setup_cpu_745x,
  580. .oprofile_cpu_type = "ppc/7450",
  581. .oprofile_type = PPC_OPROFILE_G4,
  582. .platform = "ppc7450",
  583. },
  584. { /* 7450 2.3 and newer */
  585. .pvr_mask = 0xffff0000,
  586. .pvr_value = 0x80000000,
  587. .cpu_name = "7450",
  588. .cpu_features = CPU_FTRS_7450_23,
  589. .cpu_user_features = COMMON_USER |
  590. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  591. .icache_bsize = 32,
  592. .dcache_bsize = 32,
  593. .num_pmcs = 6,
  594. .cpu_setup = __setup_cpu_745x,
  595. .oprofile_cpu_type = "ppc/7450",
  596. .oprofile_type = PPC_OPROFILE_G4,
  597. .platform = "ppc7450",
  598. },
  599. { /* 7455 rev 1.x */
  600. .pvr_mask = 0xffffff00,
  601. .pvr_value = 0x80010100,
  602. .cpu_name = "7455",
  603. .cpu_features = CPU_FTRS_7455_1,
  604. .cpu_user_features = COMMON_USER |
  605. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  606. .icache_bsize = 32,
  607. .dcache_bsize = 32,
  608. .num_pmcs = 6,
  609. .cpu_setup = __setup_cpu_745x,
  610. .oprofile_cpu_type = "ppc/7450",
  611. .oprofile_type = PPC_OPROFILE_G4,
  612. .platform = "ppc7450",
  613. },
  614. { /* 7455 rev 2.0 */
  615. .pvr_mask = 0xffffffff,
  616. .pvr_value = 0x80010200,
  617. .cpu_name = "7455",
  618. .cpu_features = CPU_FTRS_7455_20,
  619. .cpu_user_features = COMMON_USER |
  620. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  621. .icache_bsize = 32,
  622. .dcache_bsize = 32,
  623. .num_pmcs = 6,
  624. .cpu_setup = __setup_cpu_745x,
  625. .oprofile_cpu_type = "ppc/7450",
  626. .oprofile_type = PPC_OPROFILE_G4,
  627. .platform = "ppc7450",
  628. },
  629. { /* 7455 others */
  630. .pvr_mask = 0xffff0000,
  631. .pvr_value = 0x80010000,
  632. .cpu_name = "7455",
  633. .cpu_features = CPU_FTRS_7455,
  634. .cpu_user_features = COMMON_USER |
  635. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  636. .icache_bsize = 32,
  637. .dcache_bsize = 32,
  638. .num_pmcs = 6,
  639. .cpu_setup = __setup_cpu_745x,
  640. .oprofile_cpu_type = "ppc/7450",
  641. .oprofile_type = PPC_OPROFILE_G4,
  642. .platform = "ppc7450",
  643. },
  644. { /* 7447/7457 Rev 1.0 */
  645. .pvr_mask = 0xffffffff,
  646. .pvr_value = 0x80020100,
  647. .cpu_name = "7447/7457",
  648. .cpu_features = CPU_FTRS_7447_10,
  649. .cpu_user_features = COMMON_USER |
  650. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  651. .icache_bsize = 32,
  652. .dcache_bsize = 32,
  653. .num_pmcs = 6,
  654. .cpu_setup = __setup_cpu_745x,
  655. .oprofile_cpu_type = "ppc/7450",
  656. .oprofile_type = PPC_OPROFILE_G4,
  657. .platform = "ppc7450",
  658. },
  659. { /* 7447/7457 Rev 1.1 */
  660. .pvr_mask = 0xffffffff,
  661. .pvr_value = 0x80020101,
  662. .cpu_name = "7447/7457",
  663. .cpu_features = CPU_FTRS_7447_10,
  664. .cpu_user_features = COMMON_USER |
  665. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  666. .icache_bsize = 32,
  667. .dcache_bsize = 32,
  668. .num_pmcs = 6,
  669. .cpu_setup = __setup_cpu_745x,
  670. .oprofile_cpu_type = "ppc/7450",
  671. .oprofile_type = PPC_OPROFILE_G4,
  672. .platform = "ppc7450",
  673. },
  674. { /* 7447/7457 Rev 1.2 and later */
  675. .pvr_mask = 0xffff0000,
  676. .pvr_value = 0x80020000,
  677. .cpu_name = "7447/7457",
  678. .cpu_features = CPU_FTRS_7447,
  679. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  680. .icache_bsize = 32,
  681. .dcache_bsize = 32,
  682. .num_pmcs = 6,
  683. .cpu_setup = __setup_cpu_745x,
  684. .oprofile_cpu_type = "ppc/7450",
  685. .oprofile_type = PPC_OPROFILE_G4,
  686. .platform = "ppc7450",
  687. },
  688. { /* 7447A */
  689. .pvr_mask = 0xffff0000,
  690. .pvr_value = 0x80030000,
  691. .cpu_name = "7447A",
  692. .cpu_features = CPU_FTRS_7447A,
  693. .cpu_user_features = COMMON_USER |
  694. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  695. .icache_bsize = 32,
  696. .dcache_bsize = 32,
  697. .num_pmcs = 6,
  698. .cpu_setup = __setup_cpu_745x,
  699. .oprofile_cpu_type = "ppc/7450",
  700. .oprofile_type = PPC_OPROFILE_G4,
  701. .platform = "ppc7450",
  702. },
  703. { /* 7448 */
  704. .pvr_mask = 0xffff0000,
  705. .pvr_value = 0x80040000,
  706. .cpu_name = "7448",
  707. .cpu_features = CPU_FTRS_7447A,
  708. .cpu_user_features = COMMON_USER |
  709. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  710. .icache_bsize = 32,
  711. .dcache_bsize = 32,
  712. .num_pmcs = 6,
  713. .cpu_setup = __setup_cpu_745x,
  714. .oprofile_cpu_type = "ppc/7450",
  715. .oprofile_type = PPC_OPROFILE_G4,
  716. .platform = "ppc7450",
  717. },
  718. { /* 8641 */
  719. .pvr_mask = 0xffffffff,
  720. .pvr_value = 0x80040010,
  721. .cpu_name = "8641",
  722. .cpu_features = CPU_FTRS_7447A,
  723. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
  724. .icache_bsize = 32,
  725. .dcache_bsize = 32,
  726. .num_pmcs = 6,
  727. .cpu_setup = __setup_cpu_745x
  728. },
  729. { /* 82xx (8240, 8245, 8260 are all 603e cores) */
  730. .pvr_mask = 0x7fff0000,
  731. .pvr_value = 0x00810000,
  732. .cpu_name = "82xx",
  733. .cpu_features = CPU_FTRS_82XX,
  734. .cpu_user_features = COMMON_USER,
  735. .icache_bsize = 32,
  736. .dcache_bsize = 32,
  737. .cpu_setup = __setup_cpu_603,
  738. .platform = "ppc603",
  739. },
  740. { /* All G2_LE (603e core, plus some) have the same pvr */
  741. .pvr_mask = 0x7fff0000,
  742. .pvr_value = 0x00820000,
  743. .cpu_name = "G2_LE",
  744. .cpu_features = CPU_FTRS_G2_LE,
  745. .cpu_user_features = COMMON_USER,
  746. .icache_bsize = 32,
  747. .dcache_bsize = 32,
  748. .cpu_setup = __setup_cpu_603,
  749. .platform = "ppc603",
  750. },
  751. { /* e300 (a 603e core, plus some) on 83xx */
  752. .pvr_mask = 0x7fff0000,
  753. .pvr_value = 0x00830000,
  754. .cpu_name = "e300",
  755. .cpu_features = CPU_FTRS_E300,
  756. .cpu_user_features = COMMON_USER,
  757. .icache_bsize = 32,
  758. .dcache_bsize = 32,
  759. .cpu_setup = __setup_cpu_603,
  760. .platform = "ppc603",
  761. },
  762. { /* default match, we assume split I/D cache & TB (non-601)... */
  763. .pvr_mask = 0x00000000,
  764. .pvr_value = 0x00000000,
  765. .cpu_name = "(generic PPC)",
  766. .cpu_features = CPU_FTRS_CLASSIC32,
  767. .cpu_user_features = COMMON_USER,
  768. .icache_bsize = 32,
  769. .dcache_bsize = 32,
  770. .platform = "ppc603",
  771. },
  772. #endif /* CLASSIC_PPC */
  773. #ifdef CONFIG_8xx
  774. { /* 8xx */
  775. .pvr_mask = 0xffff0000,
  776. .pvr_value = 0x00500000,
  777. .cpu_name = "8xx",
  778. /* CPU_FTR_MAYBE_CAN_DOZE is possible,
  779. * if the 8xx code is there.... */
  780. .cpu_features = CPU_FTRS_8XX,
  781. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  782. .icache_bsize = 16,
  783. .dcache_bsize = 16,
  784. .platform = "ppc823",
  785. },
  786. #endif /* CONFIG_8xx */
  787. #ifdef CONFIG_40x
  788. { /* 403GC */
  789. .pvr_mask = 0xffffff00,
  790. .pvr_value = 0x00200200,
  791. .cpu_name = "403GC",
  792. .cpu_features = CPU_FTRS_40X,
  793. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  794. .icache_bsize = 16,
  795. .dcache_bsize = 16,
  796. .platform = "ppc403",
  797. },
  798. { /* 403GCX */
  799. .pvr_mask = 0xffffff00,
  800. .pvr_value = 0x00201400,
  801. .cpu_name = "403GCX",
  802. .cpu_features = CPU_FTRS_40X,
  803. .cpu_user_features = PPC_FEATURE_32 |
  804. PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
  805. .icache_bsize = 16,
  806. .dcache_bsize = 16,
  807. .platform = "ppc403",
  808. },
  809. { /* 403G ?? */
  810. .pvr_mask = 0xffff0000,
  811. .pvr_value = 0x00200000,
  812. .cpu_name = "403G ??",
  813. .cpu_features = CPU_FTRS_40X,
  814. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  815. .icache_bsize = 16,
  816. .dcache_bsize = 16,
  817. .platform = "ppc403",
  818. },
  819. { /* 405GP */
  820. .pvr_mask = 0xffff0000,
  821. .pvr_value = 0x40110000,
  822. .cpu_name = "405GP",
  823. .cpu_features = CPU_FTRS_40X,
  824. .cpu_user_features = PPC_FEATURE_32 |
  825. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  826. .icache_bsize = 32,
  827. .dcache_bsize = 32,
  828. .platform = "ppc405",
  829. },
  830. { /* STB 03xxx */
  831. .pvr_mask = 0xffff0000,
  832. .pvr_value = 0x40130000,
  833. .cpu_name = "STB03xxx",
  834. .cpu_features = CPU_FTRS_40X,
  835. .cpu_user_features = PPC_FEATURE_32 |
  836. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  837. .icache_bsize = 32,
  838. .dcache_bsize = 32,
  839. .platform = "ppc405",
  840. },
  841. { /* STB 04xxx */
  842. .pvr_mask = 0xffff0000,
  843. .pvr_value = 0x41810000,
  844. .cpu_name = "STB04xxx",
  845. .cpu_features = CPU_FTRS_40X,
  846. .cpu_user_features = PPC_FEATURE_32 |
  847. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  848. .icache_bsize = 32,
  849. .dcache_bsize = 32,
  850. .platform = "ppc405",
  851. },
  852. { /* NP405L */
  853. .pvr_mask = 0xffff0000,
  854. .pvr_value = 0x41610000,
  855. .cpu_name = "NP405L",
  856. .cpu_features = CPU_FTRS_40X,
  857. .cpu_user_features = PPC_FEATURE_32 |
  858. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  859. .icache_bsize = 32,
  860. .dcache_bsize = 32,
  861. .platform = "ppc405",
  862. },
  863. { /* NP4GS3 */
  864. .pvr_mask = 0xffff0000,
  865. .pvr_value = 0x40B10000,
  866. .cpu_name = "NP4GS3",
  867. .cpu_features = CPU_FTRS_40X,
  868. .cpu_user_features = PPC_FEATURE_32 |
  869. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  870. .icache_bsize = 32,
  871. .dcache_bsize = 32,
  872. .platform = "ppc405",
  873. },
  874. { /* NP405H */
  875. .pvr_mask = 0xffff0000,
  876. .pvr_value = 0x41410000,
  877. .cpu_name = "NP405H",
  878. .cpu_features = CPU_FTRS_40X,
  879. .cpu_user_features = PPC_FEATURE_32 |
  880. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  881. .icache_bsize = 32,
  882. .dcache_bsize = 32,
  883. .platform = "ppc405",
  884. },
  885. { /* 405GPr */
  886. .pvr_mask = 0xffff0000,
  887. .pvr_value = 0x50910000,
  888. .cpu_name = "405GPr",
  889. .cpu_features = CPU_FTRS_40X,
  890. .cpu_user_features = PPC_FEATURE_32 |
  891. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  892. .icache_bsize = 32,
  893. .dcache_bsize = 32,
  894. .platform = "ppc405",
  895. },
  896. { /* STBx25xx */
  897. .pvr_mask = 0xffff0000,
  898. .pvr_value = 0x51510000,
  899. .cpu_name = "STBx25xx",
  900. .cpu_features = CPU_FTRS_40X,
  901. .cpu_user_features = PPC_FEATURE_32 |
  902. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  903. .icache_bsize = 32,
  904. .dcache_bsize = 32,
  905. .platform = "ppc405",
  906. },
  907. { /* 405LP */
  908. .pvr_mask = 0xffff0000,
  909. .pvr_value = 0x41F10000,
  910. .cpu_name = "405LP",
  911. .cpu_features = CPU_FTRS_40X,
  912. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  913. .icache_bsize = 32,
  914. .dcache_bsize = 32,
  915. .platform = "ppc405",
  916. },
  917. { /* Xilinx Virtex-II Pro */
  918. .pvr_mask = 0xfffff000,
  919. .pvr_value = 0x20010000,
  920. .cpu_name = "Virtex-II Pro",
  921. .cpu_features = CPU_FTRS_40X,
  922. .cpu_user_features = PPC_FEATURE_32 |
  923. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  924. .icache_bsize = 32,
  925. .dcache_bsize = 32,
  926. .platform = "ppc405",
  927. },
  928. { /* Xilinx Virtex-4 FX */
  929. .pvr_mask = 0xfffff000,
  930. .pvr_value = 0x20011000,
  931. .cpu_name = "Virtex-4 FX",
  932. .cpu_features = CPU_FTRS_40X,
  933. .cpu_user_features = PPC_FEATURE_32 |
  934. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  935. .icache_bsize = 32,
  936. .dcache_bsize = 32,
  937. },
  938. { /* 405EP */
  939. .pvr_mask = 0xffff0000,
  940. .pvr_value = 0x51210000,
  941. .cpu_name = "405EP",
  942. .cpu_features = CPU_FTRS_40X,
  943. .cpu_user_features = PPC_FEATURE_32 |
  944. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  945. .icache_bsize = 32,
  946. .dcache_bsize = 32,
  947. .platform = "ppc405",
  948. },
  949. #endif /* CONFIG_40x */
  950. #ifdef CONFIG_44x
  951. {
  952. .pvr_mask = 0xf0000fff,
  953. .pvr_value = 0x40000850,
  954. .cpu_name = "440EP Rev. A",
  955. .cpu_features = CPU_FTRS_44X,
  956. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  957. .icache_bsize = 32,
  958. .dcache_bsize = 32,
  959. .platform = "ppc440",
  960. },
  961. {
  962. .pvr_mask = 0xf0000fff,
  963. .pvr_value = 0x400008d3,
  964. .cpu_name = "440EP Rev. B",
  965. .cpu_features = CPU_FTRS_44X,
  966. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  967. .icache_bsize = 32,
  968. .dcache_bsize = 32,
  969. .platform = "ppc440",
  970. },
  971. { /* 440GP Rev. B */
  972. .pvr_mask = 0xf0000fff,
  973. .pvr_value = 0x40000440,
  974. .cpu_name = "440GP Rev. B",
  975. .cpu_features = CPU_FTRS_44X,
  976. .cpu_user_features = COMMON_USER_BOOKE,
  977. .icache_bsize = 32,
  978. .dcache_bsize = 32,
  979. .platform = "ppc440gp",
  980. },
  981. { /* 440GP Rev. C */
  982. .pvr_mask = 0xf0000fff,
  983. .pvr_value = 0x40000481,
  984. .cpu_name = "440GP Rev. C",
  985. .cpu_features = CPU_FTRS_44X,
  986. .cpu_user_features = COMMON_USER_BOOKE,
  987. .icache_bsize = 32,
  988. .dcache_bsize = 32,
  989. .platform = "ppc440gp",
  990. },
  991. { /* 440GX Rev. A */
  992. .pvr_mask = 0xf0000fff,
  993. .pvr_value = 0x50000850,
  994. .cpu_name = "440GX Rev. A",
  995. .cpu_features = CPU_FTRS_44X,
  996. .cpu_user_features = COMMON_USER_BOOKE,
  997. .icache_bsize = 32,
  998. .dcache_bsize = 32,
  999. .platform = "ppc440",
  1000. },
  1001. { /* 440GX Rev. B */
  1002. .pvr_mask = 0xf0000fff,
  1003. .pvr_value = 0x50000851,
  1004. .cpu_name = "440GX Rev. B",
  1005. .cpu_features = CPU_FTRS_44X,
  1006. .cpu_user_features = COMMON_USER_BOOKE,
  1007. .icache_bsize = 32,
  1008. .dcache_bsize = 32,
  1009. .platform = "ppc440",
  1010. },
  1011. { /* 440GX Rev. C */
  1012. .pvr_mask = 0xf0000fff,
  1013. .pvr_value = 0x50000892,
  1014. .cpu_name = "440GX Rev. C",
  1015. .cpu_features = CPU_FTRS_44X,
  1016. .cpu_user_features = COMMON_USER_BOOKE,
  1017. .icache_bsize = 32,
  1018. .dcache_bsize = 32,
  1019. .platform = "ppc440",
  1020. },
  1021. { /* 440GX Rev. F */
  1022. .pvr_mask = 0xf0000fff,
  1023. .pvr_value = 0x50000894,
  1024. .cpu_name = "440GX Rev. F",
  1025. .cpu_features = CPU_FTRS_44X,
  1026. .cpu_user_features = COMMON_USER_BOOKE,
  1027. .icache_bsize = 32,
  1028. .dcache_bsize = 32,
  1029. .platform = "ppc440",
  1030. },
  1031. { /* 440SP Rev. A */
  1032. .pvr_mask = 0xff000fff,
  1033. .pvr_value = 0x53000891,
  1034. .cpu_name = "440SP Rev. A",
  1035. .cpu_features = CPU_FTRS_44X,
  1036. .cpu_user_features = COMMON_USER_BOOKE,
  1037. .icache_bsize = 32,
  1038. .dcache_bsize = 32,
  1039. .platform = "ppc440",
  1040. },
  1041. { /* 440SPe Rev. A */
  1042. .pvr_mask = 0xff000fff,
  1043. .pvr_value = 0x53000890,
  1044. .cpu_name = "440SPe Rev. A",
  1045. .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
  1046. CPU_FTR_USE_TB,
  1047. .cpu_user_features = COMMON_USER_BOOKE,
  1048. .icache_bsize = 32,
  1049. .dcache_bsize = 32,
  1050. .platform = "ppc440",
  1051. },
  1052. #endif /* CONFIG_44x */
  1053. #ifdef CONFIG_FSL_BOOKE
  1054. { /* e200z5 */
  1055. .pvr_mask = 0xfff00000,
  1056. .pvr_value = 0x81000000,
  1057. .cpu_name = "e200z5",
  1058. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1059. .cpu_features = CPU_FTRS_E200,
  1060. .cpu_user_features = COMMON_USER_BOOKE |
  1061. PPC_FEATURE_HAS_EFP_SINGLE |
  1062. PPC_FEATURE_UNIFIED_CACHE,
  1063. .dcache_bsize = 32,
  1064. .platform = "ppc5554",
  1065. },
  1066. { /* e200z6 */
  1067. .pvr_mask = 0xfff00000,
  1068. .pvr_value = 0x81100000,
  1069. .cpu_name = "e200z6",
  1070. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1071. .cpu_features = CPU_FTRS_E200,
  1072. .cpu_user_features = COMMON_USER_BOOKE |
  1073. PPC_FEATURE_SPE_COMP |
  1074. PPC_FEATURE_HAS_EFP_SINGLE |
  1075. PPC_FEATURE_UNIFIED_CACHE,
  1076. .dcache_bsize = 32,
  1077. .platform = "ppc5554",
  1078. },
  1079. { /* e500 */
  1080. .pvr_mask = 0xffff0000,
  1081. .pvr_value = 0x80200000,
  1082. .cpu_name = "e500",
  1083. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1084. .cpu_features = CPU_FTRS_E500,
  1085. .cpu_user_features = COMMON_USER_BOOKE |
  1086. PPC_FEATURE_SPE_COMP |
  1087. PPC_FEATURE_HAS_EFP_SINGLE,
  1088. .icache_bsize = 32,
  1089. .dcache_bsize = 32,
  1090. .num_pmcs = 4,
  1091. .oprofile_cpu_type = "ppc/e500",
  1092. .oprofile_type = PPC_OPROFILE_BOOKE,
  1093. .platform = "ppc8540",
  1094. },
  1095. { /* e500v2 */
  1096. .pvr_mask = 0xffff0000,
  1097. .pvr_value = 0x80210000,
  1098. .cpu_name = "e500v2",
  1099. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1100. .cpu_features = CPU_FTRS_E500_2,
  1101. .cpu_user_features = COMMON_USER_BOOKE |
  1102. PPC_FEATURE_SPE_COMP |
  1103. PPC_FEATURE_HAS_EFP_SINGLE |
  1104. PPC_FEATURE_HAS_EFP_DOUBLE,
  1105. .icache_bsize = 32,
  1106. .dcache_bsize = 32,
  1107. .num_pmcs = 4,
  1108. .oprofile_cpu_type = "ppc/e500",
  1109. .oprofile_type = PPC_OPROFILE_BOOKE,
  1110. .platform = "ppc8548",
  1111. },
  1112. #endif
  1113. #if !CLASSIC_PPC
  1114. { /* default match */
  1115. .pvr_mask = 0x00000000,
  1116. .pvr_value = 0x00000000,
  1117. .cpu_name = "(generic PPC)",
  1118. .cpu_features = CPU_FTRS_GENERIC_32,
  1119. .cpu_user_features = PPC_FEATURE_32,
  1120. .icache_bsize = 32,
  1121. .dcache_bsize = 32,
  1122. .platform = "powerpc",
  1123. }
  1124. #endif /* !CLASSIC_PPC */
  1125. #endif /* CONFIG_PPC32 */
  1126. };