ptrace.c 11 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1992 Ross Biro
  7. * Copyright (C) Linus Torvalds
  8. * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
  9. * Copyright (C) 1996 David S. Miller
  10. * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
  11. * Copyright (C) 1999 MIPS Technologies, Inc.
  12. * Copyright (C) 2000 Ulf Carlsson
  13. *
  14. * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
  15. * binaries.
  16. */
  17. #include <linux/config.h>
  18. #include <linux/compiler.h>
  19. #include <linux/kernel.h>
  20. #include <linux/sched.h>
  21. #include <linux/mm.h>
  22. #include <linux/errno.h>
  23. #include <linux/ptrace.h>
  24. #include <linux/audit.h>
  25. #include <linux/smp.h>
  26. #include <linux/smp_lock.h>
  27. #include <linux/user.h>
  28. #include <linux/security.h>
  29. #include <linux/signal.h>
  30. #include <asm/byteorder.h>
  31. #include <asm/cpu.h>
  32. #include <asm/dsp.h>
  33. #include <asm/fpu.h>
  34. #include <asm/mipsregs.h>
  35. #include <asm/mipsmtregs.h>
  36. #include <asm/pgtable.h>
  37. #include <asm/page.h>
  38. #include <asm/system.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/bootinfo.h>
  41. #include <asm/reg.h>
  42. /*
  43. * Called by kernel/ptrace.c when detaching..
  44. *
  45. * Make sure single step bits etc are not set.
  46. */
  47. void ptrace_disable(struct task_struct *child)
  48. {
  49. /* Nothing to do.. */
  50. }
  51. /*
  52. * Read a general register set. We always use the 64-bit format, even
  53. * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
  54. * Registers are sign extended to fill the available space.
  55. */
  56. int ptrace_getregs (struct task_struct *child, __s64 __user *data)
  57. {
  58. struct pt_regs *regs;
  59. int i;
  60. if (!access_ok(VERIFY_WRITE, data, 38 * 8))
  61. return -EIO;
  62. regs = task_pt_regs(child);
  63. for (i = 0; i < 32; i++)
  64. __put_user (regs->regs[i], data + i);
  65. __put_user (regs->lo, data + EF_LO - EF_R0);
  66. __put_user (regs->hi, data + EF_HI - EF_R0);
  67. __put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
  68. __put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
  69. __put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
  70. __put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
  71. return 0;
  72. }
  73. /*
  74. * Write a general register set. As for PTRACE_GETREGS, we always use
  75. * the 64-bit format. On a 32-bit kernel only the lower order half
  76. * (according to endianness) will be used.
  77. */
  78. int ptrace_setregs (struct task_struct *child, __s64 __user *data)
  79. {
  80. struct pt_regs *regs;
  81. int i;
  82. if (!access_ok(VERIFY_READ, data, 38 * 8))
  83. return -EIO;
  84. regs = task_pt_regs(child);
  85. for (i = 0; i < 32; i++)
  86. __get_user (regs->regs[i], data + i);
  87. __get_user (regs->lo, data + EF_LO - EF_R0);
  88. __get_user (regs->hi, data + EF_HI - EF_R0);
  89. __get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
  90. /* badvaddr, status, and cause may not be written. */
  91. return 0;
  92. }
  93. int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
  94. {
  95. int i;
  96. if (!access_ok(VERIFY_WRITE, data, 33 * 8))
  97. return -EIO;
  98. if (tsk_used_math(child)) {
  99. fpureg_t *fregs = get_fpu_regs(child);
  100. for (i = 0; i < 32; i++)
  101. __put_user (fregs[i], i + (__u64 __user *) data);
  102. } else {
  103. for (i = 0; i < 32; i++)
  104. __put_user ((__u64) -1, i + (__u64 __user *) data);
  105. }
  106. __put_user (child->thread.fpu.fcr31, data + 64);
  107. if (cpu_has_fpu) {
  108. unsigned int flags, tmp;
  109. preempt_disable();
  110. if (cpu_has_mipsmt) {
  111. unsigned int vpflags = dvpe();
  112. flags = read_c0_status();
  113. __enable_fpu();
  114. __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
  115. write_c0_status(flags);
  116. evpe(vpflags);
  117. } else {
  118. flags = read_c0_status();
  119. __enable_fpu();
  120. __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
  121. write_c0_status(flags);
  122. }
  123. preempt_enable();
  124. __put_user (tmp, data + 65);
  125. } else {
  126. __put_user ((__u32) 0, data + 65);
  127. }
  128. return 0;
  129. }
  130. int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
  131. {
  132. fpureg_t *fregs;
  133. int i;
  134. if (!access_ok(VERIFY_READ, data, 33 * 8))
  135. return -EIO;
  136. fregs = get_fpu_regs(child);
  137. for (i = 0; i < 32; i++)
  138. __get_user (fregs[i], i + (__u64 __user *) data);
  139. __get_user (child->thread.fpu.fcr31, data + 64);
  140. /* FIR may not be written. */
  141. return 0;
  142. }
  143. long arch_ptrace(struct task_struct *child, long request, long addr, long data)
  144. {
  145. int ret;
  146. switch (request) {
  147. /* when I and D space are separate, these will need to be fixed. */
  148. case PTRACE_PEEKTEXT: /* read word at location addr. */
  149. case PTRACE_PEEKDATA: {
  150. unsigned long tmp;
  151. int copied;
  152. copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
  153. ret = -EIO;
  154. if (copied != sizeof(tmp))
  155. break;
  156. ret = put_user(tmp,(unsigned long __user *) data);
  157. break;
  158. }
  159. /* Read the word at location addr in the USER area. */
  160. case PTRACE_PEEKUSR: {
  161. struct pt_regs *regs;
  162. unsigned long tmp = 0;
  163. regs = task_pt_regs(child);
  164. ret = 0; /* Default return value. */
  165. switch (addr) {
  166. case 0 ... 31:
  167. tmp = regs->regs[addr];
  168. break;
  169. case FPR_BASE ... FPR_BASE + 31:
  170. if (tsk_used_math(child)) {
  171. fpureg_t *fregs = get_fpu_regs(child);
  172. #ifdef CONFIG_32BIT
  173. /*
  174. * The odd registers are actually the high
  175. * order bits of the values stored in the even
  176. * registers - unless we're using r2k_switch.S.
  177. */
  178. if (addr & 1)
  179. tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
  180. else
  181. tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
  182. #endif
  183. #ifdef CONFIG_64BIT
  184. tmp = fregs[addr - FPR_BASE];
  185. #endif
  186. } else {
  187. tmp = -1; /* FP not yet used */
  188. }
  189. break;
  190. case PC:
  191. tmp = regs->cp0_epc;
  192. break;
  193. case CAUSE:
  194. tmp = regs->cp0_cause;
  195. break;
  196. case BADVADDR:
  197. tmp = regs->cp0_badvaddr;
  198. break;
  199. case MMHI:
  200. tmp = regs->hi;
  201. break;
  202. case MMLO:
  203. tmp = regs->lo;
  204. break;
  205. case FPC_CSR:
  206. tmp = child->thread.fpu.fcr31;
  207. break;
  208. case FPC_EIR: { /* implementation / version register */
  209. unsigned int flags;
  210. #ifdef CONFIG_MIPS_MT_SMTC
  211. unsigned int irqflags;
  212. unsigned int mtflags;
  213. #endif /* CONFIG_MIPS_MT_SMTC */
  214. if (!cpu_has_fpu)
  215. break;
  216. #ifdef CONFIG_MIPS_MT_SMTC
  217. /* Read-modify-write of Status must be atomic */
  218. local_irq_save(irqflags);
  219. mtflags = dmt();
  220. #endif /* CONFIG_MIPS_MT_SMTC */
  221. preempt_disable();
  222. if (cpu_has_mipsmt) {
  223. unsigned int vpflags = dvpe();
  224. flags = read_c0_status();
  225. __enable_fpu();
  226. __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
  227. write_c0_status(flags);
  228. evpe(vpflags);
  229. } else {
  230. flags = read_c0_status();
  231. __enable_fpu();
  232. __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
  233. write_c0_status(flags);
  234. }
  235. #ifdef CONFIG_MIPS_MT_SMTC
  236. emt(mtflags);
  237. local_irq_restore(irqflags);
  238. #endif /* CONFIG_MIPS_MT_SMTC */
  239. preempt_enable();
  240. break;
  241. }
  242. case DSP_BASE ... DSP_BASE + 5: {
  243. dspreg_t *dregs;
  244. if (!cpu_has_dsp) {
  245. tmp = 0;
  246. ret = -EIO;
  247. goto out;
  248. }
  249. dregs = __get_dsp_regs(child);
  250. tmp = (unsigned long) (dregs[addr - DSP_BASE]);
  251. break;
  252. }
  253. case DSP_CONTROL:
  254. if (!cpu_has_dsp) {
  255. tmp = 0;
  256. ret = -EIO;
  257. goto out;
  258. }
  259. tmp = child->thread.dsp.dspcontrol;
  260. break;
  261. default:
  262. tmp = 0;
  263. ret = -EIO;
  264. goto out;
  265. }
  266. ret = put_user(tmp, (unsigned long __user *) data);
  267. break;
  268. }
  269. /* when I and D space are separate, this will have to be fixed. */
  270. case PTRACE_POKETEXT: /* write the word at location addr. */
  271. case PTRACE_POKEDATA:
  272. ret = 0;
  273. if (access_process_vm(child, addr, &data, sizeof(data), 1)
  274. == sizeof(data))
  275. break;
  276. ret = -EIO;
  277. break;
  278. case PTRACE_POKEUSR: {
  279. struct pt_regs *regs;
  280. ret = 0;
  281. regs = task_pt_regs(child);
  282. switch (addr) {
  283. case 0 ... 31:
  284. regs->regs[addr] = data;
  285. break;
  286. case FPR_BASE ... FPR_BASE + 31: {
  287. fpureg_t *fregs = get_fpu_regs(child);
  288. if (!tsk_used_math(child)) {
  289. /* FP not yet used */
  290. memset(&child->thread.fpu, ~0,
  291. sizeof(child->thread.fpu));
  292. child->thread.fpu.fcr31 = 0;
  293. }
  294. #ifdef CONFIG_32BIT
  295. /*
  296. * The odd registers are actually the high order bits
  297. * of the values stored in the even registers - unless
  298. * we're using r2k_switch.S.
  299. */
  300. if (addr & 1) {
  301. fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
  302. fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32;
  303. } else {
  304. fregs[addr - FPR_BASE] &= ~0xffffffffLL;
  305. fregs[addr - FPR_BASE] |= data;
  306. }
  307. #endif
  308. #ifdef CONFIG_64BIT
  309. fregs[addr - FPR_BASE] = data;
  310. #endif
  311. break;
  312. }
  313. case PC:
  314. regs->cp0_epc = data;
  315. break;
  316. case MMHI:
  317. regs->hi = data;
  318. break;
  319. case MMLO:
  320. regs->lo = data;
  321. break;
  322. case FPC_CSR:
  323. child->thread.fpu.fcr31 = data;
  324. break;
  325. case DSP_BASE ... DSP_BASE + 5: {
  326. dspreg_t *dregs;
  327. if (!cpu_has_dsp) {
  328. ret = -EIO;
  329. break;
  330. }
  331. dregs = __get_dsp_regs(child);
  332. dregs[addr - DSP_BASE] = data;
  333. break;
  334. }
  335. case DSP_CONTROL:
  336. if (!cpu_has_dsp) {
  337. ret = -EIO;
  338. break;
  339. }
  340. child->thread.dsp.dspcontrol = data;
  341. break;
  342. default:
  343. /* The rest are not allowed. */
  344. ret = -EIO;
  345. break;
  346. }
  347. break;
  348. }
  349. case PTRACE_GETREGS:
  350. ret = ptrace_getregs (child, (__u64 __user *) data);
  351. break;
  352. case PTRACE_SETREGS:
  353. ret = ptrace_setregs (child, (__u64 __user *) data);
  354. break;
  355. case PTRACE_GETFPREGS:
  356. ret = ptrace_getfpregs (child, (__u32 __user *) data);
  357. break;
  358. case PTRACE_SETFPREGS:
  359. ret = ptrace_setfpregs (child, (__u32 __user *) data);
  360. break;
  361. case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
  362. case PTRACE_CONT: { /* restart after signal. */
  363. ret = -EIO;
  364. if (!valid_signal(data))
  365. break;
  366. if (request == PTRACE_SYSCALL) {
  367. set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  368. }
  369. else {
  370. clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  371. }
  372. child->exit_code = data;
  373. wake_up_process(child);
  374. ret = 0;
  375. break;
  376. }
  377. /*
  378. * make the child exit. Best I can do is send it a sigkill.
  379. * perhaps it should be put in the status that it wants to
  380. * exit.
  381. */
  382. case PTRACE_KILL:
  383. ret = 0;
  384. if (child->exit_state == EXIT_ZOMBIE) /* already dead */
  385. break;
  386. child->exit_code = SIGKILL;
  387. wake_up_process(child);
  388. break;
  389. case PTRACE_DETACH: /* detach a process that was attached. */
  390. ret = ptrace_detach(child, data);
  391. break;
  392. case PTRACE_GET_THREAD_AREA:
  393. ret = put_user(task_thread_info(child)->tp_value,
  394. (unsigned long __user *) data);
  395. break;
  396. default:
  397. ret = ptrace_request(child, request, addr, data);
  398. break;
  399. }
  400. out:
  401. return ret;
  402. }
  403. static inline int audit_arch(void)
  404. {
  405. int arch = EM_MIPS;
  406. #ifdef CONFIG_64BIT
  407. arch |= __AUDIT_ARCH_64BIT;
  408. #endif
  409. #if defined(__LITTLE_ENDIAN)
  410. arch |= __AUDIT_ARCH_LE;
  411. #endif
  412. return arch;
  413. }
  414. /*
  415. * Notification of system call entry/exit
  416. * - triggered by current->work.syscall_trace
  417. */
  418. asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
  419. {
  420. if (unlikely(current->audit_context) && entryexit)
  421. audit_syscall_exit(AUDITSC_RESULT(regs->regs[2]),
  422. regs->regs[2]);
  423. if (!(current->ptrace & PT_PTRACED))
  424. goto out;
  425. if (!test_thread_flag(TIF_SYSCALL_TRACE))
  426. goto out;
  427. /* The 0x80 provides a way for the tracing parent to distinguish
  428. between a syscall stop and SIGTRAP delivery */
  429. ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ?
  430. 0x80 : 0));
  431. /*
  432. * this isn't the same as continuing with a signal, but it will do
  433. * for normal use. strace only continues with a signal if the
  434. * stopping signal is not SIGTRAP. -brl
  435. */
  436. if (current->exit_code) {
  437. send_sig(current->exit_code, current, 1);
  438. current->exit_code = 0;
  439. }
  440. out:
  441. if (unlikely(current->audit_context) && !entryexit)
  442. audit_syscall_entry(audit_arch(), regs->regs[2],
  443. regs->regs[4], regs->regs[5],
  444. regs->regs[6], regs->regs[7]);
  445. }