traps.c 30 KB

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  1. /*
  2. * linux/arch/m68k/kernel/traps.c
  3. *
  4. * Copyright (C) 1993, 1994 by Hamish Macdonald
  5. *
  6. * 68040 fixes by Michael Rausch
  7. * 68040 fixes by Martin Apel
  8. * 68040 fixes and writeback by Richard Zidlicky
  9. * 68060 fixes by Roman Hodek
  10. * 68060 fixes by Jesper Skov
  11. *
  12. * This file is subject to the terms and conditions of the GNU General Public
  13. * License. See the file COPYING in the main directory of this archive
  14. * for more details.
  15. */
  16. /*
  17. * Sets up all exception vectors
  18. */
  19. #include <linux/config.h>
  20. #include <linux/sched.h>
  21. #include <linux/signal.h>
  22. #include <linux/kernel.h>
  23. #include <linux/mm.h>
  24. #include <linux/module.h>
  25. #include <linux/a.out.h>
  26. #include <linux/user.h>
  27. #include <linux/string.h>
  28. #include <linux/linkage.h>
  29. #include <linux/init.h>
  30. #include <linux/ptrace.h>
  31. #include <linux/kallsyms.h>
  32. #include <asm/setup.h>
  33. #include <asm/fpu.h>
  34. #include <asm/system.h>
  35. #include <asm/uaccess.h>
  36. #include <asm/traps.h>
  37. #include <asm/pgalloc.h>
  38. #include <asm/machdep.h>
  39. #include <asm/siginfo.h>
  40. /* assembler routines */
  41. asmlinkage void system_call(void);
  42. asmlinkage void buserr(void);
  43. asmlinkage void trap(void);
  44. asmlinkage void nmihandler(void);
  45. #ifdef CONFIG_M68KFPU_EMU
  46. asmlinkage void fpu_emu(void);
  47. #endif
  48. e_vector vectors[256] = {
  49. [VEC_BUSERR] = buserr,
  50. [VEC_SYS] = system_call,
  51. };
  52. /* nmi handler for the Amiga */
  53. asm(".text\n"
  54. __ALIGN_STR "\n"
  55. "nmihandler: rte");
  56. /*
  57. * this must be called very early as the kernel might
  58. * use some instruction that are emulated on the 060
  59. */
  60. void __init base_trap_init(void)
  61. {
  62. if(MACH_IS_SUN3X) {
  63. extern e_vector *sun3x_prom_vbr;
  64. __asm__ volatile ("movec %%vbr, %0" : "=r" (sun3x_prom_vbr));
  65. }
  66. /* setup the exception vector table */
  67. __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors));
  68. if (CPU_IS_060) {
  69. /* set up ISP entry points */
  70. asmlinkage void unimp_vec(void) asm ("_060_isp_unimp");
  71. vectors[VEC_UNIMPII] = unimp_vec;
  72. }
  73. }
  74. void __init trap_init (void)
  75. {
  76. int i;
  77. for (i = VEC_SPUR; i <= VEC_INT7; i++)
  78. vectors[i] = bad_inthandler;
  79. for (i = 0; i < VEC_USER; i++)
  80. if (!vectors[i])
  81. vectors[i] = trap;
  82. for (i = VEC_USER; i < 256; i++)
  83. vectors[i] = bad_inthandler;
  84. #ifdef CONFIG_M68KFPU_EMU
  85. if (FPU_IS_EMU)
  86. vectors[VEC_LINE11] = fpu_emu;
  87. #endif
  88. if (CPU_IS_040 && !FPU_IS_EMU) {
  89. /* set up FPSP entry points */
  90. asmlinkage void dz_vec(void) asm ("dz");
  91. asmlinkage void inex_vec(void) asm ("inex");
  92. asmlinkage void ovfl_vec(void) asm ("ovfl");
  93. asmlinkage void unfl_vec(void) asm ("unfl");
  94. asmlinkage void snan_vec(void) asm ("snan");
  95. asmlinkage void operr_vec(void) asm ("operr");
  96. asmlinkage void bsun_vec(void) asm ("bsun");
  97. asmlinkage void fline_vec(void) asm ("fline");
  98. asmlinkage void unsupp_vec(void) asm ("unsupp");
  99. vectors[VEC_FPDIVZ] = dz_vec;
  100. vectors[VEC_FPIR] = inex_vec;
  101. vectors[VEC_FPOVER] = ovfl_vec;
  102. vectors[VEC_FPUNDER] = unfl_vec;
  103. vectors[VEC_FPNAN] = snan_vec;
  104. vectors[VEC_FPOE] = operr_vec;
  105. vectors[VEC_FPBRUC] = bsun_vec;
  106. vectors[VEC_LINE11] = fline_vec;
  107. vectors[VEC_FPUNSUP] = unsupp_vec;
  108. }
  109. if (CPU_IS_060 && !FPU_IS_EMU) {
  110. /* set up IFPSP entry points */
  111. asmlinkage void snan_vec6(void) asm ("_060_fpsp_snan");
  112. asmlinkage void operr_vec6(void) asm ("_060_fpsp_operr");
  113. asmlinkage void ovfl_vec6(void) asm ("_060_fpsp_ovfl");
  114. asmlinkage void unfl_vec6(void) asm ("_060_fpsp_unfl");
  115. asmlinkage void dz_vec6(void) asm ("_060_fpsp_dz");
  116. asmlinkage void inex_vec6(void) asm ("_060_fpsp_inex");
  117. asmlinkage void fline_vec6(void) asm ("_060_fpsp_fline");
  118. asmlinkage void unsupp_vec6(void) asm ("_060_fpsp_unsupp");
  119. asmlinkage void effadd_vec6(void) asm ("_060_fpsp_effadd");
  120. vectors[VEC_FPNAN] = snan_vec6;
  121. vectors[VEC_FPOE] = operr_vec6;
  122. vectors[VEC_FPOVER] = ovfl_vec6;
  123. vectors[VEC_FPUNDER] = unfl_vec6;
  124. vectors[VEC_FPDIVZ] = dz_vec6;
  125. vectors[VEC_FPIR] = inex_vec6;
  126. vectors[VEC_LINE11] = fline_vec6;
  127. vectors[VEC_FPUNSUP] = unsupp_vec6;
  128. vectors[VEC_UNIMPEA] = effadd_vec6;
  129. }
  130. /* if running on an amiga, make the NMI interrupt do nothing */
  131. if (MACH_IS_AMIGA) {
  132. vectors[VEC_INT7] = nmihandler;
  133. }
  134. }
  135. static const char *vec_names[] = {
  136. [VEC_RESETSP] = "RESET SP",
  137. [VEC_RESETPC] = "RESET PC",
  138. [VEC_BUSERR] = "BUS ERROR",
  139. [VEC_ADDRERR] = "ADDRESS ERROR",
  140. [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION",
  141. [VEC_ZERODIV] = "ZERO DIVIDE",
  142. [VEC_CHK] = "CHK",
  143. [VEC_TRAP] = "TRAPcc",
  144. [VEC_PRIV] = "PRIVILEGE VIOLATION",
  145. [VEC_TRACE] = "TRACE",
  146. [VEC_LINE10] = "LINE 1010",
  147. [VEC_LINE11] = "LINE 1111",
  148. [VEC_RESV12] = "UNASSIGNED RESERVED 12",
  149. [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION",
  150. [VEC_FORMAT] = "FORMAT ERROR",
  151. [VEC_UNINT] = "UNINITIALIZED INTERRUPT",
  152. [VEC_RESV16] = "UNASSIGNED RESERVED 16",
  153. [VEC_RESV17] = "UNASSIGNED RESERVED 17",
  154. [VEC_RESV18] = "UNASSIGNED RESERVED 18",
  155. [VEC_RESV19] = "UNASSIGNED RESERVED 19",
  156. [VEC_RESV20] = "UNASSIGNED RESERVED 20",
  157. [VEC_RESV21] = "UNASSIGNED RESERVED 21",
  158. [VEC_RESV22] = "UNASSIGNED RESERVED 22",
  159. [VEC_RESV23] = "UNASSIGNED RESERVED 23",
  160. [VEC_SPUR] = "SPURIOUS INTERRUPT",
  161. [VEC_INT1] = "LEVEL 1 INT",
  162. [VEC_INT2] = "LEVEL 2 INT",
  163. [VEC_INT3] = "LEVEL 3 INT",
  164. [VEC_INT4] = "LEVEL 4 INT",
  165. [VEC_INT5] = "LEVEL 5 INT",
  166. [VEC_INT6] = "LEVEL 6 INT",
  167. [VEC_INT7] = "LEVEL 7 INT",
  168. [VEC_SYS] = "SYSCALL",
  169. [VEC_TRAP1] = "TRAP #1",
  170. [VEC_TRAP2] = "TRAP #2",
  171. [VEC_TRAP3] = "TRAP #3",
  172. [VEC_TRAP4] = "TRAP #4",
  173. [VEC_TRAP5] = "TRAP #5",
  174. [VEC_TRAP6] = "TRAP #6",
  175. [VEC_TRAP7] = "TRAP #7",
  176. [VEC_TRAP8] = "TRAP #8",
  177. [VEC_TRAP9] = "TRAP #9",
  178. [VEC_TRAP10] = "TRAP #10",
  179. [VEC_TRAP11] = "TRAP #11",
  180. [VEC_TRAP12] = "TRAP #12",
  181. [VEC_TRAP13] = "TRAP #13",
  182. [VEC_TRAP14] = "TRAP #14",
  183. [VEC_TRAP15] = "TRAP #15",
  184. [VEC_FPBRUC] = "FPCP BSUN",
  185. [VEC_FPIR] = "FPCP INEXACT",
  186. [VEC_FPDIVZ] = "FPCP DIV BY 0",
  187. [VEC_FPUNDER] = "FPCP UNDERFLOW",
  188. [VEC_FPOE] = "FPCP OPERAND ERROR",
  189. [VEC_FPOVER] = "FPCP OVERFLOW",
  190. [VEC_FPNAN] = "FPCP SNAN",
  191. [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION",
  192. [VEC_MMUCFG] = "MMU CONFIGURATION ERROR",
  193. [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR",
  194. [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR",
  195. [VEC_RESV59] = "UNASSIGNED RESERVED 59",
  196. [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60",
  197. [VEC_UNIMPII] = "UNASSIGNED RESERVED 61",
  198. [VEC_RESV62] = "UNASSIGNED RESERVED 62",
  199. [VEC_RESV63] = "UNASSIGNED RESERVED 63",
  200. };
  201. static const char *space_names[] = {
  202. [0] = "Space 0",
  203. [USER_DATA] = "User Data",
  204. [USER_PROGRAM] = "User Program",
  205. #ifndef CONFIG_SUN3
  206. [3] = "Space 3",
  207. #else
  208. [FC_CONTROL] = "Control",
  209. #endif
  210. [4] = "Space 4",
  211. [SUPER_DATA] = "Super Data",
  212. [SUPER_PROGRAM] = "Super Program",
  213. [CPU_SPACE] = "CPU"
  214. };
  215. void die_if_kernel(char *,struct pt_regs *,int);
  216. asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
  217. unsigned long error_code);
  218. int send_fault_sig(struct pt_regs *regs);
  219. asmlinkage void trap_c(struct frame *fp);
  220. #if defined (CONFIG_M68060)
  221. static inline void access_error060 (struct frame *fp)
  222. {
  223. unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
  224. #ifdef DEBUG
  225. printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
  226. #endif
  227. if (fslw & MMU060_BPE) {
  228. /* branch prediction error -> clear branch cache */
  229. __asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
  230. "orl #0x00400000,%/d0\n\t"
  231. "movec %/d0,%/cacr"
  232. : : : "d0" );
  233. /* return if there's no other error */
  234. if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
  235. return;
  236. }
  237. if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
  238. unsigned long errorcode;
  239. unsigned long addr = fp->un.fmt4.effaddr;
  240. if (fslw & MMU060_MA)
  241. addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
  242. errorcode = 1;
  243. if (fslw & MMU060_DESC_ERR) {
  244. __flush_tlb040_one(addr);
  245. errorcode = 0;
  246. }
  247. if (fslw & MMU060_W)
  248. errorcode |= 2;
  249. #ifdef DEBUG
  250. printk("errorcode = %d\n", errorcode );
  251. #endif
  252. do_page_fault(&fp->ptregs, addr, errorcode);
  253. } else if (fslw & (MMU060_SEE)){
  254. /* Software Emulation Error.
  255. * fault during mem_read/mem_write in ifpsp060/os.S
  256. */
  257. send_fault_sig(&fp->ptregs);
  258. } else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
  259. send_fault_sig(&fp->ptregs) > 0) {
  260. printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr);
  261. printk( "68060 access error, fslw=%lx\n", fslw );
  262. trap_c( fp );
  263. }
  264. }
  265. #endif /* CONFIG_M68060 */
  266. #if defined (CONFIG_M68040)
  267. static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
  268. {
  269. unsigned long mmusr;
  270. mm_segment_t old_fs = get_fs();
  271. set_fs(MAKE_MM_SEG(wbs));
  272. if (iswrite)
  273. asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
  274. else
  275. asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
  276. asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
  277. set_fs(old_fs);
  278. return mmusr;
  279. }
  280. static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
  281. unsigned long wbd)
  282. {
  283. int res = 0;
  284. mm_segment_t old_fs = get_fs();
  285. /* set_fs can not be moved, otherwise put_user() may oops */
  286. set_fs(MAKE_MM_SEG(wbs));
  287. switch (wbs & WBSIZ_040) {
  288. case BA_SIZE_BYTE:
  289. res = put_user(wbd & 0xff, (char *)wba);
  290. break;
  291. case BA_SIZE_WORD:
  292. res = put_user(wbd & 0xffff, (short *)wba);
  293. break;
  294. case BA_SIZE_LONG:
  295. res = put_user(wbd, (int *)wba);
  296. break;
  297. }
  298. /* set_fs can not be moved, otherwise put_user() may oops */
  299. set_fs(old_fs);
  300. #ifdef DEBUG
  301. printk("do_040writeback1, res=%d\n",res);
  302. #endif
  303. return res;
  304. }
  305. /* after an exception in a writeback the stack frame corresponding
  306. * to that exception is discarded, set a few bits in the old frame
  307. * to simulate what it should look like
  308. */
  309. static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
  310. {
  311. fp->un.fmt7.faddr = wba;
  312. fp->un.fmt7.ssw = wbs & 0xff;
  313. if (wba != current->thread.faddr)
  314. fp->un.fmt7.ssw |= MA_040;
  315. }
  316. static inline void do_040writebacks(struct frame *fp)
  317. {
  318. int res = 0;
  319. #if 0
  320. if (fp->un.fmt7.wb1s & WBV_040)
  321. printk("access_error040: cannot handle 1st writeback. oops.\n");
  322. #endif
  323. if ((fp->un.fmt7.wb2s & WBV_040) &&
  324. !(fp->un.fmt7.wb2s & WBTT_040)) {
  325. res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
  326. fp->un.fmt7.wb2d);
  327. if (res)
  328. fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
  329. else
  330. fp->un.fmt7.wb2s = 0;
  331. }
  332. /* do the 2nd wb only if the first one was successful (except for a kernel wb) */
  333. if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
  334. res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
  335. fp->un.fmt7.wb3d);
  336. if (res)
  337. {
  338. fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
  339. fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
  340. fp->un.fmt7.wb3s &= (~WBV_040);
  341. fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
  342. fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
  343. }
  344. else
  345. fp->un.fmt7.wb3s = 0;
  346. }
  347. if (res)
  348. send_fault_sig(&fp->ptregs);
  349. }
  350. /*
  351. * called from sigreturn(), must ensure userspace code didn't
  352. * manipulate exception frame to circumvent protection, then complete
  353. * pending writebacks
  354. * we just clear TM2 to turn it into an userspace access
  355. */
  356. asmlinkage void berr_040cleanup(struct frame *fp)
  357. {
  358. fp->un.fmt7.wb2s &= ~4;
  359. fp->un.fmt7.wb3s &= ~4;
  360. do_040writebacks(fp);
  361. }
  362. static inline void access_error040(struct frame *fp)
  363. {
  364. unsigned short ssw = fp->un.fmt7.ssw;
  365. unsigned long mmusr;
  366. #ifdef DEBUG
  367. printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
  368. printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
  369. fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
  370. printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
  371. fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
  372. fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
  373. #endif
  374. if (ssw & ATC_040) {
  375. unsigned long addr = fp->un.fmt7.faddr;
  376. unsigned long errorcode;
  377. /*
  378. * The MMU status has to be determined AFTER the address
  379. * has been corrected if there was a misaligned access (MA).
  380. */
  381. if (ssw & MA_040)
  382. addr = (addr + 7) & -8;
  383. /* MMU error, get the MMUSR info for this access */
  384. mmusr = probe040(!(ssw & RW_040), addr, ssw);
  385. #ifdef DEBUG
  386. printk("mmusr = %lx\n", mmusr);
  387. #endif
  388. errorcode = 1;
  389. if (!(mmusr & MMU_R_040)) {
  390. /* clear the invalid atc entry */
  391. __flush_tlb040_one(addr);
  392. errorcode = 0;
  393. }
  394. /* despite what documentation seems to say, RMW
  395. * accesses have always both the LK and RW bits set */
  396. if (!(ssw & RW_040) || (ssw & LK_040))
  397. errorcode |= 2;
  398. if (do_page_fault(&fp->ptregs, addr, errorcode)) {
  399. #ifdef DEBUG
  400. printk("do_page_fault() !=0 \n");
  401. #endif
  402. if (user_mode(&fp->ptregs)){
  403. /* delay writebacks after signal delivery */
  404. #ifdef DEBUG
  405. printk(".. was usermode - return\n");
  406. #endif
  407. return;
  408. }
  409. /* disable writeback into user space from kernel
  410. * (if do_page_fault didn't fix the mapping,
  411. * the writeback won't do good)
  412. */
  413. #ifdef DEBUG
  414. printk(".. disabling wb2\n");
  415. #endif
  416. if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
  417. fp->un.fmt7.wb2s &= ~WBV_040;
  418. }
  419. } else if (send_fault_sig(&fp->ptregs) > 0) {
  420. printk("68040 access error, ssw=%x\n", ssw);
  421. trap_c(fp);
  422. }
  423. do_040writebacks(fp);
  424. }
  425. #endif /* CONFIG_M68040 */
  426. #if defined(CONFIG_SUN3)
  427. #include <asm/sun3mmu.h>
  428. extern int mmu_emu_handle_fault (unsigned long, int, int);
  429. /* sun3 version of bus_error030 */
  430. static inline void bus_error030 (struct frame *fp)
  431. {
  432. unsigned char buserr_type = sun3_get_buserr ();
  433. unsigned long addr, errorcode;
  434. unsigned short ssw = fp->un.fmtb.ssw;
  435. extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
  436. #ifdef DEBUG
  437. if (ssw & (FC | FB))
  438. printk ("Instruction fault at %#010lx\n",
  439. ssw & FC ?
  440. fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
  441. :
  442. fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
  443. if (ssw & DF)
  444. printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  445. ssw & RW ? "read" : "write",
  446. fp->un.fmtb.daddr,
  447. space_names[ssw & DFC], fp->ptregs.pc);
  448. #endif
  449. /*
  450. * Check if this page should be demand-mapped. This needs to go before
  451. * the testing for a bad kernel-space access (demand-mapping applies
  452. * to kernel accesses too).
  453. */
  454. if ((ssw & DF)
  455. && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
  456. if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
  457. return;
  458. }
  459. /* Check for kernel-space pagefault (BAD). */
  460. if (fp->ptregs.sr & PS_S) {
  461. /* kernel fault must be a data fault to user space */
  462. if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
  463. // try checking the kernel mappings before surrender
  464. if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
  465. return;
  466. /* instruction fault or kernel data fault! */
  467. if (ssw & (FC | FB))
  468. printk ("Instruction fault at %#010lx\n",
  469. fp->ptregs.pc);
  470. if (ssw & DF) {
  471. /* was this fault incurred testing bus mappings? */
  472. if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
  473. (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
  474. send_fault_sig(&fp->ptregs);
  475. return;
  476. }
  477. printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  478. ssw & RW ? "read" : "write",
  479. fp->un.fmtb.daddr,
  480. space_names[ssw & DFC], fp->ptregs.pc);
  481. }
  482. printk ("BAD KERNEL BUSERR\n");
  483. die_if_kernel("Oops", &fp->ptregs,0);
  484. force_sig(SIGKILL, current);
  485. return;
  486. }
  487. } else {
  488. /* user fault */
  489. if (!(ssw & (FC | FB)) && !(ssw & DF))
  490. /* not an instruction fault or data fault! BAD */
  491. panic ("USER BUSERR w/o instruction or data fault");
  492. }
  493. /* First handle the data fault, if any. */
  494. if (ssw & DF) {
  495. addr = fp->un.fmtb.daddr;
  496. // errorcode bit 0: 0 -> no page 1 -> protection fault
  497. // errorcode bit 1: 0 -> read fault 1 -> write fault
  498. // (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault
  499. // (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault
  500. if (buserr_type & SUN3_BUSERR_PROTERR)
  501. errorcode = 0x01;
  502. else if (buserr_type & SUN3_BUSERR_INVALID)
  503. errorcode = 0x00;
  504. else {
  505. #ifdef DEBUG
  506. printk ("*** unexpected busfault type=%#04x\n", buserr_type);
  507. printk ("invalid %s access at %#lx from pc %#lx\n",
  508. !(ssw & RW) ? "write" : "read", addr,
  509. fp->ptregs.pc);
  510. #endif
  511. die_if_kernel ("Oops", &fp->ptregs, buserr_type);
  512. force_sig (SIGBUS, current);
  513. return;
  514. }
  515. //todo: wtf is RM bit? --m
  516. if (!(ssw & RW) || ssw & RM)
  517. errorcode |= 0x02;
  518. /* Handle page fault. */
  519. do_page_fault (&fp->ptregs, addr, errorcode);
  520. /* Retry the data fault now. */
  521. return;
  522. }
  523. /* Now handle the instruction fault. */
  524. /* Get the fault address. */
  525. if (fp->ptregs.format == 0xA)
  526. addr = fp->ptregs.pc + 4;
  527. else
  528. addr = fp->un.fmtb.baddr;
  529. if (ssw & FC)
  530. addr -= 2;
  531. if (buserr_type & SUN3_BUSERR_INVALID) {
  532. if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0))
  533. do_page_fault (&fp->ptregs, addr, 0);
  534. } else {
  535. #ifdef DEBUG
  536. printk ("protection fault on insn access (segv).\n");
  537. #endif
  538. force_sig (SIGSEGV, current);
  539. }
  540. }
  541. #else
  542. #if defined(CPU_M68020_OR_M68030)
  543. static inline void bus_error030 (struct frame *fp)
  544. {
  545. volatile unsigned short temp;
  546. unsigned short mmusr;
  547. unsigned long addr, errorcode;
  548. unsigned short ssw = fp->un.fmtb.ssw;
  549. #ifdef DEBUG
  550. unsigned long desc;
  551. printk ("pid = %x ", current->pid);
  552. printk ("SSW=%#06x ", ssw);
  553. if (ssw & (FC | FB))
  554. printk ("Instruction fault at %#010lx\n",
  555. ssw & FC ?
  556. fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
  557. :
  558. fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
  559. if (ssw & DF)
  560. printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  561. ssw & RW ? "read" : "write",
  562. fp->un.fmtb.daddr,
  563. space_names[ssw & DFC], fp->ptregs.pc);
  564. #endif
  565. /* ++andreas: If a data fault and an instruction fault happen
  566. at the same time map in both pages. */
  567. /* First handle the data fault, if any. */
  568. if (ssw & DF) {
  569. addr = fp->un.fmtb.daddr;
  570. #ifdef DEBUG
  571. asm volatile ("ptestr %3,%2@,#7,%0\n\t"
  572. "pmove %%psr,%1@"
  573. : "=a&" (desc)
  574. : "a" (&temp), "a" (addr), "d" (ssw));
  575. #else
  576. asm volatile ("ptestr %2,%1@,#7\n\t"
  577. "pmove %%psr,%0@"
  578. : : "a" (&temp), "a" (addr), "d" (ssw));
  579. #endif
  580. mmusr = temp;
  581. #ifdef DEBUG
  582. printk("mmusr is %#x for addr %#lx in task %p\n",
  583. mmusr, addr, current);
  584. printk("descriptor address is %#lx, contents %#lx\n",
  585. __va(desc), *(unsigned long *)__va(desc));
  586. #endif
  587. errorcode = (mmusr & MMU_I) ? 0 : 1;
  588. if (!(ssw & RW) || (ssw & RM))
  589. errorcode |= 2;
  590. if (mmusr & (MMU_I | MMU_WP)) {
  591. if (ssw & 4) {
  592. printk("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  593. ssw & RW ? "read" : "write",
  594. fp->un.fmtb.daddr,
  595. space_names[ssw & DFC], fp->ptregs.pc);
  596. goto buserr;
  597. }
  598. /* Don't try to do anything further if an exception was
  599. handled. */
  600. if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
  601. return;
  602. } else if (!(mmusr & MMU_I)) {
  603. /* probably a 020 cas fault */
  604. if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
  605. printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr);
  606. } else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
  607. printk("invalid %s access at %#lx from pc %#lx\n",
  608. !(ssw & RW) ? "write" : "read", addr,
  609. fp->ptregs.pc);
  610. die_if_kernel("Oops",&fp->ptregs,mmusr);
  611. force_sig(SIGSEGV, current);
  612. return;
  613. } else {
  614. #if 0
  615. static volatile long tlong;
  616. #endif
  617. printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
  618. !(ssw & RW) ? "write" : "read", addr,
  619. fp->ptregs.pc, ssw);
  620. asm volatile ("ptestr #1,%1@,#0\n\t"
  621. "pmove %%psr,%0@"
  622. : /* no outputs */
  623. : "a" (&temp), "a" (addr));
  624. mmusr = temp;
  625. printk ("level 0 mmusr is %#x\n", mmusr);
  626. #if 0
  627. asm volatile ("pmove %%tt0,%0@"
  628. : /* no outputs */
  629. : "a" (&tlong));
  630. printk("tt0 is %#lx, ", tlong);
  631. asm volatile ("pmove %%tt1,%0@"
  632. : /* no outputs */
  633. : "a" (&tlong));
  634. printk("tt1 is %#lx\n", tlong);
  635. #endif
  636. #ifdef DEBUG
  637. printk("Unknown SIGSEGV - 1\n");
  638. #endif
  639. die_if_kernel("Oops",&fp->ptregs,mmusr);
  640. force_sig(SIGSEGV, current);
  641. return;
  642. }
  643. /* setup an ATC entry for the access about to be retried */
  644. if (!(ssw & RW) || (ssw & RM))
  645. asm volatile ("ploadw %1,%0@" : /* no outputs */
  646. : "a" (addr), "d" (ssw));
  647. else
  648. asm volatile ("ploadr %1,%0@" : /* no outputs */
  649. : "a" (addr), "d" (ssw));
  650. }
  651. /* Now handle the instruction fault. */
  652. if (!(ssw & (FC|FB)))
  653. return;
  654. if (fp->ptregs.sr & PS_S) {
  655. printk("Instruction fault at %#010lx\n",
  656. fp->ptregs.pc);
  657. buserr:
  658. printk ("BAD KERNEL BUSERR\n");
  659. die_if_kernel("Oops",&fp->ptregs,0);
  660. force_sig(SIGKILL, current);
  661. return;
  662. }
  663. /* get the fault address */
  664. if (fp->ptregs.format == 10)
  665. addr = fp->ptregs.pc + 4;
  666. else
  667. addr = fp->un.fmtb.baddr;
  668. if (ssw & FC)
  669. addr -= 2;
  670. if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
  671. /* Insn fault on same page as data fault. But we
  672. should still create the ATC entry. */
  673. goto create_atc_entry;
  674. #ifdef DEBUG
  675. asm volatile ("ptestr #1,%2@,#7,%0\n\t"
  676. "pmove %%psr,%1@"
  677. : "=a&" (desc)
  678. : "a" (&temp), "a" (addr));
  679. #else
  680. asm volatile ("ptestr #1,%1@,#7\n\t"
  681. "pmove %%psr,%0@"
  682. : : "a" (&temp), "a" (addr));
  683. #endif
  684. mmusr = temp;
  685. #ifdef DEBUG
  686. printk ("mmusr is %#x for addr %#lx in task %p\n",
  687. mmusr, addr, current);
  688. printk ("descriptor address is %#lx, contents %#lx\n",
  689. __va(desc), *(unsigned long *)__va(desc));
  690. #endif
  691. if (mmusr & MMU_I)
  692. do_page_fault (&fp->ptregs, addr, 0);
  693. else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
  694. printk ("invalid insn access at %#lx from pc %#lx\n",
  695. addr, fp->ptregs.pc);
  696. #ifdef DEBUG
  697. printk("Unknown SIGSEGV - 2\n");
  698. #endif
  699. die_if_kernel("Oops",&fp->ptregs,mmusr);
  700. force_sig(SIGSEGV, current);
  701. return;
  702. }
  703. create_atc_entry:
  704. /* setup an ATC entry for the access about to be retried */
  705. asm volatile ("ploadr #2,%0@" : /* no outputs */
  706. : "a" (addr));
  707. }
  708. #endif /* CPU_M68020_OR_M68030 */
  709. #endif /* !CONFIG_SUN3 */
  710. asmlinkage void buserr_c(struct frame *fp)
  711. {
  712. /* Only set esp0 if coming from user mode */
  713. if (user_mode(&fp->ptregs))
  714. current->thread.esp0 = (unsigned long) fp;
  715. #ifdef DEBUG
  716. printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
  717. #endif
  718. switch (fp->ptregs.format) {
  719. #if defined (CONFIG_M68060)
  720. case 4: /* 68060 access error */
  721. access_error060 (fp);
  722. break;
  723. #endif
  724. #if defined (CONFIG_M68040)
  725. case 0x7: /* 68040 access error */
  726. access_error040 (fp);
  727. break;
  728. #endif
  729. #if defined (CPU_M68020_OR_M68030)
  730. case 0xa:
  731. case 0xb:
  732. bus_error030 (fp);
  733. break;
  734. #endif
  735. default:
  736. die_if_kernel("bad frame format",&fp->ptregs,0);
  737. #ifdef DEBUG
  738. printk("Unknown SIGSEGV - 4\n");
  739. #endif
  740. force_sig(SIGSEGV, current);
  741. }
  742. }
  743. static int kstack_depth_to_print = 48;
  744. void show_trace(unsigned long *stack)
  745. {
  746. unsigned long *endstack;
  747. unsigned long addr;
  748. int i;
  749. printk("Call Trace:");
  750. addr = (unsigned long)stack + THREAD_SIZE - 1;
  751. endstack = (unsigned long *)(addr & -THREAD_SIZE);
  752. i = 0;
  753. while (stack + 1 <= endstack) {
  754. addr = *stack++;
  755. /*
  756. * If the address is either in the text segment of the
  757. * kernel, or in the region which contains vmalloc'ed
  758. * memory, it *may* be the address of a calling
  759. * routine; if so, print it so that someone tracing
  760. * down the cause of the crash will be able to figure
  761. * out the call path that was taken.
  762. */
  763. if (__kernel_text_address(addr)) {
  764. #ifndef CONFIG_KALLSYMS
  765. if (i % 5 == 0)
  766. printk("\n ");
  767. #endif
  768. printk(" [<%08lx>]", addr);
  769. print_symbol(" %s\n", addr);
  770. i++;
  771. }
  772. }
  773. printk("\n");
  774. }
  775. void show_registers(struct pt_regs *regs)
  776. {
  777. struct frame *fp = (struct frame *)regs;
  778. mm_segment_t old_fs = get_fs();
  779. u16 c, *cp;
  780. unsigned long addr;
  781. int i;
  782. print_modules();
  783. printk("PC: [<%08lx>]",regs->pc);
  784. print_symbol(" %s", regs->pc);
  785. printk("\nSR: %04x SP: %p a2: %08lx\n",
  786. regs->sr, regs, regs->a2);
  787. printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
  788. regs->d0, regs->d1, regs->d2, regs->d3);
  789. printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
  790. regs->d4, regs->d5, regs->a0, regs->a1);
  791. printk("Process %s (pid: %d, task=%p)\n",
  792. current->comm, current->pid, current);
  793. addr = (unsigned long)&fp->un;
  794. printk("Frame format=%X ", regs->format);
  795. switch (regs->format) {
  796. case 0x2:
  797. printk("instr addr=%08lx\n", fp->un.fmt2.iaddr);
  798. addr += sizeof(fp->un.fmt2);
  799. break;
  800. case 0x3:
  801. printk("eff addr=%08lx\n", fp->un.fmt3.effaddr);
  802. addr += sizeof(fp->un.fmt3);
  803. break;
  804. case 0x4:
  805. printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n"
  806. : "eff addr=%08lx pc=%08lx\n"),
  807. fp->un.fmt4.effaddr, fp->un.fmt4.pc);
  808. addr += sizeof(fp->un.fmt4);
  809. break;
  810. case 0x7:
  811. printk("eff addr=%08lx ssw=%04x faddr=%08lx\n",
  812. fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
  813. printk("wb 1 stat/addr/data: %04x %08lx %08lx\n",
  814. fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
  815. printk("wb 2 stat/addr/data: %04x %08lx %08lx\n",
  816. fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
  817. printk("wb 3 stat/addr/data: %04x %08lx %08lx\n",
  818. fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
  819. printk("push data: %08lx %08lx %08lx %08lx\n",
  820. fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
  821. fp->un.fmt7.pd3);
  822. addr += sizeof(fp->un.fmt7);
  823. break;
  824. case 0x9:
  825. printk("instr addr=%08lx\n", fp->un.fmt9.iaddr);
  826. addr += sizeof(fp->un.fmt9);
  827. break;
  828. case 0xa:
  829. printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
  830. fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
  831. fp->un.fmta.daddr, fp->un.fmta.dobuf);
  832. addr += sizeof(fp->un.fmta);
  833. break;
  834. case 0xb:
  835. printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
  836. fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
  837. fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
  838. printk("baddr=%08lx dibuf=%08lx ver=%x\n",
  839. fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
  840. addr += sizeof(fp->un.fmtb);
  841. break;
  842. default:
  843. printk("\n");
  844. }
  845. show_stack(NULL, (unsigned long *)addr);
  846. printk("Code:");
  847. set_fs(KERNEL_DS);
  848. cp = (u16 *)regs->pc;
  849. for (i = -8; i < 16; i++) {
  850. if (get_user(c, cp + i) && i >= 0) {
  851. printk(" Bad PC value.");
  852. break;
  853. }
  854. printk(i ? " %04x" : " <%04x>", c);
  855. }
  856. set_fs(old_fs);
  857. printk ("\n");
  858. }
  859. void show_stack(struct task_struct *task, unsigned long *stack)
  860. {
  861. unsigned long *p;
  862. unsigned long *endstack;
  863. int i;
  864. if (!stack) {
  865. if (task)
  866. stack = (unsigned long *)task->thread.esp0;
  867. else
  868. stack = (unsigned long *)&stack;
  869. }
  870. endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
  871. printk("Stack from %08lx:", (unsigned long)stack);
  872. p = stack;
  873. for (i = 0; i < kstack_depth_to_print; i++) {
  874. if (p + 1 > endstack)
  875. break;
  876. if (i % 8 == 0)
  877. printk("\n ");
  878. printk(" %08lx", *p++);
  879. }
  880. printk("\n");
  881. show_trace(stack);
  882. }
  883. /*
  884. * The architecture-independent backtrace generator
  885. */
  886. void dump_stack(void)
  887. {
  888. unsigned long stack;
  889. show_trace(&stack);
  890. }
  891. EXPORT_SYMBOL(dump_stack);
  892. void bad_super_trap (struct frame *fp)
  893. {
  894. console_verbose();
  895. if (fp->ptregs.vector < 4*sizeof(vec_names)/sizeof(vec_names[0]))
  896. printk ("*** %s *** FORMAT=%X\n",
  897. vec_names[(fp->ptregs.vector) >> 2],
  898. fp->ptregs.format);
  899. else
  900. printk ("*** Exception %d *** FORMAT=%X\n",
  901. (fp->ptregs.vector) >> 2,
  902. fp->ptregs.format);
  903. if (fp->ptregs.vector >> 2 == VEC_ADDRERR && CPU_IS_020_OR_030) {
  904. unsigned short ssw = fp->un.fmtb.ssw;
  905. printk ("SSW=%#06x ", ssw);
  906. if (ssw & RC)
  907. printk ("Pipe stage C instruction fault at %#010lx\n",
  908. (fp->ptregs.format) == 0xA ?
  909. fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
  910. if (ssw & RB)
  911. printk ("Pipe stage B instruction fault at %#010lx\n",
  912. (fp->ptregs.format) == 0xA ?
  913. fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
  914. if (ssw & DF)
  915. printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  916. ssw & RW ? "read" : "write",
  917. fp->un.fmtb.daddr, space_names[ssw & DFC],
  918. fp->ptregs.pc);
  919. }
  920. printk ("Current process id is %d\n", current->pid);
  921. die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
  922. }
  923. asmlinkage void trap_c(struct frame *fp)
  924. {
  925. int sig;
  926. siginfo_t info;
  927. if (fp->ptregs.sr & PS_S) {
  928. if ((fp->ptregs.vector >> 2) == VEC_TRACE) {
  929. /* traced a trapping instruction */
  930. current->ptrace |= PT_DTRACE;
  931. } else
  932. bad_super_trap(fp);
  933. return;
  934. }
  935. /* send the appropriate signal to the user program */
  936. switch ((fp->ptregs.vector) >> 2) {
  937. case VEC_ADDRERR:
  938. info.si_code = BUS_ADRALN;
  939. sig = SIGBUS;
  940. break;
  941. case VEC_ILLEGAL:
  942. case VEC_LINE10:
  943. case VEC_LINE11:
  944. info.si_code = ILL_ILLOPC;
  945. sig = SIGILL;
  946. break;
  947. case VEC_PRIV:
  948. info.si_code = ILL_PRVOPC;
  949. sig = SIGILL;
  950. break;
  951. case VEC_COPROC:
  952. info.si_code = ILL_COPROC;
  953. sig = SIGILL;
  954. break;
  955. case VEC_TRAP1:
  956. case VEC_TRAP2:
  957. case VEC_TRAP3:
  958. case VEC_TRAP4:
  959. case VEC_TRAP5:
  960. case VEC_TRAP6:
  961. case VEC_TRAP7:
  962. case VEC_TRAP8:
  963. case VEC_TRAP9:
  964. case VEC_TRAP10:
  965. case VEC_TRAP11:
  966. case VEC_TRAP12:
  967. case VEC_TRAP13:
  968. case VEC_TRAP14:
  969. info.si_code = ILL_ILLTRP;
  970. sig = SIGILL;
  971. break;
  972. case VEC_FPBRUC:
  973. case VEC_FPOE:
  974. case VEC_FPNAN:
  975. info.si_code = FPE_FLTINV;
  976. sig = SIGFPE;
  977. break;
  978. case VEC_FPIR:
  979. info.si_code = FPE_FLTRES;
  980. sig = SIGFPE;
  981. break;
  982. case VEC_FPDIVZ:
  983. info.si_code = FPE_FLTDIV;
  984. sig = SIGFPE;
  985. break;
  986. case VEC_FPUNDER:
  987. info.si_code = FPE_FLTUND;
  988. sig = SIGFPE;
  989. break;
  990. case VEC_FPOVER:
  991. info.si_code = FPE_FLTOVF;
  992. sig = SIGFPE;
  993. break;
  994. case VEC_ZERODIV:
  995. info.si_code = FPE_INTDIV;
  996. sig = SIGFPE;
  997. break;
  998. case VEC_CHK:
  999. case VEC_TRAP:
  1000. info.si_code = FPE_INTOVF;
  1001. sig = SIGFPE;
  1002. break;
  1003. case VEC_TRACE: /* ptrace single step */
  1004. info.si_code = TRAP_TRACE;
  1005. sig = SIGTRAP;
  1006. break;
  1007. case VEC_TRAP15: /* breakpoint */
  1008. info.si_code = TRAP_BRKPT;
  1009. sig = SIGTRAP;
  1010. break;
  1011. default:
  1012. info.si_code = ILL_ILLOPC;
  1013. sig = SIGILL;
  1014. break;
  1015. }
  1016. info.si_signo = sig;
  1017. info.si_errno = 0;
  1018. switch (fp->ptregs.format) {
  1019. default:
  1020. info.si_addr = (void *) fp->ptregs.pc;
  1021. break;
  1022. case 2:
  1023. info.si_addr = (void *) fp->un.fmt2.iaddr;
  1024. break;
  1025. case 7:
  1026. info.si_addr = (void *) fp->un.fmt7.effaddr;
  1027. break;
  1028. case 9:
  1029. info.si_addr = (void *) fp->un.fmt9.iaddr;
  1030. break;
  1031. case 10:
  1032. info.si_addr = (void *) fp->un.fmta.daddr;
  1033. break;
  1034. case 11:
  1035. info.si_addr = (void *) fp->un.fmtb.daddr;
  1036. break;
  1037. }
  1038. force_sig_info (sig, &info, current);
  1039. }
  1040. void die_if_kernel (char *str, struct pt_regs *fp, int nr)
  1041. {
  1042. if (!(fp->sr & PS_S))
  1043. return;
  1044. console_verbose();
  1045. printk("%s: %08x\n",str,nr);
  1046. show_registers(fp);
  1047. do_exit(SIGSEGV);
  1048. }
  1049. /*
  1050. * This function is called if an error occur while accessing
  1051. * user-space from the fpsp040 code.
  1052. */
  1053. asmlinkage void fpsp040_die(void)
  1054. {
  1055. do_exit(SIGSEGV);
  1056. }
  1057. #ifdef CONFIG_M68KFPU_EMU
  1058. asmlinkage void fpemu_signal(int signal, int code, void *addr)
  1059. {
  1060. siginfo_t info;
  1061. info.si_signo = signal;
  1062. info.si_errno = 0;
  1063. info.si_code = code;
  1064. info.si_addr = addr;
  1065. force_sig_info(signal, &info, current);
  1066. }
  1067. #endif