hw_breakpoint.c 12 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License as published by
  4. * the Free Software Foundation; either version 2 of the License, or
  5. * (at your option) any later version.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  15. *
  16. * Copyright (C) 2007 Alan Stern
  17. * Copyright (C) 2009 IBM Corporation
  18. * Copyright (C) 2009 Frederic Weisbecker <fweisbec@gmail.com>
  19. */
  20. /*
  21. * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
  22. * using the CPU's debug registers.
  23. */
  24. #include <linux/perf_event.h>
  25. #include <linux/hw_breakpoint.h>
  26. #include <linux/irqflags.h>
  27. #include <linux/notifier.h>
  28. #include <linux/kallsyms.h>
  29. #include <linux/kprobes.h>
  30. #include <linux/percpu.h>
  31. #include <linux/kdebug.h>
  32. #include <linux/kernel.h>
  33. #include <linux/module.h>
  34. #include <linux/sched.h>
  35. #include <linux/init.h>
  36. #include <linux/smp.h>
  37. #include <asm/hw_breakpoint.h>
  38. #include <asm/processor.h>
  39. #include <asm/debugreg.h>
  40. /* Per cpu debug control register value */
  41. DEFINE_PER_CPU(unsigned long, dr7);
  42. EXPORT_PER_CPU_SYMBOL(dr7);
  43. /* Per cpu debug address registers values */
  44. static DEFINE_PER_CPU(unsigned long, cpu_debugreg[HBP_NUM]);
  45. /*
  46. * Stores the breakpoints currently in use on each breakpoint address
  47. * register for each cpus
  48. */
  49. static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
  50. /*
  51. * Encode the length, type, Exact, and Enable bits for a particular breakpoint
  52. * as stored in debug register 7.
  53. */
  54. unsigned long encode_dr7(int drnum, unsigned int len, unsigned int type)
  55. {
  56. unsigned long bp_info;
  57. bp_info = (len | type) & 0xf;
  58. bp_info <<= (DR_CONTROL_SHIFT + drnum * DR_CONTROL_SIZE);
  59. bp_info |= (DR_GLOBAL_ENABLE << (drnum * DR_ENABLE_SIZE)) |
  60. DR_GLOBAL_SLOWDOWN;
  61. return bp_info;
  62. }
  63. /*
  64. * Decode the length and type bits for a particular breakpoint as
  65. * stored in debug register 7. Return the "enabled" status.
  66. */
  67. int decode_dr7(unsigned long dr7, int bpnum, unsigned *len, unsigned *type)
  68. {
  69. int bp_info = dr7 >> (DR_CONTROL_SHIFT + bpnum * DR_CONTROL_SIZE);
  70. *len = (bp_info & 0xc) | 0x40;
  71. *type = (bp_info & 0x3) | 0x80;
  72. return (dr7 >> (bpnum * DR_ENABLE_SIZE)) & 0x3;
  73. }
  74. /*
  75. * Install a perf counter breakpoint.
  76. *
  77. * We seek a free debug address register and use it for this
  78. * breakpoint. Eventually we enable it in the debug control register.
  79. *
  80. * Atomic: we hold the counter->ctx->lock and we only handle variables
  81. * and registers local to this cpu.
  82. */
  83. int arch_install_hw_breakpoint(struct perf_event *bp)
  84. {
  85. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  86. unsigned long *dr7;
  87. int i;
  88. for (i = 0; i < HBP_NUM; i++) {
  89. struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
  90. if (!*slot) {
  91. *slot = bp;
  92. break;
  93. }
  94. }
  95. if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
  96. return -EBUSY;
  97. set_debugreg(info->address, i);
  98. __get_cpu_var(cpu_debugreg[i]) = info->address;
  99. dr7 = &__get_cpu_var(dr7);
  100. *dr7 |= encode_dr7(i, info->len, info->type);
  101. set_debugreg(*dr7, 7);
  102. return 0;
  103. }
  104. /*
  105. * Uninstall the breakpoint contained in the given counter.
  106. *
  107. * First we search the debug address register it uses and then we disable
  108. * it.
  109. *
  110. * Atomic: we hold the counter->ctx->lock and we only handle variables
  111. * and registers local to this cpu.
  112. */
  113. void arch_uninstall_hw_breakpoint(struct perf_event *bp)
  114. {
  115. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  116. unsigned long *dr7;
  117. int i;
  118. for (i = 0; i < HBP_NUM; i++) {
  119. struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
  120. if (*slot == bp) {
  121. *slot = NULL;
  122. break;
  123. }
  124. }
  125. if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
  126. return;
  127. dr7 = &__get_cpu_var(dr7);
  128. *dr7 &= ~encode_dr7(i, info->len, info->type);
  129. set_debugreg(*dr7, 7);
  130. }
  131. static int get_hbp_len(u8 hbp_len)
  132. {
  133. unsigned int len_in_bytes = 0;
  134. switch (hbp_len) {
  135. case X86_BREAKPOINT_LEN_1:
  136. len_in_bytes = 1;
  137. break;
  138. case X86_BREAKPOINT_LEN_2:
  139. len_in_bytes = 2;
  140. break;
  141. case X86_BREAKPOINT_LEN_4:
  142. len_in_bytes = 4;
  143. break;
  144. #ifdef CONFIG_X86_64
  145. case X86_BREAKPOINT_LEN_8:
  146. len_in_bytes = 8;
  147. break;
  148. #endif
  149. }
  150. return len_in_bytes;
  151. }
  152. /*
  153. * Check for virtual address in user space.
  154. */
  155. int arch_check_va_in_userspace(unsigned long va, u8 hbp_len)
  156. {
  157. unsigned int len;
  158. len = get_hbp_len(hbp_len);
  159. return (va <= TASK_SIZE - len);
  160. }
  161. /*
  162. * Check for virtual address in kernel space.
  163. */
  164. static int arch_check_va_in_kernelspace(unsigned long va, u8 hbp_len)
  165. {
  166. unsigned int len;
  167. len = get_hbp_len(hbp_len);
  168. return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
  169. }
  170. /*
  171. * Store a breakpoint's encoded address, length, and type.
  172. */
  173. static int arch_store_info(struct perf_event *bp)
  174. {
  175. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  176. /*
  177. * For kernel-addresses, either the address or symbol name can be
  178. * specified.
  179. */
  180. if (info->name)
  181. info->address = (unsigned long)
  182. kallsyms_lookup_name(info->name);
  183. if (info->address)
  184. return 0;
  185. return -EINVAL;
  186. }
  187. int arch_bp_generic_fields(int x86_len, int x86_type,
  188. int *gen_len, int *gen_type)
  189. {
  190. /* Len */
  191. switch (x86_len) {
  192. case X86_BREAKPOINT_LEN_1:
  193. *gen_len = HW_BREAKPOINT_LEN_1;
  194. break;
  195. case X86_BREAKPOINT_LEN_2:
  196. *gen_len = HW_BREAKPOINT_LEN_2;
  197. break;
  198. case X86_BREAKPOINT_LEN_4:
  199. *gen_len = HW_BREAKPOINT_LEN_4;
  200. break;
  201. #ifdef CONFIG_X86_64
  202. case X86_BREAKPOINT_LEN_8:
  203. *gen_len = HW_BREAKPOINT_LEN_8;
  204. break;
  205. #endif
  206. default:
  207. return -EINVAL;
  208. }
  209. /* Type */
  210. switch (x86_type) {
  211. case X86_BREAKPOINT_EXECUTE:
  212. *gen_type = HW_BREAKPOINT_X;
  213. break;
  214. case X86_BREAKPOINT_WRITE:
  215. *gen_type = HW_BREAKPOINT_W;
  216. break;
  217. case X86_BREAKPOINT_RW:
  218. *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
  219. break;
  220. default:
  221. return -EINVAL;
  222. }
  223. return 0;
  224. }
  225. static int arch_build_bp_info(struct perf_event *bp)
  226. {
  227. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  228. info->address = bp->attr.bp_addr;
  229. /* Len */
  230. switch (bp->attr.bp_len) {
  231. case HW_BREAKPOINT_LEN_1:
  232. info->len = X86_BREAKPOINT_LEN_1;
  233. break;
  234. case HW_BREAKPOINT_LEN_2:
  235. info->len = X86_BREAKPOINT_LEN_2;
  236. break;
  237. case HW_BREAKPOINT_LEN_4:
  238. info->len = X86_BREAKPOINT_LEN_4;
  239. break;
  240. #ifdef CONFIG_X86_64
  241. case HW_BREAKPOINT_LEN_8:
  242. info->len = X86_BREAKPOINT_LEN_8;
  243. break;
  244. #endif
  245. default:
  246. return -EINVAL;
  247. }
  248. /* Type */
  249. switch (bp->attr.bp_type) {
  250. case HW_BREAKPOINT_W:
  251. info->type = X86_BREAKPOINT_WRITE;
  252. break;
  253. case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
  254. info->type = X86_BREAKPOINT_RW;
  255. break;
  256. case HW_BREAKPOINT_X:
  257. info->type = X86_BREAKPOINT_EXECUTE;
  258. break;
  259. default:
  260. return -EINVAL;
  261. }
  262. return 0;
  263. }
  264. /*
  265. * Validate the arch-specific HW Breakpoint register settings
  266. */
  267. int arch_validate_hwbkpt_settings(struct perf_event *bp,
  268. struct task_struct *tsk)
  269. {
  270. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  271. unsigned int align;
  272. int ret;
  273. ret = arch_build_bp_info(bp);
  274. if (ret)
  275. return ret;
  276. ret = -EINVAL;
  277. if (info->type == X86_BREAKPOINT_EXECUTE)
  278. /*
  279. * Ptrace-refactoring code
  280. * For now, we'll allow instruction breakpoint only for user-space
  281. * addresses
  282. */
  283. if ((!arch_check_va_in_userspace(info->address, info->len)) &&
  284. info->len != X86_BREAKPOINT_EXECUTE)
  285. return ret;
  286. switch (info->len) {
  287. case X86_BREAKPOINT_LEN_1:
  288. align = 0;
  289. break;
  290. case X86_BREAKPOINT_LEN_2:
  291. align = 1;
  292. break;
  293. case X86_BREAKPOINT_LEN_4:
  294. align = 3;
  295. break;
  296. #ifdef CONFIG_X86_64
  297. case X86_BREAKPOINT_LEN_8:
  298. align = 7;
  299. break;
  300. #endif
  301. default:
  302. return ret;
  303. }
  304. if (bp->callback)
  305. ret = arch_store_info(bp);
  306. if (ret < 0)
  307. return ret;
  308. /*
  309. * Check that the low-order bits of the address are appropriate
  310. * for the alignment implied by len.
  311. */
  312. if (info->address & align)
  313. return -EINVAL;
  314. /* Check that the virtual address is in the proper range */
  315. if (tsk) {
  316. if (!arch_check_va_in_userspace(info->address, info->len))
  317. return -EFAULT;
  318. } else {
  319. if (!arch_check_va_in_kernelspace(info->address, info->len))
  320. return -EFAULT;
  321. }
  322. return 0;
  323. }
  324. /*
  325. * Dump the debug register contents to the user.
  326. * We can't dump our per cpu values because it
  327. * may contain cpu wide breakpoint, something that
  328. * doesn't belong to the current task.
  329. *
  330. * TODO: include non-ptrace user breakpoints (perf)
  331. */
  332. void aout_dump_debugregs(struct user *dump)
  333. {
  334. int i;
  335. int dr7 = 0;
  336. struct perf_event *bp;
  337. struct arch_hw_breakpoint *info;
  338. struct thread_struct *thread = &current->thread;
  339. for (i = 0; i < HBP_NUM; i++) {
  340. bp = thread->ptrace_bps[i];
  341. if (bp && !bp->attr.disabled) {
  342. dump->u_debugreg[i] = bp->attr.bp_addr;
  343. info = counter_arch_bp(bp);
  344. dr7 |= encode_dr7(i, info->len, info->type);
  345. } else {
  346. dump->u_debugreg[i] = 0;
  347. }
  348. }
  349. dump->u_debugreg[4] = 0;
  350. dump->u_debugreg[5] = 0;
  351. dump->u_debugreg[6] = current->thread.debugreg6;
  352. dump->u_debugreg[7] = dr7;
  353. }
  354. EXPORT_SYMBOL_GPL(aout_dump_debugregs);
  355. /*
  356. * Release the user breakpoints used by ptrace
  357. */
  358. void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
  359. {
  360. int i;
  361. struct thread_struct *t = &tsk->thread;
  362. for (i = 0; i < HBP_NUM; i++) {
  363. unregister_hw_breakpoint(t->ptrace_bps[i]);
  364. t->ptrace_bps[i] = NULL;
  365. }
  366. }
  367. void hw_breakpoint_restore(void)
  368. {
  369. set_debugreg(__get_cpu_var(cpu_debugreg[0]), 0);
  370. set_debugreg(__get_cpu_var(cpu_debugreg[1]), 1);
  371. set_debugreg(__get_cpu_var(cpu_debugreg[2]), 2);
  372. set_debugreg(__get_cpu_var(cpu_debugreg[3]), 3);
  373. set_debugreg(current->thread.debugreg6, 6);
  374. set_debugreg(__get_cpu_var(dr7), 7);
  375. }
  376. EXPORT_SYMBOL_GPL(hw_breakpoint_restore);
  377. /*
  378. * Handle debug exception notifications.
  379. *
  380. * Return value is either NOTIFY_STOP or NOTIFY_DONE as explained below.
  381. *
  382. * NOTIFY_DONE returned if one of the following conditions is true.
  383. * i) When the causative address is from user-space and the exception
  384. * is a valid one, i.e. not triggered as a result of lazy debug register
  385. * switching
  386. * ii) When there are more bits than trap<n> set in DR6 register (such
  387. * as BD, BS or BT) indicating that more than one debug condition is
  388. * met and requires some more action in do_debug().
  389. *
  390. * NOTIFY_STOP returned for all other cases
  391. *
  392. */
  393. static int __kprobes hw_breakpoint_handler(struct die_args *args)
  394. {
  395. int i, cpu, rc = NOTIFY_STOP;
  396. struct perf_event *bp;
  397. unsigned long dr7, dr6;
  398. unsigned long *dr6_p;
  399. /* The DR6 value is pointed by args->err */
  400. dr6_p = (unsigned long *)ERR_PTR(args->err);
  401. dr6 = *dr6_p;
  402. /* Do an early return if no trap bits are set in DR6 */
  403. if ((dr6 & DR_TRAP_BITS) == 0)
  404. return NOTIFY_DONE;
  405. get_debugreg(dr7, 7);
  406. /* Disable breakpoints during exception handling */
  407. set_debugreg(0UL, 7);
  408. /*
  409. * Assert that local interrupts are disabled
  410. * Reset the DRn bits in the virtualized register value.
  411. * The ptrace trigger routine will add in whatever is needed.
  412. */
  413. current->thread.debugreg6 &= ~DR_TRAP_BITS;
  414. cpu = get_cpu();
  415. /* Handle all the breakpoints that were triggered */
  416. for (i = 0; i < HBP_NUM; ++i) {
  417. if (likely(!(dr6 & (DR_TRAP0 << i))))
  418. continue;
  419. /*
  420. * The counter may be concurrently released but that can only
  421. * occur from a call_rcu() path. We can then safely fetch
  422. * the breakpoint, use its callback, touch its counter
  423. * while we are in an rcu_read_lock() path.
  424. */
  425. rcu_read_lock();
  426. bp = per_cpu(bp_per_reg[i], cpu);
  427. if (bp)
  428. rc = NOTIFY_DONE;
  429. /*
  430. * Reset the 'i'th TRAP bit in dr6 to denote completion of
  431. * exception handling
  432. */
  433. (*dr6_p) &= ~(DR_TRAP0 << i);
  434. /*
  435. * bp can be NULL due to lazy debug register switching
  436. * or due to concurrent perf counter removing.
  437. */
  438. if (!bp) {
  439. rcu_read_unlock();
  440. break;
  441. }
  442. (bp->callback)(bp, args->regs);
  443. rcu_read_unlock();
  444. }
  445. if (dr6 & (~DR_TRAP_BITS))
  446. rc = NOTIFY_DONE;
  447. set_debugreg(dr7, 7);
  448. put_cpu();
  449. return rc;
  450. }
  451. /*
  452. * Handle debug exception notifications.
  453. */
  454. int __kprobes hw_breakpoint_exceptions_notify(
  455. struct notifier_block *unused, unsigned long val, void *data)
  456. {
  457. if (val != DIE_DEBUG)
  458. return NOTIFY_DONE;
  459. return hw_breakpoint_handler(data);
  460. }
  461. void hw_breakpoint_pmu_read(struct perf_event *bp)
  462. {
  463. /* TODO */
  464. }
  465. void hw_breakpoint_pmu_unthrottle(struct perf_event *bp)
  466. {
  467. /* TODO */
  468. }