patch_hdmi.c 69 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517
  1. /*
  2. *
  3. * patch_hdmi.c - routines for HDMI/DisplayPort codecs
  4. *
  5. * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
  6. * Copyright (c) 2006 ATI Technologies Inc.
  7. * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
  8. * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  9. *
  10. * Authors:
  11. * Wu Fengguang <wfg@linux.intel.com>
  12. *
  13. * Maintained by:
  14. * Wu Fengguang <wfg@linux.intel.com>
  15. *
  16. * This program is free software; you can redistribute it and/or modify it
  17. * under the terms of the GNU General Public License as published by the Free
  18. * Software Foundation; either version 2 of the License, or (at your option)
  19. * any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful, but
  22. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  24. * for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software Foundation,
  28. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  29. */
  30. #include <linux/init.h>
  31. #include <linux/delay.h>
  32. #include <linux/slab.h>
  33. #include <linux/module.h>
  34. #include <sound/core.h>
  35. #include <sound/jack.h>
  36. #include <sound/asoundef.h>
  37. #include <sound/tlv.h>
  38. #include "hda_codec.h"
  39. #include "hda_local.h"
  40. #include "hda_jack.h"
  41. static bool static_hdmi_pcm;
  42. module_param(static_hdmi_pcm, bool, 0644);
  43. MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  44. /*
  45. * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
  46. * could support N independent pipes, each of them can be connected to one or
  47. * more ports (DVI, HDMI or DisplayPort).
  48. *
  49. * The HDA correspondence of pipes/ports are converter/pin nodes.
  50. */
  51. #define MAX_HDMI_CVTS 8
  52. #define MAX_HDMI_PINS 8
  53. struct hdmi_spec_per_cvt {
  54. hda_nid_t cvt_nid;
  55. int assigned;
  56. unsigned int channels_min;
  57. unsigned int channels_max;
  58. u32 rates;
  59. u64 formats;
  60. unsigned int maxbps;
  61. };
  62. /* max. connections to a widget */
  63. #define HDA_MAX_CONNECTIONS 32
  64. struct hdmi_spec_per_pin {
  65. hda_nid_t pin_nid;
  66. int num_mux_nids;
  67. hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  68. struct hda_codec *codec;
  69. struct hdmi_eld sink_eld;
  70. struct delayed_work work;
  71. int repoll_count;
  72. bool non_pcm;
  73. bool chmap_set; /* channel-map override by ALSA API? */
  74. unsigned char chmap[8]; /* ALSA API channel-map */
  75. };
  76. struct hdmi_spec {
  77. int num_cvts;
  78. struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
  79. hda_nid_t cvt_nids[MAX_HDMI_CVTS];
  80. int num_pins;
  81. struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
  82. struct hda_pcm pcm_rec[MAX_HDMI_PINS];
  83. unsigned int channels_max; /* max over all cvts */
  84. /*
  85. * Non-generic ATI/NVIDIA specific
  86. */
  87. struct hda_multi_out multiout;
  88. struct hda_pcm_stream pcm_playback;
  89. };
  90. struct hdmi_audio_infoframe {
  91. u8 type; /* 0x84 */
  92. u8 ver; /* 0x01 */
  93. u8 len; /* 0x0a */
  94. u8 checksum;
  95. u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
  96. u8 SS01_SF24;
  97. u8 CXT04;
  98. u8 CA;
  99. u8 LFEPBL01_LSV36_DM_INH7;
  100. };
  101. struct dp_audio_infoframe {
  102. u8 type; /* 0x84 */
  103. u8 len; /* 0x1b */
  104. u8 ver; /* 0x11 << 2 */
  105. u8 CC02_CT47; /* match with HDMI infoframe from this on */
  106. u8 SS01_SF24;
  107. u8 CXT04;
  108. u8 CA;
  109. u8 LFEPBL01_LSV36_DM_INH7;
  110. };
  111. union audio_infoframe {
  112. struct hdmi_audio_infoframe hdmi;
  113. struct dp_audio_infoframe dp;
  114. u8 bytes[0];
  115. };
  116. /*
  117. * CEA speaker placement:
  118. *
  119. * FLH FCH FRH
  120. * FLW FL FLC FC FRC FR FRW
  121. *
  122. * LFE
  123. * TC
  124. *
  125. * RL RLC RC RRC RR
  126. *
  127. * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
  128. * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
  129. */
  130. enum cea_speaker_placement {
  131. FL = (1 << 0), /* Front Left */
  132. FC = (1 << 1), /* Front Center */
  133. FR = (1 << 2), /* Front Right */
  134. FLC = (1 << 3), /* Front Left Center */
  135. FRC = (1 << 4), /* Front Right Center */
  136. RL = (1 << 5), /* Rear Left */
  137. RC = (1 << 6), /* Rear Center */
  138. RR = (1 << 7), /* Rear Right */
  139. RLC = (1 << 8), /* Rear Left Center */
  140. RRC = (1 << 9), /* Rear Right Center */
  141. LFE = (1 << 10), /* Low Frequency Effect */
  142. FLW = (1 << 11), /* Front Left Wide */
  143. FRW = (1 << 12), /* Front Right Wide */
  144. FLH = (1 << 13), /* Front Left High */
  145. FCH = (1 << 14), /* Front Center High */
  146. FRH = (1 << 15), /* Front Right High */
  147. TC = (1 << 16), /* Top Center */
  148. };
  149. /*
  150. * ELD SA bits in the CEA Speaker Allocation data block
  151. */
  152. static int eld_speaker_allocation_bits[] = {
  153. [0] = FL | FR,
  154. [1] = LFE,
  155. [2] = FC,
  156. [3] = RL | RR,
  157. [4] = RC,
  158. [5] = FLC | FRC,
  159. [6] = RLC | RRC,
  160. /* the following are not defined in ELD yet */
  161. [7] = FLW | FRW,
  162. [8] = FLH | FRH,
  163. [9] = TC,
  164. [10] = FCH,
  165. };
  166. struct cea_channel_speaker_allocation {
  167. int ca_index;
  168. int speakers[8];
  169. /* derived values, just for convenience */
  170. int channels;
  171. int spk_mask;
  172. };
  173. /*
  174. * ALSA sequence is:
  175. *
  176. * surround40 surround41 surround50 surround51 surround71
  177. * ch0 front left = = = =
  178. * ch1 front right = = = =
  179. * ch2 rear left = = = =
  180. * ch3 rear right = = = =
  181. * ch4 LFE center center center
  182. * ch5 LFE LFE
  183. * ch6 side left
  184. * ch7 side right
  185. *
  186. * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
  187. */
  188. static int hdmi_channel_mapping[0x32][8] = {
  189. /* stereo */
  190. [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  191. /* 2.1 */
  192. [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  193. /* Dolby Surround */
  194. [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
  195. /* surround40 */
  196. [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
  197. /* 4ch */
  198. [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
  199. /* surround41 */
  200. [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
  201. /* surround50 */
  202. [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
  203. /* surround51 */
  204. [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
  205. /* 7.1 */
  206. [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
  207. };
  208. /*
  209. * This is an ordered list!
  210. *
  211. * The preceding ones have better chances to be selected by
  212. * hdmi_channel_allocation().
  213. */
  214. static struct cea_channel_speaker_allocation channel_allocations[] = {
  215. /* channel: 7 6 5 4 3 2 1 0 */
  216. { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
  217. /* 2.1 */
  218. { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
  219. /* Dolby Surround */
  220. { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
  221. /* surround40 */
  222. { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
  223. /* surround41 */
  224. { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
  225. /* surround50 */
  226. { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
  227. /* surround51 */
  228. { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
  229. /* 6.1 */
  230. { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
  231. /* surround71 */
  232. { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
  233. { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
  234. { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
  235. { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
  236. { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
  237. { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
  238. { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
  239. { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
  240. { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
  241. { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
  242. { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
  243. { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
  244. { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
  245. { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
  246. { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
  247. { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
  248. { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
  249. { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
  250. { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
  251. { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
  252. { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
  253. { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
  254. { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
  255. { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
  256. { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
  257. { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
  258. { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
  259. { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
  260. { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
  261. { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
  262. { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
  263. { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
  264. { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
  265. { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
  266. { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
  267. { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
  268. { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
  269. { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
  270. { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
  271. { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
  272. { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
  273. { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
  274. };
  275. /*
  276. * HDMI routines
  277. */
  278. static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
  279. {
  280. int pin_idx;
  281. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  282. if (spec->pins[pin_idx].pin_nid == pin_nid)
  283. return pin_idx;
  284. snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
  285. return -EINVAL;
  286. }
  287. static int hinfo_to_pin_index(struct hdmi_spec *spec,
  288. struct hda_pcm_stream *hinfo)
  289. {
  290. int pin_idx;
  291. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  292. if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
  293. return pin_idx;
  294. snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
  295. return -EINVAL;
  296. }
  297. static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
  298. {
  299. int cvt_idx;
  300. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
  301. if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
  302. return cvt_idx;
  303. snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
  304. return -EINVAL;
  305. }
  306. static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
  307. struct snd_ctl_elem_info *uinfo)
  308. {
  309. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  310. struct hdmi_spec *spec = codec->spec;
  311. struct hdmi_eld *eld;
  312. int pin_idx;
  313. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  314. pin_idx = kcontrol->private_value;
  315. eld = &spec->pins[pin_idx].sink_eld;
  316. uinfo->count = eld->eld_valid ? eld->eld_size : 0;
  317. return 0;
  318. }
  319. static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
  320. struct snd_ctl_elem_value *ucontrol)
  321. {
  322. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  323. struct hdmi_spec *spec = codec->spec;
  324. struct hdmi_eld *eld;
  325. int pin_idx;
  326. pin_idx = kcontrol->private_value;
  327. eld = &spec->pins[pin_idx].sink_eld;
  328. if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
  329. snd_BUG();
  330. return -EINVAL;
  331. }
  332. memset(ucontrol->value.bytes.data, 0,
  333. ARRAY_SIZE(ucontrol->value.bytes.data));
  334. if (eld->eld_valid)
  335. memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
  336. eld->eld_size);
  337. return 0;
  338. }
  339. static struct snd_kcontrol_new eld_bytes_ctl = {
  340. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  341. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  342. .name = "ELD",
  343. .info = hdmi_eld_ctl_info,
  344. .get = hdmi_eld_ctl_get,
  345. };
  346. static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
  347. int device)
  348. {
  349. struct snd_kcontrol *kctl;
  350. struct hdmi_spec *spec = codec->spec;
  351. int err;
  352. kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
  353. if (!kctl)
  354. return -ENOMEM;
  355. kctl->private_value = pin_idx;
  356. kctl->id.device = device;
  357. err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
  358. if (err < 0)
  359. return err;
  360. return 0;
  361. }
  362. #ifdef BE_PARANOID
  363. static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  364. int *packet_index, int *byte_index)
  365. {
  366. int val;
  367. val = snd_hda_codec_read(codec, pin_nid, 0,
  368. AC_VERB_GET_HDMI_DIP_INDEX, 0);
  369. *packet_index = val >> 5;
  370. *byte_index = val & 0x1f;
  371. }
  372. #endif
  373. static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  374. int packet_index, int byte_index)
  375. {
  376. int val;
  377. val = (packet_index << 5) | (byte_index & 0x1f);
  378. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
  379. }
  380. static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
  381. unsigned char val)
  382. {
  383. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
  384. }
  385. static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  386. {
  387. /* Unmute */
  388. if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
  389. snd_hda_codec_write(codec, pin_nid, 0,
  390. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
  391. /* Enable pin out: some machines with GM965 gets broken output when
  392. * the pin is disabled or changed while using with HDMI
  393. */
  394. snd_hda_codec_write(codec, pin_nid, 0,
  395. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  396. }
  397. static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
  398. {
  399. return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
  400. AC_VERB_GET_CVT_CHAN_COUNT, 0);
  401. }
  402. static void hdmi_set_channel_count(struct hda_codec *codec,
  403. hda_nid_t cvt_nid, int chs)
  404. {
  405. if (chs != hdmi_get_channel_count(codec, cvt_nid))
  406. snd_hda_codec_write(codec, cvt_nid, 0,
  407. AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
  408. }
  409. /*
  410. * Channel mapping routines
  411. */
  412. /*
  413. * Compute derived values in channel_allocations[].
  414. */
  415. static void init_channel_allocations(void)
  416. {
  417. int i, j;
  418. struct cea_channel_speaker_allocation *p;
  419. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  420. p = channel_allocations + i;
  421. p->channels = 0;
  422. p->spk_mask = 0;
  423. for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
  424. if (p->speakers[j]) {
  425. p->channels++;
  426. p->spk_mask |= p->speakers[j];
  427. }
  428. }
  429. }
  430. static int get_channel_allocation_order(int ca)
  431. {
  432. int i;
  433. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  434. if (channel_allocations[i].ca_index == ca)
  435. break;
  436. }
  437. return i;
  438. }
  439. /*
  440. * The transformation takes two steps:
  441. *
  442. * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
  443. * spk_mask => (channel_allocations[]) => ai->CA
  444. *
  445. * TODO: it could select the wrong CA from multiple candidates.
  446. */
  447. static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
  448. {
  449. int i;
  450. int ca = 0;
  451. int spk_mask = 0;
  452. char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
  453. /*
  454. * CA defaults to 0 for basic stereo audio
  455. */
  456. if (channels <= 2)
  457. return 0;
  458. /*
  459. * expand ELD's speaker allocation mask
  460. *
  461. * ELD tells the speaker mask in a compact(paired) form,
  462. * expand ELD's notions to match the ones used by Audio InfoFrame.
  463. */
  464. for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
  465. if (eld->spk_alloc & (1 << i))
  466. spk_mask |= eld_speaker_allocation_bits[i];
  467. }
  468. /* search for the first working match in the CA table */
  469. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  470. if (channels == channel_allocations[i].channels &&
  471. (spk_mask & channel_allocations[i].spk_mask) ==
  472. channel_allocations[i].spk_mask) {
  473. ca = channel_allocations[i].ca_index;
  474. break;
  475. }
  476. }
  477. snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
  478. snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
  479. ca, channels, buf);
  480. return ca;
  481. }
  482. static void hdmi_debug_channel_mapping(struct hda_codec *codec,
  483. hda_nid_t pin_nid)
  484. {
  485. #ifdef CONFIG_SND_DEBUG_VERBOSE
  486. int i;
  487. int slot;
  488. for (i = 0; i < 8; i++) {
  489. slot = snd_hda_codec_read(codec, pin_nid, 0,
  490. AC_VERB_GET_HDMI_CHAN_SLOT, i);
  491. printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
  492. slot >> 4, slot & 0xf);
  493. }
  494. #endif
  495. }
  496. static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
  497. hda_nid_t pin_nid,
  498. bool non_pcm,
  499. int ca)
  500. {
  501. int i;
  502. int err;
  503. int order;
  504. int non_pcm_mapping[8];
  505. order = get_channel_allocation_order(ca);
  506. if (hdmi_channel_mapping[ca][1] == 0) {
  507. for (i = 0; i < channel_allocations[order].channels; i++)
  508. hdmi_channel_mapping[ca][i] = i | (i << 4);
  509. for (; i < 8; i++)
  510. hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
  511. }
  512. if (non_pcm) {
  513. for (i = 0; i < channel_allocations[order].channels; i++)
  514. non_pcm_mapping[i] = i | (i << 4);
  515. for (; i < 8; i++)
  516. non_pcm_mapping[i] = 0xf | (i << 4);
  517. }
  518. for (i = 0; i < 8; i++) {
  519. err = snd_hda_codec_write(codec, pin_nid, 0,
  520. AC_VERB_SET_HDMI_CHAN_SLOT,
  521. non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
  522. if (err) {
  523. snd_printdd(KERN_NOTICE
  524. "HDMI: channel mapping failed\n");
  525. break;
  526. }
  527. }
  528. hdmi_debug_channel_mapping(codec, pin_nid);
  529. }
  530. struct channel_map_table {
  531. unsigned char map; /* ALSA API channel map position */
  532. unsigned char cea_slot; /* CEA slot value */
  533. int spk_mask; /* speaker position bit mask */
  534. };
  535. static struct channel_map_table map_tables[] = {
  536. { SNDRV_CHMAP_FL, 0x00, FL },
  537. { SNDRV_CHMAP_FR, 0x01, FR },
  538. { SNDRV_CHMAP_RL, 0x04, RL },
  539. { SNDRV_CHMAP_RR, 0x05, RR },
  540. { SNDRV_CHMAP_LFE, 0x02, LFE },
  541. { SNDRV_CHMAP_FC, 0x03, FC },
  542. { SNDRV_CHMAP_RLC, 0x06, RLC },
  543. { SNDRV_CHMAP_RRC, 0x07, RRC },
  544. {} /* terminator */
  545. };
  546. /* from ALSA API channel position to speaker bit mask */
  547. static int to_spk_mask(unsigned char c)
  548. {
  549. struct channel_map_table *t = map_tables;
  550. for (; t->map; t++) {
  551. if (t->map == c)
  552. return t->spk_mask;
  553. }
  554. return 0;
  555. }
  556. /* from ALSA API channel position to CEA slot */
  557. static int to_cea_slot(unsigned char c)
  558. {
  559. struct channel_map_table *t = map_tables;
  560. for (; t->map; t++) {
  561. if (t->map == c)
  562. return t->cea_slot;
  563. }
  564. return 0x0f;
  565. }
  566. /* from CEA slot to ALSA API channel position */
  567. static int from_cea_slot(unsigned char c)
  568. {
  569. struct channel_map_table *t = map_tables;
  570. for (; t->map; t++) {
  571. if (t->cea_slot == c)
  572. return t->map;
  573. }
  574. return 0;
  575. }
  576. /* from speaker bit mask to ALSA API channel position */
  577. static int spk_to_chmap(int spk)
  578. {
  579. struct channel_map_table *t = map_tables;
  580. for (; t->map; t++) {
  581. if (t->spk_mask == spk)
  582. return t->map;
  583. }
  584. return 0;
  585. }
  586. /* get the CA index corresponding to the given ALSA API channel map */
  587. static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
  588. {
  589. int i, spks = 0, spk_mask = 0;
  590. for (i = 0; i < chs; i++) {
  591. int mask = to_spk_mask(map[i]);
  592. if (mask) {
  593. spk_mask |= mask;
  594. spks++;
  595. }
  596. }
  597. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  598. if ((chs == channel_allocations[i].channels ||
  599. spks == channel_allocations[i].channels) &&
  600. (spk_mask & channel_allocations[i].spk_mask) ==
  601. channel_allocations[i].spk_mask)
  602. return channel_allocations[i].ca_index;
  603. }
  604. return -1;
  605. }
  606. /* set up the channel slots for the given ALSA API channel map */
  607. static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
  608. hda_nid_t pin_nid,
  609. int chs, unsigned char *map)
  610. {
  611. int i;
  612. for (i = 0; i < 8; i++) {
  613. int val, err;
  614. if (i < chs)
  615. val = to_cea_slot(map[i]);
  616. else
  617. val = 0xf;
  618. val |= (i << 4);
  619. err = snd_hda_codec_write(codec, pin_nid, 0,
  620. AC_VERB_SET_HDMI_CHAN_SLOT, val);
  621. if (err)
  622. return -EINVAL;
  623. }
  624. return 0;
  625. }
  626. /* store ALSA API channel map from the current default map */
  627. static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
  628. {
  629. int i;
  630. for (i = 0; i < 8; i++) {
  631. if (i < channel_allocations[ca].channels)
  632. map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
  633. else
  634. map[i] = 0;
  635. }
  636. }
  637. static void hdmi_setup_channel_mapping(struct hda_codec *codec,
  638. hda_nid_t pin_nid, bool non_pcm, int ca,
  639. int channels, unsigned char *map,
  640. bool chmap_set)
  641. {
  642. if (!non_pcm && chmap_set) {
  643. hdmi_manual_setup_channel_mapping(codec, pin_nid,
  644. channels, map);
  645. } else {
  646. hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
  647. hdmi_setup_fake_chmap(map, ca);
  648. }
  649. }
  650. /*
  651. * Audio InfoFrame routines
  652. */
  653. /*
  654. * Enable Audio InfoFrame Transmission
  655. */
  656. static void hdmi_start_infoframe_trans(struct hda_codec *codec,
  657. hda_nid_t pin_nid)
  658. {
  659. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  660. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  661. AC_DIPXMIT_BEST);
  662. }
  663. /*
  664. * Disable Audio InfoFrame Transmission
  665. */
  666. static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
  667. hda_nid_t pin_nid)
  668. {
  669. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  670. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  671. AC_DIPXMIT_DISABLE);
  672. }
  673. static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
  674. {
  675. #ifdef CONFIG_SND_DEBUG_VERBOSE
  676. int i;
  677. int size;
  678. size = snd_hdmi_get_eld_size(codec, pin_nid);
  679. printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
  680. for (i = 0; i < 8; i++) {
  681. size = snd_hda_codec_read(codec, pin_nid, 0,
  682. AC_VERB_GET_HDMI_DIP_SIZE, i);
  683. printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
  684. }
  685. #endif
  686. }
  687. static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
  688. {
  689. #ifdef BE_PARANOID
  690. int i, j;
  691. int size;
  692. int pi, bi;
  693. for (i = 0; i < 8; i++) {
  694. size = snd_hda_codec_read(codec, pin_nid, 0,
  695. AC_VERB_GET_HDMI_DIP_SIZE, i);
  696. if (size == 0)
  697. continue;
  698. hdmi_set_dip_index(codec, pin_nid, i, 0x0);
  699. for (j = 1; j < 1000; j++) {
  700. hdmi_write_dip_byte(codec, pin_nid, 0x0);
  701. hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
  702. if (pi != i)
  703. snd_printd(KERN_INFO "dip index %d: %d != %d\n",
  704. bi, pi, i);
  705. if (bi == 0) /* byte index wrapped around */
  706. break;
  707. }
  708. snd_printd(KERN_INFO
  709. "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
  710. i, size, j);
  711. }
  712. #endif
  713. }
  714. static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
  715. {
  716. u8 *bytes = (u8 *)hdmi_ai;
  717. u8 sum = 0;
  718. int i;
  719. hdmi_ai->checksum = 0;
  720. for (i = 0; i < sizeof(*hdmi_ai); i++)
  721. sum += bytes[i];
  722. hdmi_ai->checksum = -sum;
  723. }
  724. static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
  725. hda_nid_t pin_nid,
  726. u8 *dip, int size)
  727. {
  728. int i;
  729. hdmi_debug_dip_size(codec, pin_nid);
  730. hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
  731. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  732. for (i = 0; i < size; i++)
  733. hdmi_write_dip_byte(codec, pin_nid, dip[i]);
  734. }
  735. static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
  736. u8 *dip, int size)
  737. {
  738. u8 val;
  739. int i;
  740. if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
  741. != AC_DIPXMIT_BEST)
  742. return false;
  743. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  744. for (i = 0; i < size; i++) {
  745. val = snd_hda_codec_read(codec, pin_nid, 0,
  746. AC_VERB_GET_HDMI_DIP_DATA, 0);
  747. if (val != dip[i])
  748. return false;
  749. }
  750. return true;
  751. }
  752. static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
  753. bool non_pcm,
  754. struct snd_pcm_substream *substream)
  755. {
  756. struct hdmi_spec *spec = codec->spec;
  757. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  758. hda_nid_t pin_nid = per_pin->pin_nid;
  759. int channels = substream->runtime->channels;
  760. struct hdmi_eld *eld;
  761. int ca;
  762. union audio_infoframe ai;
  763. eld = &spec->pins[pin_idx].sink_eld;
  764. if (!eld->monitor_present)
  765. return;
  766. if (!non_pcm && per_pin->chmap_set)
  767. ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
  768. else
  769. ca = hdmi_channel_allocation(eld, channels);
  770. if (ca < 0)
  771. ca = 0;
  772. memset(&ai, 0, sizeof(ai));
  773. if (eld->conn_type == 0) { /* HDMI */
  774. struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
  775. hdmi_ai->type = 0x84;
  776. hdmi_ai->ver = 0x01;
  777. hdmi_ai->len = 0x0a;
  778. hdmi_ai->CC02_CT47 = channels - 1;
  779. hdmi_ai->CA = ca;
  780. hdmi_checksum_audio_infoframe(hdmi_ai);
  781. } else if (eld->conn_type == 1) { /* DisplayPort */
  782. struct dp_audio_infoframe *dp_ai = &ai.dp;
  783. dp_ai->type = 0x84;
  784. dp_ai->len = 0x1b;
  785. dp_ai->ver = 0x11 << 2;
  786. dp_ai->CC02_CT47 = channels - 1;
  787. dp_ai->CA = ca;
  788. } else {
  789. snd_printd("HDMI: unknown connection type at pin %d\n",
  790. pin_nid);
  791. return;
  792. }
  793. /*
  794. * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
  795. * sizeof(*dp_ai) to avoid partial match/update problems when
  796. * the user switches between HDMI/DP monitors.
  797. */
  798. if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
  799. sizeof(ai))) {
  800. snd_printdd("hdmi_setup_audio_infoframe: "
  801. "pin=%d channels=%d\n",
  802. pin_nid,
  803. channels);
  804. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  805. channels, per_pin->chmap,
  806. per_pin->chmap_set);
  807. hdmi_stop_infoframe_trans(codec, pin_nid);
  808. hdmi_fill_audio_infoframe(codec, pin_nid,
  809. ai.bytes, sizeof(ai));
  810. hdmi_start_infoframe_trans(codec, pin_nid);
  811. } else {
  812. /* For non-pcm audio switch, setup new channel mapping
  813. * accordingly */
  814. if (per_pin->non_pcm != non_pcm)
  815. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  816. channels, per_pin->chmap,
  817. per_pin->chmap_set);
  818. }
  819. per_pin->non_pcm = non_pcm;
  820. }
  821. /*
  822. * Unsolicited events
  823. */
  824. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
  825. static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
  826. {
  827. struct hdmi_spec *spec = codec->spec;
  828. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  829. int pin_nid;
  830. int pin_idx;
  831. struct hda_jack_tbl *jack;
  832. jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
  833. if (!jack)
  834. return;
  835. pin_nid = jack->nid;
  836. jack->jack_dirty = 1;
  837. _snd_printd(SND_PR_VERBOSE,
  838. "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  839. codec->addr, pin_nid,
  840. !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
  841. pin_idx = pin_nid_to_pin_index(spec, pin_nid);
  842. if (pin_idx < 0)
  843. return;
  844. hdmi_present_sense(&spec->pins[pin_idx], 1);
  845. snd_hda_jack_report_sync(codec);
  846. }
  847. static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
  848. {
  849. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  850. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  851. int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
  852. int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
  853. printk(KERN_INFO
  854. "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
  855. codec->addr,
  856. tag,
  857. subtag,
  858. cp_state,
  859. cp_ready);
  860. /* TODO */
  861. if (cp_state)
  862. ;
  863. if (cp_ready)
  864. ;
  865. }
  866. static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
  867. {
  868. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  869. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  870. if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
  871. snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
  872. return;
  873. }
  874. if (subtag == 0)
  875. hdmi_intrinsic_event(codec, res);
  876. else
  877. hdmi_non_intrinsic_event(codec, res);
  878. }
  879. /*
  880. * Callbacks
  881. */
  882. /* HBR should be Non-PCM, 8 channels */
  883. #define is_hbr_format(format) \
  884. ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
  885. static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
  886. hda_nid_t pin_nid, u32 stream_tag, int format)
  887. {
  888. int pinctl;
  889. int new_pinctl = 0;
  890. if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
  891. pinctl = snd_hda_codec_read(codec, pin_nid, 0,
  892. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  893. new_pinctl = pinctl & ~AC_PINCTL_EPT;
  894. if (is_hbr_format(format))
  895. new_pinctl |= AC_PINCTL_EPT_HBR;
  896. else
  897. new_pinctl |= AC_PINCTL_EPT_NATIVE;
  898. snd_printdd("hdmi_setup_stream: "
  899. "NID=0x%x, %spinctl=0x%x\n",
  900. pin_nid,
  901. pinctl == new_pinctl ? "" : "new-",
  902. new_pinctl);
  903. if (pinctl != new_pinctl)
  904. snd_hda_codec_write(codec, pin_nid, 0,
  905. AC_VERB_SET_PIN_WIDGET_CONTROL,
  906. new_pinctl);
  907. }
  908. if (is_hbr_format(format) && !new_pinctl) {
  909. snd_printdd("hdmi_setup_stream: HBR is not supported\n");
  910. return -EINVAL;
  911. }
  912. snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
  913. return 0;
  914. }
  915. /*
  916. * HDA PCM callbacks
  917. */
  918. static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
  919. struct hda_codec *codec,
  920. struct snd_pcm_substream *substream)
  921. {
  922. struct hdmi_spec *spec = codec->spec;
  923. struct snd_pcm_runtime *runtime = substream->runtime;
  924. int pin_idx, cvt_idx, mux_idx = 0;
  925. struct hdmi_spec_per_pin *per_pin;
  926. struct hdmi_eld *eld;
  927. struct hdmi_spec_per_cvt *per_cvt = NULL;
  928. /* Validate hinfo */
  929. pin_idx = hinfo_to_pin_index(spec, hinfo);
  930. if (snd_BUG_ON(pin_idx < 0))
  931. return -EINVAL;
  932. per_pin = &spec->pins[pin_idx];
  933. eld = &per_pin->sink_eld;
  934. /* Dynamically assign converter to stream */
  935. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
  936. per_cvt = &spec->cvts[cvt_idx];
  937. /* Must not already be assigned */
  938. if (per_cvt->assigned)
  939. continue;
  940. /* Must be in pin's mux's list of converters */
  941. for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
  942. if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
  943. break;
  944. /* Not in mux list */
  945. if (mux_idx == per_pin->num_mux_nids)
  946. continue;
  947. break;
  948. }
  949. /* No free converters */
  950. if (cvt_idx == spec->num_cvts)
  951. return -ENODEV;
  952. /* Claim converter */
  953. per_cvt->assigned = 1;
  954. hinfo->nid = per_cvt->cvt_nid;
  955. snd_hda_codec_write(codec, per_pin->pin_nid, 0,
  956. AC_VERB_SET_CONNECT_SEL,
  957. mux_idx);
  958. snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
  959. /* Initially set the converter's capabilities */
  960. hinfo->channels_min = per_cvt->channels_min;
  961. hinfo->channels_max = per_cvt->channels_max;
  962. hinfo->rates = per_cvt->rates;
  963. hinfo->formats = per_cvt->formats;
  964. hinfo->maxbps = per_cvt->maxbps;
  965. /* Restrict capabilities by ELD if this isn't disabled */
  966. if (!static_hdmi_pcm && eld->eld_valid) {
  967. snd_hdmi_eld_update_pcm_info(eld, hinfo);
  968. if (hinfo->channels_min > hinfo->channels_max ||
  969. !hinfo->rates || !hinfo->formats) {
  970. per_cvt->assigned = 0;
  971. hinfo->nid = 0;
  972. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  973. return -ENODEV;
  974. }
  975. }
  976. /* Store the updated parameters */
  977. runtime->hw.channels_min = hinfo->channels_min;
  978. runtime->hw.channels_max = hinfo->channels_max;
  979. runtime->hw.formats = hinfo->formats;
  980. runtime->hw.rates = hinfo->rates;
  981. snd_pcm_hw_constraint_step(substream->runtime, 0,
  982. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  983. return 0;
  984. }
  985. /*
  986. * HDA/HDMI auto parsing
  987. */
  988. static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
  989. {
  990. struct hdmi_spec *spec = codec->spec;
  991. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  992. hda_nid_t pin_nid = per_pin->pin_nid;
  993. if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
  994. snd_printk(KERN_WARNING
  995. "HDMI: pin %d wcaps %#x "
  996. "does not support connection list\n",
  997. pin_nid, get_wcaps(codec, pin_nid));
  998. return -EINVAL;
  999. }
  1000. per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
  1001. per_pin->mux_nids,
  1002. HDA_MAX_CONNECTIONS);
  1003. return 0;
  1004. }
  1005. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
  1006. {
  1007. struct hda_codec *codec = per_pin->codec;
  1008. struct hdmi_eld *eld = &per_pin->sink_eld;
  1009. hda_nid_t pin_nid = per_pin->pin_nid;
  1010. /*
  1011. * Always execute a GetPinSense verb here, even when called from
  1012. * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
  1013. * response's PD bit is not the real PD value, but indicates that
  1014. * the real PD value changed. An older version of the HD-audio
  1015. * specification worked this way. Hence, we just ignore the data in
  1016. * the unsolicited response to avoid custom WARs.
  1017. */
  1018. int present = snd_hda_pin_sense(codec, pin_nid);
  1019. bool eld_valid = false;
  1020. memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
  1021. eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
  1022. if (eld->monitor_present)
  1023. eld_valid = !!(present & AC_PINSENSE_ELDV);
  1024. _snd_printd(SND_PR_VERBOSE,
  1025. "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  1026. codec->addr, pin_nid, eld->monitor_present, eld_valid);
  1027. eld->eld_valid = false;
  1028. if (eld_valid) {
  1029. if (!snd_hdmi_get_eld(eld, codec, pin_nid))
  1030. snd_hdmi_show_eld(eld);
  1031. else if (repoll) {
  1032. queue_delayed_work(codec->bus->workq,
  1033. &per_pin->work,
  1034. msecs_to_jiffies(300));
  1035. }
  1036. }
  1037. }
  1038. static void hdmi_repoll_eld(struct work_struct *work)
  1039. {
  1040. struct hdmi_spec_per_pin *per_pin =
  1041. container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
  1042. if (per_pin->repoll_count++ > 6)
  1043. per_pin->repoll_count = 0;
  1044. hdmi_present_sense(per_pin, per_pin->repoll_count);
  1045. }
  1046. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1047. hda_nid_t nid);
  1048. static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  1049. {
  1050. struct hdmi_spec *spec = codec->spec;
  1051. unsigned int caps, config;
  1052. int pin_idx;
  1053. struct hdmi_spec_per_pin *per_pin;
  1054. int err;
  1055. caps = snd_hda_query_pin_caps(codec, pin_nid);
  1056. if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
  1057. return 0;
  1058. config = snd_hda_codec_get_pincfg(codec, pin_nid);
  1059. if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
  1060. return 0;
  1061. if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
  1062. return -E2BIG;
  1063. if (codec->vendor_id == 0x80862807)
  1064. intel_haswell_fixup_connect_list(codec, pin_nid);
  1065. pin_idx = spec->num_pins;
  1066. per_pin = &spec->pins[pin_idx];
  1067. per_pin->pin_nid = pin_nid;
  1068. per_pin->non_pcm = false;
  1069. err = hdmi_read_pin_conn(codec, pin_idx);
  1070. if (err < 0)
  1071. return err;
  1072. spec->num_pins++;
  1073. return 0;
  1074. }
  1075. static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1076. {
  1077. struct hdmi_spec *spec = codec->spec;
  1078. int cvt_idx;
  1079. struct hdmi_spec_per_cvt *per_cvt;
  1080. unsigned int chans;
  1081. int err;
  1082. if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
  1083. return -E2BIG;
  1084. chans = get_wcaps(codec, cvt_nid);
  1085. chans = get_wcaps_channels(chans);
  1086. cvt_idx = spec->num_cvts;
  1087. per_cvt = &spec->cvts[cvt_idx];
  1088. per_cvt->cvt_nid = cvt_nid;
  1089. per_cvt->channels_min = 2;
  1090. if (chans <= 16) {
  1091. per_cvt->channels_max = chans;
  1092. if (chans > spec->channels_max)
  1093. spec->channels_max = chans;
  1094. }
  1095. err = snd_hda_query_supported_pcm(codec, cvt_nid,
  1096. &per_cvt->rates,
  1097. &per_cvt->formats,
  1098. &per_cvt->maxbps);
  1099. if (err < 0)
  1100. return err;
  1101. spec->cvt_nids[spec->num_cvts++] = cvt_nid;
  1102. return 0;
  1103. }
  1104. static int hdmi_parse_codec(struct hda_codec *codec)
  1105. {
  1106. hda_nid_t nid;
  1107. int i, nodes;
  1108. nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
  1109. if (!nid || nodes < 0) {
  1110. snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
  1111. return -EINVAL;
  1112. }
  1113. for (i = 0; i < nodes; i++, nid++) {
  1114. unsigned int caps;
  1115. unsigned int type;
  1116. caps = get_wcaps(codec, nid);
  1117. type = get_wcaps_type(caps);
  1118. if (!(caps & AC_WCAP_DIGITAL))
  1119. continue;
  1120. switch (type) {
  1121. case AC_WID_AUD_OUT:
  1122. hdmi_add_cvt(codec, nid);
  1123. break;
  1124. case AC_WID_PIN:
  1125. hdmi_add_pin(codec, nid);
  1126. break;
  1127. }
  1128. }
  1129. #ifdef CONFIG_PM
  1130. /* We're seeing some problems with unsolicited hot plug events on
  1131. * PantherPoint after S3, if this is not enabled */
  1132. if (codec->vendor_id == 0x80862806)
  1133. codec->bus->power_keep_link_on = 1;
  1134. /*
  1135. * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
  1136. * can be lost and presence sense verb will become inaccurate if the
  1137. * HDA link is powered off at hot plug or hw initialization time.
  1138. */
  1139. else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
  1140. AC_PWRST_EPSS))
  1141. codec->bus->power_keep_link_on = 1;
  1142. #endif
  1143. return 0;
  1144. }
  1145. /*
  1146. */
  1147. static char *get_hdmi_pcm_name(int idx)
  1148. {
  1149. static char names[MAX_HDMI_PINS][8];
  1150. sprintf(&names[idx][0], "HDMI %d", idx);
  1151. return &names[idx][0];
  1152. }
  1153. static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1154. {
  1155. struct hda_spdif_out *spdif;
  1156. bool non_pcm;
  1157. mutex_lock(&codec->spdif_mutex);
  1158. spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
  1159. non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
  1160. mutex_unlock(&codec->spdif_mutex);
  1161. return non_pcm;
  1162. }
  1163. /*
  1164. * HDMI callbacks
  1165. */
  1166. static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1167. struct hda_codec *codec,
  1168. unsigned int stream_tag,
  1169. unsigned int format,
  1170. struct snd_pcm_substream *substream)
  1171. {
  1172. hda_nid_t cvt_nid = hinfo->nid;
  1173. struct hdmi_spec *spec = codec->spec;
  1174. int pin_idx = hinfo_to_pin_index(spec, hinfo);
  1175. hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
  1176. bool non_pcm;
  1177. non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
  1178. hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
  1179. hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream);
  1180. return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
  1181. }
  1182. static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1183. struct hda_codec *codec,
  1184. struct snd_pcm_substream *substream)
  1185. {
  1186. snd_hda_codec_cleanup_stream(codec, hinfo->nid);
  1187. return 0;
  1188. }
  1189. static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
  1190. struct hda_codec *codec,
  1191. struct snd_pcm_substream *substream)
  1192. {
  1193. struct hdmi_spec *spec = codec->spec;
  1194. int cvt_idx, pin_idx;
  1195. struct hdmi_spec_per_cvt *per_cvt;
  1196. struct hdmi_spec_per_pin *per_pin;
  1197. if (hinfo->nid) {
  1198. cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
  1199. if (snd_BUG_ON(cvt_idx < 0))
  1200. return -EINVAL;
  1201. per_cvt = &spec->cvts[cvt_idx];
  1202. snd_BUG_ON(!per_cvt->assigned);
  1203. per_cvt->assigned = 0;
  1204. hinfo->nid = 0;
  1205. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1206. if (snd_BUG_ON(pin_idx < 0))
  1207. return -EINVAL;
  1208. per_pin = &spec->pins[pin_idx];
  1209. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1210. per_pin->chmap_set = false;
  1211. memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
  1212. }
  1213. return 0;
  1214. }
  1215. static const struct hda_pcm_ops generic_ops = {
  1216. .open = hdmi_pcm_open,
  1217. .close = hdmi_pcm_close,
  1218. .prepare = generic_hdmi_playback_pcm_prepare,
  1219. .cleanup = generic_hdmi_playback_pcm_cleanup,
  1220. };
  1221. /*
  1222. * ALSA API channel-map control callbacks
  1223. */
  1224. static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
  1225. struct snd_ctl_elem_info *uinfo)
  1226. {
  1227. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1228. struct hda_codec *codec = info->private_data;
  1229. struct hdmi_spec *spec = codec->spec;
  1230. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1231. uinfo->count = spec->channels_max;
  1232. uinfo->value.integer.min = 0;
  1233. uinfo->value.integer.max = SNDRV_CHMAP_LAST;
  1234. return 0;
  1235. }
  1236. static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
  1237. unsigned int size, unsigned int __user *tlv)
  1238. {
  1239. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1240. struct hda_codec *codec = info->private_data;
  1241. struct hdmi_spec *spec = codec->spec;
  1242. const unsigned int valid_mask =
  1243. FL | FR | RL | RR | LFE | FC | RLC | RRC;
  1244. unsigned int __user *dst;
  1245. int chs, count = 0;
  1246. if (size < 8)
  1247. return -ENOMEM;
  1248. if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
  1249. return -EFAULT;
  1250. size -= 8;
  1251. dst = tlv + 2;
  1252. for (chs = 2; chs <= spec->channels_max; chs++) {
  1253. int i, c;
  1254. struct cea_channel_speaker_allocation *cap;
  1255. cap = channel_allocations;
  1256. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
  1257. int chs_bytes = chs * 4;
  1258. if (cap->channels != chs)
  1259. continue;
  1260. if (cap->spk_mask & ~valid_mask)
  1261. continue;
  1262. if (size < 8)
  1263. return -ENOMEM;
  1264. if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
  1265. put_user(chs_bytes, dst + 1))
  1266. return -EFAULT;
  1267. dst += 2;
  1268. size -= 8;
  1269. count += 8;
  1270. if (size < chs_bytes)
  1271. return -ENOMEM;
  1272. size -= chs_bytes;
  1273. count += chs_bytes;
  1274. for (c = 7; c >= 0; c--) {
  1275. int spk = cap->speakers[c];
  1276. if (!spk)
  1277. continue;
  1278. if (put_user(spk_to_chmap(spk), dst))
  1279. return -EFAULT;
  1280. dst++;
  1281. }
  1282. }
  1283. }
  1284. if (put_user(count, tlv + 1))
  1285. return -EFAULT;
  1286. return 0;
  1287. }
  1288. static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
  1289. struct snd_ctl_elem_value *ucontrol)
  1290. {
  1291. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1292. struct hda_codec *codec = info->private_data;
  1293. struct hdmi_spec *spec = codec->spec;
  1294. int pin_idx = kcontrol->private_value;
  1295. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1296. int i;
  1297. for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
  1298. ucontrol->value.integer.value[i] = per_pin->chmap[i];
  1299. return 0;
  1300. }
  1301. static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
  1302. struct snd_ctl_elem_value *ucontrol)
  1303. {
  1304. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1305. struct hda_codec *codec = info->private_data;
  1306. struct hdmi_spec *spec = codec->spec;
  1307. int pin_idx = kcontrol->private_value;
  1308. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1309. unsigned int ctl_idx;
  1310. struct snd_pcm_substream *substream;
  1311. unsigned char chmap[8];
  1312. int i, ca, prepared = 0;
  1313. ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1314. substream = snd_pcm_chmap_substream(info, ctl_idx);
  1315. if (!substream || !substream->runtime)
  1316. return 0; /* just for avoiding error from alsactl restore */
  1317. switch (substream->runtime->status->state) {
  1318. case SNDRV_PCM_STATE_OPEN:
  1319. case SNDRV_PCM_STATE_SETUP:
  1320. break;
  1321. case SNDRV_PCM_STATE_PREPARED:
  1322. prepared = 1;
  1323. break;
  1324. default:
  1325. return -EBUSY;
  1326. }
  1327. memset(chmap, 0, sizeof(chmap));
  1328. for (i = 0; i < ARRAY_SIZE(chmap); i++)
  1329. chmap[i] = ucontrol->value.integer.value[i];
  1330. if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
  1331. return 0;
  1332. ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
  1333. if (ca < 0)
  1334. return -EINVAL;
  1335. per_pin->chmap_set = true;
  1336. memcpy(per_pin->chmap, chmap, sizeof(chmap));
  1337. if (prepared)
  1338. hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm,
  1339. substream);
  1340. return 0;
  1341. }
  1342. static int generic_hdmi_build_pcms(struct hda_codec *codec)
  1343. {
  1344. struct hdmi_spec *spec = codec->spec;
  1345. int pin_idx;
  1346. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1347. struct hda_pcm *info;
  1348. struct hda_pcm_stream *pstr;
  1349. info = &spec->pcm_rec[pin_idx];
  1350. info->name = get_hdmi_pcm_name(pin_idx);
  1351. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1352. info->own_chmap = true;
  1353. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1354. pstr->substreams = 1;
  1355. pstr->ops = generic_ops;
  1356. /* other pstr fields are set in open */
  1357. }
  1358. codec->num_pcms = spec->num_pins;
  1359. codec->pcm_info = spec->pcm_rec;
  1360. return 0;
  1361. }
  1362. static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
  1363. {
  1364. char hdmi_str[32] = "HDMI/DP";
  1365. struct hdmi_spec *spec = codec->spec;
  1366. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1367. int pcmdev = spec->pcm_rec[pin_idx].device;
  1368. if (pcmdev > 0)
  1369. sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
  1370. return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
  1371. }
  1372. static int generic_hdmi_build_controls(struct hda_codec *codec)
  1373. {
  1374. struct hdmi_spec *spec = codec->spec;
  1375. int err;
  1376. int pin_idx;
  1377. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1378. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1379. err = generic_hdmi_build_jack(codec, pin_idx);
  1380. if (err < 0)
  1381. return err;
  1382. err = snd_hda_create_dig_out_ctls(codec,
  1383. per_pin->pin_nid,
  1384. per_pin->mux_nids[0],
  1385. HDA_PCM_TYPE_HDMI);
  1386. if (err < 0)
  1387. return err;
  1388. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1389. /* add control for ELD Bytes */
  1390. err = hdmi_create_eld_ctl(codec,
  1391. pin_idx,
  1392. spec->pcm_rec[pin_idx].device);
  1393. if (err < 0)
  1394. return err;
  1395. hdmi_present_sense(per_pin, 0);
  1396. }
  1397. /* add channel maps */
  1398. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1399. struct snd_pcm_chmap *chmap;
  1400. struct snd_kcontrol *kctl;
  1401. int i;
  1402. err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
  1403. SNDRV_PCM_STREAM_PLAYBACK,
  1404. NULL, 0, pin_idx, &chmap);
  1405. if (err < 0)
  1406. return err;
  1407. /* override handlers */
  1408. chmap->private_data = codec;
  1409. kctl = chmap->kctl;
  1410. for (i = 0; i < kctl->count; i++)
  1411. kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
  1412. kctl->info = hdmi_chmap_ctl_info;
  1413. kctl->get = hdmi_chmap_ctl_get;
  1414. kctl->put = hdmi_chmap_ctl_put;
  1415. kctl->tlv.c = hdmi_chmap_ctl_tlv;
  1416. }
  1417. return 0;
  1418. }
  1419. static int generic_hdmi_init_per_pins(struct hda_codec *codec)
  1420. {
  1421. struct hdmi_spec *spec = codec->spec;
  1422. int pin_idx;
  1423. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1424. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1425. struct hdmi_eld *eld = &per_pin->sink_eld;
  1426. per_pin->codec = codec;
  1427. INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
  1428. snd_hda_eld_proc_new(codec, eld, pin_idx);
  1429. }
  1430. return 0;
  1431. }
  1432. static int generic_hdmi_init(struct hda_codec *codec)
  1433. {
  1434. struct hdmi_spec *spec = codec->spec;
  1435. int pin_idx;
  1436. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1437. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1438. hda_nid_t pin_nid = per_pin->pin_nid;
  1439. hdmi_init_pin(codec, pin_nid);
  1440. snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
  1441. }
  1442. return 0;
  1443. }
  1444. static void generic_hdmi_free(struct hda_codec *codec)
  1445. {
  1446. struct hdmi_spec *spec = codec->spec;
  1447. int pin_idx;
  1448. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1449. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1450. struct hdmi_eld *eld = &per_pin->sink_eld;
  1451. cancel_delayed_work(&per_pin->work);
  1452. snd_hda_eld_proc_free(codec, eld);
  1453. }
  1454. flush_workqueue(codec->bus->workq);
  1455. kfree(spec);
  1456. }
  1457. static const struct hda_codec_ops generic_hdmi_patch_ops = {
  1458. .init = generic_hdmi_init,
  1459. .free = generic_hdmi_free,
  1460. .build_pcms = generic_hdmi_build_pcms,
  1461. .build_controls = generic_hdmi_build_controls,
  1462. .unsol_event = hdmi_unsol_event,
  1463. };
  1464. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1465. hda_nid_t nid)
  1466. {
  1467. struct hdmi_spec *spec = codec->spec;
  1468. hda_nid_t conns[4];
  1469. int nconns;
  1470. nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
  1471. if (nconns == spec->num_cvts &&
  1472. !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
  1473. return;
  1474. /* override pins connection list */
  1475. snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
  1476. snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
  1477. }
  1478. #define INTEL_VENDOR_NID 0x08
  1479. #define INTEL_GET_VENDOR_VERB 0xf81
  1480. #define INTEL_SET_VENDOR_VERB 0x781
  1481. #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
  1482. #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
  1483. static void intel_haswell_enable_all_pins(struct hda_codec *codec,
  1484. const struct hda_fixup *fix, int action)
  1485. {
  1486. unsigned int vendor_param;
  1487. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1488. return;
  1489. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1490. INTEL_GET_VENDOR_VERB, 0);
  1491. if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
  1492. return;
  1493. vendor_param |= INTEL_EN_ALL_PIN_CVTS;
  1494. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1495. INTEL_SET_VENDOR_VERB, vendor_param);
  1496. if (vendor_param == -1)
  1497. return;
  1498. snd_hda_codec_update_widgets(codec);
  1499. return;
  1500. }
  1501. static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
  1502. {
  1503. unsigned int vendor_param;
  1504. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1505. INTEL_GET_VENDOR_VERB, 0);
  1506. if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
  1507. return;
  1508. /* enable DP1.2 mode */
  1509. vendor_param |= INTEL_EN_DP12;
  1510. snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
  1511. INTEL_SET_VENDOR_VERB, vendor_param);
  1512. }
  1513. /* available models for fixup */
  1514. enum {
  1515. INTEL_HASWELL,
  1516. };
  1517. static const struct hda_model_fixup hdmi_models[] = {
  1518. {.id = INTEL_HASWELL, .name = "Haswell"},
  1519. {}
  1520. };
  1521. static const struct snd_pci_quirk hdmi_fixup_tbl[] = {
  1522. SND_PCI_QUIRK(0x8086, 0x2010, "Haswell", INTEL_HASWELL),
  1523. {} /* terminator */
  1524. };
  1525. static const struct hda_fixup hdmi_fixups[] = {
  1526. [INTEL_HASWELL] = {
  1527. .type = HDA_FIXUP_FUNC,
  1528. .v.func = intel_haswell_enable_all_pins,
  1529. },
  1530. };
  1531. static int patch_generic_hdmi(struct hda_codec *codec)
  1532. {
  1533. struct hdmi_spec *spec;
  1534. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1535. if (spec == NULL)
  1536. return -ENOMEM;
  1537. codec->spec = spec;
  1538. snd_hda_pick_fixup(codec, hdmi_models, hdmi_fixup_tbl, hdmi_fixups);
  1539. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  1540. if (codec->vendor_id == 0x80862807)
  1541. intel_haswell_fixup_enable_dp12(codec);
  1542. if (hdmi_parse_codec(codec) < 0) {
  1543. codec->spec = NULL;
  1544. kfree(spec);
  1545. return -EINVAL;
  1546. }
  1547. codec->patch_ops = generic_hdmi_patch_ops;
  1548. generic_hdmi_init_per_pins(codec);
  1549. init_channel_allocations();
  1550. return 0;
  1551. }
  1552. /*
  1553. * Shared non-generic implementations
  1554. */
  1555. static int simple_playback_build_pcms(struct hda_codec *codec)
  1556. {
  1557. struct hdmi_spec *spec = codec->spec;
  1558. struct hda_pcm *info = spec->pcm_rec;
  1559. unsigned int chans;
  1560. struct hda_pcm_stream *pstr;
  1561. codec->num_pcms = 1;
  1562. codec->pcm_info = info;
  1563. chans = get_wcaps(codec, spec->cvts[0].cvt_nid);
  1564. chans = get_wcaps_channels(chans);
  1565. info->name = get_hdmi_pcm_name(0);
  1566. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1567. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1568. *pstr = spec->pcm_playback;
  1569. pstr->nid = spec->cvts[0].cvt_nid;
  1570. if (pstr->channels_max <= 2 && chans && chans <= 16)
  1571. pstr->channels_max = chans;
  1572. return 0;
  1573. }
  1574. /* unsolicited event for jack sensing */
  1575. static void simple_hdmi_unsol_event(struct hda_codec *codec,
  1576. unsigned int res)
  1577. {
  1578. snd_hda_jack_set_dirty_all(codec);
  1579. snd_hda_jack_report_sync(codec);
  1580. }
  1581. /* generic_hdmi_build_jack can be used for simple_hdmi, too,
  1582. * as long as spec->pins[] is set correctly
  1583. */
  1584. #define simple_hdmi_build_jack generic_hdmi_build_jack
  1585. static int simple_playback_build_controls(struct hda_codec *codec)
  1586. {
  1587. struct hdmi_spec *spec = codec->spec;
  1588. int err;
  1589. err = snd_hda_create_spdif_out_ctls(codec,
  1590. spec->cvts[0].cvt_nid,
  1591. spec->cvts[0].cvt_nid);
  1592. if (err < 0)
  1593. return err;
  1594. return simple_hdmi_build_jack(codec, 0);
  1595. }
  1596. static int simple_playback_init(struct hda_codec *codec)
  1597. {
  1598. struct hdmi_spec *spec = codec->spec;
  1599. hda_nid_t pin = spec->pins[0].pin_nid;
  1600. snd_hda_codec_write(codec, pin, 0,
  1601. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  1602. /* some codecs require to unmute the pin */
  1603. if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
  1604. snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  1605. AMP_OUT_UNMUTE);
  1606. snd_hda_jack_detect_enable(codec, pin, pin);
  1607. return 0;
  1608. }
  1609. static void simple_playback_free(struct hda_codec *codec)
  1610. {
  1611. struct hdmi_spec *spec = codec->spec;
  1612. kfree(spec);
  1613. }
  1614. /*
  1615. * Nvidia specific implementations
  1616. */
  1617. #define Nv_VERB_SET_Channel_Allocation 0xF79
  1618. #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
  1619. #define Nv_VERB_SET_Audio_Protection_On 0xF98
  1620. #define Nv_VERB_SET_Audio_Protection_Off 0xF99
  1621. #define nvhdmi_master_con_nid_7x 0x04
  1622. #define nvhdmi_master_pin_nid_7x 0x05
  1623. static const hda_nid_t nvhdmi_con_nids_7x[4] = {
  1624. /*front, rear, clfe, rear_surr */
  1625. 0x6, 0x8, 0xa, 0xc,
  1626. };
  1627. static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
  1628. /* set audio protect on */
  1629. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1630. /* enable digital output on pin widget */
  1631. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1632. {} /* terminator */
  1633. };
  1634. static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
  1635. /* set audio protect on */
  1636. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1637. /* enable digital output on pin widget */
  1638. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1639. { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1640. { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1641. { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1642. { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1643. {} /* terminator */
  1644. };
  1645. #ifdef LIMITED_RATE_FMT_SUPPORT
  1646. /* support only the safe format and rate */
  1647. #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
  1648. #define SUPPORTED_MAXBPS 16
  1649. #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
  1650. #else
  1651. /* support all rates and formats */
  1652. #define SUPPORTED_RATES \
  1653. (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  1654. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
  1655. SNDRV_PCM_RATE_192000)
  1656. #define SUPPORTED_MAXBPS 24
  1657. #define SUPPORTED_FORMATS \
  1658. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1659. #endif
  1660. static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
  1661. {
  1662. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
  1663. return 0;
  1664. }
  1665. static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
  1666. {
  1667. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
  1668. return 0;
  1669. }
  1670. static unsigned int channels_2_6_8[] = {
  1671. 2, 6, 8
  1672. };
  1673. static unsigned int channels_2_8[] = {
  1674. 2, 8
  1675. };
  1676. static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
  1677. .count = ARRAY_SIZE(channels_2_6_8),
  1678. .list = channels_2_6_8,
  1679. .mask = 0,
  1680. };
  1681. static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
  1682. .count = ARRAY_SIZE(channels_2_8),
  1683. .list = channels_2_8,
  1684. .mask = 0,
  1685. };
  1686. static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1687. struct hda_codec *codec,
  1688. struct snd_pcm_substream *substream)
  1689. {
  1690. struct hdmi_spec *spec = codec->spec;
  1691. struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
  1692. switch (codec->preset->id) {
  1693. case 0x10de0002:
  1694. case 0x10de0003:
  1695. case 0x10de0005:
  1696. case 0x10de0006:
  1697. hw_constraints_channels = &hw_constraints_2_8_channels;
  1698. break;
  1699. case 0x10de0007:
  1700. hw_constraints_channels = &hw_constraints_2_6_8_channels;
  1701. break;
  1702. default:
  1703. break;
  1704. }
  1705. if (hw_constraints_channels != NULL) {
  1706. snd_pcm_hw_constraint_list(substream->runtime, 0,
  1707. SNDRV_PCM_HW_PARAM_CHANNELS,
  1708. hw_constraints_channels);
  1709. } else {
  1710. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1711. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1712. }
  1713. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  1714. }
  1715. static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
  1716. struct hda_codec *codec,
  1717. struct snd_pcm_substream *substream)
  1718. {
  1719. struct hdmi_spec *spec = codec->spec;
  1720. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1721. }
  1722. static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1723. struct hda_codec *codec,
  1724. unsigned int stream_tag,
  1725. unsigned int format,
  1726. struct snd_pcm_substream *substream)
  1727. {
  1728. struct hdmi_spec *spec = codec->spec;
  1729. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  1730. stream_tag, format, substream);
  1731. }
  1732. static const struct hda_pcm_stream simple_pcm_playback = {
  1733. .substreams = 1,
  1734. .channels_min = 2,
  1735. .channels_max = 2,
  1736. .ops = {
  1737. .open = simple_playback_pcm_open,
  1738. .close = simple_playback_pcm_close,
  1739. .prepare = simple_playback_pcm_prepare
  1740. },
  1741. };
  1742. static const struct hda_codec_ops simple_hdmi_patch_ops = {
  1743. .build_controls = simple_playback_build_controls,
  1744. .build_pcms = simple_playback_build_pcms,
  1745. .init = simple_playback_init,
  1746. .free = simple_playback_free,
  1747. .unsol_event = simple_hdmi_unsol_event,
  1748. };
  1749. static int patch_simple_hdmi(struct hda_codec *codec,
  1750. hda_nid_t cvt_nid, hda_nid_t pin_nid)
  1751. {
  1752. struct hdmi_spec *spec;
  1753. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1754. if (!spec)
  1755. return -ENOMEM;
  1756. codec->spec = spec;
  1757. spec->multiout.num_dacs = 0; /* no analog */
  1758. spec->multiout.max_channels = 2;
  1759. spec->multiout.dig_out_nid = cvt_nid;
  1760. spec->num_cvts = 1;
  1761. spec->num_pins = 1;
  1762. spec->cvts[0].cvt_nid = cvt_nid;
  1763. spec->pins[0].pin_nid = pin_nid;
  1764. spec->pcm_playback = simple_pcm_playback;
  1765. codec->patch_ops = simple_hdmi_patch_ops;
  1766. return 0;
  1767. }
  1768. static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
  1769. int channels)
  1770. {
  1771. unsigned int chanmask;
  1772. int chan = channels ? (channels - 1) : 1;
  1773. switch (channels) {
  1774. default:
  1775. case 0:
  1776. case 2:
  1777. chanmask = 0x00;
  1778. break;
  1779. case 4:
  1780. chanmask = 0x08;
  1781. break;
  1782. case 6:
  1783. chanmask = 0x0b;
  1784. break;
  1785. case 8:
  1786. chanmask = 0x13;
  1787. break;
  1788. }
  1789. /* Set the audio infoframe channel allocation and checksum fields. The
  1790. * channel count is computed implicitly by the hardware. */
  1791. snd_hda_codec_write(codec, 0x1, 0,
  1792. Nv_VERB_SET_Channel_Allocation, chanmask);
  1793. snd_hda_codec_write(codec, 0x1, 0,
  1794. Nv_VERB_SET_Info_Frame_Checksum,
  1795. (0x71 - chan - chanmask));
  1796. }
  1797. static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
  1798. struct hda_codec *codec,
  1799. struct snd_pcm_substream *substream)
  1800. {
  1801. struct hdmi_spec *spec = codec->spec;
  1802. int i;
  1803. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
  1804. 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
  1805. for (i = 0; i < 4; i++) {
  1806. /* set the stream id */
  1807. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  1808. AC_VERB_SET_CHANNEL_STREAMID, 0);
  1809. /* set the stream format */
  1810. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  1811. AC_VERB_SET_STREAM_FORMAT, 0);
  1812. }
  1813. /* The audio hardware sends a channel count of 0x7 (8ch) when all the
  1814. * streams are disabled. */
  1815. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  1816. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1817. }
  1818. static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
  1819. struct hda_codec *codec,
  1820. unsigned int stream_tag,
  1821. unsigned int format,
  1822. struct snd_pcm_substream *substream)
  1823. {
  1824. int chs;
  1825. unsigned int dataDCC2, channel_id;
  1826. int i;
  1827. struct hdmi_spec *spec = codec->spec;
  1828. struct hda_spdif_out *spdif;
  1829. mutex_lock(&codec->spdif_mutex);
  1830. spdif = snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
  1831. chs = substream->runtime->channels;
  1832. dataDCC2 = 0x2;
  1833. /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
  1834. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
  1835. snd_hda_codec_write(codec,
  1836. nvhdmi_master_con_nid_7x,
  1837. 0,
  1838. AC_VERB_SET_DIGI_CONVERT_1,
  1839. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  1840. /* set the stream id */
  1841. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  1842. AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
  1843. /* set the stream format */
  1844. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  1845. AC_VERB_SET_STREAM_FORMAT, format);
  1846. /* turn on again (if needed) */
  1847. /* enable and set the channel status audio/data flag */
  1848. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
  1849. snd_hda_codec_write(codec,
  1850. nvhdmi_master_con_nid_7x,
  1851. 0,
  1852. AC_VERB_SET_DIGI_CONVERT_1,
  1853. spdif->ctls & 0xff);
  1854. snd_hda_codec_write(codec,
  1855. nvhdmi_master_con_nid_7x,
  1856. 0,
  1857. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  1858. }
  1859. for (i = 0; i < 4; i++) {
  1860. if (chs == 2)
  1861. channel_id = 0;
  1862. else
  1863. channel_id = i * 2;
  1864. /* turn off SPDIF once;
  1865. *otherwise the IEC958 bits won't be updated
  1866. */
  1867. if (codec->spdif_status_reset &&
  1868. (spdif->ctls & AC_DIG1_ENABLE))
  1869. snd_hda_codec_write(codec,
  1870. nvhdmi_con_nids_7x[i],
  1871. 0,
  1872. AC_VERB_SET_DIGI_CONVERT_1,
  1873. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  1874. /* set the stream id */
  1875. snd_hda_codec_write(codec,
  1876. nvhdmi_con_nids_7x[i],
  1877. 0,
  1878. AC_VERB_SET_CHANNEL_STREAMID,
  1879. (stream_tag << 4) | channel_id);
  1880. /* set the stream format */
  1881. snd_hda_codec_write(codec,
  1882. nvhdmi_con_nids_7x[i],
  1883. 0,
  1884. AC_VERB_SET_STREAM_FORMAT,
  1885. format);
  1886. /* turn on again (if needed) */
  1887. /* enable and set the channel status audio/data flag */
  1888. if (codec->spdif_status_reset &&
  1889. (spdif->ctls & AC_DIG1_ENABLE)) {
  1890. snd_hda_codec_write(codec,
  1891. nvhdmi_con_nids_7x[i],
  1892. 0,
  1893. AC_VERB_SET_DIGI_CONVERT_1,
  1894. spdif->ctls & 0xff);
  1895. snd_hda_codec_write(codec,
  1896. nvhdmi_con_nids_7x[i],
  1897. 0,
  1898. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  1899. }
  1900. }
  1901. nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
  1902. mutex_unlock(&codec->spdif_mutex);
  1903. return 0;
  1904. }
  1905. static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
  1906. .substreams = 1,
  1907. .channels_min = 2,
  1908. .channels_max = 8,
  1909. .nid = nvhdmi_master_con_nid_7x,
  1910. .rates = SUPPORTED_RATES,
  1911. .maxbps = SUPPORTED_MAXBPS,
  1912. .formats = SUPPORTED_FORMATS,
  1913. .ops = {
  1914. .open = simple_playback_pcm_open,
  1915. .close = nvhdmi_8ch_7x_pcm_close,
  1916. .prepare = nvhdmi_8ch_7x_pcm_prepare
  1917. },
  1918. };
  1919. static int patch_nvhdmi_2ch(struct hda_codec *codec)
  1920. {
  1921. struct hdmi_spec *spec;
  1922. int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
  1923. nvhdmi_master_pin_nid_7x);
  1924. if (err < 0)
  1925. return err;
  1926. codec->patch_ops.init = nvhdmi_7x_init_2ch;
  1927. /* override the PCM rates, etc, as the codec doesn't give full list */
  1928. spec = codec->spec;
  1929. spec->pcm_playback.rates = SUPPORTED_RATES;
  1930. spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
  1931. spec->pcm_playback.formats = SUPPORTED_FORMATS;
  1932. return 0;
  1933. }
  1934. static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
  1935. {
  1936. struct hdmi_spec *spec = codec->spec;
  1937. int err = simple_playback_build_pcms(codec);
  1938. spec->pcm_rec[0].own_chmap = true;
  1939. return err;
  1940. }
  1941. static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
  1942. {
  1943. struct hdmi_spec *spec = codec->spec;
  1944. struct snd_pcm_chmap *chmap;
  1945. int err;
  1946. err = simple_playback_build_controls(codec);
  1947. if (err < 0)
  1948. return err;
  1949. /* add channel maps */
  1950. err = snd_pcm_add_chmap_ctls(spec->pcm_rec[0].pcm,
  1951. SNDRV_PCM_STREAM_PLAYBACK,
  1952. snd_pcm_alt_chmaps, 8, 0, &chmap);
  1953. if (err < 0)
  1954. return err;
  1955. switch (codec->preset->id) {
  1956. case 0x10de0002:
  1957. case 0x10de0003:
  1958. case 0x10de0005:
  1959. case 0x10de0006:
  1960. chmap->channel_mask = (1U << 2) | (1U << 8);
  1961. break;
  1962. case 0x10de0007:
  1963. chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
  1964. }
  1965. return 0;
  1966. }
  1967. static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
  1968. {
  1969. struct hdmi_spec *spec;
  1970. int err = patch_nvhdmi_2ch(codec);
  1971. if (err < 0)
  1972. return err;
  1973. spec = codec->spec;
  1974. spec->multiout.max_channels = 8;
  1975. spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
  1976. codec->patch_ops.init = nvhdmi_7x_init_8ch;
  1977. codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
  1978. codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
  1979. /* Initialize the audio infoframe channel mask and checksum to something
  1980. * valid */
  1981. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  1982. return 0;
  1983. }
  1984. /*
  1985. * ATI-specific implementations
  1986. *
  1987. * FIXME: we may omit the whole this and use the generic code once after
  1988. * it's confirmed to work.
  1989. */
  1990. #define ATIHDMI_CVT_NID 0x02 /* audio converter */
  1991. #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
  1992. static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1993. struct hda_codec *codec,
  1994. unsigned int stream_tag,
  1995. unsigned int format,
  1996. struct snd_pcm_substream *substream)
  1997. {
  1998. struct hdmi_spec *spec = codec->spec;
  1999. int chans = substream->runtime->channels;
  2000. int i, err;
  2001. err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
  2002. substream);
  2003. if (err < 0)
  2004. return err;
  2005. snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
  2006. AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
  2007. /* FIXME: XXX */
  2008. for (i = 0; i < chans; i++) {
  2009. snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
  2010. AC_VERB_SET_HDMI_CHAN_SLOT,
  2011. (i << 4) | i);
  2012. }
  2013. return 0;
  2014. }
  2015. static int patch_atihdmi(struct hda_codec *codec)
  2016. {
  2017. struct hdmi_spec *spec;
  2018. int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
  2019. if (err < 0)
  2020. return err;
  2021. spec = codec->spec;
  2022. spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
  2023. return 0;
  2024. }
  2025. /* VIA HDMI Implementation */
  2026. #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
  2027. #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
  2028. static int patch_via_hdmi(struct hda_codec *codec)
  2029. {
  2030. return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
  2031. }
  2032. /*
  2033. * patch entries
  2034. */
  2035. static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
  2036. { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2037. { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2038. { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
  2039. { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
  2040. { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
  2041. { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
  2042. { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
  2043. { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2044. { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2045. { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2046. { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2047. { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
  2048. { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
  2049. { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
  2050. { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
  2051. { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
  2052. { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
  2053. { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
  2054. { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
  2055. { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
  2056. { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
  2057. { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
  2058. { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
  2059. /* 17 is known to be absent */
  2060. { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
  2061. { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
  2062. { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
  2063. { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
  2064. { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
  2065. { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
  2066. { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
  2067. { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
  2068. { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
  2069. { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
  2070. { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
  2071. { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
  2072. { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
  2073. { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2074. { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2075. { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2076. { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2077. { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2078. { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
  2079. { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
  2080. { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
  2081. { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2082. { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
  2083. { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
  2084. { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
  2085. { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
  2086. { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
  2087. {} /* terminator */
  2088. };
  2089. MODULE_ALIAS("snd-hda-codec-id:1002793c");
  2090. MODULE_ALIAS("snd-hda-codec-id:10027919");
  2091. MODULE_ALIAS("snd-hda-codec-id:1002791a");
  2092. MODULE_ALIAS("snd-hda-codec-id:1002aa01");
  2093. MODULE_ALIAS("snd-hda-codec-id:10951390");
  2094. MODULE_ALIAS("snd-hda-codec-id:10951392");
  2095. MODULE_ALIAS("snd-hda-codec-id:10de0002");
  2096. MODULE_ALIAS("snd-hda-codec-id:10de0003");
  2097. MODULE_ALIAS("snd-hda-codec-id:10de0005");
  2098. MODULE_ALIAS("snd-hda-codec-id:10de0006");
  2099. MODULE_ALIAS("snd-hda-codec-id:10de0007");
  2100. MODULE_ALIAS("snd-hda-codec-id:10de000a");
  2101. MODULE_ALIAS("snd-hda-codec-id:10de000b");
  2102. MODULE_ALIAS("snd-hda-codec-id:10de000c");
  2103. MODULE_ALIAS("snd-hda-codec-id:10de000d");
  2104. MODULE_ALIAS("snd-hda-codec-id:10de0010");
  2105. MODULE_ALIAS("snd-hda-codec-id:10de0011");
  2106. MODULE_ALIAS("snd-hda-codec-id:10de0012");
  2107. MODULE_ALIAS("snd-hda-codec-id:10de0013");
  2108. MODULE_ALIAS("snd-hda-codec-id:10de0014");
  2109. MODULE_ALIAS("snd-hda-codec-id:10de0015");
  2110. MODULE_ALIAS("snd-hda-codec-id:10de0016");
  2111. MODULE_ALIAS("snd-hda-codec-id:10de0018");
  2112. MODULE_ALIAS("snd-hda-codec-id:10de0019");
  2113. MODULE_ALIAS("snd-hda-codec-id:10de001a");
  2114. MODULE_ALIAS("snd-hda-codec-id:10de001b");
  2115. MODULE_ALIAS("snd-hda-codec-id:10de001c");
  2116. MODULE_ALIAS("snd-hda-codec-id:10de0040");
  2117. MODULE_ALIAS("snd-hda-codec-id:10de0041");
  2118. MODULE_ALIAS("snd-hda-codec-id:10de0042");
  2119. MODULE_ALIAS("snd-hda-codec-id:10de0043");
  2120. MODULE_ALIAS("snd-hda-codec-id:10de0044");
  2121. MODULE_ALIAS("snd-hda-codec-id:10de0051");
  2122. MODULE_ALIAS("snd-hda-codec-id:10de0067");
  2123. MODULE_ALIAS("snd-hda-codec-id:10de8001");
  2124. MODULE_ALIAS("snd-hda-codec-id:11069f80");
  2125. MODULE_ALIAS("snd-hda-codec-id:11069f81");
  2126. MODULE_ALIAS("snd-hda-codec-id:11069f84");
  2127. MODULE_ALIAS("snd-hda-codec-id:11069f85");
  2128. MODULE_ALIAS("snd-hda-codec-id:17e80047");
  2129. MODULE_ALIAS("snd-hda-codec-id:80860054");
  2130. MODULE_ALIAS("snd-hda-codec-id:80862801");
  2131. MODULE_ALIAS("snd-hda-codec-id:80862802");
  2132. MODULE_ALIAS("snd-hda-codec-id:80862803");
  2133. MODULE_ALIAS("snd-hda-codec-id:80862804");
  2134. MODULE_ALIAS("snd-hda-codec-id:80862805");
  2135. MODULE_ALIAS("snd-hda-codec-id:80862806");
  2136. MODULE_ALIAS("snd-hda-codec-id:80862807");
  2137. MODULE_ALIAS("snd-hda-codec-id:80862880");
  2138. MODULE_ALIAS("snd-hda-codec-id:808629fb");
  2139. MODULE_LICENSE("GPL");
  2140. MODULE_DESCRIPTION("HDMI HD-audio codec");
  2141. MODULE_ALIAS("snd-hda-codec-intelhdmi");
  2142. MODULE_ALIAS("snd-hda-codec-nvhdmi");
  2143. MODULE_ALIAS("snd-hda-codec-atihdmi");
  2144. static struct hda_codec_preset_list intel_list = {
  2145. .preset = snd_hda_preset_hdmi,
  2146. .owner = THIS_MODULE,
  2147. };
  2148. static int __init patch_hdmi_init(void)
  2149. {
  2150. return snd_hda_add_codec_preset(&intel_list);
  2151. }
  2152. static void __exit patch_hdmi_exit(void)
  2153. {
  2154. snd_hda_delete_codec_preset(&intel_list);
  2155. }
  2156. module_init(patch_hdmi_init)
  2157. module_exit(patch_hdmi_exit)