tps65910-regulator.c 33 KB

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  1. /*
  2. * tps65910.c -- TI tps65910
  3. *
  4. * Copyright 2010 Texas Instruments Inc.
  5. *
  6. * Author: Graeme Gregory <gg@slimlogic.co.uk>
  7. * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/err.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/slab.h>
  23. #include <linux/gpio.h>
  24. #include <linux/mfd/tps65910.h>
  25. #include <linux/regulator/of_regulator.h>
  26. #define TPS65910_SUPPLY_STATE_ENABLED 0x1
  27. #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
  28. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
  29. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
  30. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  31. /* supported VIO voltages in milivolts */
  32. static const u16 VIO_VSEL_table[] = {
  33. 1500, 1800, 2500, 3300,
  34. };
  35. /* VSEL tables for TPS65910 specific LDOs and dcdc's */
  36. /* supported VDD3 voltages in milivolts */
  37. static const u16 VDD3_VSEL_table[] = {
  38. 5000,
  39. };
  40. /* supported VDIG1 voltages in milivolts */
  41. static const u16 VDIG1_VSEL_table[] = {
  42. 1200, 1500, 1800, 2700,
  43. };
  44. /* supported VDIG2 voltages in milivolts */
  45. static const u16 VDIG2_VSEL_table[] = {
  46. 1000, 1100, 1200, 1800,
  47. };
  48. /* supported VPLL voltages in milivolts */
  49. static const u16 VPLL_VSEL_table[] = {
  50. 1000, 1100, 1800, 2500,
  51. };
  52. /* supported VDAC voltages in milivolts */
  53. static const u16 VDAC_VSEL_table[] = {
  54. 1800, 2600, 2800, 2850,
  55. };
  56. /* supported VAUX1 voltages in milivolts */
  57. static const u16 VAUX1_VSEL_table[] = {
  58. 1800, 2500, 2800, 2850,
  59. };
  60. /* supported VAUX2 voltages in milivolts */
  61. static const u16 VAUX2_VSEL_table[] = {
  62. 1800, 2800, 2900, 3300,
  63. };
  64. /* supported VAUX33 voltages in milivolts */
  65. static const u16 VAUX33_VSEL_table[] = {
  66. 1800, 2000, 2800, 3300,
  67. };
  68. /* supported VMMC voltages in milivolts */
  69. static const u16 VMMC_VSEL_table[] = {
  70. 1800, 2800, 3000, 3300,
  71. };
  72. struct tps_info {
  73. const char *name;
  74. unsigned min_uV;
  75. unsigned max_uV;
  76. u8 n_voltages;
  77. const u16 *voltage_table;
  78. int enable_time_us;
  79. };
  80. static struct tps_info tps65910_regs[] = {
  81. {
  82. .name = "vrtc",
  83. .enable_time_us = 2200,
  84. },
  85. {
  86. .name = "vio",
  87. .min_uV = 1500000,
  88. .max_uV = 3300000,
  89. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  90. .voltage_table = VIO_VSEL_table,
  91. .enable_time_us = 350,
  92. },
  93. {
  94. .name = "vdd1",
  95. .min_uV = 600000,
  96. .max_uV = 4500000,
  97. .enable_time_us = 350,
  98. },
  99. {
  100. .name = "vdd2",
  101. .min_uV = 600000,
  102. .max_uV = 4500000,
  103. .enable_time_us = 350,
  104. },
  105. {
  106. .name = "vdd3",
  107. .min_uV = 5000000,
  108. .max_uV = 5000000,
  109. .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
  110. .voltage_table = VDD3_VSEL_table,
  111. .enable_time_us = 200,
  112. },
  113. {
  114. .name = "vdig1",
  115. .min_uV = 1200000,
  116. .max_uV = 2700000,
  117. .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
  118. .voltage_table = VDIG1_VSEL_table,
  119. .enable_time_us = 100,
  120. },
  121. {
  122. .name = "vdig2",
  123. .min_uV = 1000000,
  124. .max_uV = 1800000,
  125. .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
  126. .voltage_table = VDIG2_VSEL_table,
  127. .enable_time_us = 100,
  128. },
  129. {
  130. .name = "vpll",
  131. .min_uV = 1000000,
  132. .max_uV = 2500000,
  133. .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
  134. .voltage_table = VPLL_VSEL_table,
  135. .enable_time_us = 100,
  136. },
  137. {
  138. .name = "vdac",
  139. .min_uV = 1800000,
  140. .max_uV = 2850000,
  141. .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
  142. .voltage_table = VDAC_VSEL_table,
  143. .enable_time_us = 100,
  144. },
  145. {
  146. .name = "vaux1",
  147. .min_uV = 1800000,
  148. .max_uV = 2850000,
  149. .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
  150. .voltage_table = VAUX1_VSEL_table,
  151. .enable_time_us = 100,
  152. },
  153. {
  154. .name = "vaux2",
  155. .min_uV = 1800000,
  156. .max_uV = 3300000,
  157. .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
  158. .voltage_table = VAUX2_VSEL_table,
  159. .enable_time_us = 100,
  160. },
  161. {
  162. .name = "vaux33",
  163. .min_uV = 1800000,
  164. .max_uV = 3300000,
  165. .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
  166. .voltage_table = VAUX33_VSEL_table,
  167. .enable_time_us = 100,
  168. },
  169. {
  170. .name = "vmmc",
  171. .min_uV = 1800000,
  172. .max_uV = 3300000,
  173. .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
  174. .voltage_table = VMMC_VSEL_table,
  175. .enable_time_us = 100,
  176. },
  177. };
  178. static struct tps_info tps65911_regs[] = {
  179. {
  180. .name = "vrtc",
  181. .enable_time_us = 2200,
  182. },
  183. {
  184. .name = "vio",
  185. .min_uV = 1500000,
  186. .max_uV = 3300000,
  187. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  188. .voltage_table = VIO_VSEL_table,
  189. .enable_time_us = 350,
  190. },
  191. {
  192. .name = "vdd1",
  193. .min_uV = 600000,
  194. .max_uV = 4500000,
  195. .n_voltages = 73,
  196. .enable_time_us = 350,
  197. },
  198. {
  199. .name = "vdd2",
  200. .min_uV = 600000,
  201. .max_uV = 4500000,
  202. .n_voltages = 73,
  203. .enable_time_us = 350,
  204. },
  205. {
  206. .name = "vddctrl",
  207. .min_uV = 600000,
  208. .max_uV = 1400000,
  209. .n_voltages = 65,
  210. .enable_time_us = 900,
  211. },
  212. {
  213. .name = "ldo1",
  214. .min_uV = 1000000,
  215. .max_uV = 3300000,
  216. .n_voltages = 47,
  217. .enable_time_us = 420,
  218. },
  219. {
  220. .name = "ldo2",
  221. .min_uV = 1000000,
  222. .max_uV = 3300000,
  223. .n_voltages = 47,
  224. .enable_time_us = 420,
  225. },
  226. {
  227. .name = "ldo3",
  228. .min_uV = 1000000,
  229. .max_uV = 3300000,
  230. .n_voltages = 24,
  231. .enable_time_us = 230,
  232. },
  233. {
  234. .name = "ldo4",
  235. .min_uV = 1000000,
  236. .max_uV = 3300000,
  237. .n_voltages = 47,
  238. .enable_time_us = 230,
  239. },
  240. {
  241. .name = "ldo5",
  242. .min_uV = 1000000,
  243. .max_uV = 3300000,
  244. .n_voltages = 24,
  245. .enable_time_us = 230,
  246. },
  247. {
  248. .name = "ldo6",
  249. .min_uV = 1000000,
  250. .max_uV = 3300000,
  251. .n_voltages = 24,
  252. .enable_time_us = 230,
  253. },
  254. {
  255. .name = "ldo7",
  256. .min_uV = 1000000,
  257. .max_uV = 3300000,
  258. .n_voltages = 24,
  259. .enable_time_us = 230,
  260. },
  261. {
  262. .name = "ldo8",
  263. .min_uV = 1000000,
  264. .max_uV = 3300000,
  265. .n_voltages = 24,
  266. .enable_time_us = 230,
  267. },
  268. };
  269. #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
  270. static unsigned int tps65910_ext_sleep_control[] = {
  271. 0,
  272. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  273. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  274. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  275. EXT_CONTROL_REG_BITS(VDD3, 1, 3),
  276. EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
  277. EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
  278. EXT_CONTROL_REG_BITS(VPLL, 0, 6),
  279. EXT_CONTROL_REG_BITS(VDAC, 0, 7),
  280. EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
  281. EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
  282. EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
  283. EXT_CONTROL_REG_BITS(VMMC, 0, 0),
  284. };
  285. static unsigned int tps65911_ext_sleep_control[] = {
  286. 0,
  287. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  288. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  289. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  290. EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
  291. EXT_CONTROL_REG_BITS(LDO1, 0, 1),
  292. EXT_CONTROL_REG_BITS(LDO2, 0, 2),
  293. EXT_CONTROL_REG_BITS(LDO3, 0, 7),
  294. EXT_CONTROL_REG_BITS(LDO4, 0, 6),
  295. EXT_CONTROL_REG_BITS(LDO5, 0, 3),
  296. EXT_CONTROL_REG_BITS(LDO6, 0, 0),
  297. EXT_CONTROL_REG_BITS(LDO7, 0, 5),
  298. EXT_CONTROL_REG_BITS(LDO8, 0, 4),
  299. };
  300. struct tps65910_reg {
  301. struct regulator_desc *desc;
  302. struct tps65910 *mfd;
  303. struct regulator_dev **rdev;
  304. struct tps_info **info;
  305. struct mutex mutex;
  306. int num_regulators;
  307. int mode;
  308. int (*get_ctrl_reg)(int);
  309. unsigned int *ext_sleep_control;
  310. unsigned int board_ext_control[TPS65910_NUM_REGS];
  311. };
  312. static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
  313. {
  314. u8 val;
  315. int err;
  316. err = pmic->mfd->read(pmic->mfd, reg, 1, &val);
  317. if (err)
  318. return err;
  319. return val;
  320. }
  321. static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val)
  322. {
  323. return pmic->mfd->write(pmic->mfd, reg, 1, &val);
  324. }
  325. static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
  326. u8 set_mask, u8 clear_mask)
  327. {
  328. int err, data;
  329. mutex_lock(&pmic->mutex);
  330. data = tps65910_read(pmic, reg);
  331. if (data < 0) {
  332. dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
  333. err = data;
  334. goto out;
  335. }
  336. data &= ~clear_mask;
  337. data |= set_mask;
  338. err = tps65910_write(pmic, reg, data);
  339. if (err)
  340. dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
  341. out:
  342. mutex_unlock(&pmic->mutex);
  343. return err;
  344. }
  345. static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg)
  346. {
  347. int data;
  348. mutex_lock(&pmic->mutex);
  349. data = tps65910_read(pmic, reg);
  350. if (data < 0)
  351. dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
  352. mutex_unlock(&pmic->mutex);
  353. return data;
  354. }
  355. static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val)
  356. {
  357. int err;
  358. mutex_lock(&pmic->mutex);
  359. err = tps65910_write(pmic, reg, val);
  360. if (err < 0)
  361. dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
  362. mutex_unlock(&pmic->mutex);
  363. return err;
  364. }
  365. static int tps65910_get_ctrl_register(int id)
  366. {
  367. switch (id) {
  368. case TPS65910_REG_VRTC:
  369. return TPS65910_VRTC;
  370. case TPS65910_REG_VIO:
  371. return TPS65910_VIO;
  372. case TPS65910_REG_VDD1:
  373. return TPS65910_VDD1;
  374. case TPS65910_REG_VDD2:
  375. return TPS65910_VDD2;
  376. case TPS65910_REG_VDD3:
  377. return TPS65910_VDD3;
  378. case TPS65910_REG_VDIG1:
  379. return TPS65910_VDIG1;
  380. case TPS65910_REG_VDIG2:
  381. return TPS65910_VDIG2;
  382. case TPS65910_REG_VPLL:
  383. return TPS65910_VPLL;
  384. case TPS65910_REG_VDAC:
  385. return TPS65910_VDAC;
  386. case TPS65910_REG_VAUX1:
  387. return TPS65910_VAUX1;
  388. case TPS65910_REG_VAUX2:
  389. return TPS65910_VAUX2;
  390. case TPS65910_REG_VAUX33:
  391. return TPS65910_VAUX33;
  392. case TPS65910_REG_VMMC:
  393. return TPS65910_VMMC;
  394. default:
  395. return -EINVAL;
  396. }
  397. }
  398. static int tps65911_get_ctrl_register(int id)
  399. {
  400. switch (id) {
  401. case TPS65910_REG_VRTC:
  402. return TPS65910_VRTC;
  403. case TPS65910_REG_VIO:
  404. return TPS65910_VIO;
  405. case TPS65910_REG_VDD1:
  406. return TPS65910_VDD1;
  407. case TPS65910_REG_VDD2:
  408. return TPS65910_VDD2;
  409. case TPS65911_REG_VDDCTRL:
  410. return TPS65911_VDDCTRL;
  411. case TPS65911_REG_LDO1:
  412. return TPS65911_LDO1;
  413. case TPS65911_REG_LDO2:
  414. return TPS65911_LDO2;
  415. case TPS65911_REG_LDO3:
  416. return TPS65911_LDO3;
  417. case TPS65911_REG_LDO4:
  418. return TPS65911_LDO4;
  419. case TPS65911_REG_LDO5:
  420. return TPS65911_LDO5;
  421. case TPS65911_REG_LDO6:
  422. return TPS65911_LDO6;
  423. case TPS65911_REG_LDO7:
  424. return TPS65911_LDO7;
  425. case TPS65911_REG_LDO8:
  426. return TPS65911_LDO8;
  427. default:
  428. return -EINVAL;
  429. }
  430. }
  431. static int tps65910_enable_time(struct regulator_dev *dev)
  432. {
  433. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  434. int id = rdev_get_id(dev);
  435. return pmic->info[id]->enable_time_us;
  436. }
  437. static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
  438. {
  439. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  440. struct tps65910 *mfd = pmic->mfd;
  441. int reg, value, id = rdev_get_id(dev);
  442. reg = pmic->get_ctrl_reg(id);
  443. if (reg < 0)
  444. return reg;
  445. switch (mode) {
  446. case REGULATOR_MODE_NORMAL:
  447. return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT,
  448. LDO_ST_MODE_BIT);
  449. case REGULATOR_MODE_IDLE:
  450. value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
  451. return tps65910_set_bits(mfd, reg, value);
  452. case REGULATOR_MODE_STANDBY:
  453. return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT);
  454. }
  455. return -EINVAL;
  456. }
  457. static unsigned int tps65910_get_mode(struct regulator_dev *dev)
  458. {
  459. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  460. int reg, value, id = rdev_get_id(dev);
  461. reg = pmic->get_ctrl_reg(id);
  462. if (reg < 0)
  463. return reg;
  464. value = tps65910_reg_read(pmic, reg);
  465. if (value < 0)
  466. return value;
  467. if (!(value & LDO_ST_ON_BIT))
  468. return REGULATOR_MODE_STANDBY;
  469. else if (value & LDO_ST_MODE_BIT)
  470. return REGULATOR_MODE_IDLE;
  471. else
  472. return REGULATOR_MODE_NORMAL;
  473. }
  474. static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
  475. {
  476. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  477. int id = rdev_get_id(dev);
  478. int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
  479. switch (id) {
  480. case TPS65910_REG_VDD1:
  481. opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP);
  482. mult = tps65910_reg_read(pmic, TPS65910_VDD1);
  483. mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
  484. srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR);
  485. sr = opvsel & VDD1_OP_CMD_MASK;
  486. opvsel &= VDD1_OP_SEL_MASK;
  487. srvsel &= VDD1_SR_SEL_MASK;
  488. vselmax = 75;
  489. break;
  490. case TPS65910_REG_VDD2:
  491. opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP);
  492. mult = tps65910_reg_read(pmic, TPS65910_VDD2);
  493. mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
  494. srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR);
  495. sr = opvsel & VDD2_OP_CMD_MASK;
  496. opvsel &= VDD2_OP_SEL_MASK;
  497. srvsel &= VDD2_SR_SEL_MASK;
  498. vselmax = 75;
  499. break;
  500. case TPS65911_REG_VDDCTRL:
  501. opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP);
  502. srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR);
  503. sr = opvsel & VDDCTRL_OP_CMD_MASK;
  504. opvsel &= VDDCTRL_OP_SEL_MASK;
  505. srvsel &= VDDCTRL_SR_SEL_MASK;
  506. vselmax = 64;
  507. break;
  508. }
  509. /* multiplier 0 == 1 but 2,3 normal */
  510. if (!mult)
  511. mult=1;
  512. if (sr) {
  513. /* normalise to valid range */
  514. if (srvsel < 3)
  515. srvsel = 3;
  516. if (srvsel > vselmax)
  517. srvsel = vselmax;
  518. return srvsel - 3;
  519. } else {
  520. /* normalise to valid range*/
  521. if (opvsel < 3)
  522. opvsel = 3;
  523. if (opvsel > vselmax)
  524. opvsel = vselmax;
  525. return opvsel - 3;
  526. }
  527. return -EINVAL;
  528. }
  529. static int tps65910_get_voltage_sel(struct regulator_dev *dev)
  530. {
  531. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  532. int reg, value, id = rdev_get_id(dev);
  533. reg = pmic->get_ctrl_reg(id);
  534. if (reg < 0)
  535. return reg;
  536. value = tps65910_reg_read(pmic, reg);
  537. if (value < 0)
  538. return value;
  539. switch (id) {
  540. case TPS65910_REG_VIO:
  541. case TPS65910_REG_VDIG1:
  542. case TPS65910_REG_VDIG2:
  543. case TPS65910_REG_VPLL:
  544. case TPS65910_REG_VDAC:
  545. case TPS65910_REG_VAUX1:
  546. case TPS65910_REG_VAUX2:
  547. case TPS65910_REG_VAUX33:
  548. case TPS65910_REG_VMMC:
  549. value &= LDO_SEL_MASK;
  550. value >>= LDO_SEL_SHIFT;
  551. break;
  552. default:
  553. return -EINVAL;
  554. }
  555. return value;
  556. }
  557. static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
  558. {
  559. return 5 * 1000 * 1000;
  560. }
  561. static int tps65911_get_voltage_sel(struct regulator_dev *dev)
  562. {
  563. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  564. int id = rdev_get_id(dev);
  565. u8 value, reg;
  566. reg = pmic->get_ctrl_reg(id);
  567. value = tps65910_reg_read(pmic, reg);
  568. switch (id) {
  569. case TPS65911_REG_LDO1:
  570. case TPS65911_REG_LDO2:
  571. case TPS65911_REG_LDO4:
  572. value &= LDO1_SEL_MASK;
  573. value >>= LDO_SEL_SHIFT;
  574. break;
  575. case TPS65911_REG_LDO3:
  576. case TPS65911_REG_LDO5:
  577. case TPS65911_REG_LDO6:
  578. case TPS65911_REG_LDO7:
  579. case TPS65911_REG_LDO8:
  580. value &= LDO3_SEL_MASK;
  581. value >>= LDO_SEL_SHIFT;
  582. break;
  583. case TPS65910_REG_VIO:
  584. value &= LDO_SEL_MASK;
  585. value >>= LDO_SEL_SHIFT;
  586. break;
  587. default:
  588. return -EINVAL;
  589. }
  590. return value;
  591. }
  592. static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
  593. unsigned selector)
  594. {
  595. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  596. int id = rdev_get_id(dev), vsel;
  597. int dcdc_mult = 0;
  598. switch (id) {
  599. case TPS65910_REG_VDD1:
  600. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  601. if (dcdc_mult == 1)
  602. dcdc_mult--;
  603. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  604. tps65910_modify_bits(pmic, TPS65910_VDD1,
  605. (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
  606. VDD1_VGAIN_SEL_MASK);
  607. tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel);
  608. break;
  609. case TPS65910_REG_VDD2:
  610. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  611. if (dcdc_mult == 1)
  612. dcdc_mult--;
  613. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  614. tps65910_modify_bits(pmic, TPS65910_VDD2,
  615. (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
  616. VDD1_VGAIN_SEL_MASK);
  617. tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel);
  618. break;
  619. case TPS65911_REG_VDDCTRL:
  620. vsel = selector + 3;
  621. tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel);
  622. }
  623. return 0;
  624. }
  625. static int tps65910_set_voltage_sel(struct regulator_dev *dev,
  626. unsigned selector)
  627. {
  628. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  629. int reg, id = rdev_get_id(dev);
  630. reg = pmic->get_ctrl_reg(id);
  631. if (reg < 0)
  632. return reg;
  633. switch (id) {
  634. case TPS65910_REG_VIO:
  635. case TPS65910_REG_VDIG1:
  636. case TPS65910_REG_VDIG2:
  637. case TPS65910_REG_VPLL:
  638. case TPS65910_REG_VDAC:
  639. case TPS65910_REG_VAUX1:
  640. case TPS65910_REG_VAUX2:
  641. case TPS65910_REG_VAUX33:
  642. case TPS65910_REG_VMMC:
  643. return tps65910_modify_bits(pmic, reg,
  644. (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
  645. }
  646. return -EINVAL;
  647. }
  648. static int tps65911_set_voltage_sel(struct regulator_dev *dev,
  649. unsigned selector)
  650. {
  651. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  652. int reg, id = rdev_get_id(dev);
  653. reg = pmic->get_ctrl_reg(id);
  654. if (reg < 0)
  655. return reg;
  656. switch (id) {
  657. case TPS65911_REG_LDO1:
  658. case TPS65911_REG_LDO2:
  659. case TPS65911_REG_LDO4:
  660. return tps65910_modify_bits(pmic, reg,
  661. (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK);
  662. case TPS65911_REG_LDO3:
  663. case TPS65911_REG_LDO5:
  664. case TPS65911_REG_LDO6:
  665. case TPS65911_REG_LDO7:
  666. case TPS65911_REG_LDO8:
  667. return tps65910_modify_bits(pmic, reg,
  668. (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK);
  669. case TPS65910_REG_VIO:
  670. return tps65910_modify_bits(pmic, reg,
  671. (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
  672. }
  673. return -EINVAL;
  674. }
  675. static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
  676. unsigned selector)
  677. {
  678. int volt, mult = 1, id = rdev_get_id(dev);
  679. switch (id) {
  680. case TPS65910_REG_VDD1:
  681. case TPS65910_REG_VDD2:
  682. mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  683. volt = VDD1_2_MIN_VOLT +
  684. (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
  685. break;
  686. case TPS65911_REG_VDDCTRL:
  687. volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
  688. break;
  689. default:
  690. BUG();
  691. return -EINVAL;
  692. }
  693. return volt * 100 * mult;
  694. }
  695. static int tps65910_list_voltage(struct regulator_dev *dev,
  696. unsigned selector)
  697. {
  698. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  699. int id = rdev_get_id(dev), voltage;
  700. if (id < TPS65910_REG_VIO || id > TPS65910_REG_VMMC)
  701. return -EINVAL;
  702. if (selector >= pmic->info[id]->n_voltages)
  703. return -EINVAL;
  704. else
  705. voltage = pmic->info[id]->voltage_table[selector] * 1000;
  706. return voltage;
  707. }
  708. static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
  709. {
  710. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  711. int step_mv = 0, id = rdev_get_id(dev);
  712. switch(id) {
  713. case TPS65911_REG_LDO1:
  714. case TPS65911_REG_LDO2:
  715. case TPS65911_REG_LDO4:
  716. /* The first 5 values of the selector correspond to 1V */
  717. if (selector < 5)
  718. selector = 0;
  719. else
  720. selector -= 4;
  721. step_mv = 50;
  722. break;
  723. case TPS65911_REG_LDO3:
  724. case TPS65911_REG_LDO5:
  725. case TPS65911_REG_LDO6:
  726. case TPS65911_REG_LDO7:
  727. case TPS65911_REG_LDO8:
  728. /* The first 3 values of the selector correspond to 1V */
  729. if (selector < 3)
  730. selector = 0;
  731. else
  732. selector -= 2;
  733. step_mv = 100;
  734. break;
  735. case TPS65910_REG_VIO:
  736. return pmic->info[id]->voltage_table[selector] * 1000;
  737. default:
  738. return -EINVAL;
  739. }
  740. return (LDO_MIN_VOLT + selector * step_mv) * 1000;
  741. }
  742. static int tps65910_set_voltage_dcdc_time_sel(struct regulator_dev *dev,
  743. unsigned int old_selector, unsigned int new_selector)
  744. {
  745. int id = rdev_get_id(dev);
  746. int old_volt, new_volt;
  747. old_volt = tps65910_list_voltage_dcdc(dev, old_selector);
  748. if (old_volt < 0)
  749. return old_volt;
  750. new_volt = tps65910_list_voltage_dcdc(dev, new_selector);
  751. if (new_volt < 0)
  752. return new_volt;
  753. /* VDD1 and VDD2 are 12.5mV/us, VDDCTRL is 100mV/20us */
  754. switch (id) {
  755. case TPS65910_REG_VDD1:
  756. case TPS65910_REG_VDD2:
  757. return DIV_ROUND_UP(abs(old_volt - new_volt), 12500);
  758. case TPS65911_REG_VDDCTRL:
  759. return DIV_ROUND_UP(abs(old_volt - new_volt), 5000);
  760. }
  761. return -EINVAL;
  762. }
  763. /* Regulator ops (except VRTC) */
  764. static struct regulator_ops tps65910_ops_dcdc = {
  765. .is_enabled = regulator_is_enabled_regmap,
  766. .enable = regulator_enable_regmap,
  767. .disable = regulator_disable_regmap,
  768. .enable_time = tps65910_enable_time,
  769. .set_mode = tps65910_set_mode,
  770. .get_mode = tps65910_get_mode,
  771. .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
  772. .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
  773. .set_voltage_time_sel = tps65910_set_voltage_dcdc_time_sel,
  774. .list_voltage = tps65910_list_voltage_dcdc,
  775. };
  776. static struct regulator_ops tps65910_ops_vdd3 = {
  777. .is_enabled = regulator_is_enabled_regmap,
  778. .enable = regulator_enable_regmap,
  779. .disable = regulator_disable_regmap,
  780. .enable_time = tps65910_enable_time,
  781. .set_mode = tps65910_set_mode,
  782. .get_mode = tps65910_get_mode,
  783. .get_voltage = tps65910_get_voltage_vdd3,
  784. .list_voltage = tps65910_list_voltage,
  785. };
  786. static struct regulator_ops tps65910_ops = {
  787. .is_enabled = regulator_is_enabled_regmap,
  788. .enable = regulator_enable_regmap,
  789. .disable = regulator_disable_regmap,
  790. .enable_time = tps65910_enable_time,
  791. .set_mode = tps65910_set_mode,
  792. .get_mode = tps65910_get_mode,
  793. .get_voltage_sel = tps65910_get_voltage_sel,
  794. .set_voltage_sel = tps65910_set_voltage_sel,
  795. .list_voltage = tps65910_list_voltage,
  796. };
  797. static struct regulator_ops tps65911_ops = {
  798. .is_enabled = regulator_is_enabled_regmap,
  799. .enable = regulator_enable_regmap,
  800. .disable = regulator_disable_regmap,
  801. .enable_time = tps65910_enable_time,
  802. .set_mode = tps65910_set_mode,
  803. .get_mode = tps65910_get_mode,
  804. .get_voltage_sel = tps65911_get_voltage_sel,
  805. .set_voltage_sel = tps65911_set_voltage_sel,
  806. .list_voltage = tps65911_list_voltage,
  807. };
  808. static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
  809. int id, int ext_sleep_config)
  810. {
  811. struct tps65910 *mfd = pmic->mfd;
  812. u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
  813. u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
  814. int ret;
  815. /*
  816. * Regulator can not be control from multiple external input EN1, EN2
  817. * and EN3 together.
  818. */
  819. if (ext_sleep_config & EXT_SLEEP_CONTROL) {
  820. int en_count;
  821. en_count = ((ext_sleep_config &
  822. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
  823. en_count += ((ext_sleep_config &
  824. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
  825. en_count += ((ext_sleep_config &
  826. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
  827. en_count += ((ext_sleep_config &
  828. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
  829. if (en_count > 1) {
  830. dev_err(mfd->dev,
  831. "External sleep control flag is not proper\n");
  832. return -EINVAL;
  833. }
  834. }
  835. pmic->board_ext_control[id] = ext_sleep_config;
  836. /* External EN1 control */
  837. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
  838. ret = tps65910_set_bits(mfd,
  839. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  840. else
  841. ret = tps65910_clear_bits(mfd,
  842. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  843. if (ret < 0) {
  844. dev_err(mfd->dev,
  845. "Error in configuring external control EN1\n");
  846. return ret;
  847. }
  848. /* External EN2 control */
  849. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
  850. ret = tps65910_set_bits(mfd,
  851. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  852. else
  853. ret = tps65910_clear_bits(mfd,
  854. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  855. if (ret < 0) {
  856. dev_err(mfd->dev,
  857. "Error in configuring external control EN2\n");
  858. return ret;
  859. }
  860. /* External EN3 control for TPS65910 LDO only */
  861. if ((tps65910_chip_id(mfd) == TPS65910) &&
  862. (id >= TPS65910_REG_VDIG1)) {
  863. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
  864. ret = tps65910_set_bits(mfd,
  865. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  866. else
  867. ret = tps65910_clear_bits(mfd,
  868. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  869. if (ret < 0) {
  870. dev_err(mfd->dev,
  871. "Error in configuring external control EN3\n");
  872. return ret;
  873. }
  874. }
  875. /* Return if no external control is selected */
  876. if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
  877. /* Clear all sleep controls */
  878. ret = tps65910_clear_bits(mfd,
  879. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  880. if (!ret)
  881. ret = tps65910_clear_bits(mfd,
  882. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  883. if (ret < 0)
  884. dev_err(mfd->dev,
  885. "Error in configuring SLEEP register\n");
  886. return ret;
  887. }
  888. /*
  889. * For regulator that has separate operational and sleep register make
  890. * sure that operational is used and clear sleep register to turn
  891. * regulator off when external control is inactive
  892. */
  893. if ((id == TPS65910_REG_VDD1) ||
  894. (id == TPS65910_REG_VDD2) ||
  895. ((id == TPS65911_REG_VDDCTRL) &&
  896. (tps65910_chip_id(mfd) == TPS65911))) {
  897. int op_reg_add = pmic->get_ctrl_reg(id) + 1;
  898. int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
  899. int opvsel = tps65910_reg_read(pmic, op_reg_add);
  900. int srvsel = tps65910_reg_read(pmic, sr_reg_add);
  901. if (opvsel & VDD1_OP_CMD_MASK) {
  902. u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
  903. ret = tps65910_reg_write(pmic, op_reg_add, reg_val);
  904. if (ret < 0) {
  905. dev_err(mfd->dev,
  906. "Error in configuring op register\n");
  907. return ret;
  908. }
  909. }
  910. ret = tps65910_reg_write(pmic, sr_reg_add, 0);
  911. if (ret < 0) {
  912. dev_err(mfd->dev, "Error in settting sr register\n");
  913. return ret;
  914. }
  915. }
  916. ret = tps65910_clear_bits(mfd,
  917. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  918. if (!ret) {
  919. if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  920. ret = tps65910_set_bits(mfd,
  921. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  922. else
  923. ret = tps65910_clear_bits(mfd,
  924. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  925. }
  926. if (ret < 0)
  927. dev_err(mfd->dev,
  928. "Error in configuring SLEEP register\n");
  929. return ret;
  930. }
  931. #ifdef CONFIG_OF
  932. static struct of_regulator_match tps65910_matches[] = {
  933. { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
  934. { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
  935. { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
  936. { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
  937. { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
  938. { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
  939. { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
  940. { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
  941. { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
  942. { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
  943. { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
  944. { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
  945. { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
  946. };
  947. static struct of_regulator_match tps65911_matches[] = {
  948. { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
  949. { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
  950. { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
  951. { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
  952. { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
  953. { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
  954. { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
  955. { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
  956. { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
  957. { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
  958. { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
  959. { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
  960. { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
  961. };
  962. static struct tps65910_board *tps65910_parse_dt_reg_data(
  963. struct platform_device *pdev)
  964. {
  965. struct tps65910_board *pmic_plat_data;
  966. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  967. struct device_node *np = pdev->dev.parent->of_node;
  968. struct device_node *regulators;
  969. struct of_regulator_match *matches;
  970. unsigned int prop;
  971. int idx = 0, ret, count;
  972. pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
  973. GFP_KERNEL);
  974. if (!pmic_plat_data) {
  975. dev_err(&pdev->dev, "Failure to alloc pdata for regulators.\n");
  976. return NULL;
  977. }
  978. regulators = of_find_node_by_name(np, "regulators");
  979. switch (tps65910_chip_id(tps65910)) {
  980. case TPS65910:
  981. count = ARRAY_SIZE(tps65910_matches);
  982. matches = tps65910_matches;
  983. break;
  984. case TPS65911:
  985. count = ARRAY_SIZE(tps65911_matches);
  986. matches = tps65911_matches;
  987. break;
  988. default:
  989. pr_err("Invalid tps chip version\n");
  990. return NULL;
  991. }
  992. ret = of_regulator_match(pdev->dev.parent, regulators, matches, count);
  993. if (ret < 0) {
  994. dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
  995. ret);
  996. return NULL;
  997. }
  998. for (idx = 0; idx < count; idx++) {
  999. if (!matches[idx].init_data || !matches[idx].of_node)
  1000. continue;
  1001. pmic_plat_data->tps65910_pmic_init_data[idx] =
  1002. matches[idx].init_data;
  1003. ret = of_property_read_u32(matches[idx].of_node,
  1004. "ti,regulator-ext-sleep-control", &prop);
  1005. if (!ret)
  1006. pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
  1007. }
  1008. return pmic_plat_data;
  1009. }
  1010. #else
  1011. static inline struct tps65910_board *tps65910_parse_dt_reg_data(
  1012. struct platform_device *pdev)
  1013. {
  1014. return 0;
  1015. }
  1016. #endif
  1017. static __devinit int tps65910_probe(struct platform_device *pdev)
  1018. {
  1019. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  1020. struct regulator_config config = { };
  1021. struct tps_info *info;
  1022. struct regulator_init_data *reg_data;
  1023. struct regulator_dev *rdev;
  1024. struct tps65910_reg *pmic;
  1025. struct tps65910_board *pmic_plat_data;
  1026. int i, err;
  1027. pmic_plat_data = dev_get_platdata(tps65910->dev);
  1028. if (!pmic_plat_data && tps65910->dev->of_node)
  1029. pmic_plat_data = tps65910_parse_dt_reg_data(pdev);
  1030. if (!pmic_plat_data)
  1031. return -EINVAL;
  1032. pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
  1033. if (!pmic)
  1034. return -ENOMEM;
  1035. mutex_init(&pmic->mutex);
  1036. pmic->mfd = tps65910;
  1037. platform_set_drvdata(pdev, pmic);
  1038. /* Give control of all register to control port */
  1039. tps65910_set_bits(pmic->mfd, TPS65910_DEVCTRL,
  1040. DEVCTRL_SR_CTL_I2C_SEL_MASK);
  1041. switch(tps65910_chip_id(tps65910)) {
  1042. case TPS65910:
  1043. pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
  1044. pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
  1045. pmic->ext_sleep_control = tps65910_ext_sleep_control;
  1046. info = tps65910_regs;
  1047. break;
  1048. case TPS65911:
  1049. pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
  1050. pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
  1051. pmic->ext_sleep_control = tps65911_ext_sleep_control;
  1052. info = tps65911_regs;
  1053. break;
  1054. default:
  1055. pr_err("Invalid tps chip version\n");
  1056. return -ENODEV;
  1057. }
  1058. pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  1059. sizeof(struct regulator_desc), GFP_KERNEL);
  1060. if (!pmic->desc) {
  1061. dev_err(&pdev->dev, "Memory alloc fails for desc\n");
  1062. return -ENOMEM;
  1063. }
  1064. pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  1065. sizeof(struct tps_info *), GFP_KERNEL);
  1066. if (!pmic->info) {
  1067. dev_err(&pdev->dev, "Memory alloc fails for info\n");
  1068. return -ENOMEM;
  1069. }
  1070. pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  1071. sizeof(struct regulator_dev *), GFP_KERNEL);
  1072. if (!pmic->rdev) {
  1073. dev_err(&pdev->dev, "Memory alloc fails for rdev\n");
  1074. return -ENOMEM;
  1075. }
  1076. for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
  1077. i++, info++) {
  1078. reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
  1079. /* Regulator API handles empty constraints but not NULL
  1080. * constraints */
  1081. if (!reg_data)
  1082. continue;
  1083. /* Register the regulators */
  1084. pmic->info[i] = info;
  1085. pmic->desc[i].name = info->name;
  1086. pmic->desc[i].id = i;
  1087. pmic->desc[i].n_voltages = info->n_voltages;
  1088. if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
  1089. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1090. pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
  1091. VDD1_2_NUM_VOLT_COARSE;
  1092. } else if (i == TPS65910_REG_VDD3) {
  1093. if (tps65910_chip_id(tps65910) == TPS65910)
  1094. pmic->desc[i].ops = &tps65910_ops_vdd3;
  1095. else
  1096. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1097. } else {
  1098. if (tps65910_chip_id(tps65910) == TPS65910)
  1099. pmic->desc[i].ops = &tps65910_ops;
  1100. else
  1101. pmic->desc[i].ops = &tps65911_ops;
  1102. }
  1103. err = tps65910_set_ext_sleep_config(pmic, i,
  1104. pmic_plat_data->regulator_ext_sleep_control[i]);
  1105. /*
  1106. * Failing on regulator for configuring externally control
  1107. * is not a serious issue, just throw warning.
  1108. */
  1109. if (err < 0)
  1110. dev_warn(tps65910->dev,
  1111. "Failed to initialise ext control config\n");
  1112. pmic->desc[i].type = REGULATOR_VOLTAGE;
  1113. pmic->desc[i].owner = THIS_MODULE;
  1114. pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
  1115. pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
  1116. config.dev = tps65910->dev;
  1117. config.init_data = reg_data;
  1118. config.driver_data = pmic;
  1119. config.regmap = tps65910->regmap;
  1120. #ifdef CONFIG_OF
  1121. config.of_node = of_find_node_by_name(tps65910->dev->of_node,
  1122. info->name);
  1123. #endif
  1124. rdev = regulator_register(&pmic->desc[i], &config);
  1125. if (IS_ERR(rdev)) {
  1126. dev_err(tps65910->dev,
  1127. "failed to register %s regulator\n",
  1128. pdev->name);
  1129. err = PTR_ERR(rdev);
  1130. goto err_unregister_regulator;
  1131. }
  1132. /* Save regulator for cleanup */
  1133. pmic->rdev[i] = rdev;
  1134. }
  1135. return 0;
  1136. err_unregister_regulator:
  1137. while (--i >= 0)
  1138. regulator_unregister(pmic->rdev[i]);
  1139. return err;
  1140. }
  1141. static int __devexit tps65910_remove(struct platform_device *pdev)
  1142. {
  1143. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1144. int i;
  1145. for (i = 0; i < pmic->num_regulators; i++)
  1146. regulator_unregister(pmic->rdev[i]);
  1147. return 0;
  1148. }
  1149. static void tps65910_shutdown(struct platform_device *pdev)
  1150. {
  1151. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1152. int i;
  1153. /*
  1154. * Before bootloader jumps to kernel, it makes sure that required
  1155. * external control signals are in desired state so that given rails
  1156. * can be configure accordingly.
  1157. * If rails are configured to be controlled from external control
  1158. * then before shutting down/rebooting the system, the external
  1159. * control configuration need to be remove from the rails so that
  1160. * its output will be available as per register programming even
  1161. * if external controls are removed. This is require when the POR
  1162. * value of the control signals are not in active state and before
  1163. * bootloader initializes it, the system requires the rail output
  1164. * to be active for booting.
  1165. */
  1166. for (i = 0; i < pmic->num_regulators; i++) {
  1167. int err;
  1168. if (!pmic->rdev[i])
  1169. continue;
  1170. err = tps65910_set_ext_sleep_config(pmic, i, 0);
  1171. if (err < 0)
  1172. dev_err(&pdev->dev,
  1173. "Error in clearing external control\n");
  1174. }
  1175. }
  1176. static struct platform_driver tps65910_driver = {
  1177. .driver = {
  1178. .name = "tps65910-pmic",
  1179. .owner = THIS_MODULE,
  1180. },
  1181. .probe = tps65910_probe,
  1182. .remove = __devexit_p(tps65910_remove),
  1183. .shutdown = tps65910_shutdown,
  1184. };
  1185. static int __init tps65910_init(void)
  1186. {
  1187. return platform_driver_register(&tps65910_driver);
  1188. }
  1189. subsys_initcall(tps65910_init);
  1190. static void __exit tps65910_cleanup(void)
  1191. {
  1192. platform_driver_unregister(&tps65910_driver);
  1193. }
  1194. module_exit(tps65910_cleanup);
  1195. MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
  1196. MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
  1197. MODULE_LICENSE("GPL v2");
  1198. MODULE_ALIAS("platform:tps65910-pmic");