mwl8k.c 87 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/spinlock.h>
  15. #include <linux/list.h>
  16. #include <linux/pci.h>
  17. #include <linux/delay.h>
  18. #include <linux/completion.h>
  19. #include <linux/etherdevice.h>
  20. #include <net/mac80211.h>
  21. #include <linux/moduleparam.h>
  22. #include <linux/firmware.h>
  23. #include <linux/workqueue.h>
  24. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  25. #define MWL8K_NAME KBUILD_MODNAME
  26. #define MWL8K_VERSION "0.9.1"
  27. MODULE_DESCRIPTION(MWL8K_DESC);
  28. MODULE_VERSION(MWL8K_VERSION);
  29. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  30. MODULE_LICENSE("GPL");
  31. static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
  32. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
  33. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
  34. { }
  35. };
  36. MODULE_DEVICE_TABLE(pci, mwl8k_table);
  37. /* Register definitions */
  38. #define MWL8K_HIU_GEN_PTR 0x00000c10
  39. #define MWL8K_MODE_STA 0x0000005a
  40. #define MWL8K_MODE_AP 0x000000a5
  41. #define MWL8K_HIU_INT_CODE 0x00000c14
  42. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  43. #define MWL8K_FWAP_READY 0xf1f2f4a5
  44. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  45. #define MWL8K_HIU_SCRATCH 0x00000c40
  46. /* Host->device communications */
  47. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  48. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  49. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  50. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  51. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  52. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  53. #define MWL8K_H2A_INT_RESET (1 << 15)
  54. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  55. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  56. /* Device->host communications */
  57. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  58. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  59. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  60. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  61. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  62. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  63. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  64. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  65. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  66. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  67. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  68. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  69. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  70. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  71. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  72. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  73. MWL8K_A2H_INT_CHNL_SWITCHED | \
  74. MWL8K_A2H_INT_QUEUE_EMPTY | \
  75. MWL8K_A2H_INT_RADAR_DETECT | \
  76. MWL8K_A2H_INT_RADIO_ON | \
  77. MWL8K_A2H_INT_RADIO_OFF | \
  78. MWL8K_A2H_INT_MAC_EVENT | \
  79. MWL8K_A2H_INT_OPC_DONE | \
  80. MWL8K_A2H_INT_RX_READY | \
  81. MWL8K_A2H_INT_TX_DONE)
  82. /* WME stream classes */
  83. #define WME_AC_BE 0 /* best effort */
  84. #define WME_AC_BK 1 /* background */
  85. #define WME_AC_VI 2 /* video */
  86. #define WME_AC_VO 3 /* voice */
  87. #define MWL8K_RX_QUEUES 1
  88. #define MWL8K_TX_QUEUES 4
  89. struct mwl8k_rx_queue {
  90. int rx_desc_count;
  91. /* hw receives here */
  92. int rx_head;
  93. /* refill descs here */
  94. int rx_tail;
  95. struct mwl8k_rx_desc *rx_desc_area;
  96. dma_addr_t rx_desc_dma;
  97. struct sk_buff **rx_skb;
  98. };
  99. struct mwl8k_skb {
  100. /*
  101. * The DMA engine requires a modification to the payload.
  102. * If the skbuff is shared/cloned, it needs to be unshared.
  103. * This method is used to ensure the stack always gets back
  104. * the skbuff it sent for transmission.
  105. */
  106. struct sk_buff *clone;
  107. struct sk_buff *skb;
  108. };
  109. struct mwl8k_tx_queue {
  110. /* hw transmits here */
  111. int tx_head;
  112. /* sw appends here */
  113. int tx_tail;
  114. struct ieee80211_tx_queue_stats tx_stats;
  115. struct mwl8k_tx_desc *tx_desc_area;
  116. dma_addr_t tx_desc_dma;
  117. struct mwl8k_skb *tx_skb;
  118. };
  119. /* Pointers to the firmware data and meta information about it. */
  120. struct mwl8k_firmware {
  121. /* Microcode */
  122. struct firmware *ucode;
  123. /* Boot helper code */
  124. struct firmware *helper;
  125. };
  126. struct mwl8k_priv {
  127. void __iomem *regs;
  128. struct ieee80211_hw *hw;
  129. struct pci_dev *pdev;
  130. u8 name[16];
  131. /* firmware access lock */
  132. spinlock_t fw_lock;
  133. /* firmware files and meta data */
  134. struct mwl8k_firmware fw;
  135. u32 part_num;
  136. /* lock held over TX and TX reap */
  137. spinlock_t tx_lock;
  138. struct ieee80211_vif *vif;
  139. struct ieee80211_channel *current_channel;
  140. /* power management status cookie from firmware */
  141. u32 *cookie;
  142. dma_addr_t cookie_dma;
  143. u16 num_mcaddrs;
  144. u8 hw_rev;
  145. __le32 fw_rev;
  146. /*
  147. * Running count of TX packets in flight, to avoid
  148. * iterating over the transmit rings each time.
  149. */
  150. int pending_tx_pkts;
  151. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  152. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  153. /* PHY parameters */
  154. struct ieee80211_supported_band band;
  155. struct ieee80211_channel channels[14];
  156. struct ieee80211_rate rates[12];
  157. bool radio_on;
  158. bool radio_short_preamble;
  159. /* WMM MODE 1 for enabled; 0 for disabled */
  160. bool wmm_mode;
  161. /* Set if PHY config is in progress */
  162. bool inconfig;
  163. /* XXX need to convert this to handle multiple interfaces */
  164. bool capture_beacon;
  165. u8 capture_bssid[ETH_ALEN];
  166. struct sk_buff *beacon_skb;
  167. /*
  168. * This FJ worker has to be global as it is scheduled from the
  169. * RX handler. At this point we don't know which interface it
  170. * belongs to until the list of bssids waiting to complete join
  171. * is checked.
  172. */
  173. struct work_struct finalize_join_worker;
  174. /* Tasklet to reclaim TX descriptors and buffers after tx */
  175. struct tasklet_struct tx_reclaim_task;
  176. /* Work thread to serialize configuration requests */
  177. struct workqueue_struct *config_wq;
  178. struct completion *hostcmd_wait;
  179. struct completion *tx_wait;
  180. };
  181. /* Per interface specific private data */
  182. struct mwl8k_vif {
  183. /* backpointer to parent config block */
  184. struct mwl8k_priv *priv;
  185. /* BSS config of AP or IBSS from mac80211*/
  186. struct ieee80211_bss_conf bss_info;
  187. /* BSSID of AP or IBSS */
  188. u8 bssid[ETH_ALEN];
  189. u8 mac_addr[ETH_ALEN];
  190. /*
  191. * Subset of supported legacy rates.
  192. * Intersection of AP and STA supported rates.
  193. */
  194. struct ieee80211_rate legacy_rates[12];
  195. /* number of supported legacy rates */
  196. u8 legacy_nrates;
  197. /* Index into station database.Returned by update_sta_db call */
  198. u8 peer_id;
  199. /* Non AMPDU sequence number assigned by driver */
  200. u16 seqno;
  201. };
  202. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  203. static const struct ieee80211_channel mwl8k_channels[] = {
  204. { .center_freq = 2412, .hw_value = 1, },
  205. { .center_freq = 2417, .hw_value = 2, },
  206. { .center_freq = 2422, .hw_value = 3, },
  207. { .center_freq = 2427, .hw_value = 4, },
  208. { .center_freq = 2432, .hw_value = 5, },
  209. { .center_freq = 2437, .hw_value = 6, },
  210. { .center_freq = 2442, .hw_value = 7, },
  211. { .center_freq = 2447, .hw_value = 8, },
  212. { .center_freq = 2452, .hw_value = 9, },
  213. { .center_freq = 2457, .hw_value = 10, },
  214. { .center_freq = 2462, .hw_value = 11, },
  215. };
  216. static const struct ieee80211_rate mwl8k_rates[] = {
  217. { .bitrate = 10, .hw_value = 2, },
  218. { .bitrate = 20, .hw_value = 4, },
  219. { .bitrate = 55, .hw_value = 11, },
  220. { .bitrate = 60, .hw_value = 12, },
  221. { .bitrate = 90, .hw_value = 18, },
  222. { .bitrate = 110, .hw_value = 22, },
  223. { .bitrate = 120, .hw_value = 24, },
  224. { .bitrate = 180, .hw_value = 36, },
  225. { .bitrate = 240, .hw_value = 48, },
  226. { .bitrate = 360, .hw_value = 72, },
  227. { .bitrate = 480, .hw_value = 96, },
  228. { .bitrate = 540, .hw_value = 108, },
  229. };
  230. /* WMM */
  231. #define MWL8K_WMM_ENABLE 1
  232. #define MWL8K_WMM_DISABLE 0
  233. /* Slot time */
  234. /* Short Slot: 9us slot time */
  235. #define MWL8K_SHORT_SLOTTIME 1
  236. /* Long slot: 20us slot time */
  237. #define MWL8K_LONG_SLOTTIME 0
  238. /* Set or get info from Firmware */
  239. #define MWL8K_CMD_SET 0x0001
  240. #define MWL8K_CMD_GET 0x0000
  241. /* Firmware command codes */
  242. #define MWL8K_CMD_CODE_DNLD 0x0001
  243. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  244. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  245. #define MWL8K_CMD_GET_STAT 0x0014
  246. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  247. #define MWL8K_CMD_RF_TX_POWER 0x001e
  248. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  249. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  250. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  251. #define MWL8K_CMD_SET_AID 0x010d
  252. #define MWL8K_CMD_SET_RATE 0x0110
  253. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  254. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  255. #define MWL8K_CMD_SET_SLOT 0x0114
  256. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  257. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  258. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  259. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  260. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  261. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  262. #define MWL8K_CMD_UPDATE_STADB 0x1123
  263. static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
  264. {
  265. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  266. snprintf(buf, bufsize, "%s", #x);\
  267. return buf;\
  268. } while (0)
  269. switch (cmd & ~0x8000) {
  270. MWL8K_CMDNAME(CODE_DNLD);
  271. MWL8K_CMDNAME(GET_HW_SPEC);
  272. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  273. MWL8K_CMDNAME(GET_STAT);
  274. MWL8K_CMDNAME(RADIO_CONTROL);
  275. MWL8K_CMDNAME(RF_TX_POWER);
  276. MWL8K_CMDNAME(SET_PRE_SCAN);
  277. MWL8K_CMDNAME(SET_POST_SCAN);
  278. MWL8K_CMDNAME(SET_RF_CHANNEL);
  279. MWL8K_CMDNAME(SET_AID);
  280. MWL8K_CMDNAME(SET_RATE);
  281. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  282. MWL8K_CMDNAME(RTS_THRESHOLD);
  283. MWL8K_CMDNAME(SET_SLOT);
  284. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  285. MWL8K_CMDNAME(SET_WMM_MODE);
  286. MWL8K_CMDNAME(MIMO_CONFIG);
  287. MWL8K_CMDNAME(USE_FIXED_RATE);
  288. MWL8K_CMDNAME(ENABLE_SNIFFER);
  289. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  290. MWL8K_CMDNAME(UPDATE_STADB);
  291. default:
  292. snprintf(buf, bufsize, "0x%x", cmd);
  293. }
  294. #undef MWL8K_CMDNAME
  295. return buf;
  296. }
  297. /* Hardware and firmware reset */
  298. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  299. {
  300. iowrite32(MWL8K_H2A_INT_RESET,
  301. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  302. iowrite32(MWL8K_H2A_INT_RESET,
  303. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  304. msleep(20);
  305. }
  306. /* Release fw image */
  307. static void mwl8k_release_fw(struct firmware **fw)
  308. {
  309. if (*fw == NULL)
  310. return;
  311. release_firmware(*fw);
  312. *fw = NULL;
  313. }
  314. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  315. {
  316. mwl8k_release_fw(&priv->fw.ucode);
  317. mwl8k_release_fw(&priv->fw.helper);
  318. }
  319. /* Request fw image */
  320. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  321. const char *fname, struct firmware **fw)
  322. {
  323. /* release current image */
  324. if (*fw != NULL)
  325. mwl8k_release_fw(fw);
  326. return request_firmware((const struct firmware **)fw,
  327. fname, &priv->pdev->dev);
  328. }
  329. static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
  330. {
  331. u8 filename[64];
  332. int rc;
  333. priv->part_num = part_num;
  334. snprintf(filename, sizeof(filename),
  335. "mwl8k/helper_%u.fw", priv->part_num);
  336. rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
  337. if (rc) {
  338. printk(KERN_ERR
  339. "%s Error requesting helper firmware file %s\n",
  340. pci_name(priv->pdev), filename);
  341. return rc;
  342. }
  343. snprintf(filename, sizeof(filename),
  344. "mwl8k/fmimage_%u.fw", priv->part_num);
  345. rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
  346. if (rc) {
  347. printk(KERN_ERR "%s Error requesting firmware file %s\n",
  348. pci_name(priv->pdev), filename);
  349. mwl8k_release_fw(&priv->fw.helper);
  350. return rc;
  351. }
  352. return 0;
  353. }
  354. struct mwl8k_cmd_pkt {
  355. __le16 code;
  356. __le16 length;
  357. __le16 seq_num;
  358. __le16 result;
  359. char payload[0];
  360. } __attribute__((packed));
  361. /*
  362. * Firmware loading.
  363. */
  364. static int
  365. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  366. {
  367. void __iomem *regs = priv->regs;
  368. dma_addr_t dma_addr;
  369. int rc;
  370. int loops;
  371. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  372. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  373. return -ENOMEM;
  374. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  375. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  376. iowrite32(MWL8K_H2A_INT_DOORBELL,
  377. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  378. iowrite32(MWL8K_H2A_INT_DUMMY,
  379. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  380. rc = -ETIMEDOUT;
  381. loops = 1000;
  382. do {
  383. u32 int_code;
  384. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  385. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  386. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  387. rc = 0;
  388. break;
  389. }
  390. udelay(1);
  391. } while (--loops);
  392. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  393. /*
  394. * Clear 'command done' interrupt bit.
  395. */
  396. loops = 1000;
  397. do {
  398. u32 status;
  399. status = ioread32(priv->regs +
  400. MWL8K_HIU_A2H_INTERRUPT_STATUS);
  401. if (status & MWL8K_A2H_INT_OPC_DONE) {
  402. iowrite32(~MWL8K_A2H_INT_OPC_DONE,
  403. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  404. ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  405. break;
  406. }
  407. udelay(1);
  408. } while (--loops);
  409. return rc;
  410. }
  411. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  412. const u8 *data, size_t length)
  413. {
  414. struct mwl8k_cmd_pkt *cmd;
  415. int done;
  416. int rc = 0;
  417. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  418. if (cmd == NULL)
  419. return -ENOMEM;
  420. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  421. cmd->seq_num = 0;
  422. cmd->result = 0;
  423. done = 0;
  424. while (length) {
  425. int block_size = length > 256 ? 256 : length;
  426. memcpy(cmd->payload, data + done, block_size);
  427. cmd->length = cpu_to_le16(block_size);
  428. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  429. sizeof(*cmd) + block_size);
  430. if (rc)
  431. break;
  432. done += block_size;
  433. length -= block_size;
  434. }
  435. if (!rc) {
  436. cmd->length = 0;
  437. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  438. }
  439. kfree(cmd);
  440. return rc;
  441. }
  442. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  443. const u8 *data, size_t length)
  444. {
  445. unsigned char *buffer;
  446. int may_continue, rc = 0;
  447. u32 done, prev_block_size;
  448. buffer = kmalloc(1024, GFP_KERNEL);
  449. if (buffer == NULL)
  450. return -ENOMEM;
  451. done = 0;
  452. prev_block_size = 0;
  453. may_continue = 1000;
  454. while (may_continue > 0) {
  455. u32 block_size;
  456. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  457. if (block_size & 1) {
  458. block_size &= ~1;
  459. may_continue--;
  460. } else {
  461. done += prev_block_size;
  462. length -= prev_block_size;
  463. }
  464. if (block_size > 1024 || block_size > length) {
  465. rc = -EOVERFLOW;
  466. break;
  467. }
  468. if (length == 0) {
  469. rc = 0;
  470. break;
  471. }
  472. if (block_size == 0) {
  473. rc = -EPROTO;
  474. may_continue--;
  475. udelay(1);
  476. continue;
  477. }
  478. prev_block_size = block_size;
  479. memcpy(buffer, data + done, block_size);
  480. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  481. if (rc)
  482. break;
  483. }
  484. if (!rc && length != 0)
  485. rc = -EREMOTEIO;
  486. kfree(buffer);
  487. return rc;
  488. }
  489. static int mwl8k_load_firmware(struct mwl8k_priv *priv)
  490. {
  491. int loops, rc;
  492. const u8 *ucode = priv->fw.ucode->data;
  493. size_t ucode_len = priv->fw.ucode->size;
  494. const u8 *helper = priv->fw.helper->data;
  495. size_t helper_len = priv->fw.helper->size;
  496. if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
  497. rc = mwl8k_load_fw_image(priv, helper, helper_len);
  498. if (rc) {
  499. printk(KERN_ERR "%s: unable to load firmware "
  500. "helper image\n", pci_name(priv->pdev));
  501. return rc;
  502. }
  503. msleep(1);
  504. rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
  505. } else {
  506. rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
  507. }
  508. if (rc) {
  509. printk(KERN_ERR "%s: unable to load firmware data\n",
  510. pci_name(priv->pdev));
  511. return rc;
  512. }
  513. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  514. msleep(1);
  515. loops = 200000;
  516. do {
  517. if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
  518. == MWL8K_FWSTA_READY)
  519. break;
  520. udelay(1);
  521. } while (--loops);
  522. return loops ? 0 : -ETIMEDOUT;
  523. }
  524. /*
  525. * Defines shared between transmission and reception.
  526. */
  527. /* HT control fields for firmware */
  528. struct ewc_ht_info {
  529. __le16 control1;
  530. __le16 control2;
  531. __le16 control3;
  532. } __attribute__((packed));
  533. /* Firmware Station database operations */
  534. #define MWL8K_STA_DB_ADD_ENTRY 0
  535. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  536. #define MWL8K_STA_DB_DEL_ENTRY 2
  537. #define MWL8K_STA_DB_FLUSH 3
  538. /* Peer Entry flags - used to define the type of the peer node */
  539. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  540. #define MWL8K_IEEE_LEGACY_DATA_RATES 12
  541. #define MWL8K_MCS_BITMAP_SIZE 16
  542. struct peer_capability_info {
  543. /* Peer type - AP vs. STA. */
  544. __u8 peer_type;
  545. /* Basic 802.11 capabilities from assoc resp. */
  546. __le16 basic_caps;
  547. /* Set if peer supports 802.11n high throughput (HT). */
  548. __u8 ht_support;
  549. /* Valid if HT is supported. */
  550. __le16 ht_caps;
  551. __u8 extended_ht_caps;
  552. struct ewc_ht_info ewc_info;
  553. /* Legacy rate table. Intersection of our rates and peer rates. */
  554. __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
  555. /* HT rate table. Intersection of our rates and peer rates. */
  556. __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
  557. __u8 pad[16];
  558. /* If set, interoperability mode, no proprietary extensions. */
  559. __u8 interop;
  560. __u8 pad2;
  561. __u8 station_id;
  562. __le16 amsdu_enabled;
  563. } __attribute__((packed));
  564. /* Inline functions to manipulate QoS field in data descriptor. */
  565. static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
  566. {
  567. u16 val_mask = 1 << 4;
  568. /* End of Service Period Bit 4 */
  569. return qos | val_mask;
  570. }
  571. static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
  572. {
  573. u16 val_mask = 0x3;
  574. u8 shift = 5;
  575. u16 qos_mask = ~(val_mask << shift);
  576. /* Ack Policy Bit 5-6 */
  577. return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
  578. }
  579. static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
  580. {
  581. u16 val_mask = 1 << 7;
  582. /* AMSDU present Bit 7 */
  583. return qos | val_mask;
  584. }
  585. static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
  586. {
  587. u16 val_mask = 0xff;
  588. u8 shift = 8;
  589. u16 qos_mask = ~(val_mask << shift);
  590. /* Queue Length Bits 8-15 */
  591. return (qos & qos_mask) | ((len & val_mask) << shift);
  592. }
  593. /* DMA header used by firmware and hardware. */
  594. struct mwl8k_dma_data {
  595. __le16 fwlen;
  596. struct ieee80211_hdr wh;
  597. } __attribute__((packed));
  598. /* Routines to add/remove DMA header from skb. */
  599. static inline int mwl8k_remove_dma_header(struct sk_buff *skb)
  600. {
  601. struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)(skb->data);
  602. void *dst, *src = &tr->wh;
  603. __le16 fc = tr->wh.frame_control;
  604. int hdrlen = ieee80211_hdrlen(fc);
  605. u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
  606. dst = (void *)tr + space;
  607. if (dst != src) {
  608. memmove(dst, src, hdrlen);
  609. skb_pull(skb, space);
  610. }
  611. return 0;
  612. }
  613. static inline struct sk_buff *mwl8k_add_dma_header(struct sk_buff *skb)
  614. {
  615. struct ieee80211_hdr *wh;
  616. u32 hdrlen, pktlen;
  617. struct mwl8k_dma_data *tr;
  618. wh = (struct ieee80211_hdr *)skb->data;
  619. hdrlen = ieee80211_hdrlen(wh->frame_control);
  620. pktlen = skb->len;
  621. /*
  622. * Copy up/down the 802.11 header; the firmware requires
  623. * we present a 2-byte payload length followed by a
  624. * 4-address header (w/o QoS), followed (optionally) by
  625. * any WEP/ExtIV header (but only filled in for CCMP).
  626. */
  627. if (hdrlen != sizeof(struct mwl8k_dma_data))
  628. skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
  629. tr = (struct mwl8k_dma_data *)skb->data;
  630. if (wh != &tr->wh)
  631. memmove(&tr->wh, wh, hdrlen);
  632. /* Clear addr4 */
  633. memset(tr->wh.addr4, 0, ETH_ALEN);
  634. /*
  635. * Firmware length is the length of the fully formed "802.11
  636. * payload". That is, everything except for the 802.11 header.
  637. * This includes all crypto material including the MIC.
  638. */
  639. tr->fwlen = cpu_to_le16(pktlen - hdrlen);
  640. return skb;
  641. }
  642. /*
  643. * Packet reception.
  644. */
  645. #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
  646. struct mwl8k_rx_desc {
  647. __le16 pkt_len;
  648. __u8 link_quality;
  649. __u8 noise_level;
  650. __le32 pkt_phys_addr;
  651. __le32 next_rx_desc_phys_addr;
  652. __le16 qos_control;
  653. __le16 rate_info;
  654. __le32 pad0[4];
  655. __u8 rssi;
  656. __u8 channel;
  657. __le16 pad1;
  658. __u8 rx_ctrl;
  659. __u8 rx_status;
  660. __u8 pad2[2];
  661. } __attribute__((packed));
  662. #define MWL8K_RX_DESCS 256
  663. #define MWL8K_RX_MAXSZ 3800
  664. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  665. {
  666. struct mwl8k_priv *priv = hw->priv;
  667. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  668. int size;
  669. int i;
  670. rxq->rx_desc_count = 0;
  671. rxq->rx_head = 0;
  672. rxq->rx_tail = 0;
  673. size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
  674. rxq->rx_desc_area =
  675. pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
  676. if (rxq->rx_desc_area == NULL) {
  677. printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
  678. priv->name);
  679. return -ENOMEM;
  680. }
  681. memset(rxq->rx_desc_area, 0, size);
  682. rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
  683. sizeof(*rxq->rx_skb), GFP_KERNEL);
  684. if (rxq->rx_skb == NULL) {
  685. printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
  686. priv->name);
  687. pci_free_consistent(priv->pdev, size,
  688. rxq->rx_desc_area, rxq->rx_desc_dma);
  689. return -ENOMEM;
  690. }
  691. memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
  692. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  693. struct mwl8k_rx_desc *rx_desc;
  694. int nexti;
  695. rx_desc = rxq->rx_desc_area + i;
  696. nexti = (i + 1) % MWL8K_RX_DESCS;
  697. rx_desc->next_rx_desc_phys_addr =
  698. cpu_to_le32(rxq->rx_desc_dma
  699. + nexti * sizeof(*rx_desc));
  700. rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
  701. }
  702. return 0;
  703. }
  704. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  705. {
  706. struct mwl8k_priv *priv = hw->priv;
  707. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  708. int refilled;
  709. refilled = 0;
  710. while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
  711. struct sk_buff *skb;
  712. int rx;
  713. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  714. if (skb == NULL)
  715. break;
  716. rxq->rx_desc_count++;
  717. rx = rxq->rx_tail;
  718. rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
  719. rxq->rx_desc_area[rx].pkt_phys_addr =
  720. cpu_to_le32(pci_map_single(priv->pdev, skb->data,
  721. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
  722. rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
  723. rxq->rx_skb[rx] = skb;
  724. wmb();
  725. rxq->rx_desc_area[rx].rx_ctrl = 0;
  726. refilled++;
  727. }
  728. return refilled;
  729. }
  730. /* Must be called only when the card's reception is completely halted */
  731. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  732. {
  733. struct mwl8k_priv *priv = hw->priv;
  734. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  735. int i;
  736. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  737. if (rxq->rx_skb[i] != NULL) {
  738. unsigned long addr;
  739. addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
  740. pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
  741. PCI_DMA_FROMDEVICE);
  742. kfree_skb(rxq->rx_skb[i]);
  743. rxq->rx_skb[i] = NULL;
  744. }
  745. }
  746. kfree(rxq->rx_skb);
  747. rxq->rx_skb = NULL;
  748. pci_free_consistent(priv->pdev,
  749. MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
  750. rxq->rx_desc_area, rxq->rx_desc_dma);
  751. rxq->rx_desc_area = NULL;
  752. }
  753. /*
  754. * Scan a list of BSSIDs to process for finalize join.
  755. * Allows for extension to process multiple BSSIDs.
  756. */
  757. static inline int
  758. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  759. {
  760. return priv->capture_beacon &&
  761. ieee80211_is_beacon(wh->frame_control) &&
  762. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  763. }
  764. static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
  765. struct sk_buff *skb)
  766. {
  767. priv->capture_beacon = false;
  768. memset(priv->capture_bssid, 0, ETH_ALEN);
  769. /*
  770. * Use GFP_ATOMIC as rxq_process is called from
  771. * the primary interrupt handler, memory allocation call
  772. * must not sleep.
  773. */
  774. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  775. if (priv->beacon_skb != NULL)
  776. queue_work(priv->config_wq,
  777. &priv->finalize_join_worker);
  778. }
  779. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  780. {
  781. struct mwl8k_priv *priv = hw->priv;
  782. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  783. int processed;
  784. processed = 0;
  785. while (rxq->rx_desc_count && limit--) {
  786. struct mwl8k_rx_desc *rx_desc;
  787. struct sk_buff *skb;
  788. struct ieee80211_rx_status status;
  789. unsigned long addr;
  790. struct ieee80211_hdr *wh;
  791. rx_desc = rxq->rx_desc_area + rxq->rx_head;
  792. if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
  793. break;
  794. rmb();
  795. skb = rxq->rx_skb[rxq->rx_head];
  796. if (skb == NULL)
  797. break;
  798. rxq->rx_skb[rxq->rx_head] = NULL;
  799. rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
  800. rxq->rx_desc_count--;
  801. addr = le32_to_cpu(rx_desc->pkt_phys_addr);
  802. pci_unmap_single(priv->pdev, addr,
  803. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  804. skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
  805. if (mwl8k_remove_dma_header(skb)) {
  806. dev_kfree_skb(skb);
  807. continue;
  808. }
  809. wh = (struct ieee80211_hdr *)skb->data;
  810. /*
  811. * Check for pending join operation. save a copy of
  812. * the beacon and schedule a tasklet to send finalize
  813. * join command to the firmware.
  814. */
  815. if (mwl8k_capture_bssid(priv, wh))
  816. mwl8k_save_beacon(priv, skb);
  817. memset(&status, 0, sizeof(status));
  818. status.mactime = 0;
  819. status.signal = -rx_desc->rssi;
  820. status.noise = -rx_desc->noise_level;
  821. status.qual = rx_desc->link_quality;
  822. status.antenna = 1;
  823. status.rate_idx = 1;
  824. status.flag = 0;
  825. status.band = IEEE80211_BAND_2GHZ;
  826. status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
  827. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  828. ieee80211_rx_irqsafe(hw, skb);
  829. processed++;
  830. }
  831. return processed;
  832. }
  833. /*
  834. * Packet transmission.
  835. */
  836. /* Transmit queue assignment. */
  837. enum {
  838. MWL8K_WME_AC_BK = 0, /* background access */
  839. MWL8K_WME_AC_BE = 1, /* best effort access */
  840. MWL8K_WME_AC_VI = 2, /* video access */
  841. MWL8K_WME_AC_VO = 3, /* voice access */
  842. };
  843. /* Transmit packet ACK policy */
  844. #define MWL8K_TXD_ACK_POLICY_NORMAL 0
  845. #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
  846. #define GET_TXQ(_ac) (\
  847. ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
  848. ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
  849. ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
  850. MWL8K_WME_AC_BE)
  851. #define MWL8K_TXD_STATUS_OK 0x00000001
  852. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  853. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  854. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  855. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  856. struct mwl8k_tx_desc {
  857. __le32 status;
  858. __u8 data_rate;
  859. __u8 tx_priority;
  860. __le16 qos_control;
  861. __le32 pkt_phys_addr;
  862. __le16 pkt_len;
  863. __u8 dest_MAC_addr[ETH_ALEN];
  864. __le32 next_tx_desc_phys_addr;
  865. __le32 reserved;
  866. __le16 rate_info;
  867. __u8 peer_id;
  868. __u8 tx_frag_cnt;
  869. } __attribute__((packed));
  870. #define MWL8K_TX_DESCS 128
  871. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  872. {
  873. struct mwl8k_priv *priv = hw->priv;
  874. struct mwl8k_tx_queue *txq = priv->txq + index;
  875. int size;
  876. int i;
  877. memset(&txq->tx_stats, 0, sizeof(struct ieee80211_tx_queue_stats));
  878. txq->tx_stats.limit = MWL8K_TX_DESCS;
  879. txq->tx_head = 0;
  880. txq->tx_tail = 0;
  881. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  882. txq->tx_desc_area =
  883. pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
  884. if (txq->tx_desc_area == NULL) {
  885. printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
  886. priv->name);
  887. return -ENOMEM;
  888. }
  889. memset(txq->tx_desc_area, 0, size);
  890. txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
  891. GFP_KERNEL);
  892. if (txq->tx_skb == NULL) {
  893. printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
  894. priv->name);
  895. pci_free_consistent(priv->pdev, size,
  896. txq->tx_desc_area, txq->tx_desc_dma);
  897. return -ENOMEM;
  898. }
  899. memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
  900. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  901. struct mwl8k_tx_desc *tx_desc;
  902. int nexti;
  903. tx_desc = txq->tx_desc_area + i;
  904. nexti = (i + 1) % MWL8K_TX_DESCS;
  905. tx_desc->status = 0;
  906. tx_desc->next_tx_desc_phys_addr =
  907. cpu_to_le32(txq->tx_desc_dma +
  908. nexti * sizeof(*tx_desc));
  909. }
  910. return 0;
  911. }
  912. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  913. {
  914. iowrite32(MWL8K_H2A_INT_PPA_READY,
  915. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  916. iowrite32(MWL8K_H2A_INT_DUMMY,
  917. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  918. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  919. }
  920. static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
  921. {
  922. return priv->pending_tx_pkts;
  923. }
  924. struct mwl8k_txq_info {
  925. u32 fw_owned;
  926. u32 drv_owned;
  927. u32 unused;
  928. u32 len;
  929. u32 head;
  930. u32 tail;
  931. };
  932. static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
  933. struct mwl8k_txq_info txinfo[],
  934. u32 num_queues)
  935. {
  936. int count, desc, status;
  937. struct mwl8k_tx_queue *txq;
  938. struct mwl8k_tx_desc *tx_desc;
  939. int ndescs = 0;
  940. memset(txinfo, 0, num_queues * sizeof(struct mwl8k_txq_info));
  941. spin_lock_bh(&priv->tx_lock);
  942. for (count = 0; count < num_queues; count++) {
  943. txq = priv->txq + count;
  944. txinfo[count].len = txq->tx_stats.len;
  945. txinfo[count].head = txq->tx_head;
  946. txinfo[count].tail = txq->tx_tail;
  947. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  948. tx_desc = txq->tx_desc_area + desc;
  949. status = le32_to_cpu(tx_desc->status);
  950. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  951. txinfo[count].fw_owned++;
  952. else
  953. txinfo[count].drv_owned++;
  954. if (tx_desc->pkt_len == 0)
  955. txinfo[count].unused++;
  956. }
  957. }
  958. spin_unlock_bh(&priv->tx_lock);
  959. return ndescs;
  960. }
  961. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
  962. {
  963. struct mwl8k_priv *priv = hw->priv;
  964. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  965. u32 count;
  966. unsigned long timeout;
  967. might_sleep();
  968. if (priv->tx_wait != NULL)
  969. printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
  970. spin_lock_bh(&priv->tx_lock);
  971. count = mwl8k_txq_busy(priv);
  972. if (count) {
  973. priv->tx_wait = &cmd_wait;
  974. if (priv->radio_on)
  975. mwl8k_tx_start(priv);
  976. }
  977. spin_unlock_bh(&priv->tx_lock);
  978. if (count) {
  979. struct mwl8k_txq_info txinfo[4];
  980. int index;
  981. int newcount;
  982. timeout = wait_for_completion_timeout(&cmd_wait,
  983. msecs_to_jiffies(delay_ms));
  984. if (timeout)
  985. return 0;
  986. spin_lock_bh(&priv->tx_lock);
  987. priv->tx_wait = NULL;
  988. newcount = mwl8k_txq_busy(priv);
  989. spin_unlock_bh(&priv->tx_lock);
  990. printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
  991. __func__, __LINE__, delay_ms, count, newcount);
  992. mwl8k_scan_tx_ring(priv, txinfo, 4);
  993. for (index = 0; index < 4; index++)
  994. printk(KERN_ERR
  995. "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
  996. index,
  997. txinfo[index].len,
  998. txinfo[index].head,
  999. txinfo[index].tail,
  1000. txinfo[index].fw_owned,
  1001. txinfo[index].drv_owned,
  1002. txinfo[index].unused);
  1003. return -ETIMEDOUT;
  1004. }
  1005. return 0;
  1006. }
  1007. #define MWL8K_TXD_SUCCESS(status) \
  1008. ((status) & (MWL8K_TXD_STATUS_OK | \
  1009. MWL8K_TXD_STATUS_OK_RETRY | \
  1010. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1011. static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
  1012. {
  1013. struct mwl8k_priv *priv = hw->priv;
  1014. struct mwl8k_tx_queue *txq = priv->txq + index;
  1015. int wake = 0;
  1016. while (txq->tx_stats.len > 0) {
  1017. int tx;
  1018. int rc;
  1019. struct mwl8k_tx_desc *tx_desc;
  1020. unsigned long addr;
  1021. int size;
  1022. struct sk_buff *skb;
  1023. struct ieee80211_tx_info *info;
  1024. u32 status;
  1025. rc = 0;
  1026. tx = txq->tx_head;
  1027. tx_desc = txq->tx_desc_area + tx;
  1028. status = le32_to_cpu(tx_desc->status);
  1029. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1030. if (!force)
  1031. break;
  1032. tx_desc->status &=
  1033. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1034. }
  1035. txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
  1036. BUG_ON(txq->tx_stats.len == 0);
  1037. txq->tx_stats.len--;
  1038. priv->pending_tx_pkts--;
  1039. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1040. size = le16_to_cpu(tx_desc->pkt_len);
  1041. skb = txq->tx_skb[tx].skb;
  1042. txq->tx_skb[tx].skb = NULL;
  1043. BUG_ON(skb == NULL);
  1044. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1045. rc = mwl8k_remove_dma_header(skb);
  1046. /* Mark descriptor as unused */
  1047. tx_desc->pkt_phys_addr = 0;
  1048. tx_desc->pkt_len = 0;
  1049. if (txq->tx_skb[tx].clone) {
  1050. /* Replace with original skb
  1051. * before returning to stack
  1052. * as buffer has been cloned
  1053. */
  1054. dev_kfree_skb(skb);
  1055. skb = txq->tx_skb[tx].clone;
  1056. txq->tx_skb[tx].clone = NULL;
  1057. }
  1058. if (rc) {
  1059. /* Something has gone wrong here.
  1060. * Failed to remove DMA header.
  1061. * Print error message and drop packet.
  1062. */
  1063. printk(KERN_ERR "%s: Error removing DMA header from "
  1064. "tx skb 0x%p.\n", priv->name, skb);
  1065. dev_kfree_skb(skb);
  1066. continue;
  1067. }
  1068. info = IEEE80211_SKB_CB(skb);
  1069. ieee80211_tx_info_clear_status(info);
  1070. if (MWL8K_TXD_SUCCESS(status))
  1071. info->flags |= IEEE80211_TX_STAT_ACK;
  1072. ieee80211_tx_status_irqsafe(hw, skb);
  1073. wake = !priv->inconfig && priv->radio_on;
  1074. }
  1075. if (wake)
  1076. ieee80211_wake_queue(hw, index);
  1077. }
  1078. /* must be called only when the card's transmit is completely halted */
  1079. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1080. {
  1081. struct mwl8k_priv *priv = hw->priv;
  1082. struct mwl8k_tx_queue *txq = priv->txq + index;
  1083. mwl8k_txq_reclaim(hw, index, 1);
  1084. kfree(txq->tx_skb);
  1085. txq->tx_skb = NULL;
  1086. pci_free_consistent(priv->pdev,
  1087. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1088. txq->tx_desc_area, txq->tx_desc_dma);
  1089. txq->tx_desc_area = NULL;
  1090. }
  1091. static int
  1092. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1093. {
  1094. struct mwl8k_priv *priv = hw->priv;
  1095. struct ieee80211_tx_info *tx_info;
  1096. struct ieee80211_hdr *wh;
  1097. struct mwl8k_tx_queue *txq;
  1098. struct mwl8k_tx_desc *tx;
  1099. struct mwl8k_dma_data *tr;
  1100. struct mwl8k_vif *mwl8k_vif;
  1101. struct sk_buff *org_skb = skb;
  1102. dma_addr_t dma;
  1103. u16 qos = 0;
  1104. bool qosframe = false, ampduframe = false;
  1105. bool mcframe = false, eapolframe = false;
  1106. bool amsduframe = false;
  1107. __le16 fc;
  1108. txq = priv->txq + index;
  1109. tx = txq->tx_desc_area + txq->tx_tail;
  1110. BUG_ON(txq->tx_skb[txq->tx_tail].skb != NULL);
  1111. /*
  1112. * Append HW DMA header to start of packet. Drop packet if
  1113. * there is not enough space or a failure to unshare/unclone
  1114. * the skb.
  1115. */
  1116. skb = mwl8k_add_dma_header(skb);
  1117. if (skb == NULL) {
  1118. printk(KERN_DEBUG "%s: failed to prepend HW DMA "
  1119. "header, dropping TX frame.\n", priv->name);
  1120. dev_kfree_skb(org_skb);
  1121. return NETDEV_TX_OK;
  1122. }
  1123. tx_info = IEEE80211_SKB_CB(skb);
  1124. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1125. tr = (struct mwl8k_dma_data *)skb->data;
  1126. wh = &tr->wh;
  1127. fc = wh->frame_control;
  1128. qosframe = ieee80211_is_data_qos(fc);
  1129. mcframe = is_multicast_ether_addr(wh->addr1);
  1130. ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
  1131. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1132. u16 seqno = mwl8k_vif->seqno;
  1133. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1134. wh->seq_ctrl |= cpu_to_le16(seqno << 4);
  1135. mwl8k_vif->seqno = seqno++ % 4096;
  1136. }
  1137. if (qosframe)
  1138. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1139. dma = pci_map_single(priv->pdev, skb->data,
  1140. skb->len, PCI_DMA_TODEVICE);
  1141. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1142. printk(KERN_DEBUG "%s: failed to dma map skb, "
  1143. "dropping TX frame.\n", priv->name);
  1144. if (org_skb != NULL)
  1145. dev_kfree_skb(org_skb);
  1146. if (skb != NULL)
  1147. dev_kfree_skb(skb);
  1148. return NETDEV_TX_OK;
  1149. }
  1150. /* Set desc header, cpu bit order. */
  1151. tx->status = 0;
  1152. tx->data_rate = 0;
  1153. tx->tx_priority = index;
  1154. tx->qos_control = 0;
  1155. tx->rate_info = 0;
  1156. tx->peer_id = mwl8k_vif->peer_id;
  1157. amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
  1158. /* Setup firmware control bit fields for each frame type. */
  1159. if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
  1160. tx->data_rate = 0;
  1161. qos = mwl8k_qos_setbit_eosp(qos);
  1162. /* Set Queue size to unspecified */
  1163. qos = mwl8k_qos_setbit_qlen(qos, 0xff);
  1164. } else if (ieee80211_is_data(fc)) {
  1165. tx->data_rate = 1;
  1166. if (mcframe)
  1167. tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1168. /*
  1169. * Tell firmware to not send EAPOL pkts in an
  1170. * aggregate. Verify against mac80211 tx path. If
  1171. * stack turns off AMPDU for an EAPOL frame this
  1172. * check will be removed.
  1173. */
  1174. if (eapolframe) {
  1175. qos = mwl8k_qos_setbit_ack(qos,
  1176. MWL8K_TXD_ACK_POLICY_NORMAL);
  1177. } else {
  1178. /* Send pkt in an aggregate if AMPDU frame. */
  1179. if (ampduframe)
  1180. qos = mwl8k_qos_setbit_ack(qos,
  1181. MWL8K_TXD_ACK_POLICY_BLOCKACK);
  1182. else
  1183. qos = mwl8k_qos_setbit_ack(qos,
  1184. MWL8K_TXD_ACK_POLICY_NORMAL);
  1185. if (amsduframe)
  1186. qos = mwl8k_qos_setbit_amsdu(qos);
  1187. }
  1188. }
  1189. /* Convert to little endian */
  1190. tx->qos_control = cpu_to_le16(qos);
  1191. tx->status = cpu_to_le32(tx->status);
  1192. tx->pkt_phys_addr = cpu_to_le32(dma);
  1193. tx->pkt_len = cpu_to_le16(skb->len);
  1194. txq->tx_skb[txq->tx_tail].skb = skb;
  1195. txq->tx_skb[txq->tx_tail].clone =
  1196. skb == org_skb ? NULL : org_skb;
  1197. spin_lock_bh(&priv->tx_lock);
  1198. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
  1199. MWL8K_TXD_STATUS_FW_OWNED);
  1200. wmb();
  1201. txq->tx_stats.len++;
  1202. priv->pending_tx_pkts++;
  1203. txq->tx_stats.count++;
  1204. txq->tx_tail++;
  1205. if (txq->tx_tail == MWL8K_TX_DESCS)
  1206. txq->tx_tail = 0;
  1207. if (txq->tx_head == txq->tx_tail)
  1208. ieee80211_stop_queue(hw, index);
  1209. if (priv->inconfig) {
  1210. /*
  1211. * Silently queue packet when we are in the middle of
  1212. * a config cycle. Notify firmware only if we are
  1213. * waiting for TXQs to empty. If a packet is sent
  1214. * before .config() is complete, perhaps it is better
  1215. * to drop the packet, as the channel is being changed
  1216. * and the packet will end up on the wrong channel.
  1217. */
  1218. printk(KERN_ERR "%s(): WARNING TX activity while "
  1219. "in config\n", __func__);
  1220. if (priv->tx_wait != NULL)
  1221. mwl8k_tx_start(priv);
  1222. } else
  1223. mwl8k_tx_start(priv);
  1224. spin_unlock_bh(&priv->tx_lock);
  1225. return NETDEV_TX_OK;
  1226. }
  1227. /*
  1228. * Command processing.
  1229. */
  1230. /* Timeout firmware commands after 2000ms */
  1231. #define MWL8K_CMD_TIMEOUT_MS 2000
  1232. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1233. {
  1234. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1235. struct mwl8k_priv *priv = hw->priv;
  1236. void __iomem *regs = priv->regs;
  1237. dma_addr_t dma_addr;
  1238. unsigned int dma_size;
  1239. int rc;
  1240. unsigned long timeout = 0;
  1241. u8 buf[32];
  1242. cmd->result = 0xFFFF;
  1243. dma_size = le16_to_cpu(cmd->length);
  1244. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1245. PCI_DMA_BIDIRECTIONAL);
  1246. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1247. return -ENOMEM;
  1248. if (priv->hostcmd_wait != NULL)
  1249. printk(KERN_ERR "WARNING host command in progress\n");
  1250. spin_lock_irq(&priv->fw_lock);
  1251. priv->hostcmd_wait = &cmd_wait;
  1252. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1253. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1254. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1255. iowrite32(MWL8K_H2A_INT_DUMMY,
  1256. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1257. spin_unlock_irq(&priv->fw_lock);
  1258. timeout = wait_for_completion_timeout(&cmd_wait,
  1259. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1260. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1261. PCI_DMA_BIDIRECTIONAL);
  1262. if (!timeout) {
  1263. spin_lock_irq(&priv->fw_lock);
  1264. priv->hostcmd_wait = NULL;
  1265. spin_unlock_irq(&priv->fw_lock);
  1266. printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
  1267. priv->name,
  1268. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1269. MWL8K_CMD_TIMEOUT_MS);
  1270. rc = -ETIMEDOUT;
  1271. } else {
  1272. rc = cmd->result ? -EINVAL : 0;
  1273. if (rc)
  1274. printk(KERN_ERR "%s: Command %s error 0x%x\n",
  1275. priv->name,
  1276. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1277. cmd->result);
  1278. }
  1279. return rc;
  1280. }
  1281. /*
  1282. * GET_HW_SPEC.
  1283. */
  1284. struct mwl8k_cmd_get_hw_spec {
  1285. struct mwl8k_cmd_pkt header;
  1286. __u8 hw_rev;
  1287. __u8 host_interface;
  1288. __le16 num_mcaddrs;
  1289. __u8 perm_addr[ETH_ALEN];
  1290. __le16 region_code;
  1291. __le32 fw_rev;
  1292. __le32 ps_cookie;
  1293. __le32 caps;
  1294. __u8 mcs_bitmap[16];
  1295. __le32 rx_queue_ptr;
  1296. __le32 num_tx_queues;
  1297. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1298. __le32 caps2;
  1299. __le32 num_tx_desc_per_queue;
  1300. __le32 total_rx_desc;
  1301. } __attribute__((packed));
  1302. static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
  1303. {
  1304. struct mwl8k_priv *priv = hw->priv;
  1305. struct mwl8k_cmd_get_hw_spec *cmd;
  1306. int rc;
  1307. int i;
  1308. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1309. if (cmd == NULL)
  1310. return -ENOMEM;
  1311. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1312. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1313. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1314. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1315. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
  1316. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1317. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1318. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
  1319. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1320. cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
  1321. rc = mwl8k_post_cmd(hw, &cmd->header);
  1322. if (!rc) {
  1323. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1324. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1325. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1326. priv->hw_rev = cmd->hw_rev;
  1327. }
  1328. kfree(cmd);
  1329. return rc;
  1330. }
  1331. /*
  1332. * CMD_MAC_MULTICAST_ADR.
  1333. */
  1334. struct mwl8k_cmd_mac_multicast_adr {
  1335. struct mwl8k_cmd_pkt header;
  1336. __le16 action;
  1337. __le16 numaddr;
  1338. __u8 addr[0][ETH_ALEN];
  1339. };
  1340. #define MWL8K_ENABLE_RX_MULTICAST 0x000F
  1341. static int mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
  1342. int mc_count,
  1343. struct dev_addr_list *mclist)
  1344. {
  1345. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1346. int index = 0;
  1347. int rc;
  1348. int size = sizeof(*cmd) + mc_count * ETH_ALEN;
  1349. cmd = kzalloc(size, GFP_KERNEL);
  1350. if (cmd == NULL)
  1351. return -ENOMEM;
  1352. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1353. cmd->header.length = cpu_to_le16(size);
  1354. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1355. cmd->numaddr = cpu_to_le16(mc_count);
  1356. while (index < mc_count && mclist) {
  1357. if (mclist->da_addrlen != ETH_ALEN) {
  1358. rc = -EINVAL;
  1359. goto mwl8k_cmd_mac_multicast_adr_exit;
  1360. }
  1361. memcpy(cmd->addr[index++], mclist->da_addr, ETH_ALEN);
  1362. mclist = mclist->next;
  1363. }
  1364. rc = mwl8k_post_cmd(hw, &cmd->header);
  1365. mwl8k_cmd_mac_multicast_adr_exit:
  1366. kfree(cmd);
  1367. return rc;
  1368. }
  1369. /*
  1370. * CMD_802_11_GET_STAT.
  1371. */
  1372. struct mwl8k_cmd_802_11_get_stat {
  1373. struct mwl8k_cmd_pkt header;
  1374. __le16 action;
  1375. __le32 stats[64];
  1376. } __attribute__((packed));
  1377. #define MWL8K_STAT_ACK_FAILURE 9
  1378. #define MWL8K_STAT_RTS_FAILURE 12
  1379. #define MWL8K_STAT_FCS_ERROR 24
  1380. #define MWL8K_STAT_RTS_SUCCESS 11
  1381. static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
  1382. struct ieee80211_low_level_stats *stats)
  1383. {
  1384. struct mwl8k_cmd_802_11_get_stat *cmd;
  1385. int rc;
  1386. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1387. if (cmd == NULL)
  1388. return -ENOMEM;
  1389. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1390. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1391. cmd->action = cpu_to_le16(MWL8K_CMD_GET);
  1392. rc = mwl8k_post_cmd(hw, &cmd->header);
  1393. if (!rc) {
  1394. stats->dot11ACKFailureCount =
  1395. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1396. stats->dot11RTSFailureCount =
  1397. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1398. stats->dot11FCSErrorCount =
  1399. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1400. stats->dot11RTSSuccessCount =
  1401. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1402. }
  1403. kfree(cmd);
  1404. return rc;
  1405. }
  1406. /*
  1407. * CMD_802_11_RADIO_CONTROL.
  1408. */
  1409. struct mwl8k_cmd_802_11_radio_control {
  1410. struct mwl8k_cmd_pkt header;
  1411. __le16 action;
  1412. __le16 control;
  1413. __le16 radio_on;
  1414. } __attribute__((packed));
  1415. static int
  1416. mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  1417. {
  1418. struct mwl8k_priv *priv = hw->priv;
  1419. struct mwl8k_cmd_802_11_radio_control *cmd;
  1420. int rc;
  1421. if (enable == priv->radio_on && !force)
  1422. return 0;
  1423. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1424. if (cmd == NULL)
  1425. return -ENOMEM;
  1426. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1427. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1428. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1429. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  1430. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1431. rc = mwl8k_post_cmd(hw, &cmd->header);
  1432. kfree(cmd);
  1433. if (!rc)
  1434. priv->radio_on = enable;
  1435. return rc;
  1436. }
  1437. static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw *hw)
  1438. {
  1439. return mwl8k_cmd_802_11_radio_control(hw, 0, 0);
  1440. }
  1441. static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw *hw)
  1442. {
  1443. return mwl8k_cmd_802_11_radio_control(hw, 1, 0);
  1444. }
  1445. static int
  1446. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1447. {
  1448. struct mwl8k_priv *priv;
  1449. if (hw == NULL || hw->priv == NULL)
  1450. return -EINVAL;
  1451. priv = hw->priv;
  1452. priv->radio_short_preamble = short_preamble;
  1453. return mwl8k_cmd_802_11_radio_control(hw, 1, 1);
  1454. }
  1455. /*
  1456. * CMD_802_11_RF_TX_POWER.
  1457. */
  1458. #define MWL8K_TX_POWER_LEVEL_TOTAL 8
  1459. struct mwl8k_cmd_802_11_rf_tx_power {
  1460. struct mwl8k_cmd_pkt header;
  1461. __le16 action;
  1462. __le16 support_level;
  1463. __le16 current_level;
  1464. __le16 reserved;
  1465. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1466. } __attribute__((packed));
  1467. static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1468. {
  1469. struct mwl8k_cmd_802_11_rf_tx_power *cmd;
  1470. int rc;
  1471. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1472. if (cmd == NULL)
  1473. return -ENOMEM;
  1474. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1475. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1476. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1477. cmd->support_level = cpu_to_le16(dBm);
  1478. rc = mwl8k_post_cmd(hw, &cmd->header);
  1479. kfree(cmd);
  1480. return rc;
  1481. }
  1482. /*
  1483. * CMD_SET_PRE_SCAN.
  1484. */
  1485. struct mwl8k_cmd_set_pre_scan {
  1486. struct mwl8k_cmd_pkt header;
  1487. } __attribute__((packed));
  1488. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1489. {
  1490. struct mwl8k_cmd_set_pre_scan *cmd;
  1491. int rc;
  1492. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1493. if (cmd == NULL)
  1494. return -ENOMEM;
  1495. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1496. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1497. rc = mwl8k_post_cmd(hw, &cmd->header);
  1498. kfree(cmd);
  1499. return rc;
  1500. }
  1501. /*
  1502. * CMD_SET_POST_SCAN.
  1503. */
  1504. struct mwl8k_cmd_set_post_scan {
  1505. struct mwl8k_cmd_pkt header;
  1506. __le32 isibss;
  1507. __u8 bssid[ETH_ALEN];
  1508. } __attribute__((packed));
  1509. static int
  1510. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 *mac)
  1511. {
  1512. struct mwl8k_cmd_set_post_scan *cmd;
  1513. int rc;
  1514. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1515. if (cmd == NULL)
  1516. return -ENOMEM;
  1517. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1518. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1519. cmd->isibss = 0;
  1520. memcpy(cmd->bssid, mac, ETH_ALEN);
  1521. rc = mwl8k_post_cmd(hw, &cmd->header);
  1522. kfree(cmd);
  1523. return rc;
  1524. }
  1525. /*
  1526. * CMD_SET_RF_CHANNEL.
  1527. */
  1528. struct mwl8k_cmd_set_rf_channel {
  1529. struct mwl8k_cmd_pkt header;
  1530. __le16 action;
  1531. __u8 current_channel;
  1532. __le32 channel_flags;
  1533. } __attribute__((packed));
  1534. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1535. struct ieee80211_channel *channel)
  1536. {
  1537. struct mwl8k_cmd_set_rf_channel *cmd;
  1538. int rc;
  1539. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1540. if (cmd == NULL)
  1541. return -ENOMEM;
  1542. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1543. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1544. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1545. cmd->current_channel = channel->hw_value;
  1546. if (channel->band == IEEE80211_BAND_2GHZ)
  1547. cmd->channel_flags = cpu_to_le32(0x00000081);
  1548. else
  1549. cmd->channel_flags = cpu_to_le32(0x00000000);
  1550. rc = mwl8k_post_cmd(hw, &cmd->header);
  1551. kfree(cmd);
  1552. return rc;
  1553. }
  1554. /*
  1555. * CMD_SET_SLOT.
  1556. */
  1557. struct mwl8k_cmd_set_slot {
  1558. struct mwl8k_cmd_pkt header;
  1559. __le16 action;
  1560. __u8 short_slot;
  1561. } __attribute__((packed));
  1562. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, int slot_time)
  1563. {
  1564. struct mwl8k_cmd_set_slot *cmd;
  1565. int rc;
  1566. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1567. if (cmd == NULL)
  1568. return -ENOMEM;
  1569. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  1570. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1571. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1572. cmd->short_slot = slot_time == MWL8K_SHORT_SLOTTIME ? 1 : 0;
  1573. rc = mwl8k_post_cmd(hw, &cmd->header);
  1574. kfree(cmd);
  1575. return rc;
  1576. }
  1577. /*
  1578. * CMD_MIMO_CONFIG.
  1579. */
  1580. struct mwl8k_cmd_mimo_config {
  1581. struct mwl8k_cmd_pkt header;
  1582. __le32 action;
  1583. __u8 rx_antenna_map;
  1584. __u8 tx_antenna_map;
  1585. } __attribute__((packed));
  1586. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  1587. {
  1588. struct mwl8k_cmd_mimo_config *cmd;
  1589. int rc;
  1590. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1591. if (cmd == NULL)
  1592. return -ENOMEM;
  1593. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  1594. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1595. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  1596. cmd->rx_antenna_map = rx;
  1597. cmd->tx_antenna_map = tx;
  1598. rc = mwl8k_post_cmd(hw, &cmd->header);
  1599. kfree(cmd);
  1600. return rc;
  1601. }
  1602. /*
  1603. * CMD_ENABLE_SNIFFER.
  1604. */
  1605. struct mwl8k_cmd_enable_sniffer {
  1606. struct mwl8k_cmd_pkt header;
  1607. __le32 action;
  1608. } __attribute__((packed));
  1609. static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  1610. {
  1611. struct mwl8k_cmd_enable_sniffer *cmd;
  1612. int rc;
  1613. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1614. if (cmd == NULL)
  1615. return -ENOMEM;
  1616. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  1617. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1618. cmd->action = cpu_to_le32(!!enable);
  1619. rc = mwl8k_post_cmd(hw, &cmd->header);
  1620. kfree(cmd);
  1621. return rc;
  1622. }
  1623. /*
  1624. * CMD_SET_RATEADAPT_MODE.
  1625. */
  1626. struct mwl8k_cmd_set_rate_adapt_mode {
  1627. struct mwl8k_cmd_pkt header;
  1628. __le16 action;
  1629. __le16 mode;
  1630. } __attribute__((packed));
  1631. static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
  1632. {
  1633. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  1634. int rc;
  1635. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1636. if (cmd == NULL)
  1637. return -ENOMEM;
  1638. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  1639. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1640. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1641. cmd->mode = cpu_to_le16(mode);
  1642. rc = mwl8k_post_cmd(hw, &cmd->header);
  1643. kfree(cmd);
  1644. return rc;
  1645. }
  1646. /*
  1647. * CMD_SET_WMM_MODE.
  1648. */
  1649. struct mwl8k_cmd_set_wmm {
  1650. struct mwl8k_cmd_pkt header;
  1651. __le16 action;
  1652. } __attribute__((packed));
  1653. static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
  1654. {
  1655. struct mwl8k_priv *priv = hw->priv;
  1656. struct mwl8k_cmd_set_wmm *cmd;
  1657. int rc;
  1658. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1659. if (cmd == NULL)
  1660. return -ENOMEM;
  1661. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  1662. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1663. cmd->action = enable ? cpu_to_le16(MWL8K_CMD_SET) : 0;
  1664. rc = mwl8k_post_cmd(hw, &cmd->header);
  1665. kfree(cmd);
  1666. if (!rc)
  1667. priv->wmm_mode = enable;
  1668. return rc;
  1669. }
  1670. /*
  1671. * CMD_SET_RTS_THRESHOLD.
  1672. */
  1673. struct mwl8k_cmd_rts_threshold {
  1674. struct mwl8k_cmd_pkt header;
  1675. __le16 action;
  1676. __le16 threshold;
  1677. } __attribute__((packed));
  1678. static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
  1679. u16 action, u16 *threshold)
  1680. {
  1681. struct mwl8k_cmd_rts_threshold *cmd;
  1682. int rc;
  1683. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1684. if (cmd == NULL)
  1685. return -ENOMEM;
  1686. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  1687. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1688. cmd->action = cpu_to_le16(action);
  1689. cmd->threshold = cpu_to_le16(*threshold);
  1690. rc = mwl8k_post_cmd(hw, &cmd->header);
  1691. kfree(cmd);
  1692. return rc;
  1693. }
  1694. /*
  1695. * CMD_SET_EDCA_PARAMS.
  1696. */
  1697. struct mwl8k_cmd_set_edca_params {
  1698. struct mwl8k_cmd_pkt header;
  1699. /* See MWL8K_SET_EDCA_XXX below */
  1700. __le16 action;
  1701. /* TX opportunity in units of 32 us */
  1702. __le16 txop;
  1703. /* Log exponent of max contention period: 0...15*/
  1704. __u8 log_cw_max;
  1705. /* Log exponent of min contention period: 0...15 */
  1706. __u8 log_cw_min;
  1707. /* Adaptive interframe spacing in units of 32us */
  1708. __u8 aifs;
  1709. /* TX queue to configure */
  1710. __u8 txq;
  1711. } __attribute__((packed));
  1712. #define MWL8K_SET_EDCA_CW 0x01
  1713. #define MWL8K_SET_EDCA_TXOP 0x02
  1714. #define MWL8K_SET_EDCA_AIFS 0x04
  1715. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  1716. MWL8K_SET_EDCA_TXOP | \
  1717. MWL8K_SET_EDCA_AIFS)
  1718. static int
  1719. mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  1720. __u16 cw_min, __u16 cw_max,
  1721. __u8 aifs, __u16 txop)
  1722. {
  1723. struct mwl8k_cmd_set_edca_params *cmd;
  1724. int rc;
  1725. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1726. if (cmd == NULL)
  1727. return -ENOMEM;
  1728. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  1729. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1730. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  1731. cmd->txop = cpu_to_le16(txop);
  1732. cmd->log_cw_max = (u8)ilog2(cw_max + 1);
  1733. cmd->log_cw_min = (u8)ilog2(cw_min + 1);
  1734. cmd->aifs = aifs;
  1735. cmd->txq = qnum;
  1736. rc = mwl8k_post_cmd(hw, &cmd->header);
  1737. kfree(cmd);
  1738. return rc;
  1739. }
  1740. /*
  1741. * CMD_FINALIZE_JOIN.
  1742. */
  1743. /* FJ beacon buffer size is compiled into the firmware. */
  1744. #define MWL8K_FJ_BEACON_MAXLEN 128
  1745. struct mwl8k_cmd_finalize_join {
  1746. struct mwl8k_cmd_pkt header;
  1747. __le32 sleep_interval; /* Number of beacon periods to sleep */
  1748. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  1749. } __attribute__((packed));
  1750. static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
  1751. __u16 framelen, __u16 dtim)
  1752. {
  1753. struct mwl8k_cmd_finalize_join *cmd;
  1754. struct ieee80211_mgmt *payload = frame;
  1755. u16 hdrlen;
  1756. u32 payload_len;
  1757. int rc;
  1758. if (frame == NULL)
  1759. return -EINVAL;
  1760. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1761. if (cmd == NULL)
  1762. return -ENOMEM;
  1763. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  1764. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1765. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  1766. hdrlen = ieee80211_hdrlen(payload->frame_control);
  1767. payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
  1768. /* XXX TBD Might just have to abort and return an error */
  1769. if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1770. printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
  1771. "sent to firmware. Sz=%u MAX=%u\n", __func__,
  1772. payload_len, MWL8K_FJ_BEACON_MAXLEN);
  1773. if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1774. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  1775. if (payload && payload_len)
  1776. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  1777. rc = mwl8k_post_cmd(hw, &cmd->header);
  1778. kfree(cmd);
  1779. return rc;
  1780. }
  1781. /*
  1782. * CMD_UPDATE_STADB.
  1783. */
  1784. struct mwl8k_cmd_update_sta_db {
  1785. struct mwl8k_cmd_pkt header;
  1786. /* See STADB_ACTION_TYPE */
  1787. __le32 action;
  1788. /* Peer MAC address */
  1789. __u8 peer_addr[ETH_ALEN];
  1790. __le32 reserved;
  1791. /* Peer info - valid during add/update. */
  1792. struct peer_capability_info peer_info;
  1793. } __attribute__((packed));
  1794. static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
  1795. struct ieee80211_vif *vif, __u32 action)
  1796. {
  1797. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1798. struct ieee80211_bss_conf *info = &mv_vif->bss_info;
  1799. struct mwl8k_cmd_update_sta_db *cmd;
  1800. struct peer_capability_info *peer_info;
  1801. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1802. int rc;
  1803. __u8 count, *rates;
  1804. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1805. if (cmd == NULL)
  1806. return -ENOMEM;
  1807. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  1808. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1809. cmd->action = cpu_to_le32(action);
  1810. peer_info = &cmd->peer_info;
  1811. memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
  1812. switch (action) {
  1813. case MWL8K_STA_DB_ADD_ENTRY:
  1814. case MWL8K_STA_DB_MODIFY_ENTRY:
  1815. /* Build peer_info block */
  1816. peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  1817. peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
  1818. peer_info->interop = 1;
  1819. peer_info->amsdu_enabled = 0;
  1820. rates = peer_info->legacy_rates;
  1821. for (count = 0; count < mv_vif->legacy_nrates; count++)
  1822. rates[count] = bitrates[count].hw_value;
  1823. rc = mwl8k_post_cmd(hw, &cmd->header);
  1824. if (rc == 0)
  1825. mv_vif->peer_id = peer_info->station_id;
  1826. break;
  1827. case MWL8K_STA_DB_DEL_ENTRY:
  1828. case MWL8K_STA_DB_FLUSH:
  1829. default:
  1830. rc = mwl8k_post_cmd(hw, &cmd->header);
  1831. if (rc == 0)
  1832. mv_vif->peer_id = 0;
  1833. break;
  1834. }
  1835. kfree(cmd);
  1836. return rc;
  1837. }
  1838. /*
  1839. * CMD_SET_AID.
  1840. */
  1841. #define MWL8K_RATE_INDEX_MAX_ARRAY 14
  1842. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1843. #define MWL8K_FRAME_PROT_11G 0x07
  1844. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1845. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1846. struct mwl8k_cmd_update_set_aid {
  1847. struct mwl8k_cmd_pkt header;
  1848. __le16 aid;
  1849. /* AP's MAC address (BSSID) */
  1850. __u8 bssid[ETH_ALEN];
  1851. __le16 protection_mode;
  1852. __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
  1853. } __attribute__((packed));
  1854. static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  1855. struct ieee80211_vif *vif)
  1856. {
  1857. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1858. struct ieee80211_bss_conf *info = &mv_vif->bss_info;
  1859. struct mwl8k_cmd_update_set_aid *cmd;
  1860. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1861. int count;
  1862. u16 prot_mode;
  1863. int rc;
  1864. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1865. if (cmd == NULL)
  1866. return -ENOMEM;
  1867. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  1868. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1869. cmd->aid = cpu_to_le16(info->aid);
  1870. memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN);
  1871. if (info->use_cts_prot) {
  1872. prot_mode = MWL8K_FRAME_PROT_11G;
  1873. } else {
  1874. switch (info->ht_operation_mode &
  1875. IEEE80211_HT_OP_MODE_PROTECTION) {
  1876. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  1877. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  1878. break;
  1879. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  1880. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  1881. break;
  1882. default:
  1883. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1884. break;
  1885. }
  1886. }
  1887. cmd->protection_mode = cpu_to_le16(prot_mode);
  1888. for (count = 0; count < mv_vif->legacy_nrates; count++)
  1889. cmd->supp_rates[count] = bitrates[count].hw_value;
  1890. rc = mwl8k_post_cmd(hw, &cmd->header);
  1891. kfree(cmd);
  1892. return rc;
  1893. }
  1894. /*
  1895. * CMD_SET_RATE.
  1896. */
  1897. struct mwl8k_cmd_update_rateset {
  1898. struct mwl8k_cmd_pkt header;
  1899. __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
  1900. /* Bitmap for supported MCS codes. */
  1901. __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
  1902. __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
  1903. } __attribute__((packed));
  1904. static int mwl8k_update_rateset(struct ieee80211_hw *hw,
  1905. struct ieee80211_vif *vif)
  1906. {
  1907. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1908. struct mwl8k_cmd_update_rateset *cmd;
  1909. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1910. int count;
  1911. int rc;
  1912. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1913. if (cmd == NULL)
  1914. return -ENOMEM;
  1915. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  1916. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1917. for (count = 0; count < mv_vif->legacy_nrates; count++)
  1918. cmd->legacy_rates[count] = bitrates[count].hw_value;
  1919. rc = mwl8k_post_cmd(hw, &cmd->header);
  1920. kfree(cmd);
  1921. return rc;
  1922. }
  1923. /*
  1924. * CMD_USE_FIXED_RATE.
  1925. */
  1926. #define MWL8K_RATE_TABLE_SIZE 8
  1927. #define MWL8K_UCAST_RATE 0
  1928. #define MWL8K_USE_AUTO_RATE 0x0002
  1929. struct mwl8k_rate_entry {
  1930. /* Set to 1 if HT rate, 0 if legacy. */
  1931. __le32 is_ht_rate;
  1932. /* Set to 1 to use retry_count field. */
  1933. __le32 enable_retry;
  1934. /* Specified legacy rate or MCS. */
  1935. __le32 rate;
  1936. /* Number of allowed retries. */
  1937. __le32 retry_count;
  1938. } __attribute__((packed));
  1939. struct mwl8k_rate_table {
  1940. /* 1 to allow specified rate and below */
  1941. __le32 allow_rate_drop;
  1942. __le32 num_rates;
  1943. struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
  1944. } __attribute__((packed));
  1945. struct mwl8k_cmd_use_fixed_rate {
  1946. struct mwl8k_cmd_pkt header;
  1947. __le32 action;
  1948. struct mwl8k_rate_table rate_table;
  1949. /* Unicast, Broadcast or Multicast */
  1950. __le32 rate_type;
  1951. __le32 reserved1;
  1952. __le32 reserved2;
  1953. } __attribute__((packed));
  1954. static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
  1955. u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
  1956. {
  1957. struct mwl8k_cmd_use_fixed_rate *cmd;
  1958. int count;
  1959. int rc;
  1960. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1961. if (cmd == NULL)
  1962. return -ENOMEM;
  1963. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  1964. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1965. cmd->action = cpu_to_le32(action);
  1966. cmd->rate_type = cpu_to_le32(rate_type);
  1967. if (rate_table != NULL) {
  1968. /* Copy over each field manually so
  1969. * that bitflipping can be done
  1970. */
  1971. cmd->rate_table.allow_rate_drop =
  1972. cpu_to_le32(rate_table->allow_rate_drop);
  1973. cmd->rate_table.num_rates =
  1974. cpu_to_le32(rate_table->num_rates);
  1975. for (count = 0; count < rate_table->num_rates; count++) {
  1976. struct mwl8k_rate_entry *dst =
  1977. &cmd->rate_table.rate_entry[count];
  1978. struct mwl8k_rate_entry *src =
  1979. &rate_table->rate_entry[count];
  1980. dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
  1981. dst->enable_retry = cpu_to_le32(src->enable_retry);
  1982. dst->rate = cpu_to_le32(src->rate);
  1983. dst->retry_count = cpu_to_le32(src->retry_count);
  1984. }
  1985. }
  1986. rc = mwl8k_post_cmd(hw, &cmd->header);
  1987. kfree(cmd);
  1988. return rc;
  1989. }
  1990. /*
  1991. * Interrupt handling.
  1992. */
  1993. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  1994. {
  1995. struct ieee80211_hw *hw = dev_id;
  1996. struct mwl8k_priv *priv = hw->priv;
  1997. u32 status;
  1998. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  1999. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2000. if (!status)
  2001. return IRQ_NONE;
  2002. if (status & MWL8K_A2H_INT_TX_DONE)
  2003. tasklet_schedule(&priv->tx_reclaim_task);
  2004. if (status & MWL8K_A2H_INT_RX_READY) {
  2005. while (rxq_process(hw, 0, 1))
  2006. rxq_refill(hw, 0, 1);
  2007. }
  2008. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2009. if (priv->hostcmd_wait != NULL) {
  2010. complete(priv->hostcmd_wait);
  2011. priv->hostcmd_wait = NULL;
  2012. }
  2013. }
  2014. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2015. if (!priv->inconfig &&
  2016. priv->radio_on &&
  2017. mwl8k_txq_busy(priv))
  2018. mwl8k_tx_start(priv);
  2019. }
  2020. return IRQ_HANDLED;
  2021. }
  2022. /*
  2023. * Core driver operations.
  2024. */
  2025. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2026. {
  2027. struct mwl8k_priv *priv = hw->priv;
  2028. int index = skb_get_queue_mapping(skb);
  2029. int rc;
  2030. if (priv->current_channel == NULL) {
  2031. printk(KERN_DEBUG "%s: dropped TX frame since radio "
  2032. "disabled\n", priv->name);
  2033. dev_kfree_skb(skb);
  2034. return NETDEV_TX_OK;
  2035. }
  2036. rc = mwl8k_txq_xmit(hw, index, skb);
  2037. return rc;
  2038. }
  2039. struct mwl8k_work_struct {
  2040. /* Initialized by mwl8k_queue_work(). */
  2041. struct work_struct wt;
  2042. /* Required field passed in to mwl8k_queue_work(). */
  2043. struct ieee80211_hw *hw;
  2044. /* Required field passed in to mwl8k_queue_work(). */
  2045. int (*wfunc)(struct work_struct *w);
  2046. /* Initialized by mwl8k_queue_work(). */
  2047. struct completion *cmd_wait;
  2048. /* Result code. */
  2049. int rc;
  2050. /*
  2051. * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
  2052. * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
  2053. */
  2054. u32 options;
  2055. /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
  2056. unsigned long timeout_ms;
  2057. /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
  2058. u32 txwait_attempts;
  2059. /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
  2060. u32 tx_timeout_ms;
  2061. u32 step;
  2062. };
  2063. /* Flags controlling behavior of config queue requests */
  2064. /* Caller spins while waiting for completion. */
  2065. #define MWL8K_WQ_SPIN 0x00000001
  2066. /* Wait for TX queues to empty before proceeding with configuration. */
  2067. #define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
  2068. /* Queue request and return immediately. */
  2069. #define MWL8K_WQ_POST_REQUEST 0x00000004
  2070. /*
  2071. * Caller sleeps and waits for task complete notification.
  2072. * Do not use in atomic context.
  2073. */
  2074. #define MWL8K_WQ_SLEEP 0x00000008
  2075. /* Free work struct when task is done. */
  2076. #define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
  2077. /*
  2078. * Config request is queued and returns to caller imediately. Use
  2079. * this in atomic context. Work struct is freed by mwl8k_queue_work()
  2080. * when this flag is set.
  2081. */
  2082. #define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
  2083. MWL8K_WQ_FREE_WORKSTRUCT)
  2084. /* Default work queue behavior is to sleep and wait for tx completion. */
  2085. #define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
  2086. /*
  2087. * Default config request timeout. Add adjustments to make sure the
  2088. * config thread waits long enough for both tx wait and cmd wait before
  2089. * timing out.
  2090. */
  2091. /* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
  2092. #define MWL8K_TXWAIT_TIMEOUT_MS 1000
  2093. /* Default number of TX wait attempts. */
  2094. #define MWL8K_WQ_TXWAIT_ATTEMPTS 4
  2095. /* Total time to wait for TXQ to drain. */
  2096. #define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
  2097. MWL8K_WQ_TXWAIT_ATTEMPTS)
  2098. /* Scheduling slop. */
  2099. #define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
  2100. #define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
  2101. MWL8K_TXWAIT_MS + \
  2102. MWL8K_OS_SCHEDULE_OVERHEAD_MS)
  2103. static void mwl8k_config_thread(struct work_struct *wt)
  2104. {
  2105. struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
  2106. struct ieee80211_hw *hw = worker->hw;
  2107. struct mwl8k_priv *priv = hw->priv;
  2108. int rc = 0;
  2109. spin_lock_irq(&priv->tx_lock);
  2110. priv->inconfig = true;
  2111. spin_unlock_irq(&priv->tx_lock);
  2112. ieee80211_stop_queues(hw);
  2113. /*
  2114. * Wait for host queues to drain before doing PHY
  2115. * reconfiguration. This avoids interrupting any in-flight
  2116. * DMA transfers to the hardware.
  2117. */
  2118. if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
  2119. u32 timeout;
  2120. u32 time_remaining;
  2121. u32 iter;
  2122. u32 tx_wait_attempts = worker->txwait_attempts;
  2123. time_remaining = worker->tx_timeout_ms;
  2124. if (!tx_wait_attempts)
  2125. tx_wait_attempts = 1;
  2126. timeout = worker->tx_timeout_ms/tx_wait_attempts;
  2127. if (!timeout)
  2128. timeout = 1;
  2129. iter = tx_wait_attempts;
  2130. do {
  2131. int wait_time;
  2132. if (time_remaining > timeout) {
  2133. time_remaining -= timeout;
  2134. wait_time = timeout;
  2135. } else
  2136. wait_time = time_remaining;
  2137. if (!wait_time)
  2138. wait_time = 1;
  2139. rc = mwl8k_tx_wait_empty(hw, wait_time);
  2140. if (rc)
  2141. printk(KERN_ERR "%s() txwait timeout=%ums "
  2142. "Retry:%u/%u\n", __func__, timeout,
  2143. tx_wait_attempts - iter + 1,
  2144. tx_wait_attempts);
  2145. } while (rc && --iter);
  2146. rc = iter ? 0 : -ETIMEDOUT;
  2147. }
  2148. if (!rc)
  2149. rc = worker->wfunc(wt);
  2150. spin_lock_irq(&priv->tx_lock);
  2151. priv->inconfig = false;
  2152. if (priv->pending_tx_pkts && priv->radio_on)
  2153. mwl8k_tx_start(priv);
  2154. spin_unlock_irq(&priv->tx_lock);
  2155. ieee80211_wake_queues(hw);
  2156. worker->rc = rc;
  2157. if (worker->options & MWL8K_WQ_SLEEP)
  2158. complete(worker->cmd_wait);
  2159. if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
  2160. kfree(wt);
  2161. }
  2162. static int mwl8k_queue_work(struct ieee80211_hw *hw,
  2163. struct mwl8k_work_struct *worker,
  2164. struct workqueue_struct *wqueue,
  2165. int (*wfunc)(struct work_struct *w))
  2166. {
  2167. unsigned long timeout = 0;
  2168. int rc = 0;
  2169. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  2170. if (!worker->timeout_ms)
  2171. worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
  2172. if (!worker->options)
  2173. worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
  2174. if (!worker->txwait_attempts)
  2175. worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
  2176. if (!worker->tx_timeout_ms)
  2177. worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
  2178. worker->hw = hw;
  2179. worker->cmd_wait = &cmd_wait;
  2180. worker->rc = 1;
  2181. worker->wfunc = wfunc;
  2182. INIT_WORK(&worker->wt, mwl8k_config_thread);
  2183. queue_work(wqueue, &worker->wt);
  2184. if (worker->options & MWL8K_WQ_POST_REQUEST) {
  2185. rc = 0;
  2186. } else {
  2187. if (worker->options & MWL8K_WQ_SPIN) {
  2188. timeout = worker->timeout_ms;
  2189. while (timeout && (worker->rc > 0)) {
  2190. mdelay(1);
  2191. timeout--;
  2192. }
  2193. } else if (worker->options & MWL8K_WQ_SLEEP)
  2194. timeout = wait_for_completion_timeout(&cmd_wait,
  2195. msecs_to_jiffies(worker->timeout_ms));
  2196. if (timeout)
  2197. rc = worker->rc;
  2198. else {
  2199. cancel_work_sync(&worker->wt);
  2200. rc = -ETIMEDOUT;
  2201. }
  2202. }
  2203. return rc;
  2204. }
  2205. struct mwl8k_start_worker {
  2206. struct mwl8k_work_struct header;
  2207. };
  2208. static int mwl8k_start_wt(struct work_struct *wt)
  2209. {
  2210. struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
  2211. struct ieee80211_hw *hw = worker->header.hw;
  2212. struct mwl8k_priv *priv = hw->priv;
  2213. int rc = 0;
  2214. if (priv->vif != NULL) {
  2215. rc = -EIO;
  2216. goto mwl8k_start_exit;
  2217. }
  2218. /* Turn on radio */
  2219. if (mwl8k_cmd_802_11_radio_enable(hw)) {
  2220. rc = -EIO;
  2221. goto mwl8k_start_exit;
  2222. }
  2223. /* Purge TX/RX HW queues */
  2224. if (mwl8k_cmd_set_pre_scan(hw)) {
  2225. rc = -EIO;
  2226. goto mwl8k_start_exit;
  2227. }
  2228. if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
  2229. rc = -EIO;
  2230. goto mwl8k_start_exit;
  2231. }
  2232. /* Enable firmware rate adaptation */
  2233. if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
  2234. rc = -EIO;
  2235. goto mwl8k_start_exit;
  2236. }
  2237. /* Disable WMM. WMM gets enabled when stack sends WMM parms */
  2238. if (mwl8k_set_wmm(hw, MWL8K_WMM_DISABLE)) {
  2239. rc = -EIO;
  2240. goto mwl8k_start_exit;
  2241. }
  2242. /* Disable sniffer mode */
  2243. if (mwl8k_enable_sniffer(hw, 0))
  2244. rc = -EIO;
  2245. mwl8k_start_exit:
  2246. return rc;
  2247. }
  2248. static int mwl8k_start(struct ieee80211_hw *hw)
  2249. {
  2250. struct mwl8k_start_worker *worker;
  2251. struct mwl8k_priv *priv = hw->priv;
  2252. int rc;
  2253. /* Enable tx reclaim tasklet */
  2254. tasklet_enable(&priv->tx_reclaim_task);
  2255. rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
  2256. IRQF_SHARED, MWL8K_NAME, hw);
  2257. if (rc) {
  2258. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2259. priv->name);
  2260. rc = -EIO;
  2261. goto mwl8k_start_disable_tasklet;
  2262. }
  2263. /* Enable interrupts */
  2264. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2265. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2266. if (worker == NULL) {
  2267. rc = -ENOMEM;
  2268. goto mwl8k_start_disable_irq;
  2269. }
  2270. rc = mwl8k_queue_work(hw, &worker->header,
  2271. priv->config_wq, mwl8k_start_wt);
  2272. kfree(worker);
  2273. if (!rc)
  2274. return rc;
  2275. if (rc == -ETIMEDOUT)
  2276. printk(KERN_ERR "%s() timed out\n", __func__);
  2277. rc = -EIO;
  2278. mwl8k_start_disable_irq:
  2279. spin_lock_irq(&priv->tx_lock);
  2280. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2281. spin_unlock_irq(&priv->tx_lock);
  2282. free_irq(priv->pdev->irq, hw);
  2283. mwl8k_start_disable_tasklet:
  2284. tasklet_disable(&priv->tx_reclaim_task);
  2285. return rc;
  2286. }
  2287. struct mwl8k_stop_worker {
  2288. struct mwl8k_work_struct header;
  2289. };
  2290. static int mwl8k_stop_wt(struct work_struct *wt)
  2291. {
  2292. struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
  2293. struct ieee80211_hw *hw = worker->header.hw;
  2294. return mwl8k_cmd_802_11_radio_disable(hw);
  2295. }
  2296. static void mwl8k_stop(struct ieee80211_hw *hw)
  2297. {
  2298. int rc;
  2299. struct mwl8k_stop_worker *worker;
  2300. struct mwl8k_priv *priv = hw->priv;
  2301. int i;
  2302. if (priv->vif != NULL)
  2303. return;
  2304. ieee80211_stop_queues(hw);
  2305. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2306. if (worker == NULL)
  2307. return;
  2308. rc = mwl8k_queue_work(hw, &worker->header,
  2309. priv->config_wq, mwl8k_stop_wt);
  2310. kfree(worker);
  2311. if (rc == -ETIMEDOUT)
  2312. printk(KERN_ERR "%s() timed out\n", __func__);
  2313. /* Disable interrupts */
  2314. spin_lock_irq(&priv->tx_lock);
  2315. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2316. spin_unlock_irq(&priv->tx_lock);
  2317. free_irq(priv->pdev->irq, hw);
  2318. /* Stop finalize join worker */
  2319. cancel_work_sync(&priv->finalize_join_worker);
  2320. if (priv->beacon_skb != NULL)
  2321. dev_kfree_skb(priv->beacon_skb);
  2322. /* Stop tx reclaim tasklet */
  2323. tasklet_disable(&priv->tx_reclaim_task);
  2324. /* Stop config thread */
  2325. flush_workqueue(priv->config_wq);
  2326. /* Return all skbs to mac80211 */
  2327. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2328. mwl8k_txq_reclaim(hw, i, 1);
  2329. }
  2330. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2331. struct ieee80211_if_init_conf *conf)
  2332. {
  2333. struct mwl8k_priv *priv = hw->priv;
  2334. struct mwl8k_vif *mwl8k_vif;
  2335. /*
  2336. * We only support one active interface at a time.
  2337. */
  2338. if (priv->vif != NULL)
  2339. return -EBUSY;
  2340. /*
  2341. * We only support managed interfaces for now.
  2342. */
  2343. if (conf->type != NL80211_IFTYPE_STATION &&
  2344. conf->type != NL80211_IFTYPE_MONITOR)
  2345. return -EINVAL;
  2346. /* Clean out driver private area */
  2347. mwl8k_vif = MWL8K_VIF(conf->vif);
  2348. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2349. /* Save the mac address */
  2350. memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
  2351. /* Back pointer to parent config block */
  2352. mwl8k_vif->priv = priv;
  2353. /* Setup initial PHY parameters */
  2354. memcpy(mwl8k_vif->legacy_rates,
  2355. priv->rates, sizeof(mwl8k_vif->legacy_rates));
  2356. mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
  2357. /* Set Initial sequence number to zero */
  2358. mwl8k_vif->seqno = 0;
  2359. priv->vif = conf->vif;
  2360. priv->current_channel = NULL;
  2361. return 0;
  2362. }
  2363. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2364. struct ieee80211_if_init_conf *conf)
  2365. {
  2366. struct mwl8k_priv *priv = hw->priv;
  2367. if (priv->vif == NULL)
  2368. return;
  2369. priv->vif = NULL;
  2370. }
  2371. struct mwl8k_config_worker {
  2372. struct mwl8k_work_struct header;
  2373. u32 changed;
  2374. };
  2375. static int mwl8k_config_wt(struct work_struct *wt)
  2376. {
  2377. struct mwl8k_config_worker *worker =
  2378. (struct mwl8k_config_worker *)wt;
  2379. struct ieee80211_hw *hw = worker->header.hw;
  2380. struct ieee80211_conf *conf = &hw->conf;
  2381. struct mwl8k_priv *priv = hw->priv;
  2382. int rc = 0;
  2383. if (mwl8k_cmd_802_11_radio_enable(hw)) {
  2384. rc = -EINVAL;
  2385. goto mwl8k_config_exit;
  2386. }
  2387. priv->current_channel = conf->channel;
  2388. if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
  2389. rc = -EINVAL;
  2390. goto mwl8k_config_exit;
  2391. }
  2392. if (conf->power_level > 18)
  2393. conf->power_level = 18;
  2394. if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
  2395. rc = -EINVAL;
  2396. goto mwl8k_config_exit;
  2397. }
  2398. if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
  2399. rc = -EINVAL;
  2400. mwl8k_config_exit:
  2401. return rc;
  2402. }
  2403. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2404. {
  2405. int rc = 0;
  2406. struct mwl8k_config_worker *worker;
  2407. struct mwl8k_priv *priv = hw->priv;
  2408. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2409. if (worker == NULL)
  2410. return -ENOMEM;
  2411. worker->changed = changed;
  2412. rc = mwl8k_queue_work(hw, &worker->header,
  2413. priv->config_wq, mwl8k_config_wt);
  2414. if (rc == -ETIMEDOUT) {
  2415. printk(KERN_ERR "%s() timed out.\n", __func__);
  2416. rc = -EINVAL;
  2417. }
  2418. kfree(worker);
  2419. /*
  2420. * mac80211 will crash on anything other than -EINVAL on
  2421. * error. Looks like wireless extensions which calls mac80211
  2422. * may be the actual culprit...
  2423. */
  2424. return rc ? -EINVAL : 0;
  2425. }
  2426. struct mwl8k_bss_info_changed_worker {
  2427. struct mwl8k_work_struct header;
  2428. struct ieee80211_vif *vif;
  2429. struct ieee80211_bss_conf *info;
  2430. u32 changed;
  2431. };
  2432. static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
  2433. {
  2434. struct mwl8k_bss_info_changed_worker *worker =
  2435. (struct mwl8k_bss_info_changed_worker *)wt;
  2436. struct ieee80211_hw *hw = worker->header.hw;
  2437. struct ieee80211_vif *vif = worker->vif;
  2438. struct ieee80211_bss_conf *info = worker->info;
  2439. u32 changed;
  2440. int rc;
  2441. struct mwl8k_priv *priv = hw->priv;
  2442. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2443. changed = worker->changed;
  2444. priv->capture_beacon = false;
  2445. if (info->assoc) {
  2446. memcpy(&mwl8k_vif->bss_info, info,
  2447. sizeof(struct ieee80211_bss_conf));
  2448. /* Install rates */
  2449. if (mwl8k_update_rateset(hw, vif))
  2450. goto mwl8k_bss_info_changed_exit;
  2451. /* Turn on rate adaptation */
  2452. if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
  2453. MWL8K_UCAST_RATE, NULL))
  2454. goto mwl8k_bss_info_changed_exit;
  2455. /* Set radio preamble */
  2456. if (mwl8k_set_radio_preamble(hw, info->use_short_preamble))
  2457. goto mwl8k_bss_info_changed_exit;
  2458. /* Set slot time */
  2459. if (mwl8k_cmd_set_slot(hw, info->use_short_slot ?
  2460. MWL8K_SHORT_SLOTTIME : MWL8K_LONG_SLOTTIME))
  2461. goto mwl8k_bss_info_changed_exit;
  2462. /* Update peer rate info */
  2463. if (mwl8k_cmd_update_sta_db(hw, vif,
  2464. MWL8K_STA_DB_MODIFY_ENTRY))
  2465. goto mwl8k_bss_info_changed_exit;
  2466. /* Set AID */
  2467. if (mwl8k_cmd_set_aid(hw, vif))
  2468. goto mwl8k_bss_info_changed_exit;
  2469. /*
  2470. * Finalize the join. Tell rx handler to process
  2471. * next beacon from our BSSID.
  2472. */
  2473. memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN);
  2474. priv->capture_beacon = true;
  2475. } else {
  2476. mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
  2477. memset(&mwl8k_vif->bss_info, 0,
  2478. sizeof(struct ieee80211_bss_conf));
  2479. memset(mwl8k_vif->bssid, 0, ETH_ALEN);
  2480. }
  2481. mwl8k_bss_info_changed_exit:
  2482. rc = 0;
  2483. return rc;
  2484. }
  2485. static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
  2486. struct ieee80211_vif *vif,
  2487. struct ieee80211_bss_conf *info,
  2488. u32 changed)
  2489. {
  2490. struct mwl8k_bss_info_changed_worker *worker;
  2491. struct mwl8k_priv *priv = hw->priv;
  2492. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  2493. int rc;
  2494. if (changed & BSS_CHANGED_BSSID)
  2495. memcpy(mv_vif->bssid, info->bssid, ETH_ALEN);
  2496. if ((changed & BSS_CHANGED_ASSOC) == 0)
  2497. return;
  2498. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2499. if (worker == NULL)
  2500. return;
  2501. worker->vif = vif;
  2502. worker->info = info;
  2503. worker->changed = changed;
  2504. rc = mwl8k_queue_work(hw, &worker->header,
  2505. priv->config_wq,
  2506. mwl8k_bss_info_changed_wt);
  2507. kfree(worker);
  2508. if (rc == -ETIMEDOUT)
  2509. printk(KERN_ERR "%s() timed out\n", __func__);
  2510. }
  2511. struct mwl8k_configure_filter_worker {
  2512. struct mwl8k_work_struct header;
  2513. unsigned int changed_flags;
  2514. unsigned int *total_flags;
  2515. int mc_count;
  2516. struct dev_addr_list *mclist;
  2517. };
  2518. #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
  2519. static int mwl8k_configure_filter_wt(struct work_struct *wt)
  2520. {
  2521. struct mwl8k_configure_filter_worker *worker =
  2522. (struct mwl8k_configure_filter_worker *)wt;
  2523. struct ieee80211_hw *hw = worker->header.hw;
  2524. unsigned int changed_flags = worker->changed_flags;
  2525. unsigned int *total_flags = worker->total_flags;
  2526. int mc_count = worker->mc_count;
  2527. struct dev_addr_list *mclist = worker->mclist;
  2528. struct mwl8k_priv *priv = hw->priv;
  2529. int rc = 0;
  2530. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  2531. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  2532. rc = mwl8k_cmd_set_pre_scan(hw);
  2533. else {
  2534. u8 *bssid;
  2535. bssid = "\x00\x00\x00\x00\x00\x00";
  2536. if (priv->vif != NULL)
  2537. bssid = MWL8K_VIF(priv->vif)->bssid;
  2538. rc = mwl8k_cmd_set_post_scan(hw, bssid);
  2539. }
  2540. }
  2541. if (rc)
  2542. goto mwl8k_configure_filter_exit;
  2543. if (mc_count) {
  2544. if (mc_count > priv->num_mcaddrs)
  2545. mc_count = priv->num_mcaddrs;
  2546. rc = mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
  2547. if (rc)
  2548. printk(KERN_ERR
  2549. "%s()Error setting multicast addresses\n",
  2550. __func__);
  2551. }
  2552. mwl8k_configure_filter_exit:
  2553. return rc;
  2554. }
  2555. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  2556. int mc_count, struct dev_addr_list *mclist)
  2557. {
  2558. struct mwl8k_configure_filter_worker *worker;
  2559. worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
  2560. if (!worker)
  2561. return 0;
  2562. /*
  2563. * XXX: This is _HORRIBLY_ broken!!
  2564. *
  2565. * No locking, the mclist pointer might be invalid as soon as this
  2566. * function returns, something in the list might be invalidated
  2567. * once we get to the worker, etc...
  2568. */
  2569. worker->mc_count = mc_count;
  2570. worker->mclist = mclist;
  2571. return (u64)worker;
  2572. }
  2573. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  2574. unsigned int changed_flags,
  2575. unsigned int *total_flags,
  2576. u64 multicast)
  2577. {
  2578. struct mwl8k_configure_filter_worker *worker = (void *)multicast;
  2579. struct mwl8k_priv *priv = hw->priv;
  2580. /* Clear unsupported feature flags */
  2581. *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
  2582. if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS))
  2583. return;
  2584. if (worker == NULL)
  2585. return;
  2586. worker->header.options = MWL8K_WQ_QUEUE_ONLY | MWL8K_WQ_TX_WAIT_EMPTY;
  2587. worker->changed_flags = changed_flags;
  2588. worker->total_flags = total_flags;
  2589. mwl8k_queue_work(hw, &worker->header, priv->config_wq,
  2590. mwl8k_configure_filter_wt);
  2591. }
  2592. struct mwl8k_set_rts_threshold_worker {
  2593. struct mwl8k_work_struct header;
  2594. u32 value;
  2595. };
  2596. static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
  2597. {
  2598. struct mwl8k_set_rts_threshold_worker *worker =
  2599. (struct mwl8k_set_rts_threshold_worker *)wt;
  2600. struct ieee80211_hw *hw = worker->header.hw;
  2601. u16 threshold = (u16)(worker->value);
  2602. int rc;
  2603. rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
  2604. return rc;
  2605. }
  2606. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  2607. {
  2608. int rc;
  2609. struct mwl8k_set_rts_threshold_worker *worker;
  2610. struct mwl8k_priv *priv = hw->priv;
  2611. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2612. if (worker == NULL)
  2613. return -ENOMEM;
  2614. worker->value = value;
  2615. rc = mwl8k_queue_work(hw, &worker->header,
  2616. priv->config_wq,
  2617. mwl8k_set_rts_threshold_wt);
  2618. kfree(worker);
  2619. if (rc == -ETIMEDOUT) {
  2620. printk(KERN_ERR "%s() timed out\n", __func__);
  2621. rc = -EINVAL;
  2622. }
  2623. return rc;
  2624. }
  2625. struct mwl8k_conf_tx_worker {
  2626. struct mwl8k_work_struct header;
  2627. u16 queue;
  2628. const struct ieee80211_tx_queue_params *params;
  2629. };
  2630. static int mwl8k_conf_tx_wt(struct work_struct *wt)
  2631. {
  2632. struct mwl8k_conf_tx_worker *worker =
  2633. (struct mwl8k_conf_tx_worker *)wt;
  2634. struct ieee80211_hw *hw = worker->header.hw;
  2635. u16 queue = worker->queue;
  2636. const struct ieee80211_tx_queue_params *params = worker->params;
  2637. struct mwl8k_priv *priv = hw->priv;
  2638. int rc = 0;
  2639. if (priv->wmm_mode == MWL8K_WMM_DISABLE)
  2640. if (mwl8k_set_wmm(hw, MWL8K_WMM_ENABLE)) {
  2641. rc = -EINVAL;
  2642. goto mwl8k_conf_tx_exit;
  2643. }
  2644. if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
  2645. params->cw_max, params->aifs, params->txop))
  2646. rc = -EINVAL;
  2647. mwl8k_conf_tx_exit:
  2648. return rc;
  2649. }
  2650. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  2651. const struct ieee80211_tx_queue_params *params)
  2652. {
  2653. int rc;
  2654. struct mwl8k_conf_tx_worker *worker;
  2655. struct mwl8k_priv *priv = hw->priv;
  2656. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2657. if (worker == NULL)
  2658. return -ENOMEM;
  2659. worker->queue = queue;
  2660. worker->params = params;
  2661. rc = mwl8k_queue_work(hw, &worker->header,
  2662. priv->config_wq, mwl8k_conf_tx_wt);
  2663. kfree(worker);
  2664. if (rc == -ETIMEDOUT) {
  2665. printk(KERN_ERR "%s() timed out\n", __func__);
  2666. rc = -EINVAL;
  2667. }
  2668. return rc;
  2669. }
  2670. static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
  2671. struct ieee80211_tx_queue_stats *stats)
  2672. {
  2673. struct mwl8k_priv *priv = hw->priv;
  2674. struct mwl8k_tx_queue *txq;
  2675. int index;
  2676. spin_lock_bh(&priv->tx_lock);
  2677. for (index = 0; index < MWL8K_TX_QUEUES; index++) {
  2678. txq = priv->txq + index;
  2679. memcpy(&stats[index], &txq->tx_stats,
  2680. sizeof(struct ieee80211_tx_queue_stats));
  2681. }
  2682. spin_unlock_bh(&priv->tx_lock);
  2683. return 0;
  2684. }
  2685. struct mwl8k_get_stats_worker {
  2686. struct mwl8k_work_struct header;
  2687. struct ieee80211_low_level_stats *stats;
  2688. };
  2689. static int mwl8k_get_stats_wt(struct work_struct *wt)
  2690. {
  2691. struct mwl8k_get_stats_worker *worker =
  2692. (struct mwl8k_get_stats_worker *)wt;
  2693. return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
  2694. }
  2695. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  2696. struct ieee80211_low_level_stats *stats)
  2697. {
  2698. int rc;
  2699. struct mwl8k_get_stats_worker *worker;
  2700. struct mwl8k_priv *priv = hw->priv;
  2701. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2702. if (worker == NULL)
  2703. return -ENOMEM;
  2704. worker->stats = stats;
  2705. rc = mwl8k_queue_work(hw, &worker->header,
  2706. priv->config_wq, mwl8k_get_stats_wt);
  2707. kfree(worker);
  2708. if (rc == -ETIMEDOUT) {
  2709. printk(KERN_ERR "%s() timed out\n", __func__);
  2710. rc = -EINVAL;
  2711. }
  2712. return rc;
  2713. }
  2714. static const struct ieee80211_ops mwl8k_ops = {
  2715. .tx = mwl8k_tx,
  2716. .start = mwl8k_start,
  2717. .stop = mwl8k_stop,
  2718. .add_interface = mwl8k_add_interface,
  2719. .remove_interface = mwl8k_remove_interface,
  2720. .config = mwl8k_config,
  2721. .bss_info_changed = mwl8k_bss_info_changed,
  2722. .prepare_multicast = mwl8k_prepare_multicast,
  2723. .configure_filter = mwl8k_configure_filter,
  2724. .set_rts_threshold = mwl8k_set_rts_threshold,
  2725. .conf_tx = mwl8k_conf_tx,
  2726. .get_tx_stats = mwl8k_get_tx_stats,
  2727. .get_stats = mwl8k_get_stats,
  2728. };
  2729. static void mwl8k_tx_reclaim_handler(unsigned long data)
  2730. {
  2731. int i;
  2732. struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
  2733. struct mwl8k_priv *priv = hw->priv;
  2734. spin_lock_bh(&priv->tx_lock);
  2735. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2736. mwl8k_txq_reclaim(hw, i, 0);
  2737. if (priv->tx_wait != NULL && mwl8k_txq_busy(priv) == 0) {
  2738. complete(priv->tx_wait);
  2739. priv->tx_wait = NULL;
  2740. }
  2741. spin_unlock_bh(&priv->tx_lock);
  2742. }
  2743. static void mwl8k_finalize_join_worker(struct work_struct *work)
  2744. {
  2745. struct mwl8k_priv *priv =
  2746. container_of(work, struct mwl8k_priv, finalize_join_worker);
  2747. struct sk_buff *skb = priv->beacon_skb;
  2748. u8 dtim = MWL8K_VIF(priv->vif)->bss_info.dtim_period;
  2749. mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
  2750. dev_kfree_skb(skb);
  2751. priv->beacon_skb = NULL;
  2752. }
  2753. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  2754. const struct pci_device_id *id)
  2755. {
  2756. struct ieee80211_hw *hw;
  2757. struct mwl8k_priv *priv;
  2758. int rc;
  2759. int i;
  2760. u8 *fw;
  2761. rc = pci_enable_device(pdev);
  2762. if (rc) {
  2763. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  2764. MWL8K_NAME);
  2765. return rc;
  2766. }
  2767. rc = pci_request_regions(pdev, MWL8K_NAME);
  2768. if (rc) {
  2769. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  2770. MWL8K_NAME);
  2771. return rc;
  2772. }
  2773. pci_set_master(pdev);
  2774. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  2775. if (hw == NULL) {
  2776. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  2777. rc = -ENOMEM;
  2778. goto err_free_reg;
  2779. }
  2780. priv = hw->priv;
  2781. priv->hw = hw;
  2782. priv->pdev = pdev;
  2783. priv->hostcmd_wait = NULL;
  2784. priv->tx_wait = NULL;
  2785. priv->inconfig = false;
  2786. priv->wmm_mode = false;
  2787. priv->pending_tx_pkts = 0;
  2788. strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
  2789. spin_lock_init(&priv->fw_lock);
  2790. SET_IEEE80211_DEV(hw, &pdev->dev);
  2791. pci_set_drvdata(pdev, hw);
  2792. priv->regs = pci_iomap(pdev, 1, 0x10000);
  2793. if (priv->regs == NULL) {
  2794. printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
  2795. goto err_iounmap;
  2796. }
  2797. memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
  2798. priv->band.band = IEEE80211_BAND_2GHZ;
  2799. priv->band.channels = priv->channels;
  2800. priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
  2801. priv->band.bitrates = priv->rates;
  2802. priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
  2803. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
  2804. BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
  2805. memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
  2806. /*
  2807. * Extra headroom is the size of the required DMA header
  2808. * minus the size of the smallest 802.11 frame (CTS frame).
  2809. */
  2810. hw->extra_tx_headroom =
  2811. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  2812. hw->channel_change_time = 10;
  2813. hw->queues = MWL8K_TX_QUEUES;
  2814. hw->wiphy->interface_modes =
  2815. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_MONITOR);
  2816. /* Set rssi and noise values to dBm */
  2817. hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
  2818. hw->vif_data_size = sizeof(struct mwl8k_vif);
  2819. priv->vif = NULL;
  2820. /* Set default radio state and preamble */
  2821. priv->radio_on = 0;
  2822. priv->radio_short_preamble = 0;
  2823. /* Finalize join worker */
  2824. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  2825. /* TX reclaim tasklet */
  2826. tasklet_init(&priv->tx_reclaim_task,
  2827. mwl8k_tx_reclaim_handler, (unsigned long)hw);
  2828. tasklet_disable(&priv->tx_reclaim_task);
  2829. /* Config workthread */
  2830. priv->config_wq = create_singlethread_workqueue("mwl8k_config");
  2831. if (priv->config_wq == NULL)
  2832. goto err_iounmap;
  2833. /* Power management cookie */
  2834. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  2835. if (priv->cookie == NULL)
  2836. goto err_iounmap;
  2837. rc = mwl8k_rxq_init(hw, 0);
  2838. if (rc)
  2839. goto err_iounmap;
  2840. rxq_refill(hw, 0, INT_MAX);
  2841. spin_lock_init(&priv->tx_lock);
  2842. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  2843. rc = mwl8k_txq_init(hw, i);
  2844. if (rc)
  2845. goto err_free_queues;
  2846. }
  2847. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2848. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2849. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  2850. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  2851. rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
  2852. IRQF_SHARED, MWL8K_NAME, hw);
  2853. if (rc) {
  2854. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2855. priv->name);
  2856. goto err_free_queues;
  2857. }
  2858. /* Reset firmware and hardware */
  2859. mwl8k_hw_reset(priv);
  2860. /* Ask userland hotplug daemon for the device firmware */
  2861. rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
  2862. if (rc) {
  2863. printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
  2864. goto err_free_irq;
  2865. }
  2866. /* Load firmware into hardware */
  2867. rc = mwl8k_load_firmware(priv);
  2868. if (rc) {
  2869. printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
  2870. goto err_stop_firmware;
  2871. }
  2872. /* Reclaim memory once firmware is successfully loaded */
  2873. mwl8k_release_firmware(priv);
  2874. /*
  2875. * Temporarily enable interrupts. Initial firmware host
  2876. * commands use interrupts and avoids polling. Disable
  2877. * interrupts when done.
  2878. */
  2879. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2880. /* Get config data, mac addrs etc */
  2881. rc = mwl8k_cmd_get_hw_spec(hw);
  2882. if (rc) {
  2883. printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
  2884. goto err_stop_firmware;
  2885. }
  2886. /* Turn radio off */
  2887. rc = mwl8k_cmd_802_11_radio_disable(hw);
  2888. if (rc) {
  2889. printk(KERN_ERR "%s: Cannot disable\n", priv->name);
  2890. goto err_stop_firmware;
  2891. }
  2892. /* Disable interrupts */
  2893. spin_lock_irq(&priv->tx_lock);
  2894. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2895. spin_unlock_irq(&priv->tx_lock);
  2896. free_irq(priv->pdev->irq, hw);
  2897. rc = ieee80211_register_hw(hw);
  2898. if (rc) {
  2899. printk(KERN_ERR "%s: Cannot register device\n", priv->name);
  2900. goto err_stop_firmware;
  2901. }
  2902. fw = (u8 *)&priv->fw_rev;
  2903. printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
  2904. MWL8K_DESC);
  2905. printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
  2906. priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
  2907. printk(KERN_INFO "%s: MAC Address: %pM\n", priv->name,
  2908. hw->wiphy->perm_addr);
  2909. return 0;
  2910. err_stop_firmware:
  2911. mwl8k_hw_reset(priv);
  2912. mwl8k_release_firmware(priv);
  2913. err_free_irq:
  2914. spin_lock_irq(&priv->tx_lock);
  2915. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2916. spin_unlock_irq(&priv->tx_lock);
  2917. free_irq(priv->pdev->irq, hw);
  2918. err_free_queues:
  2919. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2920. mwl8k_txq_deinit(hw, i);
  2921. mwl8k_rxq_deinit(hw, 0);
  2922. err_iounmap:
  2923. if (priv->cookie != NULL)
  2924. pci_free_consistent(priv->pdev, 4,
  2925. priv->cookie, priv->cookie_dma);
  2926. if (priv->regs != NULL)
  2927. pci_iounmap(pdev, priv->regs);
  2928. if (priv->config_wq != NULL)
  2929. destroy_workqueue(priv->config_wq);
  2930. pci_set_drvdata(pdev, NULL);
  2931. ieee80211_free_hw(hw);
  2932. err_free_reg:
  2933. pci_release_regions(pdev);
  2934. pci_disable_device(pdev);
  2935. return rc;
  2936. }
  2937. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  2938. {
  2939. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  2940. }
  2941. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  2942. {
  2943. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  2944. struct mwl8k_priv *priv;
  2945. int i;
  2946. if (hw == NULL)
  2947. return;
  2948. priv = hw->priv;
  2949. ieee80211_stop_queues(hw);
  2950. ieee80211_unregister_hw(hw);
  2951. /* Remove tx reclaim tasklet */
  2952. tasklet_kill(&priv->tx_reclaim_task);
  2953. /* Stop config thread */
  2954. destroy_workqueue(priv->config_wq);
  2955. /* Stop hardware */
  2956. mwl8k_hw_reset(priv);
  2957. /* Return all skbs to mac80211 */
  2958. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2959. mwl8k_txq_reclaim(hw, i, 1);
  2960. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2961. mwl8k_txq_deinit(hw, i);
  2962. mwl8k_rxq_deinit(hw, 0);
  2963. pci_free_consistent(priv->pdev, 4,
  2964. priv->cookie, priv->cookie_dma);
  2965. pci_iounmap(pdev, priv->regs);
  2966. pci_set_drvdata(pdev, NULL);
  2967. ieee80211_free_hw(hw);
  2968. pci_release_regions(pdev);
  2969. pci_disable_device(pdev);
  2970. }
  2971. static struct pci_driver mwl8k_driver = {
  2972. .name = MWL8K_NAME,
  2973. .id_table = mwl8k_table,
  2974. .probe = mwl8k_probe,
  2975. .remove = __devexit_p(mwl8k_remove),
  2976. .shutdown = __devexit_p(mwl8k_shutdown),
  2977. };
  2978. static int __init mwl8k_init(void)
  2979. {
  2980. return pci_register_driver(&mwl8k_driver);
  2981. }
  2982. static void __exit mwl8k_exit(void)
  2983. {
  2984. pci_unregister_driver(&mwl8k_driver);
  2985. }
  2986. module_init(mwl8k_init);
  2987. module_exit(mwl8k_exit);