board-ap4evb.c 26 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131
  1. /*
  2. * AP4EVB board support
  3. *
  4. * Copyright (C) 2010 Magnus Damm
  5. * Copyright (C) 2008 Yoshihiro Shimoda
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/clk.h>
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/delay.h>
  27. #include <linux/mfd/sh_mobile_sdhi.h>
  28. #include <linux/mfd/tmio.h>
  29. #include <linux/mmc/host.h>
  30. #include <linux/mtd/mtd.h>
  31. #include <linux/mtd/partitions.h>
  32. #include <linux/mtd/physmap.h>
  33. #include <linux/mmc/host.h>
  34. #include <linux/mmc/sh_mmcif.h>
  35. #include <linux/i2c.h>
  36. #include <linux/i2c/tsc2007.h>
  37. #include <linux/io.h>
  38. #include <linux/smsc911x.h>
  39. #include <linux/sh_intc.h>
  40. #include <linux/sh_clk.h>
  41. #include <linux/gpio.h>
  42. #include <linux/input.h>
  43. #include <linux/leds.h>
  44. #include <linux/input/sh_keysc.h>
  45. #include <linux/usb/r8a66597.h>
  46. #include <sound/sh_fsi.h>
  47. #include <video/sh_mobile_hdmi.h>
  48. #include <video/sh_mobile_lcdc.h>
  49. #include <video/sh_mipi_dsi.h>
  50. #include <mach/common.h>
  51. #include <mach/irqs.h>
  52. #include <mach/sh7372.h>
  53. #include <asm/mach-types.h>
  54. #include <asm/mach/arch.h>
  55. #include <asm/mach/map.h>
  56. #include <asm/mach/time.h>
  57. /*
  58. * Address Interface BusWidth note
  59. * ------------------------------------------------------------------
  60. * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
  61. * 0x0800_0000 user area -
  62. * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
  63. * 0x1400_0000 Ether (LAN9220) 16bit
  64. * 0x1600_0000 user area - cannot use with NAND
  65. * 0x1800_0000 user area -
  66. * 0x1A00_0000 -
  67. * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
  68. */
  69. /*
  70. * NOR Flash ROM
  71. *
  72. * SW1 | SW2 | SW7 | NOR Flash ROM
  73. * bit1 | bit1 bit2 | bit1 | Memory allocation
  74. * ------+------------+------+------------------
  75. * OFF | ON OFF | ON | Area 0
  76. * OFF | ON OFF | OFF | Area 4
  77. */
  78. /*
  79. * NAND Flash ROM
  80. *
  81. * SW1 | SW2 | SW7 | NAND Flash ROM
  82. * bit1 | bit1 bit2 | bit2 | Memory allocation
  83. * ------+------------+------+------------------
  84. * OFF | ON OFF | ON | FCE 0
  85. * OFF | ON OFF | OFF | FCE 1
  86. */
  87. /*
  88. * SMSC 9220
  89. *
  90. * SW1 SMSC 9220
  91. * -----------------------
  92. * ON access disable
  93. * OFF access enable
  94. */
  95. /*
  96. * LCD / IRQ / KEYSC / IrDA
  97. *
  98. * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
  99. * LCD = 2nd LCDC (WVGA)
  100. *
  101. * | SW43 |
  102. * SW3 | ON | OFF |
  103. * -------------+-----------------------+---------------+
  104. * ON | KEY / IrDA | LCD |
  105. * OFF | KEY / IrDA / IRQ | IRQ |
  106. *
  107. *
  108. * QHD / WVGA display
  109. *
  110. * You can choice display type on menuconfig.
  111. * Then, check above dip-switch.
  112. */
  113. /*
  114. * USB
  115. *
  116. * J7 : 1-2 MAX3355E VBUS
  117. * 2-3 DC 5.0V
  118. *
  119. * S39: bit2: off
  120. */
  121. /*
  122. * FSI/FSMI
  123. *
  124. * SW41 : ON : SH-Mobile AP4 Audio Mode
  125. * : OFF : Bluetooth Audio Mode
  126. */
  127. /*
  128. * MMC0/SDHI1 (CN7)
  129. *
  130. * J22 : select card voltage
  131. * 1-2 pin : 1.8v
  132. * 2-3 pin : 3.3v
  133. *
  134. * SW1 | SW33
  135. * | bit1 | bit2 | bit3 | bit4
  136. * ------------+------+------+------+-------
  137. * MMC0 OFF | OFF | ON | ON | X
  138. * SDHI1 OFF | ON | X | OFF | ON
  139. *
  140. * voltage lebel
  141. * CN7 : 1.8v
  142. * CN12: 3.3v
  143. */
  144. /* MTD */
  145. static struct mtd_partition nor_flash_partitions[] = {
  146. {
  147. .name = "loader",
  148. .offset = 0x00000000,
  149. .size = 512 * 1024,
  150. },
  151. {
  152. .name = "bootenv",
  153. .offset = MTDPART_OFS_APPEND,
  154. .size = 512 * 1024,
  155. },
  156. {
  157. .name = "kernel_ro",
  158. .offset = MTDPART_OFS_APPEND,
  159. .size = 8 * 1024 * 1024,
  160. .mask_flags = MTD_WRITEABLE,
  161. },
  162. {
  163. .name = "kernel",
  164. .offset = MTDPART_OFS_APPEND,
  165. .size = 8 * 1024 * 1024,
  166. },
  167. {
  168. .name = "data",
  169. .offset = MTDPART_OFS_APPEND,
  170. .size = MTDPART_SIZ_FULL,
  171. },
  172. };
  173. static struct physmap_flash_data nor_flash_data = {
  174. .width = 2,
  175. .parts = nor_flash_partitions,
  176. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  177. };
  178. static struct resource nor_flash_resources[] = {
  179. [0] = {
  180. .start = 0x00000000,
  181. .end = 0x08000000 - 1,
  182. .flags = IORESOURCE_MEM,
  183. }
  184. };
  185. static struct platform_device nor_flash_device = {
  186. .name = "physmap-flash",
  187. .dev = {
  188. .platform_data = &nor_flash_data,
  189. },
  190. .num_resources = ARRAY_SIZE(nor_flash_resources),
  191. .resource = nor_flash_resources,
  192. };
  193. /* SMSC 9220 */
  194. static struct resource smc911x_resources[] = {
  195. {
  196. .start = 0x14000000,
  197. .end = 0x16000000 - 1,
  198. .flags = IORESOURCE_MEM,
  199. }, {
  200. .start = evt2irq(0x02c0) /* IRQ6A */,
  201. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  202. },
  203. };
  204. static struct smsc911x_platform_config smsc911x_info = {
  205. .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
  206. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  207. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  208. };
  209. static struct platform_device smc911x_device = {
  210. .name = "smsc911x",
  211. .id = -1,
  212. .num_resources = ARRAY_SIZE(smc911x_resources),
  213. .resource = smc911x_resources,
  214. .dev = {
  215. .platform_data = &smsc911x_info,
  216. },
  217. };
  218. /*
  219. * The card detect pin of the top SD/MMC slot (CN7) is active low and is
  220. * connected to GPIO A22 of SH7372 (GPIO_PORT41).
  221. */
  222. static int slot_cn7_get_cd(struct platform_device *pdev)
  223. {
  224. if (gpio_is_valid(GPIO_PORT41))
  225. return !gpio_get_value(GPIO_PORT41);
  226. else
  227. return -ENXIO;
  228. }
  229. /* SH_MMCIF */
  230. static struct resource sh_mmcif_resources[] = {
  231. [0] = {
  232. .name = "SH_MMCIF",
  233. .start = 0xE6BD0000,
  234. .end = 0xE6BD00FF,
  235. .flags = IORESOURCE_MEM,
  236. },
  237. [1] = {
  238. /* MMC ERR */
  239. .start = evt2irq(0x1ac0),
  240. .flags = IORESOURCE_IRQ,
  241. },
  242. [2] = {
  243. /* MMC NOR */
  244. .start = evt2irq(0x1ae0),
  245. .flags = IORESOURCE_IRQ,
  246. },
  247. };
  248. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  249. .sup_pclk = 0,
  250. .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  251. .caps = MMC_CAP_4_BIT_DATA |
  252. MMC_CAP_8_BIT_DATA |
  253. MMC_CAP_NEEDS_POLL,
  254. .get_cd = slot_cn7_get_cd,
  255. };
  256. static struct platform_device sh_mmcif_device = {
  257. .name = "sh_mmcif",
  258. .id = 0,
  259. .dev = {
  260. .dma_mask = NULL,
  261. .coherent_dma_mask = 0xffffffff,
  262. .platform_data = &sh_mmcif_plat,
  263. },
  264. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  265. .resource = sh_mmcif_resources,
  266. };
  267. /* SDHI0 */
  268. static struct sh_mobile_sdhi_info sdhi0_info = {
  269. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  270. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  271. };
  272. static struct resource sdhi0_resources[] = {
  273. [0] = {
  274. .name = "SDHI0",
  275. .start = 0xe6850000,
  276. .end = 0xe68501ff,
  277. .flags = IORESOURCE_MEM,
  278. },
  279. [1] = {
  280. .start = evt2irq(0x0e00) /* SDHI0 */,
  281. .flags = IORESOURCE_IRQ,
  282. },
  283. };
  284. static struct platform_device sdhi0_device = {
  285. .name = "sh_mobile_sdhi",
  286. .num_resources = ARRAY_SIZE(sdhi0_resources),
  287. .resource = sdhi0_resources,
  288. .id = 0,
  289. .dev = {
  290. .platform_data = &sdhi0_info,
  291. },
  292. };
  293. /* SDHI1 */
  294. static struct sh_mobile_sdhi_info sdhi1_info = {
  295. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  296. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  297. .tmio_ocr_mask = MMC_VDD_165_195,
  298. .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
  299. .tmio_caps = MMC_CAP_NEEDS_POLL,
  300. .get_cd = slot_cn7_get_cd,
  301. };
  302. static struct resource sdhi1_resources[] = {
  303. [0] = {
  304. .name = "SDHI1",
  305. .start = 0xe6860000,
  306. .end = 0xe68601ff,
  307. .flags = IORESOURCE_MEM,
  308. },
  309. [1] = {
  310. .start = evt2irq(0x0e80),
  311. .flags = IORESOURCE_IRQ,
  312. },
  313. };
  314. static struct platform_device sdhi1_device = {
  315. .name = "sh_mobile_sdhi",
  316. .num_resources = ARRAY_SIZE(sdhi1_resources),
  317. .resource = sdhi1_resources,
  318. .id = 1,
  319. .dev = {
  320. .platform_data = &sdhi1_info,
  321. },
  322. };
  323. /* USB1 */
  324. static void usb1_host_port_power(int port, int power)
  325. {
  326. if (!power) /* only power-on supported for now */
  327. return;
  328. /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
  329. __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
  330. }
  331. static struct r8a66597_platdata usb1_host_data = {
  332. .on_chip = 1,
  333. .port_power = usb1_host_port_power,
  334. };
  335. static struct resource usb1_host_resources[] = {
  336. [0] = {
  337. .name = "USBHS",
  338. .start = 0xE68B0000,
  339. .end = 0xE68B00E6 - 1,
  340. .flags = IORESOURCE_MEM,
  341. },
  342. [1] = {
  343. .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
  344. .flags = IORESOURCE_IRQ,
  345. },
  346. };
  347. static struct platform_device usb1_host_device = {
  348. .name = "r8a66597_hcd",
  349. .id = 1,
  350. .dev = {
  351. .dma_mask = NULL, /* not use dma */
  352. .coherent_dma_mask = 0xffffffff,
  353. .platform_data = &usb1_host_data,
  354. },
  355. .num_resources = ARRAY_SIZE(usb1_host_resources),
  356. .resource = usb1_host_resources,
  357. };
  358. static struct sh_mobile_lcdc_info lcdc_info = {
  359. .ch[0] = {
  360. .chan = LCDC_CHAN_MAINLCD,
  361. .bpp = 16,
  362. }
  363. };
  364. static struct resource lcdc_resources[] = {
  365. [0] = {
  366. .name = "LCDC",
  367. .start = 0xfe940000, /* P4-only space */
  368. .end = 0xfe943fff,
  369. .flags = IORESOURCE_MEM,
  370. },
  371. [1] = {
  372. .start = intcs_evt2irq(0x580),
  373. .flags = IORESOURCE_IRQ,
  374. },
  375. };
  376. static struct platform_device lcdc_device = {
  377. .name = "sh_mobile_lcdc_fb",
  378. .num_resources = ARRAY_SIZE(lcdc_resources),
  379. .resource = lcdc_resources,
  380. .dev = {
  381. .platform_data = &lcdc_info,
  382. .coherent_dma_mask = ~0,
  383. },
  384. };
  385. /*
  386. * QHD display
  387. */
  388. #ifdef CONFIG_AP4EVB_QHD
  389. /* KEYSC (Needs SW43 set to ON) */
  390. static struct sh_keysc_info keysc_info = {
  391. .mode = SH_KEYSC_MODE_1,
  392. .scan_timing = 3,
  393. .delay = 2500,
  394. .keycodes = {
  395. KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
  396. KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
  397. KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
  398. KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
  399. KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
  400. },
  401. };
  402. static struct resource keysc_resources[] = {
  403. [0] = {
  404. .name = "KEYSC",
  405. .start = 0xe61b0000,
  406. .end = 0xe61b0063,
  407. .flags = IORESOURCE_MEM,
  408. },
  409. [1] = {
  410. .start = evt2irq(0x0be0), /* KEYSC_KEY */
  411. .flags = IORESOURCE_IRQ,
  412. },
  413. };
  414. static struct platform_device keysc_device = {
  415. .name = "sh_keysc",
  416. .id = 0, /* "keysc0" clock */
  417. .num_resources = ARRAY_SIZE(keysc_resources),
  418. .resource = keysc_resources,
  419. .dev = {
  420. .platform_data = &keysc_info,
  421. },
  422. };
  423. /* MIPI-DSI */
  424. static struct resource mipidsi0_resources[] = {
  425. [0] = {
  426. .start = 0xffc60000,
  427. .end = 0xffc68fff,
  428. .flags = IORESOURCE_MEM,
  429. },
  430. };
  431. static struct sh_mipi_dsi_info mipidsi0_info = {
  432. .data_format = MIPI_RGB888,
  433. .lcd_chan = &lcdc_info.ch[0],
  434. };
  435. static struct platform_device mipidsi0_device = {
  436. .name = "sh-mipi-dsi",
  437. .num_resources = ARRAY_SIZE(mipidsi0_resources),
  438. .resource = mipidsi0_resources,
  439. .id = 0,
  440. .dev = {
  441. .platform_data = &mipidsi0_info,
  442. },
  443. };
  444. /* This function will disappear when we switch to (runtime) PM */
  445. static int __init ap4evb_init_display_clk(void)
  446. {
  447. struct clk *lcdc_clk;
  448. struct clk *dsitx_clk;
  449. int ret;
  450. lcdc_clk = clk_get(&lcdc_device.dev, "sh_mobile_lcdc_fb.0");
  451. if (IS_ERR(lcdc_clk))
  452. return PTR_ERR(lcdc_clk);
  453. dsitx_clk = clk_get(&mipidsi0_device.dev, "sh-mipi-dsi.0");
  454. if (IS_ERR(dsitx_clk)) {
  455. ret = PTR_ERR(dsitx_clk);
  456. goto eclkdsitxget;
  457. }
  458. ret = clk_enable(lcdc_clk);
  459. if (ret < 0)
  460. goto eclklcdcon;
  461. ret = clk_enable(dsitx_clk);
  462. if (ret < 0)
  463. goto eclkdsitxon;
  464. return 0;
  465. eclkdsitxon:
  466. clk_disable(lcdc_clk);
  467. eclklcdcon:
  468. clk_put(dsitx_clk);
  469. eclkdsitxget:
  470. clk_put(lcdc_clk);
  471. return ret;
  472. }
  473. device_initcall(ap4evb_init_display_clk);
  474. static struct platform_device *qhd_devices[] __initdata = {
  475. &mipidsi0_device,
  476. &keysc_device,
  477. };
  478. #endif /* CONFIG_AP4EVB_QHD */
  479. /* FSI */
  480. #define IRQ_FSI evt2irq(0x1840)
  481. #define FSIACKCR 0xE6150018
  482. static void fsiackcr_init(struct clk *clk)
  483. {
  484. u32 status = __raw_readl(clk->enable_reg);
  485. /* use external clock */
  486. status &= ~0x000000ff;
  487. status |= 0x00000080;
  488. __raw_writel(status, clk->enable_reg);
  489. }
  490. static struct clk_ops fsiackcr_clk_ops = {
  491. .init = fsiackcr_init,
  492. };
  493. static struct clk fsiackcr_clk = {
  494. .ops = &fsiackcr_clk_ops,
  495. .enable_reg = (void __iomem *)FSIACKCR,
  496. .rate = 0, /* unknown */
  497. };
  498. static struct sh_fsi_platform_info fsi_info = {
  499. .porta_flags = SH_FSI_BRS_INV |
  500. SH_FSI_OUT_SLAVE_MODE |
  501. SH_FSI_IN_SLAVE_MODE |
  502. SH_FSI_OFMT(PCM) |
  503. SH_FSI_IFMT(PCM),
  504. };
  505. static struct resource fsi_resources[] = {
  506. [0] = {
  507. .name = "FSI",
  508. .start = 0xFE3C0000,
  509. .end = 0xFE3C0400 - 1,
  510. .flags = IORESOURCE_MEM,
  511. },
  512. [1] = {
  513. .start = IRQ_FSI,
  514. .flags = IORESOURCE_IRQ,
  515. },
  516. };
  517. static struct platform_device fsi_device = {
  518. .name = "sh_fsi2",
  519. .id = -1,
  520. .num_resources = ARRAY_SIZE(fsi_resources),
  521. .resource = fsi_resources,
  522. .dev = {
  523. .platform_data = &fsi_info,
  524. },
  525. };
  526. static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
  527. .clock_source = LCDC_CLK_EXTERNAL,
  528. .ch[0] = {
  529. .chan = LCDC_CHAN_MAINLCD,
  530. .bpp = 16,
  531. .interface_type = RGB24,
  532. .clock_divider = 1,
  533. .flags = LCDC_FLAGS_DWPOL,
  534. .lcd_cfg = {
  535. .name = "HDMI",
  536. /* So far only 720p is supported */
  537. .xres = 1280,
  538. .yres = 720,
  539. /*
  540. * If left and right margins are not multiples of 8,
  541. * LDHAJR will be adjusted accordingly by the LCDC
  542. * driver. Until we start using EDID, these values
  543. * might have to be adjusted for different monitors.
  544. */
  545. .left_margin = 200,
  546. .right_margin = 88,
  547. .hsync_len = 48,
  548. .upper_margin = 20,
  549. .lower_margin = 5,
  550. .vsync_len = 5,
  551. .pixclock = 13468,
  552. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  553. },
  554. }
  555. };
  556. static struct resource lcdc1_resources[] = {
  557. [0] = {
  558. .name = "LCDC1",
  559. .start = 0xfe944000,
  560. .end = 0xfe947fff,
  561. .flags = IORESOURCE_MEM,
  562. },
  563. [1] = {
  564. .start = intcs_evt2irq(0x17a0),
  565. .flags = IORESOURCE_IRQ,
  566. },
  567. };
  568. static struct platform_device lcdc1_device = {
  569. .name = "sh_mobile_lcdc_fb",
  570. .num_resources = ARRAY_SIZE(lcdc1_resources),
  571. .resource = lcdc1_resources,
  572. .id = 1,
  573. .dev = {
  574. .platform_data = &sh_mobile_lcdc1_info,
  575. .coherent_dma_mask = ~0,
  576. },
  577. };
  578. static struct sh_mobile_hdmi_info hdmi_info = {
  579. .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
  580. .lcd_dev = &lcdc1_device.dev,
  581. };
  582. static struct resource hdmi_resources[] = {
  583. [0] = {
  584. .name = "HDMI",
  585. .start = 0xe6be0000,
  586. .end = 0xe6be00ff,
  587. .flags = IORESOURCE_MEM,
  588. },
  589. [1] = {
  590. /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
  591. .start = evt2irq(0x17e0),
  592. .flags = IORESOURCE_IRQ,
  593. },
  594. };
  595. static struct platform_device hdmi_device = {
  596. .name = "sh-mobile-hdmi",
  597. .num_resources = ARRAY_SIZE(hdmi_resources),
  598. .resource = hdmi_resources,
  599. .id = -1,
  600. .dev = {
  601. .platform_data = &hdmi_info,
  602. },
  603. };
  604. static struct gpio_led ap4evb_leds[] = {
  605. {
  606. .name = "led4",
  607. .gpio = GPIO_PORT185,
  608. .default_state = LEDS_GPIO_DEFSTATE_ON,
  609. },
  610. {
  611. .name = "led2",
  612. .gpio = GPIO_PORT186,
  613. .default_state = LEDS_GPIO_DEFSTATE_ON,
  614. },
  615. {
  616. .name = "led3",
  617. .gpio = GPIO_PORT187,
  618. .default_state = LEDS_GPIO_DEFSTATE_ON,
  619. },
  620. {
  621. .name = "led1",
  622. .gpio = GPIO_PORT188,
  623. .default_state = LEDS_GPIO_DEFSTATE_ON,
  624. }
  625. };
  626. static struct gpio_led_platform_data ap4evb_leds_pdata = {
  627. .num_leds = ARRAY_SIZE(ap4evb_leds),
  628. .leds = ap4evb_leds,
  629. };
  630. static struct platform_device leds_device = {
  631. .name = "leds-gpio",
  632. .id = 0,
  633. .dev = {
  634. .platform_data = &ap4evb_leds_pdata,
  635. },
  636. };
  637. static struct platform_device *ap4evb_devices[] __initdata = {
  638. &leds_device,
  639. &nor_flash_device,
  640. &smc911x_device,
  641. &sdhi0_device,
  642. &sdhi1_device,
  643. &usb1_host_device,
  644. &fsi_device,
  645. &sh_mmcif_device,
  646. &lcdc1_device,
  647. &lcdc_device,
  648. &hdmi_device,
  649. };
  650. static int __init hdmi_init_pm_clock(void)
  651. {
  652. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  653. int ret;
  654. long rate;
  655. if (IS_ERR(hdmi_ick)) {
  656. ret = PTR_ERR(hdmi_ick);
  657. pr_err("Cannot get HDMI ICK: %d\n", ret);
  658. goto out;
  659. }
  660. ret = clk_set_parent(&pllc2_clk, &dv_clki_div2_clk);
  661. if (ret < 0) {
  662. pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, pllc2_clk.usecount);
  663. goto out;
  664. }
  665. pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&pllc2_clk));
  666. rate = clk_round_rate(&pllc2_clk, 594000000);
  667. if (rate < 0) {
  668. pr_err("Cannot get suitable rate: %ld\n", rate);
  669. ret = rate;
  670. goto out;
  671. }
  672. ret = clk_set_rate(&pllc2_clk, rate);
  673. if (ret < 0) {
  674. pr_err("Cannot set rate %ld: %d\n", rate, ret);
  675. goto out;
  676. }
  677. pr_debug("PLLC2 set frequency %lu\n", rate);
  678. ret = clk_set_parent(hdmi_ick, &pllc2_clk);
  679. if (ret < 0) {
  680. pr_err("Cannot set HDMI parent: %d\n", ret);
  681. goto out;
  682. }
  683. out:
  684. if (!IS_ERR(hdmi_ick))
  685. clk_put(hdmi_ick);
  686. return ret;
  687. }
  688. device_initcall(hdmi_init_pm_clock);
  689. /*
  690. * FIXME !!
  691. *
  692. * gpio_no_direction
  693. * gpio_pull_up
  694. * are quick_hack.
  695. *
  696. * current gpio frame work doesn't have
  697. * the method to control only pull up/down/free.
  698. * this function should be replaced by correct gpio function
  699. */
  700. static void __init gpio_no_direction(u32 addr)
  701. {
  702. __raw_writeb(0x00, addr);
  703. }
  704. static void __init gpio_pull_up(u32 addr)
  705. {
  706. u8 data = __raw_readb(addr);
  707. data &= 0x0F;
  708. data |= 0xC0;
  709. __raw_writeb(data, addr);
  710. }
  711. /* TouchScreen */
  712. #define IRQ28 evt2irq(0x3380) /* IRQ28A */
  713. #define IRQ7 evt2irq(0x02e0) /* IRQ7A */
  714. static int ts_get_pendown_state(void)
  715. {
  716. int val1, val2;
  717. gpio_free(GPIO_FN_IRQ28_123);
  718. gpio_free(GPIO_FN_IRQ7_40);
  719. gpio_request(GPIO_PORT123, NULL);
  720. gpio_request(GPIO_PORT40, NULL);
  721. gpio_direction_input(GPIO_PORT123);
  722. gpio_direction_input(GPIO_PORT40);
  723. val1 = gpio_get_value(GPIO_PORT123);
  724. val2 = gpio_get_value(GPIO_PORT40);
  725. gpio_request(GPIO_FN_IRQ28_123, NULL); /* for QHD */
  726. gpio_request(GPIO_FN_IRQ7_40, NULL); /* for WVGA */
  727. return val1 ^ val2;
  728. }
  729. #define PORT40CR 0xE6051028
  730. #define PORT123CR 0xE605007B
  731. static int ts_init(void)
  732. {
  733. gpio_request(GPIO_FN_IRQ28_123, NULL); /* for QHD */
  734. gpio_request(GPIO_FN_IRQ7_40, NULL); /* for WVGA */
  735. gpio_pull_up(PORT40CR);
  736. gpio_pull_up(PORT123CR);
  737. return 0;
  738. }
  739. static struct tsc2007_platform_data tsc2007_info = {
  740. .model = 2007,
  741. .x_plate_ohms = 180,
  742. .get_pendown_state = ts_get_pendown_state,
  743. .init_platform_hw = ts_init,
  744. };
  745. static struct i2c_board_info tsc_device = {
  746. I2C_BOARD_INFO("tsc2007", 0x48),
  747. .type = "tsc2007",
  748. .platform_data = &tsc2007_info,
  749. /*.irq is selected on ap4evb_init */
  750. };
  751. /* I2C */
  752. static struct i2c_board_info i2c0_devices[] = {
  753. {
  754. I2C_BOARD_INFO("ak4643", 0x13),
  755. },
  756. };
  757. static struct i2c_board_info i2c1_devices[] = {
  758. {
  759. I2C_BOARD_INFO("r2025sd", 0x32),
  760. },
  761. };
  762. static struct map_desc ap4evb_io_desc[] __initdata = {
  763. /* create a 1:1 entity map for 0xe6xxxxxx
  764. * used by CPGA, INTC and PFC.
  765. */
  766. {
  767. .virtual = 0xe6000000,
  768. .pfn = __phys_to_pfn(0xe6000000),
  769. .length = 256 << 20,
  770. .type = MT_DEVICE_NONSHARED
  771. },
  772. };
  773. static void __init ap4evb_map_io(void)
  774. {
  775. iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
  776. /* setup early devices and console here as well */
  777. sh7372_add_early_devices();
  778. shmobile_setup_console();
  779. }
  780. #define GPIO_PORT9CR 0xE6051009
  781. #define GPIO_PORT10CR 0xE605100A
  782. static void __init ap4evb_init(void)
  783. {
  784. u32 srcr4;
  785. struct clk *clk;
  786. sh7372_pinmux_init();
  787. /* enable SCIFA0 */
  788. gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
  789. gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
  790. /* enable SMSC911X */
  791. gpio_request(GPIO_FN_CS5A, NULL);
  792. gpio_request(GPIO_FN_IRQ6_39, NULL);
  793. /* enable Debug switch (S6) */
  794. gpio_request(GPIO_PORT32, NULL);
  795. gpio_request(GPIO_PORT33, NULL);
  796. gpio_request(GPIO_PORT34, NULL);
  797. gpio_request(GPIO_PORT35, NULL);
  798. gpio_direction_input(GPIO_PORT32);
  799. gpio_direction_input(GPIO_PORT33);
  800. gpio_direction_input(GPIO_PORT34);
  801. gpio_direction_input(GPIO_PORT35);
  802. gpio_export(GPIO_PORT32, 0);
  803. gpio_export(GPIO_PORT33, 0);
  804. gpio_export(GPIO_PORT34, 0);
  805. gpio_export(GPIO_PORT35, 0);
  806. /* SDHI0 */
  807. gpio_request(GPIO_FN_SDHICD0, NULL);
  808. gpio_request(GPIO_FN_SDHIWP0, NULL);
  809. gpio_request(GPIO_FN_SDHICMD0, NULL);
  810. gpio_request(GPIO_FN_SDHICLK0, NULL);
  811. gpio_request(GPIO_FN_SDHID0_3, NULL);
  812. gpio_request(GPIO_FN_SDHID0_2, NULL);
  813. gpio_request(GPIO_FN_SDHID0_1, NULL);
  814. gpio_request(GPIO_FN_SDHID0_0, NULL);
  815. /* SDHI1 */
  816. gpio_request(GPIO_FN_SDHICMD1, NULL);
  817. gpio_request(GPIO_FN_SDHICLK1, NULL);
  818. gpio_request(GPIO_FN_SDHID1_3, NULL);
  819. gpio_request(GPIO_FN_SDHID1_2, NULL);
  820. gpio_request(GPIO_FN_SDHID1_1, NULL);
  821. gpio_request(GPIO_FN_SDHID1_0, NULL);
  822. /* MMCIF */
  823. gpio_request(GPIO_FN_MMCD0_0, NULL);
  824. gpio_request(GPIO_FN_MMCD0_1, NULL);
  825. gpio_request(GPIO_FN_MMCD0_2, NULL);
  826. gpio_request(GPIO_FN_MMCD0_3, NULL);
  827. gpio_request(GPIO_FN_MMCD0_4, NULL);
  828. gpio_request(GPIO_FN_MMCD0_5, NULL);
  829. gpio_request(GPIO_FN_MMCD0_6, NULL);
  830. gpio_request(GPIO_FN_MMCD0_7, NULL);
  831. gpio_request(GPIO_FN_MMCCMD0, NULL);
  832. gpio_request(GPIO_FN_MMCCLK0, NULL);
  833. /* USB enable */
  834. gpio_request(GPIO_FN_VBUS0_1, NULL);
  835. gpio_request(GPIO_FN_IDIN_1_18, NULL);
  836. gpio_request(GPIO_FN_PWEN_1_115, NULL);
  837. gpio_request(GPIO_FN_OVCN_1_114, NULL);
  838. gpio_request(GPIO_FN_EXTLP_1, NULL);
  839. gpio_request(GPIO_FN_OVCN2_1, NULL);
  840. /* setup USB phy */
  841. __raw_writew(0x8a0a, 0xE6058130); /* USBCR2 */
  842. /* enable FSI2 */
  843. gpio_request(GPIO_FN_FSIAIBT, NULL);
  844. gpio_request(GPIO_FN_FSIAILR, NULL);
  845. gpio_request(GPIO_FN_FSIAISLD, NULL);
  846. gpio_request(GPIO_FN_FSIAOSLD, NULL);
  847. gpio_request(GPIO_PORT161, NULL);
  848. gpio_direction_output(GPIO_PORT161, 0); /* slave */
  849. gpio_request(GPIO_PORT9, NULL);
  850. gpio_request(GPIO_PORT10, NULL);
  851. gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
  852. gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
  853. /* card detect pin for MMC slot (CN7) */
  854. gpio_request(GPIO_PORT41, NULL);
  855. gpio_direction_input(GPIO_PORT41);
  856. /* set SPU2 clock to 119.6 MHz */
  857. clk = clk_get(NULL, "spu_clk");
  858. if (!IS_ERR(clk)) {
  859. clk_set_rate(clk, clk_round_rate(clk, 119600000));
  860. clk_put(clk);
  861. }
  862. /* change parent of FSI A */
  863. clk = clk_get(NULL, "fsia_clk");
  864. if (!IS_ERR(clk)) {
  865. clk_register(&fsiackcr_clk);
  866. clk_set_parent(clk, &fsiackcr_clk);
  867. clk_put(clk);
  868. }
  869. /*
  870. * set irq priority, to avoid sound chopping
  871. * when NFS rootfs is used
  872. * FSI(3) > SMSC911X(2)
  873. */
  874. intc_set_priority(IRQ_FSI, 3);
  875. i2c_register_board_info(0, i2c0_devices,
  876. ARRAY_SIZE(i2c0_devices));
  877. i2c_register_board_info(1, i2c1_devices,
  878. ARRAY_SIZE(i2c1_devices));
  879. #ifdef CONFIG_AP4EVB_QHD
  880. /*
  881. * QHD
  882. */
  883. /* enable KEYSC */
  884. gpio_request(GPIO_FN_KEYOUT0, NULL);
  885. gpio_request(GPIO_FN_KEYOUT1, NULL);
  886. gpio_request(GPIO_FN_KEYOUT2, NULL);
  887. gpio_request(GPIO_FN_KEYOUT3, NULL);
  888. gpio_request(GPIO_FN_KEYOUT4, NULL);
  889. gpio_request(GPIO_FN_KEYIN0_136, NULL);
  890. gpio_request(GPIO_FN_KEYIN1_135, NULL);
  891. gpio_request(GPIO_FN_KEYIN2_134, NULL);
  892. gpio_request(GPIO_FN_KEYIN3_133, NULL);
  893. gpio_request(GPIO_FN_KEYIN4, NULL);
  894. /* enable TouchScreen */
  895. set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
  896. tsc_device.irq = IRQ28;
  897. i2c_register_board_info(1, &tsc_device, 1);
  898. /* LCDC0 */
  899. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  900. lcdc_info.ch[0].interface_type = RGB24;
  901. lcdc_info.ch[0].clock_divider = 1;
  902. lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
  903. lcdc_info.ch[0].lcd_cfg.name = "R63302(QHD)";
  904. lcdc_info.ch[0].lcd_cfg.xres = 544;
  905. lcdc_info.ch[0].lcd_cfg.yres = 961;
  906. lcdc_info.ch[0].lcd_cfg.left_margin = 72;
  907. lcdc_info.ch[0].lcd_cfg.right_margin = 600;
  908. lcdc_info.ch[0].lcd_cfg.hsync_len = 16;
  909. lcdc_info.ch[0].lcd_cfg.upper_margin = 8;
  910. lcdc_info.ch[0].lcd_cfg.lower_margin = 8;
  911. lcdc_info.ch[0].lcd_cfg.vsync_len = 2;
  912. lcdc_info.ch[0].lcd_cfg.sync = FB_SYNC_VERT_HIGH_ACT |
  913. FB_SYNC_HOR_HIGH_ACT;
  914. lcdc_info.ch[0].lcd_size_cfg.width = 44;
  915. lcdc_info.ch[0].lcd_size_cfg.height = 79;
  916. platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
  917. #else
  918. /*
  919. * WVGA
  920. */
  921. gpio_request(GPIO_FN_LCDD17, NULL);
  922. gpio_request(GPIO_FN_LCDD16, NULL);
  923. gpio_request(GPIO_FN_LCDD15, NULL);
  924. gpio_request(GPIO_FN_LCDD14, NULL);
  925. gpio_request(GPIO_FN_LCDD13, NULL);
  926. gpio_request(GPIO_FN_LCDD12, NULL);
  927. gpio_request(GPIO_FN_LCDD11, NULL);
  928. gpio_request(GPIO_FN_LCDD10, NULL);
  929. gpio_request(GPIO_FN_LCDD9, NULL);
  930. gpio_request(GPIO_FN_LCDD8, NULL);
  931. gpio_request(GPIO_FN_LCDD7, NULL);
  932. gpio_request(GPIO_FN_LCDD6, NULL);
  933. gpio_request(GPIO_FN_LCDD5, NULL);
  934. gpio_request(GPIO_FN_LCDD4, NULL);
  935. gpio_request(GPIO_FN_LCDD3, NULL);
  936. gpio_request(GPIO_FN_LCDD2, NULL);
  937. gpio_request(GPIO_FN_LCDD1, NULL);
  938. gpio_request(GPIO_FN_LCDD0, NULL);
  939. gpio_request(GPIO_FN_LCDDISP, NULL);
  940. gpio_request(GPIO_FN_LCDDCK, NULL);
  941. gpio_request(GPIO_PORT189, NULL); /* backlight */
  942. gpio_direction_output(GPIO_PORT189, 1);
  943. gpio_request(GPIO_PORT151, NULL); /* LCDDON */
  944. gpio_direction_output(GPIO_PORT151, 1);
  945. lcdc_info.clock_source = LCDC_CLK_BUS;
  946. lcdc_info.ch[0].interface_type = RGB18;
  947. lcdc_info.ch[0].clock_divider = 2;
  948. lcdc_info.ch[0].flags = 0;
  949. lcdc_info.ch[0].lcd_cfg.name = "WVGA Panel";
  950. lcdc_info.ch[0].lcd_cfg.xres = 800;
  951. lcdc_info.ch[0].lcd_cfg.yres = 480;
  952. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  953. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  954. lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
  955. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  956. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  957. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  958. lcdc_info.ch[0].lcd_cfg.sync = 0;
  959. lcdc_info.ch[0].lcd_size_cfg.width = 152;
  960. lcdc_info.ch[0].lcd_size_cfg.height = 91;
  961. /* enable TouchScreen */
  962. set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
  963. tsc_device.irq = IRQ7;
  964. i2c_register_board_info(0, &tsc_device, 1);
  965. #endif /* CONFIG_AP4EVB_QHD */
  966. sh7372_add_standard_devices();
  967. /* HDMI */
  968. gpio_request(GPIO_FN_HDMI_HPD, NULL);
  969. gpio_request(GPIO_FN_HDMI_CEC, NULL);
  970. /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
  971. #define SRCR4 0xe61580bc
  972. srcr4 = __raw_readl(SRCR4);
  973. __raw_writel(srcr4 | (1 << 13), SRCR4);
  974. udelay(50);
  975. __raw_writel(srcr4 & ~(1 << 13), SRCR4);
  976. platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
  977. }
  978. static void __init ap4evb_timer_init(void)
  979. {
  980. sh7372_clock_init();
  981. shmobile_timer.init();
  982. /* External clock source */
  983. clk_set_rate(&dv_clki_clk, 27000000);
  984. }
  985. static struct sys_timer ap4evb_timer = {
  986. .init = ap4evb_timer_init,
  987. };
  988. MACHINE_START(AP4EVB, "ap4evb")
  989. .map_io = ap4evb_map_io,
  990. .init_irq = sh7372_init_irq,
  991. .init_machine = ap4evb_init,
  992. .timer = &ap4evb_timer,
  993. MACHINE_END