mthca_main.c 31 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $
  33. */
  34. #include <linux/config.h>
  35. #include <linux/version.h>
  36. #include <linux/module.h>
  37. #include <linux/init.h>
  38. #include <linux/errno.h>
  39. #include <linux/pci.h>
  40. #include <linux/interrupt.h>
  41. #include "mthca_dev.h"
  42. #include "mthca_config_reg.h"
  43. #include "mthca_cmd.h"
  44. #include "mthca_profile.h"
  45. #include "mthca_memfree.h"
  46. MODULE_AUTHOR("Roland Dreier");
  47. MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver");
  48. MODULE_LICENSE("Dual BSD/GPL");
  49. MODULE_VERSION(DRV_VERSION);
  50. #ifdef CONFIG_PCI_MSI
  51. static int msi_x = 0;
  52. module_param(msi_x, int, 0444);
  53. MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
  54. static int msi = 0;
  55. module_param(msi, int, 0444);
  56. MODULE_PARM_DESC(msi, "attempt to use MSI if nonzero");
  57. #else /* CONFIG_PCI_MSI */
  58. #define msi_x (0)
  59. #define msi (0)
  60. #endif /* CONFIG_PCI_MSI */
  61. static const char mthca_version[] __devinitdata =
  62. "ib_mthca: Mellanox InfiniBand HCA driver v"
  63. DRV_VERSION " (" DRV_RELDATE ")\n";
  64. static struct mthca_profile default_profile = {
  65. .num_qp = 1 << 16,
  66. .rdb_per_qp = 4,
  67. .num_cq = 1 << 16,
  68. .num_mcg = 1 << 13,
  69. .num_mpt = 1 << 17,
  70. .num_mtt = 1 << 20,
  71. .num_udav = 1 << 15, /* Tavor only */
  72. .fmr_reserved_mtts = 1 << 18, /* Tavor only */
  73. .uarc_size = 1 << 18, /* Arbel only */
  74. };
  75. static int __devinit mthca_tune_pci(struct mthca_dev *mdev)
  76. {
  77. int cap;
  78. u16 val;
  79. /* First try to max out Read Byte Count */
  80. cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX);
  81. if (cap) {
  82. if (pci_read_config_word(mdev->pdev, cap + PCI_X_CMD, &val)) {
  83. mthca_err(mdev, "Couldn't read PCI-X command register, "
  84. "aborting.\n");
  85. return -ENODEV;
  86. }
  87. val = (val & ~PCI_X_CMD_MAX_READ) | (3 << 2);
  88. if (pci_write_config_word(mdev->pdev, cap + PCI_X_CMD, val)) {
  89. mthca_err(mdev, "Couldn't write PCI-X command register, "
  90. "aborting.\n");
  91. return -ENODEV;
  92. }
  93. } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE))
  94. mthca_info(mdev, "No PCI-X capability, not setting RBC.\n");
  95. cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP);
  96. if (cap) {
  97. if (pci_read_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, &val)) {
  98. mthca_err(mdev, "Couldn't read PCI Express device control "
  99. "register, aborting.\n");
  100. return -ENODEV;
  101. }
  102. val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12);
  103. if (pci_write_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, val)) {
  104. mthca_err(mdev, "Couldn't write PCI Express device control "
  105. "register, aborting.\n");
  106. return -ENODEV;
  107. }
  108. } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE)
  109. mthca_info(mdev, "No PCI Express capability, "
  110. "not setting Max Read Request Size.\n");
  111. return 0;
  112. }
  113. static int __devinit mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim)
  114. {
  115. int err;
  116. u8 status;
  117. err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status);
  118. if (err) {
  119. mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
  120. return err;
  121. }
  122. if (status) {
  123. mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, "
  124. "aborting.\n", status);
  125. return -EINVAL;
  126. }
  127. if (dev_lim->min_page_sz > PAGE_SIZE) {
  128. mthca_err(mdev, "HCA minimum page size of %d bigger than "
  129. "kernel PAGE_SIZE of %ld, aborting.\n",
  130. dev_lim->min_page_sz, PAGE_SIZE);
  131. return -ENODEV;
  132. }
  133. if (dev_lim->num_ports > MTHCA_MAX_PORTS) {
  134. mthca_err(mdev, "HCA has %d ports, but we only support %d, "
  135. "aborting.\n",
  136. dev_lim->num_ports, MTHCA_MAX_PORTS);
  137. return -ENODEV;
  138. }
  139. mdev->limits.num_ports = dev_lim->num_ports;
  140. mdev->limits.vl_cap = dev_lim->max_vl;
  141. mdev->limits.mtu_cap = dev_lim->max_mtu;
  142. mdev->limits.gid_table_len = dev_lim->max_gids;
  143. mdev->limits.pkey_table_len = dev_lim->max_pkeys;
  144. mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay;
  145. mdev->limits.max_sg = dev_lim->max_sg;
  146. mdev->limits.reserved_qps = dev_lim->reserved_qps;
  147. mdev->limits.reserved_srqs = dev_lim->reserved_srqs;
  148. mdev->limits.reserved_eecs = dev_lim->reserved_eecs;
  149. mdev->limits.reserved_cqs = dev_lim->reserved_cqs;
  150. mdev->limits.reserved_eqs = dev_lim->reserved_eqs;
  151. mdev->limits.reserved_mtts = dev_lim->reserved_mtts;
  152. mdev->limits.reserved_mrws = dev_lim->reserved_mrws;
  153. mdev->limits.reserved_uars = dev_lim->reserved_uars;
  154. mdev->limits.reserved_pds = dev_lim->reserved_pds;
  155. /* IB_DEVICE_RESIZE_MAX_WR not supported by driver.
  156. May be doable since hardware supports it for SRQ.
  157. IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver.
  158. IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not
  159. supported by driver. */
  160. mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
  161. IB_DEVICE_PORT_ACTIVE_EVENT |
  162. IB_DEVICE_SYS_IMAGE_GUID |
  163. IB_DEVICE_RC_RNR_NAK_GEN;
  164. if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR)
  165. mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
  166. if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR)
  167. mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
  168. if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI)
  169. mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI;
  170. if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG)
  171. mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
  172. if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE)
  173. mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
  174. if (dev_lim->flags & DEV_LIM_FLAG_SRQ)
  175. mdev->mthca_flags |= MTHCA_FLAG_SRQ;
  176. return 0;
  177. }
  178. static int __devinit mthca_init_tavor(struct mthca_dev *mdev)
  179. {
  180. u8 status;
  181. int err;
  182. struct mthca_dev_lim dev_lim;
  183. struct mthca_profile profile;
  184. struct mthca_init_hca_param init_hca;
  185. struct mthca_adapter adapter;
  186. err = mthca_SYS_EN(mdev, &status);
  187. if (err) {
  188. mthca_err(mdev, "SYS_EN command failed, aborting.\n");
  189. return err;
  190. }
  191. if (status) {
  192. mthca_err(mdev, "SYS_EN returned status 0x%02x, "
  193. "aborting.\n", status);
  194. return -EINVAL;
  195. }
  196. err = mthca_QUERY_FW(mdev, &status);
  197. if (err) {
  198. mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
  199. goto err_disable;
  200. }
  201. if (status) {
  202. mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
  203. "aborting.\n", status);
  204. err = -EINVAL;
  205. goto err_disable;
  206. }
  207. err = mthca_QUERY_DDR(mdev, &status);
  208. if (err) {
  209. mthca_err(mdev, "QUERY_DDR command failed, aborting.\n");
  210. goto err_disable;
  211. }
  212. if (status) {
  213. mthca_err(mdev, "QUERY_DDR returned status 0x%02x, "
  214. "aborting.\n", status);
  215. err = -EINVAL;
  216. goto err_disable;
  217. }
  218. err = mthca_dev_lim(mdev, &dev_lim);
  219. profile = default_profile;
  220. profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
  221. profile.uarc_size = 0;
  222. err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
  223. if (err < 0)
  224. goto err_disable;
  225. err = mthca_INIT_HCA(mdev, &init_hca, &status);
  226. if (err) {
  227. mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
  228. goto err_disable;
  229. }
  230. if (status) {
  231. mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
  232. "aborting.\n", status);
  233. err = -EINVAL;
  234. goto err_disable;
  235. }
  236. err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
  237. if (err) {
  238. mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
  239. goto err_close;
  240. }
  241. if (status) {
  242. mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
  243. "aborting.\n", status);
  244. err = -EINVAL;
  245. goto err_close;
  246. }
  247. mdev->eq_table.inta_pin = adapter.inta_pin;
  248. mdev->rev_id = adapter.revision_id;
  249. return 0;
  250. err_close:
  251. mthca_CLOSE_HCA(mdev, 0, &status);
  252. err_disable:
  253. mthca_SYS_DIS(mdev, &status);
  254. return err;
  255. }
  256. static int __devinit mthca_load_fw(struct mthca_dev *mdev)
  257. {
  258. u8 status;
  259. int err;
  260. /* FIXME: use HCA-attached memory for FW if present */
  261. mdev->fw.arbel.fw_icm =
  262. mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages,
  263. GFP_HIGHUSER | __GFP_NOWARN);
  264. if (!mdev->fw.arbel.fw_icm) {
  265. mthca_err(mdev, "Couldn't allocate FW area, aborting.\n");
  266. return -ENOMEM;
  267. }
  268. err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status);
  269. if (err) {
  270. mthca_err(mdev, "MAP_FA command failed, aborting.\n");
  271. goto err_free;
  272. }
  273. if (status) {
  274. mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status);
  275. err = -EINVAL;
  276. goto err_free;
  277. }
  278. err = mthca_RUN_FW(mdev, &status);
  279. if (err) {
  280. mthca_err(mdev, "RUN_FW command failed, aborting.\n");
  281. goto err_unmap_fa;
  282. }
  283. if (status) {
  284. mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status);
  285. err = -EINVAL;
  286. goto err_unmap_fa;
  287. }
  288. return 0;
  289. err_unmap_fa:
  290. mthca_UNMAP_FA(mdev, &status);
  291. err_free:
  292. mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
  293. return err;
  294. }
  295. static int __devinit mthca_init_icm(struct mthca_dev *mdev,
  296. struct mthca_dev_lim *dev_lim,
  297. struct mthca_init_hca_param *init_hca,
  298. u64 icm_size)
  299. {
  300. u64 aux_pages;
  301. u8 status;
  302. int err;
  303. err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status);
  304. if (err) {
  305. mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n");
  306. return err;
  307. }
  308. if (status) {
  309. mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, "
  310. "aborting.\n", status);
  311. return -EINVAL;
  312. }
  313. mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n",
  314. (unsigned long long) icm_size >> 10,
  315. (unsigned long long) aux_pages << 2);
  316. mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages,
  317. GFP_HIGHUSER | __GFP_NOWARN);
  318. if (!mdev->fw.arbel.aux_icm) {
  319. mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n");
  320. return -ENOMEM;
  321. }
  322. err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status);
  323. if (err) {
  324. mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n");
  325. goto err_free_aux;
  326. }
  327. if (status) {
  328. mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status);
  329. err = -EINVAL;
  330. goto err_free_aux;
  331. }
  332. err = mthca_map_eq_icm(mdev, init_hca->eqc_base);
  333. if (err) {
  334. mthca_err(mdev, "Failed to map EQ context memory, aborting.\n");
  335. goto err_unmap_aux;
  336. }
  337. mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,
  338. MTHCA_MTT_SEG_SIZE,
  339. mdev->limits.num_mtt_segs,
  340. mdev->limits.reserved_mtts, 1);
  341. if (!mdev->mr_table.mtt_table) {
  342. mthca_err(mdev, "Failed to map MTT context memory, aborting.\n");
  343. err = -ENOMEM;
  344. goto err_unmap_eq;
  345. }
  346. mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base,
  347. dev_lim->mpt_entry_sz,
  348. mdev->limits.num_mpts,
  349. mdev->limits.reserved_mrws, 1);
  350. if (!mdev->mr_table.mpt_table) {
  351. mthca_err(mdev, "Failed to map MPT context memory, aborting.\n");
  352. err = -ENOMEM;
  353. goto err_unmap_mtt;
  354. }
  355. mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base,
  356. dev_lim->qpc_entry_sz,
  357. mdev->limits.num_qps,
  358. mdev->limits.reserved_qps, 0);
  359. if (!mdev->qp_table.qp_table) {
  360. mthca_err(mdev, "Failed to map QP context memory, aborting.\n");
  361. err = -ENOMEM;
  362. goto err_unmap_mpt;
  363. }
  364. mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base,
  365. dev_lim->eqpc_entry_sz,
  366. mdev->limits.num_qps,
  367. mdev->limits.reserved_qps, 0);
  368. if (!mdev->qp_table.eqp_table) {
  369. mthca_err(mdev, "Failed to map EQP context memory, aborting.\n");
  370. err = -ENOMEM;
  371. goto err_unmap_qp;
  372. }
  373. mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base,
  374. MTHCA_RDB_ENTRY_SIZE,
  375. mdev->limits.num_qps <<
  376. mdev->qp_table.rdb_shift,
  377. 0, 0);
  378. if (!mdev->qp_table.rdb_table) {
  379. mthca_err(mdev, "Failed to map RDB context memory, aborting\n");
  380. err = -ENOMEM;
  381. goto err_unmap_rdb;
  382. }
  383. mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base,
  384. dev_lim->cqc_entry_sz,
  385. mdev->limits.num_cqs,
  386. mdev->limits.reserved_cqs, 0);
  387. if (!mdev->cq_table.table) {
  388. mthca_err(mdev, "Failed to map CQ context memory, aborting.\n");
  389. err = -ENOMEM;
  390. goto err_unmap_rdb;
  391. }
  392. /*
  393. * It's not strictly required, but for simplicity just map the
  394. * whole multicast group table now. The table isn't very big
  395. * and it's a lot easier than trying to track ref counts.
  396. */
  397. mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base,
  398. MTHCA_MGM_ENTRY_SIZE,
  399. mdev->limits.num_mgms +
  400. mdev->limits.num_amgms,
  401. mdev->limits.num_mgms +
  402. mdev->limits.num_amgms,
  403. 0);
  404. if (!mdev->mcg_table.table) {
  405. mthca_err(mdev, "Failed to map MCG context memory, aborting.\n");
  406. err = -ENOMEM;
  407. goto err_unmap_cq;
  408. }
  409. return 0;
  410. err_unmap_cq:
  411. mthca_free_icm_table(mdev, mdev->cq_table.table);
  412. err_unmap_rdb:
  413. mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
  414. err_unmap_eqp:
  415. mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
  416. err_unmap_qp:
  417. mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
  418. err_unmap_mpt:
  419. mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
  420. err_unmap_mtt:
  421. mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
  422. err_unmap_eq:
  423. mthca_unmap_eq_icm(mdev);
  424. err_unmap_aux:
  425. mthca_UNMAP_ICM_AUX(mdev, &status);
  426. err_free_aux:
  427. mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
  428. return err;
  429. }
  430. static int __devinit mthca_init_arbel(struct mthca_dev *mdev)
  431. {
  432. struct mthca_dev_lim dev_lim;
  433. struct mthca_profile profile;
  434. struct mthca_init_hca_param init_hca;
  435. struct mthca_adapter adapter;
  436. u64 icm_size;
  437. u8 status;
  438. int err;
  439. err = mthca_QUERY_FW(mdev, &status);
  440. if (err) {
  441. mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
  442. return err;
  443. }
  444. if (status) {
  445. mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
  446. "aborting.\n", status);
  447. return -EINVAL;
  448. }
  449. err = mthca_ENABLE_LAM(mdev, &status);
  450. if (err) {
  451. mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n");
  452. return err;
  453. }
  454. if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) {
  455. mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n");
  456. mdev->mthca_flags |= MTHCA_FLAG_NO_LAM;
  457. } else if (status) {
  458. mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, "
  459. "aborting.\n", status);
  460. return -EINVAL;
  461. }
  462. err = mthca_load_fw(mdev);
  463. if (err) {
  464. mthca_err(mdev, "Failed to start FW, aborting.\n");
  465. goto err_disable;
  466. }
  467. err = mthca_dev_lim(mdev, &dev_lim);
  468. if (err) {
  469. mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
  470. goto err_stop_fw;
  471. }
  472. profile = default_profile;
  473. profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
  474. profile.num_udav = 0;
  475. icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
  476. if ((int) icm_size < 0) {
  477. err = icm_size;
  478. goto err_stop_fw;
  479. }
  480. err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size);
  481. if (err)
  482. goto err_stop_fw;
  483. err = mthca_INIT_HCA(mdev, &init_hca, &status);
  484. if (err) {
  485. mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
  486. goto err_free_icm;
  487. }
  488. if (status) {
  489. mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
  490. "aborting.\n", status);
  491. err = -EINVAL;
  492. goto err_free_icm;
  493. }
  494. err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
  495. if (err) {
  496. mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
  497. goto err_free_icm;
  498. }
  499. if (status) {
  500. mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
  501. "aborting.\n", status);
  502. err = -EINVAL;
  503. goto err_free_icm;
  504. }
  505. mdev->eq_table.inta_pin = adapter.inta_pin;
  506. mdev->rev_id = adapter.revision_id;
  507. return 0;
  508. err_free_icm:
  509. mthca_free_icm_table(mdev, mdev->cq_table.table);
  510. mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
  511. mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
  512. mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
  513. mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
  514. mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
  515. mthca_unmap_eq_icm(mdev);
  516. mthca_UNMAP_ICM_AUX(mdev, &status);
  517. mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
  518. err_stop_fw:
  519. mthca_UNMAP_FA(mdev, &status);
  520. mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
  521. err_disable:
  522. if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
  523. mthca_DISABLE_LAM(mdev, &status);
  524. return err;
  525. }
  526. static int __devinit mthca_init_hca(struct mthca_dev *mdev)
  527. {
  528. if (mthca_is_memfree(mdev))
  529. return mthca_init_arbel(mdev);
  530. else
  531. return mthca_init_tavor(mdev);
  532. }
  533. static int __devinit mthca_setup_hca(struct mthca_dev *dev)
  534. {
  535. int err;
  536. u8 status;
  537. MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock);
  538. err = mthca_init_uar_table(dev);
  539. if (err) {
  540. mthca_err(dev, "Failed to initialize "
  541. "user access region table, aborting.\n");
  542. return err;
  543. }
  544. err = mthca_uar_alloc(dev, &dev->driver_uar);
  545. if (err) {
  546. mthca_err(dev, "Failed to allocate driver access region, "
  547. "aborting.\n");
  548. goto err_uar_table_free;
  549. }
  550. dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
  551. if (!dev->kar) {
  552. mthca_err(dev, "Couldn't map kernel access region, "
  553. "aborting.\n");
  554. err = -ENOMEM;
  555. goto err_uar_free;
  556. }
  557. err = mthca_init_pd_table(dev);
  558. if (err) {
  559. mthca_err(dev, "Failed to initialize "
  560. "protection domain table, aborting.\n");
  561. goto err_kar_unmap;
  562. }
  563. err = mthca_init_mr_table(dev);
  564. if (err) {
  565. mthca_err(dev, "Failed to initialize "
  566. "memory region table, aborting.\n");
  567. goto err_pd_table_free;
  568. }
  569. err = mthca_pd_alloc(dev, &dev->driver_pd);
  570. if (err) {
  571. mthca_err(dev, "Failed to create driver PD, "
  572. "aborting.\n");
  573. goto err_mr_table_free;
  574. }
  575. err = mthca_init_eq_table(dev);
  576. if (err) {
  577. mthca_err(dev, "Failed to initialize "
  578. "event queue table, aborting.\n");
  579. goto err_pd_free;
  580. }
  581. err = mthca_cmd_use_events(dev);
  582. if (err) {
  583. mthca_err(dev, "Failed to switch to event-driven "
  584. "firmware commands, aborting.\n");
  585. goto err_eq_table_free;
  586. }
  587. err = mthca_NOP(dev, &status);
  588. if (err || status) {
  589. mthca_err(dev, "NOP command failed to generate interrupt (IRQ %d), aborting.\n",
  590. dev->mthca_flags & MTHCA_FLAG_MSI_X ?
  591. dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector :
  592. dev->pdev->irq);
  593. if (dev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X))
  594. mthca_err(dev, "Try again with MSI/MSI-X disabled.\n");
  595. else
  596. mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n");
  597. goto err_cmd_poll;
  598. }
  599. mthca_dbg(dev, "NOP command IRQ test passed\n");
  600. err = mthca_init_cq_table(dev);
  601. if (err) {
  602. mthca_err(dev, "Failed to initialize "
  603. "completion queue table, aborting.\n");
  604. goto err_cmd_poll;
  605. }
  606. err = mthca_init_qp_table(dev);
  607. if (err) {
  608. mthca_err(dev, "Failed to initialize "
  609. "queue pair table, aborting.\n");
  610. goto err_cq_table_free;
  611. }
  612. err = mthca_init_av_table(dev);
  613. if (err) {
  614. mthca_err(dev, "Failed to initialize "
  615. "address vector table, aborting.\n");
  616. goto err_qp_table_free;
  617. }
  618. err = mthca_init_mcg_table(dev);
  619. if (err) {
  620. mthca_err(dev, "Failed to initialize "
  621. "multicast group table, aborting.\n");
  622. goto err_av_table_free;
  623. }
  624. return 0;
  625. err_av_table_free:
  626. mthca_cleanup_av_table(dev);
  627. err_qp_table_free:
  628. mthca_cleanup_qp_table(dev);
  629. err_cq_table_free:
  630. mthca_cleanup_cq_table(dev);
  631. err_cmd_poll:
  632. mthca_cmd_use_polling(dev);
  633. err_eq_table_free:
  634. mthca_cleanup_eq_table(dev);
  635. err_pd_free:
  636. mthca_pd_free(dev, &dev->driver_pd);
  637. err_mr_table_free:
  638. mthca_cleanup_mr_table(dev);
  639. err_pd_table_free:
  640. mthca_cleanup_pd_table(dev);
  641. err_kar_unmap:
  642. iounmap(dev->kar);
  643. err_uar_free:
  644. mthca_uar_free(dev, &dev->driver_uar);
  645. err_uar_table_free:
  646. mthca_cleanup_uar_table(dev);
  647. return err;
  648. }
  649. static int __devinit mthca_request_regions(struct pci_dev *pdev,
  650. int ddr_hidden)
  651. {
  652. int err;
  653. /*
  654. * We can't just use pci_request_regions() because the MSI-X
  655. * table is right in the middle of the first BAR. If we did
  656. * pci_request_region and grab all of the first BAR, then
  657. * setting up MSI-X would fail, since the PCI core wants to do
  658. * request_mem_region on the MSI-X vector table.
  659. *
  660. * So just request what we need right now, and request any
  661. * other regions we need when setting up EQs.
  662. */
  663. if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
  664. MTHCA_HCR_SIZE, DRV_NAME))
  665. return -EBUSY;
  666. err = pci_request_region(pdev, 2, DRV_NAME);
  667. if (err)
  668. goto err_bar2_failed;
  669. if (!ddr_hidden) {
  670. err = pci_request_region(pdev, 4, DRV_NAME);
  671. if (err)
  672. goto err_bar4_failed;
  673. }
  674. return 0;
  675. err_bar4_failed:
  676. pci_release_region(pdev, 2);
  677. err_bar2_failed:
  678. release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
  679. MTHCA_HCR_SIZE);
  680. return err;
  681. }
  682. static void mthca_release_regions(struct pci_dev *pdev,
  683. int ddr_hidden)
  684. {
  685. if (!ddr_hidden)
  686. pci_release_region(pdev, 4);
  687. pci_release_region(pdev, 2);
  688. release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
  689. MTHCA_HCR_SIZE);
  690. }
  691. static int __devinit mthca_enable_msi_x(struct mthca_dev *mdev)
  692. {
  693. struct msix_entry entries[3];
  694. int err;
  695. entries[0].entry = 0;
  696. entries[1].entry = 1;
  697. entries[2].entry = 2;
  698. err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries));
  699. if (err) {
  700. if (err > 0)
  701. mthca_info(mdev, "Only %d MSI-X vectors available, "
  702. "not using MSI-X\n", err);
  703. return err;
  704. }
  705. mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector;
  706. mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector;
  707. mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector;
  708. return 0;
  709. }
  710. static void mthca_close_hca(struct mthca_dev *mdev)
  711. {
  712. u8 status;
  713. mthca_CLOSE_HCA(mdev, 0, &status);
  714. if (mthca_is_memfree(mdev)) {
  715. mthca_free_icm_table(mdev, mdev->cq_table.table);
  716. mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
  717. mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
  718. mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
  719. mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
  720. mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
  721. mthca_unmap_eq_icm(mdev);
  722. mthca_UNMAP_ICM_AUX(mdev, &status);
  723. mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
  724. mthca_UNMAP_FA(mdev, &status);
  725. mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
  726. if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
  727. mthca_DISABLE_LAM(mdev, &status);
  728. } else
  729. mthca_SYS_DIS(mdev, &status);
  730. }
  731. /* Types of supported HCA */
  732. enum {
  733. TAVOR, /* MT23108 */
  734. ARBEL_COMPAT, /* MT25208 in Tavor compat mode */
  735. ARBEL_NATIVE, /* MT25208 with extended features */
  736. SINAI /* MT25204 */
  737. };
  738. #define MTHCA_FW_VER(major, minor, subminor) \
  739. (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor))
  740. static struct {
  741. u64 latest_fw;
  742. int is_memfree;
  743. int is_pcie;
  744. } mthca_hca_table[] = {
  745. [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 3, 2), .is_memfree = 0, .is_pcie = 0 },
  746. [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 6, 2), .is_memfree = 0, .is_pcie = 1 },
  747. [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 0, 1), .is_memfree = 1, .is_pcie = 1 },
  748. [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 0, 1), .is_memfree = 1, .is_pcie = 1 }
  749. };
  750. static int __devinit mthca_init_one(struct pci_dev *pdev,
  751. const struct pci_device_id *id)
  752. {
  753. static int mthca_version_printed = 0;
  754. int ddr_hidden = 0;
  755. int err;
  756. struct mthca_dev *mdev;
  757. if (!mthca_version_printed) {
  758. printk(KERN_INFO "%s", mthca_version);
  759. ++mthca_version_printed;
  760. }
  761. printk(KERN_INFO PFX "Initializing %s (%s)\n",
  762. pci_pretty_name(pdev), pci_name(pdev));
  763. if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) {
  764. printk(KERN_ERR PFX "%s (%s) has invalid driver data %lx\n",
  765. pci_pretty_name(pdev), pci_name(pdev), id->driver_data);
  766. return -ENODEV;
  767. }
  768. err = pci_enable_device(pdev);
  769. if (err) {
  770. dev_err(&pdev->dev, "Cannot enable PCI device, "
  771. "aborting.\n");
  772. return err;
  773. }
  774. /*
  775. * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not
  776. * be present)
  777. */
  778. if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
  779. pci_resource_len(pdev, 0) != 1 << 20) {
  780. dev_err(&pdev->dev, "Missing DCS, aborting.");
  781. err = -ENODEV;
  782. goto err_disable_pdev;
  783. }
  784. if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM) ||
  785. pci_resource_len(pdev, 2) != 1 << 23) {
  786. dev_err(&pdev->dev, "Missing UAR, aborting.");
  787. err = -ENODEV;
  788. goto err_disable_pdev;
  789. }
  790. if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM))
  791. ddr_hidden = 1;
  792. err = mthca_request_regions(pdev, ddr_hidden);
  793. if (err) {
  794. dev_err(&pdev->dev, "Cannot obtain PCI resources, "
  795. "aborting.\n");
  796. goto err_disable_pdev;
  797. }
  798. pci_set_master(pdev);
  799. err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
  800. if (err) {
  801. dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
  802. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  803. if (err) {
  804. dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
  805. goto err_free_res;
  806. }
  807. }
  808. err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
  809. if (err) {
  810. dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
  811. "consistent PCI DMA mask.\n");
  812. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  813. if (err) {
  814. dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
  815. "aborting.\n");
  816. goto err_free_res;
  817. }
  818. }
  819. mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev);
  820. if (!mdev) {
  821. dev_err(&pdev->dev, "Device struct alloc failed, "
  822. "aborting.\n");
  823. err = -ENOMEM;
  824. goto err_free_res;
  825. }
  826. mdev->pdev = pdev;
  827. if (ddr_hidden)
  828. mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN;
  829. if (mthca_hca_table[id->driver_data].is_memfree)
  830. mdev->mthca_flags |= MTHCA_FLAG_MEMFREE;
  831. if (mthca_hca_table[id->driver_data].is_pcie)
  832. mdev->mthca_flags |= MTHCA_FLAG_PCIE;
  833. /*
  834. * Now reset the HCA before we touch the PCI capabilities or
  835. * attempt a firmware command, since a boot ROM may have left
  836. * the HCA in an undefined state.
  837. */
  838. err = mthca_reset(mdev);
  839. if (err) {
  840. mthca_err(mdev, "Failed to reset HCA, aborting.\n");
  841. goto err_free_dev;
  842. }
  843. if (msi_x && !mthca_enable_msi_x(mdev))
  844. mdev->mthca_flags |= MTHCA_FLAG_MSI_X;
  845. if (msi && !(mdev->mthca_flags & MTHCA_FLAG_MSI_X) &&
  846. !pci_enable_msi(pdev))
  847. mdev->mthca_flags |= MTHCA_FLAG_MSI;
  848. sema_init(&mdev->cmd.hcr_sem, 1);
  849. sema_init(&mdev->cmd.poll_sem, 1);
  850. mdev->cmd.use_events = 0;
  851. mdev->hcr = ioremap(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, MTHCA_HCR_SIZE);
  852. if (!mdev->hcr) {
  853. mthca_err(mdev, "Couldn't map command register, "
  854. "aborting.\n");
  855. err = -ENOMEM;
  856. goto err_free_dev;
  857. }
  858. err = mthca_tune_pci(mdev);
  859. if (err)
  860. goto err_iounmap;
  861. err = mthca_init_hca(mdev);
  862. if (err)
  863. goto err_iounmap;
  864. if (mdev->fw_ver < mthca_hca_table[id->driver_data].latest_fw) {
  865. mthca_warn(mdev, "HCA FW version %x.%x.%x is old (%x.%x.%x is current).\n",
  866. (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff,
  867. (int) (mdev->fw_ver & 0xffff),
  868. (int) (mthca_hca_table[id->driver_data].latest_fw >> 32),
  869. (int) (mthca_hca_table[id->driver_data].latest_fw >> 16) & 0xffff,
  870. (int) (mthca_hca_table[id->driver_data].latest_fw & 0xffff));
  871. mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n");
  872. }
  873. err = mthca_setup_hca(mdev);
  874. if (err)
  875. goto err_close;
  876. err = mthca_register_device(mdev);
  877. if (err)
  878. goto err_cleanup;
  879. err = mthca_create_agents(mdev);
  880. if (err)
  881. goto err_unregister;
  882. pci_set_drvdata(pdev, mdev);
  883. return 0;
  884. err_unregister:
  885. mthca_unregister_device(mdev);
  886. err_cleanup:
  887. mthca_cleanup_mcg_table(mdev);
  888. mthca_cleanup_av_table(mdev);
  889. mthca_cleanup_qp_table(mdev);
  890. mthca_cleanup_cq_table(mdev);
  891. mthca_cmd_use_polling(mdev);
  892. mthca_cleanup_eq_table(mdev);
  893. mthca_pd_free(mdev, &mdev->driver_pd);
  894. mthca_cleanup_mr_table(mdev);
  895. mthca_cleanup_pd_table(mdev);
  896. mthca_cleanup_uar_table(mdev);
  897. err_close:
  898. mthca_close_hca(mdev);
  899. err_iounmap:
  900. iounmap(mdev->hcr);
  901. err_free_dev:
  902. if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
  903. pci_disable_msix(pdev);
  904. if (mdev->mthca_flags & MTHCA_FLAG_MSI)
  905. pci_disable_msi(pdev);
  906. ib_dealloc_device(&mdev->ib_dev);
  907. err_free_res:
  908. mthca_release_regions(pdev, ddr_hidden);
  909. err_disable_pdev:
  910. pci_disable_device(pdev);
  911. pci_set_drvdata(pdev, NULL);
  912. return err;
  913. }
  914. static void __devexit mthca_remove_one(struct pci_dev *pdev)
  915. {
  916. struct mthca_dev *mdev = pci_get_drvdata(pdev);
  917. u8 status;
  918. int p;
  919. if (mdev) {
  920. mthca_free_agents(mdev);
  921. mthca_unregister_device(mdev);
  922. for (p = 1; p <= mdev->limits.num_ports; ++p)
  923. mthca_CLOSE_IB(mdev, p, &status);
  924. mthca_cleanup_mcg_table(mdev);
  925. mthca_cleanup_av_table(mdev);
  926. mthca_cleanup_qp_table(mdev);
  927. mthca_cleanup_cq_table(mdev);
  928. mthca_cmd_use_polling(mdev);
  929. mthca_cleanup_eq_table(mdev);
  930. mthca_pd_free(mdev, &mdev->driver_pd);
  931. mthca_cleanup_mr_table(mdev);
  932. mthca_cleanup_pd_table(mdev);
  933. iounmap(mdev->kar);
  934. mthca_uar_free(mdev, &mdev->driver_uar);
  935. mthca_cleanup_uar_table(mdev);
  936. mthca_close_hca(mdev);
  937. iounmap(mdev->hcr);
  938. if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
  939. pci_disable_msix(pdev);
  940. if (mdev->mthca_flags & MTHCA_FLAG_MSI)
  941. pci_disable_msi(pdev);
  942. ib_dealloc_device(&mdev->ib_dev);
  943. mthca_release_regions(pdev, mdev->mthca_flags &
  944. MTHCA_FLAG_DDR_HIDDEN);
  945. pci_disable_device(pdev);
  946. pci_set_drvdata(pdev, NULL);
  947. }
  948. }
  949. static struct pci_device_id mthca_pci_table[] = {
  950. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR),
  951. .driver_data = TAVOR },
  952. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR),
  953. .driver_data = TAVOR },
  954. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
  955. .driver_data = ARBEL_COMPAT },
  956. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
  957. .driver_data = ARBEL_COMPAT },
  958. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL),
  959. .driver_data = ARBEL_NATIVE },
  960. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL),
  961. .driver_data = ARBEL_NATIVE },
  962. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI),
  963. .driver_data = SINAI },
  964. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI),
  965. .driver_data = SINAI },
  966. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
  967. .driver_data = SINAI },
  968. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
  969. .driver_data = SINAI },
  970. { 0, }
  971. };
  972. MODULE_DEVICE_TABLE(pci, mthca_pci_table);
  973. static struct pci_driver mthca_driver = {
  974. .name = "ib_mthca",
  975. .id_table = mthca_pci_table,
  976. .probe = mthca_init_one,
  977. .remove = __devexit_p(mthca_remove_one)
  978. };
  979. static int __init mthca_init(void)
  980. {
  981. int ret;
  982. ret = pci_register_driver(&mthca_driver);
  983. return ret < 0 ? ret : 0;
  984. }
  985. static void __exit mthca_cleanup(void)
  986. {
  987. pci_unregister_driver(&mthca_driver);
  988. }
  989. module_init(mthca_init);
  990. module_exit(mthca_cleanup);