board-bockw.c 15 KB

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  1. /*
  2. * Bock-W board support
  3. *
  4. * Copyright (C) 2013 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. * Copyright (C) 2013 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  20. */
  21. #include <linux/mfd/tmio.h>
  22. #include <linux/mmc/host.h>
  23. #include <linux/mmc/sh_mobile_sdhi.h>
  24. #include <linux/mmc/sh_mmcif.h>
  25. #include <linux/mtd/partitions.h>
  26. #include <linux/pinctrl/machine.h>
  27. #include <linux/platform_data/usb-rcar-phy.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/regulator/fixed.h>
  30. #include <linux/regulator/machine.h>
  31. #include <linux/smsc911x.h>
  32. #include <linux/spi/spi.h>
  33. #include <linux/spi/flash.h>
  34. #include <media/soc_camera.h>
  35. #include <mach/common.h>
  36. #include <mach/irqs.h>
  37. #include <mach/r8a7778.h>
  38. #include <asm/mach/arch.h>
  39. #include <sound/rcar_snd.h>
  40. #include <sound/simple_card.h>
  41. #define FPGA 0x18200000
  42. #define IRQ0MR 0x30
  43. #define COMCTLR 0x101c
  44. static void __iomem *fpga;
  45. /*
  46. * CN9(Upper side) SCIF/RCAN selection
  47. *
  48. * 1,4 3,6
  49. * SW40 SCIF RCAN
  50. * SW41 SCIF RCAN
  51. */
  52. /*
  53. * MMC (CN26) pin
  54. *
  55. * SW6 (D2) 3 pin
  56. * SW7 (D5) ON
  57. * SW8 (D3) 3 pin
  58. * SW10 (D4) 1 pin
  59. * SW12 (CLK) 1 pin
  60. * SW13 (D6) 3 pin
  61. * SW14 (CMD) ON
  62. * SW15 (D6) 1 pin
  63. * SW16 (D0) ON
  64. * SW17 (D1) ON
  65. * SW18 (D7) 3 pin
  66. * SW19 (MMC) 1 pin
  67. */
  68. /*
  69. * SSI settings
  70. *
  71. * SW45: 1-4 side (SSI5 out, ROUT/LOUT CN19 Mid)
  72. * SW46: 1101 (SSI6 Recorde)
  73. * SW47: 1110 (SSI5 Playback)
  74. * SW48: 11 (Recorde power)
  75. * SW49: 1 (SSI slave mode)
  76. * SW50: 1111 (SSI7, SSI8)
  77. * SW51: 1111 (SSI3, SSI4)
  78. * SW54: 1pin (ak4554 FPGA control)
  79. * SW55: 1 (CLKB is 24.5760MHz)
  80. * SW60: 1pin (ak4554 FPGA control)
  81. * SW61: 3pin (use X11 clock)
  82. * SW78: 3-6 (ak4642 connects I2C0)
  83. *
  84. * You can use sound as
  85. *
  86. * hw0: CN19: SSI56-AK4643
  87. * hw1: CN21: SSI3-AK4554(playback)
  88. * hw2: CN21: SSI4-AK4554(capture)
  89. * hw3: CN20: SSI7-AK4554(playback)
  90. * hw4: CN20: SSI8-AK4554(capture)
  91. *
  92. * this command is required when playback on hw0.
  93. *
  94. * # amixer set "LINEOUT Mixer DACL" on
  95. */
  96. /* Dummy supplies, where voltage doesn't matter */
  97. static struct regulator_consumer_supply dummy_supplies[] = {
  98. REGULATOR_SUPPLY("vddvario", "smsc911x"),
  99. REGULATOR_SUPPLY("vdd33a", "smsc911x"),
  100. };
  101. static struct smsc911x_platform_config smsc911x_data __initdata = {
  102. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  103. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  104. .flags = SMSC911X_USE_32BIT,
  105. .phy_interface = PHY_INTERFACE_MODE_MII,
  106. };
  107. static struct resource smsc911x_resources[] __initdata = {
  108. DEFINE_RES_MEM(0x18300000, 0x1000),
  109. DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
  110. };
  111. /* USB */
  112. static struct resource usb_phy_resources[] __initdata = {
  113. DEFINE_RES_MEM(0xffe70800, 0x100),
  114. DEFINE_RES_MEM(0xffe76000, 0x100),
  115. };
  116. static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
  117. /* SDHI */
  118. static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
  119. .tmio_caps = MMC_CAP_SD_HIGHSPEED,
  120. .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  121. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
  122. };
  123. static struct resource sdhi0_resources[] __initdata = {
  124. DEFINE_RES_MEM(0xFFE4C000, 0x100),
  125. DEFINE_RES_IRQ(gic_iid(0x77)),
  126. };
  127. static struct sh_eth_plat_data ether_platform_data __initdata = {
  128. .phy = 0x01,
  129. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  130. .phy_interface = PHY_INTERFACE_MODE_RMII,
  131. /*
  132. * Although the LINK signal is available on the board, it's connected to
  133. * the link/activity LED output of the PHY, thus the link disappears and
  134. * reappears after each packet. We'd be better off ignoring such signal
  135. * and getting the link state from the PHY indirectly.
  136. */
  137. .no_ether_link = 1,
  138. };
  139. /* I2C */
  140. static struct i2c_board_info i2c0_devices[] = {
  141. {
  142. I2C_BOARD_INFO("rx8581", 0x51),
  143. }, {
  144. I2C_BOARD_INFO("ak4643", 0x12),
  145. }
  146. };
  147. /* HSPI*/
  148. static struct mtd_partition m25p80_spi_flash_partitions[] = {
  149. {
  150. .name = "data(spi)",
  151. .size = 0x0100000,
  152. .offset = 0,
  153. },
  154. };
  155. static struct flash_platform_data spi_flash_data = {
  156. .name = "m25p80",
  157. .type = "s25fl008k",
  158. .parts = m25p80_spi_flash_partitions,
  159. .nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions),
  160. };
  161. static struct spi_board_info spi_board_info[] __initdata = {
  162. {
  163. .modalias = "m25p80",
  164. .max_speed_hz = 104000000,
  165. .chip_select = 0,
  166. .bus_num = 0,
  167. .mode = SPI_MODE_0,
  168. .platform_data = &spi_flash_data,
  169. },
  170. };
  171. /* MMC */
  172. static struct resource mmc_resources[] __initdata = {
  173. DEFINE_RES_MEM(0xffe4e000, 0x100),
  174. DEFINE_RES_IRQ(gic_iid(0x5d)),
  175. };
  176. static struct sh_mmcif_plat_data sh_mmcif_plat __initdata = {
  177. .sup_pclk = 0,
  178. .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  179. .caps = MMC_CAP_4_BIT_DATA |
  180. MMC_CAP_8_BIT_DATA |
  181. MMC_CAP_NEEDS_POLL,
  182. };
  183. static struct rcar_vin_platform_data vin_platform_data __initdata = {
  184. .flags = RCAR_VIN_BT656,
  185. };
  186. /* In the default configuration both decoders reside on I2C bus 0 */
  187. #define BOCKW_CAMERA(idx) \
  188. static struct i2c_board_info camera##idx##_info = { \
  189. I2C_BOARD_INFO("ml86v7667", 0x41 + 2 * (idx)), \
  190. }; \
  191. \
  192. static struct soc_camera_link iclink##idx##_ml86v7667 __initdata = { \
  193. .bus_id = idx, \
  194. .i2c_adapter_id = 0, \
  195. .board_info = &camera##idx##_info, \
  196. }
  197. BOCKW_CAMERA(0);
  198. BOCKW_CAMERA(1);
  199. /* Sound */
  200. static struct resource rsnd_resources[] __initdata = {
  201. [RSND_GEN1_SRU] = DEFINE_RES_MEM(0xffd90000, 0x1000),
  202. [RSND_GEN1_SSI] = DEFINE_RES_MEM(0xffd91000, 0x1240),
  203. [RSND_GEN1_ADG] = DEFINE_RES_MEM(0xfffe0000, 0x24),
  204. };
  205. static struct rsnd_ssi_platform_info rsnd_ssi[] = {
  206. RSND_SSI_UNUSED, /* SSI 0 */
  207. RSND_SSI_UNUSED, /* SSI 1 */
  208. RSND_SSI_UNUSED, /* SSI 2 */
  209. RSND_SSI_SET(1, 0, gic_iid(0x85), RSND_SSI_PLAY),
  210. RSND_SSI_SET(2, 0, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE | RSND_SSI_CLK_FROM_ADG),
  211. RSND_SSI_SET(0, 0, gic_iid(0x86), RSND_SSI_PLAY),
  212. RSND_SSI_SET(0, 0, gic_iid(0x86), 0),
  213. RSND_SSI_SET(3, 0, gic_iid(0x86), RSND_SSI_PLAY),
  214. RSND_SSI_SET(4, 0, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE | RSND_SSI_CLK_FROM_ADG),
  215. };
  216. static struct rsnd_scu_platform_info rsnd_scu[9] = {
  217. /* no member at this point */
  218. };
  219. enum {
  220. AK4554_34 = 0,
  221. AK4643_56,
  222. AK4554_78,
  223. SOUND_MAX,
  224. };
  225. static int rsnd_codec_power(int id, int enable)
  226. {
  227. static int sound_user[SOUND_MAX] = {0, 0, 0};
  228. int *usr = NULL;
  229. u32 bit;
  230. switch (id) {
  231. case 3:
  232. case 4:
  233. usr = sound_user + AK4554_34;
  234. bit = (1 << 10);
  235. break;
  236. case 5:
  237. case 6:
  238. usr = sound_user + AK4643_56;
  239. bit = (1 << 6);
  240. break;
  241. case 7:
  242. case 8:
  243. usr = sound_user + AK4554_78;
  244. bit = (1 << 7);
  245. break;
  246. }
  247. if (!usr)
  248. return -EIO;
  249. if (enable) {
  250. if (*usr == 0) {
  251. u32 val = ioread16(fpga + COMCTLR);
  252. val &= ~bit;
  253. iowrite16(val, fpga + COMCTLR);
  254. }
  255. (*usr)++;
  256. } else {
  257. if (*usr == 0)
  258. return 0;
  259. (*usr)--;
  260. if (*usr == 0) {
  261. u32 val = ioread16(fpga + COMCTLR);
  262. val |= bit;
  263. iowrite16(val, fpga + COMCTLR);
  264. }
  265. }
  266. return 0;
  267. }
  268. static int rsnd_start(int id)
  269. {
  270. return rsnd_codec_power(id, 1);
  271. }
  272. static int rsnd_stop(int id)
  273. {
  274. return rsnd_codec_power(id, 0);
  275. }
  276. static struct rcar_snd_info rsnd_info = {
  277. .flags = RSND_GEN1,
  278. .ssi_info = rsnd_ssi,
  279. .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
  280. .scu_info = rsnd_scu,
  281. .scu_info_nr = ARRAY_SIZE(rsnd_scu),
  282. .start = rsnd_start,
  283. .stop = rsnd_stop,
  284. };
  285. static struct asoc_simple_card_info rsnd_card_info[] = {
  286. /* SSI5, SSI6 */
  287. {
  288. .name = "AK4643",
  289. .card = "SSI56-AK4643",
  290. .codec = "ak4642-codec.0-0012",
  291. .platform = "rcar_sound",
  292. .daifmt = SND_SOC_DAIFMT_LEFT_J,
  293. .cpu_dai = {
  294. .name = "rsnd-dai.0",
  295. .fmt = SND_SOC_DAIFMT_CBS_CFS,
  296. },
  297. .codec_dai = {
  298. .name = "ak4642-hifi",
  299. .fmt = SND_SOC_DAIFMT_CBM_CFM,
  300. .sysclk = 11289600,
  301. },
  302. },
  303. /* SSI3 */
  304. {
  305. .name = "AK4554",
  306. .card = "SSI3-AK4554(playback)",
  307. .codec = "ak4554-adc-dac.0",
  308. .platform = "rcar_sound",
  309. .cpu_dai = {
  310. .name = "rsnd-dai.1",
  311. .fmt = SND_SOC_DAIFMT_CBM_CFM |
  312. SND_SOC_DAIFMT_RIGHT_J,
  313. },
  314. .codec_dai = {
  315. .name = "ak4554-hifi",
  316. },
  317. },
  318. /* SSI4 */
  319. {
  320. .name = "AK4554",
  321. .card = "SSI4-AK4554(capture)",
  322. .codec = "ak4554-adc-dac.0",
  323. .platform = "rcar_sound",
  324. .cpu_dai = {
  325. .name = "rsnd-dai.2",
  326. .fmt = SND_SOC_DAIFMT_CBM_CFM |
  327. SND_SOC_DAIFMT_LEFT_J,
  328. },
  329. .codec_dai = {
  330. .name = "ak4554-hifi",
  331. },
  332. },
  333. /* SSI7 */
  334. {
  335. .name = "AK4554",
  336. .card = "SSI7-AK4554(playback)",
  337. .codec = "ak4554-adc-dac.1",
  338. .platform = "rcar_sound",
  339. .cpu_dai = {
  340. .name = "rsnd-dai.3",
  341. .fmt = SND_SOC_DAIFMT_CBM_CFM |
  342. SND_SOC_DAIFMT_RIGHT_J,
  343. },
  344. .codec_dai = {
  345. .name = "ak4554-hifi",
  346. },
  347. },
  348. /* SSI8 */
  349. {
  350. .name = "AK4554",
  351. .card = "SSI8-AK4554(capture)",
  352. .codec = "ak4554-adc-dac.1",
  353. .platform = "rcar_sound",
  354. .cpu_dai = {
  355. .name = "rsnd-dai.4",
  356. .fmt = SND_SOC_DAIFMT_CBM_CFM |
  357. SND_SOC_DAIFMT_LEFT_J,
  358. },
  359. .codec_dai = {
  360. .name = "ak4554-hifi",
  361. },
  362. }
  363. };
  364. static const struct pinctrl_map bockw_pinctrl_map[] = {
  365. /* AUDIO */
  366. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  367. "audio_clk_a", "audio_clk"),
  368. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  369. "audio_clk_b", "audio_clk"),
  370. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  371. "ssi34_ctrl", "ssi"),
  372. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  373. "ssi3_data", "ssi"),
  374. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  375. "ssi4_data", "ssi"),
  376. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  377. "ssi5_ctrl", "ssi"),
  378. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  379. "ssi5_data", "ssi"),
  380. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  381. "ssi6_ctrl", "ssi"),
  382. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  383. "ssi6_data", "ssi"),
  384. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  385. "ssi78_ctrl", "ssi"),
  386. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  387. "ssi7_data", "ssi"),
  388. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  389. "ssi8_data", "ssi"),
  390. /* Ether */
  391. PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
  392. "ether_rmii", "ether"),
  393. /* HSPI0 */
  394. PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
  395. "hspi0_a", "hspi0"),
  396. /* MMC */
  397. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
  398. "mmc_data8", "mmc"),
  399. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
  400. "mmc_ctrl", "mmc"),
  401. /* SCIF0 */
  402. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
  403. "scif0_data_a", "scif0"),
  404. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
  405. "scif0_ctrl", "scif0"),
  406. /* USB */
  407. PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
  408. "usb0", "usb0"),
  409. PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
  410. "usb1", "usb1"),
  411. /* SDHI0 */
  412. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  413. "sdhi0_data4", "sdhi0"),
  414. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  415. "sdhi0_ctrl", "sdhi0"),
  416. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  417. "sdhi0_cd", "sdhi0"),
  418. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  419. "sdhi0_wp", "sdhi0"),
  420. /* VIN0 */
  421. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
  422. "vin0_clk", "vin0"),
  423. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
  424. "vin0_data8", "vin0"),
  425. /* VIN1 */
  426. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
  427. "vin1_clk", "vin1"),
  428. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
  429. "vin1_data8", "vin1"),
  430. };
  431. #define PFC 0xfffc0000
  432. #define PUPR4 0x110
  433. static void __init bockw_init(void)
  434. {
  435. void __iomem *base;
  436. struct clk *clk;
  437. int i;
  438. r8a7778_clock_init();
  439. r8a7778_init_irq_extpin(1);
  440. r8a7778_add_standard_devices();
  441. r8a7778_add_ether_device(&ether_platform_data);
  442. r8a7778_add_vin_device(0, &vin_platform_data);
  443. /* VIN1 has a pin conflict with Ether */
  444. if (!IS_ENABLED(CONFIG_SH_ETH))
  445. r8a7778_add_vin_device(1, &vin_platform_data);
  446. platform_device_register_data(&platform_bus, "soc-camera-pdrv", 0,
  447. &iclink0_ml86v7667,
  448. sizeof(iclink0_ml86v7667));
  449. platform_device_register_data(&platform_bus, "soc-camera-pdrv", 1,
  450. &iclink1_ml86v7667,
  451. sizeof(iclink1_ml86v7667));
  452. i2c_register_board_info(0, i2c0_devices,
  453. ARRAY_SIZE(i2c0_devices));
  454. spi_register_board_info(spi_board_info,
  455. ARRAY_SIZE(spi_board_info));
  456. pinctrl_register_mappings(bockw_pinctrl_map,
  457. ARRAY_SIZE(bockw_pinctrl_map));
  458. r8a7778_pinmux_init();
  459. platform_device_register_resndata(
  460. &platform_bus, "sh_mmcif", -1,
  461. mmc_resources, ARRAY_SIZE(mmc_resources),
  462. &sh_mmcif_plat, sizeof(struct sh_mmcif_plat_data));
  463. platform_device_register_resndata(
  464. &platform_bus, "rcar_usb_phy", -1,
  465. usb_phy_resources,
  466. ARRAY_SIZE(usb_phy_resources),
  467. &usb_phy_platform_data,
  468. sizeof(struct rcar_phy_platform_data));
  469. /* for SMSC */
  470. fpga = ioremap_nocache(FPGA, SZ_1M);
  471. if (fpga) {
  472. /*
  473. * CAUTION
  474. *
  475. * IRQ0/1 is cascaded interrupt from FPGA.
  476. * it should be cared in the future
  477. * Now, it is assuming IRQ0 was used only from SMSC.
  478. */
  479. u16 val = ioread16(fpga + IRQ0MR);
  480. val &= ~(1 << 4); /* enable SMSC911x */
  481. iowrite16(val, fpga + IRQ0MR);
  482. regulator_register_fixed(0, dummy_supplies,
  483. ARRAY_SIZE(dummy_supplies));
  484. platform_device_register_resndata(
  485. &platform_bus, "smsc911x", -1,
  486. smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
  487. &smsc911x_data, sizeof(smsc911x_data));
  488. }
  489. /* for SDHI */
  490. base = ioremap_nocache(PFC, 0x200);
  491. if (base) {
  492. /*
  493. * FIXME
  494. *
  495. * SDHI CD/WP pin needs pull-up
  496. */
  497. iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
  498. iounmap(base);
  499. platform_device_register_resndata(
  500. &platform_bus, "sh_mobile_sdhi", 0,
  501. sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
  502. &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
  503. }
  504. /* for Audio */
  505. clk = clk_get(NULL, "audio_clk_b");
  506. clk_set_rate(clk, 24576000);
  507. clk_put(clk);
  508. rsnd_codec_power(5, 1); /* enable ak4642 */
  509. platform_device_register_simple(
  510. "ak4554-adc-dac", 0, NULL, 0);
  511. platform_device_register_simple(
  512. "ak4554-adc-dac", 1, NULL, 0);
  513. platform_device_register_resndata(
  514. &platform_bus, "rcar_sound", -1,
  515. rsnd_resources, ARRAY_SIZE(rsnd_resources),
  516. &rsnd_info, sizeof(rsnd_info));
  517. for (i = 0; i < ARRAY_SIZE(rsnd_card_info); i++) {
  518. struct platform_device_info cardinfo = {
  519. .parent = &platform_bus,
  520. .name = "asoc-simple-card",
  521. .id = i,
  522. .data = &rsnd_card_info[i],
  523. .size_data = sizeof(struct asoc_simple_card_info),
  524. .dma_mask = ~0,
  525. };
  526. platform_device_register_full(&cardinfo);
  527. }
  528. }
  529. static const char *bockw_boards_compat_dt[] __initdata = {
  530. "renesas,bockw",
  531. NULL,
  532. };
  533. DT_MACHINE_START(BOCKW_DT, "bockw")
  534. .init_early = r8a7778_init_delay,
  535. .init_irq = r8a7778_init_irq_dt,
  536. .init_machine = bockw_init,
  537. .dt_compat = bockw_boards_compat_dt,
  538. .init_late = r8a7778_init_late,
  539. MACHINE_END