lpfc_sli.c 73 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2005 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <scsi/scsi.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_host.h>
  29. #include <scsi/scsi_transport_fc.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. /*
  39. * Define macro to log: Mailbox command x%x cannot issue Data
  40. * This allows multiple uses of lpfc_msgBlk0311
  41. * w/o perturbing log msg utility.
  42. */
  43. #define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
  44. lpfc_printf_log(phba, \
  45. KERN_INFO, \
  46. LOG_MBOX | LOG_SLI, \
  47. "%d:0311 Mailbox command x%x cannot issue " \
  48. "Data: x%x x%x x%x\n", \
  49. phba->brd_no, \
  50. mb->mbxCommand, \
  51. phba->hba_state, \
  52. psli->sli_flag, \
  53. flag);
  54. /* There are only four IOCB completion types. */
  55. typedef enum _lpfc_iocb_type {
  56. LPFC_UNKNOWN_IOCB,
  57. LPFC_UNSOL_IOCB,
  58. LPFC_SOL_IOCB,
  59. LPFC_ABORT_IOCB
  60. } lpfc_iocb_type;
  61. void
  62. lpfc_sli_release_iocbq(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
  63. {
  64. size_t start_clean = (size_t)(&((struct lpfc_iocbq *)NULL)->iocb);
  65. /*
  66. * Clean all volatile data fields, preserve iotag and node struct.
  67. */
  68. memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
  69. list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
  70. }
  71. /*
  72. * Translate the iocb command to an iocb command type used to decide the final
  73. * disposition of each completed IOCB.
  74. */
  75. static lpfc_iocb_type
  76. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  77. {
  78. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  79. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  80. return 0;
  81. switch (iocb_cmnd) {
  82. case CMD_XMIT_SEQUENCE_CR:
  83. case CMD_XMIT_SEQUENCE_CX:
  84. case CMD_XMIT_BCAST_CN:
  85. case CMD_XMIT_BCAST_CX:
  86. case CMD_ELS_REQUEST_CR:
  87. case CMD_ELS_REQUEST_CX:
  88. case CMD_CREATE_XRI_CR:
  89. case CMD_CREATE_XRI_CX:
  90. case CMD_GET_RPI_CN:
  91. case CMD_XMIT_ELS_RSP_CX:
  92. case CMD_GET_RPI_CR:
  93. case CMD_FCP_IWRITE_CR:
  94. case CMD_FCP_IWRITE_CX:
  95. case CMD_FCP_IREAD_CR:
  96. case CMD_FCP_IREAD_CX:
  97. case CMD_FCP_ICMND_CR:
  98. case CMD_FCP_ICMND_CX:
  99. case CMD_ADAPTER_MSG:
  100. case CMD_ADAPTER_DUMP:
  101. case CMD_XMIT_SEQUENCE64_CR:
  102. case CMD_XMIT_SEQUENCE64_CX:
  103. case CMD_XMIT_BCAST64_CN:
  104. case CMD_XMIT_BCAST64_CX:
  105. case CMD_ELS_REQUEST64_CR:
  106. case CMD_ELS_REQUEST64_CX:
  107. case CMD_FCP_IWRITE64_CR:
  108. case CMD_FCP_IWRITE64_CX:
  109. case CMD_FCP_IREAD64_CR:
  110. case CMD_FCP_IREAD64_CX:
  111. case CMD_FCP_ICMND64_CR:
  112. case CMD_FCP_ICMND64_CX:
  113. case CMD_GEN_REQUEST64_CR:
  114. case CMD_GEN_REQUEST64_CX:
  115. case CMD_XMIT_ELS_RSP64_CX:
  116. type = LPFC_SOL_IOCB;
  117. break;
  118. case CMD_ABORT_XRI_CN:
  119. case CMD_ABORT_XRI_CX:
  120. case CMD_CLOSE_XRI_CN:
  121. case CMD_CLOSE_XRI_CX:
  122. case CMD_XRI_ABORTED_CX:
  123. case CMD_ABORT_MXRI64_CN:
  124. type = LPFC_ABORT_IOCB;
  125. break;
  126. case CMD_RCV_SEQUENCE_CX:
  127. case CMD_RCV_ELS_REQ_CX:
  128. case CMD_RCV_SEQUENCE64_CX:
  129. case CMD_RCV_ELS_REQ64_CX:
  130. type = LPFC_UNSOL_IOCB;
  131. break;
  132. default:
  133. type = LPFC_UNKNOWN_IOCB;
  134. break;
  135. }
  136. return type;
  137. }
  138. static int
  139. lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
  140. {
  141. struct lpfc_sli *psli = &phba->sli;
  142. MAILBOX_t *pmbox = &pmb->mb;
  143. int i, rc;
  144. for (i = 0; i < psli->num_rings; i++) {
  145. phba->hba_state = LPFC_INIT_MBX_CMDS;
  146. lpfc_config_ring(phba, i, pmb);
  147. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  148. if (rc != MBX_SUCCESS) {
  149. lpfc_printf_log(phba,
  150. KERN_ERR,
  151. LOG_INIT,
  152. "%d:0446 Adapter failed to init, "
  153. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  154. "ring %d\n",
  155. phba->brd_no,
  156. pmbox->mbxCommand,
  157. pmbox->mbxStatus,
  158. i);
  159. phba->hba_state = LPFC_HBA_ERROR;
  160. return -ENXIO;
  161. }
  162. }
  163. return 0;
  164. }
  165. static int
  166. lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
  167. struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
  168. {
  169. uint16_t iotag;
  170. list_add_tail(&piocb->list, &pring->txcmplq);
  171. pring->txcmplq_cnt++;
  172. if (unlikely(pring->ringno == LPFC_ELS_RING))
  173. mod_timer(&phba->els_tmofunc,
  174. jiffies + HZ * (phba->fc_ratov << 1));
  175. if (pring->fast_lookup) {
  176. /* Setup fast lookup based on iotag for completion */
  177. iotag = piocb->iocb.ulpIoTag;
  178. if (iotag && (iotag < pring->fast_iotag))
  179. *(pring->fast_lookup + iotag) = piocb;
  180. else {
  181. /* Cmd ring <ringno> put: iotag <iotag> greater then
  182. configured max <fast_iotag> wd0 <icmd> */
  183. lpfc_printf_log(phba,
  184. KERN_ERR,
  185. LOG_SLI,
  186. "%d:0316 Cmd ring %d put: iotag x%x "
  187. "greater then configured max x%x "
  188. "wd0 x%x\n",
  189. phba->brd_no,
  190. pring->ringno, iotag,
  191. pring->fast_iotag,
  192. *(((uint32_t *)(&piocb->iocb)) + 7));
  193. }
  194. }
  195. return (0);
  196. }
  197. static struct lpfc_iocbq *
  198. lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  199. {
  200. struct list_head *dlp;
  201. struct lpfc_iocbq *cmd_iocb;
  202. dlp = &pring->txq;
  203. cmd_iocb = NULL;
  204. list_remove_head((&pring->txq), cmd_iocb,
  205. struct lpfc_iocbq,
  206. list);
  207. if (cmd_iocb) {
  208. /* If the first ptr is not equal to the list header,
  209. * deque the IOCBQ_t and return it.
  210. */
  211. pring->txq_cnt--;
  212. }
  213. return (cmd_iocb);
  214. }
  215. static IOCB_t *
  216. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  217. {
  218. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  219. uint32_t max_cmd_idx = pring->numCiocb;
  220. IOCB_t *iocb = NULL;
  221. if ((pring->next_cmdidx == pring->cmdidx) &&
  222. (++pring->next_cmdidx >= max_cmd_idx))
  223. pring->next_cmdidx = 0;
  224. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  225. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  226. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  227. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  228. "%d:0315 Ring %d issue: portCmdGet %d "
  229. "is bigger then cmd ring %d\n",
  230. phba->brd_no, pring->ringno,
  231. pring->local_getidx, max_cmd_idx);
  232. phba->hba_state = LPFC_HBA_ERROR;
  233. /*
  234. * All error attention handlers are posted to
  235. * worker thread
  236. */
  237. phba->work_ha |= HA_ERATT;
  238. phba->work_hs = HS_FFER3;
  239. if (phba->work_wait)
  240. wake_up(phba->work_wait);
  241. return NULL;
  242. }
  243. if (pring->local_getidx == pring->next_cmdidx)
  244. return NULL;
  245. }
  246. iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
  247. return iocb;
  248. }
  249. uint16_t
  250. lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
  251. {
  252. struct lpfc_iocbq ** new_arr;
  253. struct lpfc_iocbq ** old_arr;
  254. size_t new_len;
  255. struct lpfc_sli *psli = &phba->sli;
  256. uint16_t iotag;
  257. spin_lock_irq(phba->host->host_lock);
  258. iotag = psli->last_iotag;
  259. if(++iotag < psli->iocbq_lookup_len) {
  260. psli->last_iotag = iotag;
  261. psli->iocbq_lookup[iotag] = iocbq;
  262. spin_unlock_irq(phba->host->host_lock);
  263. iocbq->iotag = iotag;
  264. return iotag;
  265. }
  266. else if (psli->iocbq_lookup_len < (0xffff
  267. - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
  268. new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
  269. spin_unlock_irq(phba->host->host_lock);
  270. new_arr = kmalloc(new_len * sizeof (struct lpfc_iocbq *),
  271. GFP_KERNEL);
  272. if (new_arr) {
  273. memset((char *)new_arr, 0,
  274. new_len * sizeof (struct lpfc_iocbq *));
  275. spin_lock_irq(phba->host->host_lock);
  276. old_arr = psli->iocbq_lookup;
  277. if (new_len <= psli->iocbq_lookup_len) {
  278. /* highly unprobable case */
  279. kfree(new_arr);
  280. iotag = psli->last_iotag;
  281. if(++iotag < psli->iocbq_lookup_len) {
  282. psli->last_iotag = iotag;
  283. psli->iocbq_lookup[iotag] = iocbq;
  284. spin_unlock_irq(phba->host->host_lock);
  285. iocbq->iotag = iotag;
  286. return iotag;
  287. }
  288. spin_unlock_irq(phba->host->host_lock);
  289. return 0;
  290. }
  291. if (psli->iocbq_lookup)
  292. memcpy(new_arr, old_arr,
  293. ((psli->last_iotag + 1) *
  294. sizeof (struct lpfc_iocbq *)));
  295. psli->iocbq_lookup = new_arr;
  296. psli->iocbq_lookup_len = new_len;
  297. psli->last_iotag = iotag;
  298. psli->iocbq_lookup[iotag] = iocbq;
  299. spin_unlock_irq(phba->host->host_lock);
  300. iocbq->iotag = iotag;
  301. kfree(old_arr);
  302. return iotag;
  303. }
  304. }
  305. lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
  306. "%d:0318 Failed to allocate IOTAG.last IOTAG is %d\n",
  307. phba->brd_no, psli->last_iotag);
  308. return 0;
  309. }
  310. static void
  311. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  312. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  313. {
  314. /*
  315. * Set up an iotag
  316. */
  317. nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
  318. /*
  319. * Issue iocb command to adapter
  320. */
  321. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
  322. wmb();
  323. pring->stats.iocb_cmd++;
  324. /*
  325. * If there is no completion routine to call, we can release the
  326. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  327. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  328. */
  329. if (nextiocb->iocb_cmpl)
  330. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  331. else
  332. lpfc_sli_release_iocbq(phba, nextiocb);
  333. /*
  334. * Let the HBA know what IOCB slot will be the next one the
  335. * driver will put a command into.
  336. */
  337. pring->cmdidx = pring->next_cmdidx;
  338. writel(pring->cmdidx, phba->MBslimaddr
  339. + (SLIMOFF + (pring->ringno * 2)) * 4);
  340. }
  341. static void
  342. lpfc_sli_update_full_ring(struct lpfc_hba * phba,
  343. struct lpfc_sli_ring *pring)
  344. {
  345. int ringno = pring->ringno;
  346. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  347. wmb();
  348. /*
  349. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  350. * The HBA will tell us when an IOCB entry is available.
  351. */
  352. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  353. readl(phba->CAregaddr); /* flush */
  354. pring->stats.iocb_cmd_full++;
  355. }
  356. static void
  357. lpfc_sli_update_ring(struct lpfc_hba * phba,
  358. struct lpfc_sli_ring *pring)
  359. {
  360. int ringno = pring->ringno;
  361. /*
  362. * Tell the HBA that there is work to do in this ring.
  363. */
  364. wmb();
  365. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  366. readl(phba->CAregaddr); /* flush */
  367. }
  368. static void
  369. lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  370. {
  371. IOCB_t *iocb;
  372. struct lpfc_iocbq *nextiocb;
  373. /*
  374. * Check to see if:
  375. * (a) there is anything on the txq to send
  376. * (b) link is up
  377. * (c) link attention events can be processed (fcp ring only)
  378. * (d) IOCB processing is not blocked by the outstanding mbox command.
  379. */
  380. if (pring->txq_cnt &&
  381. (phba->hba_state > LPFC_LINK_DOWN) &&
  382. (pring->ringno != phba->sli.fcp_ring ||
  383. phba->sli.sli_flag & LPFC_PROCESS_LA) &&
  384. !(pring->flag & LPFC_STOP_IOCB_MBX)) {
  385. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  386. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  387. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  388. if (iocb)
  389. lpfc_sli_update_ring(phba, pring);
  390. else
  391. lpfc_sli_update_full_ring(phba, pring);
  392. }
  393. return;
  394. }
  395. /* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
  396. static void
  397. lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
  398. {
  399. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno];
  400. /* If the ring is active, flag it */
  401. if (phba->sli.ring[ringno].cmdringaddr) {
  402. if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
  403. phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
  404. /*
  405. * Force update of the local copy of cmdGetInx
  406. */
  407. phba->sli.ring[ringno].local_getidx
  408. = le32_to_cpu(pgp->cmdGetInx);
  409. spin_lock_irq(phba->host->host_lock);
  410. lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
  411. spin_unlock_irq(phba->host->host_lock);
  412. }
  413. }
  414. }
  415. static int
  416. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  417. {
  418. uint8_t ret;
  419. switch (mbxCommand) {
  420. case MBX_LOAD_SM:
  421. case MBX_READ_NV:
  422. case MBX_WRITE_NV:
  423. case MBX_RUN_BIU_DIAG:
  424. case MBX_INIT_LINK:
  425. case MBX_DOWN_LINK:
  426. case MBX_CONFIG_LINK:
  427. case MBX_CONFIG_RING:
  428. case MBX_RESET_RING:
  429. case MBX_READ_CONFIG:
  430. case MBX_READ_RCONFIG:
  431. case MBX_READ_SPARM:
  432. case MBX_READ_STATUS:
  433. case MBX_READ_RPI:
  434. case MBX_READ_XRI:
  435. case MBX_READ_REV:
  436. case MBX_READ_LNK_STAT:
  437. case MBX_REG_LOGIN:
  438. case MBX_UNREG_LOGIN:
  439. case MBX_READ_LA:
  440. case MBX_CLEAR_LA:
  441. case MBX_DUMP_MEMORY:
  442. case MBX_DUMP_CONTEXT:
  443. case MBX_RUN_DIAGS:
  444. case MBX_RESTART:
  445. case MBX_UPDATE_CFG:
  446. case MBX_DOWN_LOAD:
  447. case MBX_DEL_LD_ENTRY:
  448. case MBX_RUN_PROGRAM:
  449. case MBX_SET_MASK:
  450. case MBX_SET_SLIM:
  451. case MBX_UNREG_D_ID:
  452. case MBX_CONFIG_FARP:
  453. case MBX_LOAD_AREA:
  454. case MBX_RUN_BIU_DIAG64:
  455. case MBX_CONFIG_PORT:
  456. case MBX_READ_SPARM64:
  457. case MBX_READ_RPI64:
  458. case MBX_REG_LOGIN64:
  459. case MBX_READ_LA64:
  460. case MBX_FLASH_WR_ULA:
  461. case MBX_SET_DEBUG:
  462. case MBX_LOAD_EXP_ROM:
  463. ret = mbxCommand;
  464. break;
  465. default:
  466. ret = MBX_SHUTDOWN;
  467. break;
  468. }
  469. return (ret);
  470. }
  471. static void
  472. lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
  473. {
  474. wait_queue_head_t *pdone_q;
  475. /*
  476. * If pdone_q is empty, the driver thread gave up waiting and
  477. * continued running.
  478. */
  479. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  480. if (pdone_q)
  481. wake_up_interruptible(pdone_q);
  482. return;
  483. }
  484. void
  485. lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  486. {
  487. struct lpfc_dmabuf *mp;
  488. mp = (struct lpfc_dmabuf *) (pmb->context1);
  489. if (mp) {
  490. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  491. kfree(mp);
  492. }
  493. mempool_free( pmb, phba->mbox_mem_pool);
  494. return;
  495. }
  496. int
  497. lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
  498. {
  499. MAILBOX_t *mbox;
  500. MAILBOX_t *pmbox;
  501. LPFC_MBOXQ_t *pmb;
  502. struct lpfc_sli *psli;
  503. int i, rc;
  504. uint32_t process_next;
  505. psli = &phba->sli;
  506. /* We should only get here if we are in SLI2 mode */
  507. if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
  508. return (1);
  509. }
  510. phba->sli.slistat.mbox_event++;
  511. /* Get a Mailbox buffer to setup mailbox commands for callback */
  512. if ((pmb = phba->sli.mbox_active)) {
  513. pmbox = &pmb->mb;
  514. mbox = &phba->slim2p->mbx;
  515. /* First check out the status word */
  516. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
  517. /* Sanity check to ensure the host owns the mailbox */
  518. if (pmbox->mbxOwner != OWN_HOST) {
  519. /* Lets try for a while */
  520. for (i = 0; i < 10240; i++) {
  521. /* First copy command data */
  522. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  523. sizeof (uint32_t));
  524. if (pmbox->mbxOwner == OWN_HOST)
  525. goto mbout;
  526. }
  527. /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
  528. <status> */
  529. lpfc_printf_log(phba,
  530. KERN_ERR,
  531. LOG_MBOX | LOG_SLI,
  532. "%d:0304 Stray Mailbox Interrupt "
  533. "mbxCommand x%x mbxStatus x%x\n",
  534. phba->brd_no,
  535. pmbox->mbxCommand,
  536. pmbox->mbxStatus);
  537. spin_lock_irq(phba->host->host_lock);
  538. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  539. spin_unlock_irq(phba->host->host_lock);
  540. return (1);
  541. }
  542. mbout:
  543. del_timer_sync(&phba->sli.mbox_tmo);
  544. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  545. /*
  546. * It is a fatal error if unknown mbox command completion.
  547. */
  548. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  549. MBX_SHUTDOWN) {
  550. /* Unknow mailbox command compl */
  551. lpfc_printf_log(phba,
  552. KERN_ERR,
  553. LOG_MBOX | LOG_SLI,
  554. "%d:0323 Unknown Mailbox command %x Cmpl\n",
  555. phba->brd_no,
  556. pmbox->mbxCommand);
  557. phba->hba_state = LPFC_HBA_ERROR;
  558. phba->work_hs = HS_FFER3;
  559. lpfc_handle_eratt(phba);
  560. return (0);
  561. }
  562. phba->sli.mbox_active = NULL;
  563. if (pmbox->mbxStatus) {
  564. phba->sli.slistat.mbox_stat_err++;
  565. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  566. /* Mbox cmd cmpl error - RETRYing */
  567. lpfc_printf_log(phba,
  568. KERN_INFO,
  569. LOG_MBOX | LOG_SLI,
  570. "%d:0305 Mbox cmd cmpl error - "
  571. "RETRYing Data: x%x x%x x%x x%x\n",
  572. phba->brd_no,
  573. pmbox->mbxCommand,
  574. pmbox->mbxStatus,
  575. pmbox->un.varWords[0],
  576. phba->hba_state);
  577. pmbox->mbxStatus = 0;
  578. pmbox->mbxOwner = OWN_HOST;
  579. spin_lock_irq(phba->host->host_lock);
  580. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  581. spin_unlock_irq(phba->host->host_lock);
  582. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  583. if (rc == MBX_SUCCESS)
  584. return (0);
  585. }
  586. }
  587. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  588. lpfc_printf_log(phba,
  589. KERN_INFO,
  590. LOG_MBOX | LOG_SLI,
  591. "%d:0307 Mailbox cmd x%x Cmpl x%p "
  592. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  593. phba->brd_no,
  594. pmbox->mbxCommand,
  595. pmb->mbox_cmpl,
  596. *((uint32_t *) pmbox),
  597. pmbox->un.varWords[0],
  598. pmbox->un.varWords[1],
  599. pmbox->un.varWords[2],
  600. pmbox->un.varWords[3],
  601. pmbox->un.varWords[4],
  602. pmbox->un.varWords[5],
  603. pmbox->un.varWords[6],
  604. pmbox->un.varWords[7]);
  605. if (pmb->mbox_cmpl) {
  606. lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
  607. pmb->mbox_cmpl(phba,pmb);
  608. }
  609. }
  610. do {
  611. process_next = 0; /* by default don't loop */
  612. spin_lock_irq(phba->host->host_lock);
  613. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  614. /* Process next mailbox command if there is one */
  615. if ((pmb = lpfc_mbox_get(phba))) {
  616. spin_unlock_irq(phba->host->host_lock);
  617. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  618. if (rc == MBX_NOT_FINISHED) {
  619. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  620. pmb->mbox_cmpl(phba,pmb);
  621. process_next = 1;
  622. continue; /* loop back */
  623. }
  624. } else {
  625. spin_unlock_irq(phba->host->host_lock);
  626. /* Turn on IOCB processing */
  627. for (i = 0; i < phba->sli.num_rings; i++) {
  628. lpfc_sli_turn_on_ring(phba, i);
  629. }
  630. /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */
  631. while (!list_empty(&phba->freebufList)) {
  632. struct lpfc_dmabuf *mp;
  633. mp = NULL;
  634. list_remove_head((&phba->freebufList),
  635. mp,
  636. struct lpfc_dmabuf,
  637. list);
  638. if (mp) {
  639. lpfc_mbuf_free(phba, mp->virt,
  640. mp->phys);
  641. kfree(mp);
  642. }
  643. }
  644. }
  645. } while (process_next);
  646. return (0);
  647. }
  648. static int
  649. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  650. struct lpfc_iocbq *saveq)
  651. {
  652. IOCB_t * irsp;
  653. WORD5 * w5p;
  654. uint32_t Rctl, Type;
  655. uint32_t match, i;
  656. match = 0;
  657. irsp = &(saveq->iocb);
  658. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  659. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
  660. Rctl = FC_ELS_REQ;
  661. Type = FC_ELS_DATA;
  662. } else {
  663. w5p =
  664. (WORD5 *) & (saveq->iocb.un.
  665. ulpWord[5]);
  666. Rctl = w5p->hcsw.Rctl;
  667. Type = w5p->hcsw.Type;
  668. /* Firmware Workaround */
  669. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  670. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
  671. Rctl = FC_ELS_REQ;
  672. Type = FC_ELS_DATA;
  673. w5p->hcsw.Rctl = Rctl;
  674. w5p->hcsw.Type = Type;
  675. }
  676. }
  677. /* unSolicited Responses */
  678. if (pring->prt[0].profile) {
  679. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring, saveq);
  680. match = 1;
  681. } else {
  682. /* We must search, based on rctl / type
  683. for the right routine */
  684. for (i = 0; i < pring->num_mask;
  685. i++) {
  686. if ((pring->prt[i].rctl ==
  687. Rctl)
  688. && (pring->prt[i].
  689. type == Type)) {
  690. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  691. (phba, pring, saveq);
  692. match = 1;
  693. break;
  694. }
  695. }
  696. }
  697. if (match == 0) {
  698. /* Unexpected Rctl / Type received */
  699. /* Ring <ringno> handler: unexpected
  700. Rctl <Rctl> Type <Type> received */
  701. lpfc_printf_log(phba,
  702. KERN_WARNING,
  703. LOG_SLI,
  704. "%d:0313 Ring %d handler: unexpected Rctl x%x "
  705. "Type x%x received \n",
  706. phba->brd_no,
  707. pring->ringno,
  708. Rctl,
  709. Type);
  710. }
  711. return(1);
  712. }
  713. static struct lpfc_iocbq *
  714. lpfc_sli_iocbq_lookup(struct lpfc_hba * phba,
  715. struct lpfc_sli_ring * pring,
  716. struct lpfc_iocbq * prspiocb)
  717. {
  718. struct lpfc_iocbq *cmd_iocb = NULL;
  719. uint16_t iotag;
  720. iotag = prspiocb->iocb.ulpIoTag;
  721. if (iotag != 0 && iotag <= phba->sli.last_iotag) {
  722. cmd_iocb = phba->sli.iocbq_lookup[iotag];
  723. list_del(&cmd_iocb->list);
  724. pring->txcmplq_cnt--;
  725. return cmd_iocb;
  726. }
  727. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  728. "%d:0317 iotag x%x is out off "
  729. "range: max iotag x%x wd0 x%x\n",
  730. phba->brd_no, iotag,
  731. phba->sli.last_iotag,
  732. *(((uint32_t *) &prspiocb->iocb) + 7));
  733. return NULL;
  734. }
  735. static int
  736. lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  737. struct lpfc_iocbq *saveq)
  738. {
  739. struct lpfc_iocbq * cmdiocbp;
  740. int rc = 1;
  741. unsigned long iflag;
  742. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  743. spin_lock_irqsave(phba->host->host_lock, iflag);
  744. cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
  745. if (cmdiocbp) {
  746. if (cmdiocbp->iocb_cmpl) {
  747. /*
  748. * Post all ELS completions to the worker thread.
  749. * All other are passed to the completion callback.
  750. */
  751. if (pring->ringno == LPFC_ELS_RING) {
  752. spin_unlock_irqrestore(phba->host->host_lock,
  753. iflag);
  754. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  755. spin_lock_irqsave(phba->host->host_lock, iflag);
  756. }
  757. else {
  758. spin_unlock_irqrestore(phba->host->host_lock,
  759. iflag);
  760. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  761. spin_lock_irqsave(phba->host->host_lock, iflag);
  762. }
  763. } else
  764. lpfc_sli_release_iocbq(phba, cmdiocbp);
  765. } else {
  766. /*
  767. * Unknown initiating command based on the response iotag.
  768. * This could be the case on the ELS ring because of
  769. * lpfc_els_abort().
  770. */
  771. if (pring->ringno != LPFC_ELS_RING) {
  772. /*
  773. * Ring <ringno> handler: unexpected completion IoTag
  774. * <IoTag>
  775. */
  776. lpfc_printf_log(phba,
  777. KERN_WARNING,
  778. LOG_SLI,
  779. "%d:0322 Ring %d handler: unexpected "
  780. "completion IoTag x%x Data: x%x x%x x%x x%x\n",
  781. phba->brd_no,
  782. pring->ringno,
  783. saveq->iocb.ulpIoTag,
  784. saveq->iocb.ulpStatus,
  785. saveq->iocb.un.ulpWord[4],
  786. saveq->iocb.ulpCommand,
  787. saveq->iocb.ulpContext);
  788. }
  789. }
  790. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  791. return rc;
  792. }
  793. /*
  794. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  795. * to check it explicitly.
  796. */
  797. static int
  798. lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
  799. struct lpfc_sli_ring * pring, uint32_t mask)
  800. {
  801. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  802. IOCB_t *irsp = NULL;
  803. IOCB_t *entry = NULL;
  804. struct lpfc_iocbq *cmdiocbq = NULL;
  805. struct lpfc_iocbq rspiocbq;
  806. uint32_t status;
  807. uint32_t portRspPut, portRspMax;
  808. int rc = 1;
  809. lpfc_iocb_type type;
  810. unsigned long iflag;
  811. uint32_t rsp_cmpl = 0;
  812. void __iomem *to_slim;
  813. spin_lock_irqsave(phba->host->host_lock, iflag);
  814. pring->stats.iocb_event++;
  815. /*
  816. * The next available response entry should never exceed the maximum
  817. * entries. If it does, treat it as an adapter hardware error.
  818. */
  819. portRspMax = pring->numRiocb;
  820. portRspPut = le32_to_cpu(pgp->rspPutInx);
  821. if (unlikely(portRspPut >= portRspMax)) {
  822. /*
  823. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  824. * rsp ring <portRspMax>
  825. */
  826. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  827. "%d:0312 Ring %d handler: portRspPut %d "
  828. "is bigger then rsp ring %d\n",
  829. phba->brd_no, pring->ringno, portRspPut,
  830. portRspMax);
  831. phba->hba_state = LPFC_HBA_ERROR;
  832. /* All error attention handlers are posted to worker thread */
  833. phba->work_ha |= HA_ERATT;
  834. phba->work_hs = HS_FFER3;
  835. if (phba->work_wait)
  836. wake_up(phba->work_wait);
  837. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  838. return 1;
  839. }
  840. rmb();
  841. while (pring->rspidx != portRspPut) {
  842. /*
  843. * Fetch an entry off the ring and copy it into a local data
  844. * structure. The copy involves a byte-swap since the
  845. * network byte order and pci byte orders are different.
  846. */
  847. entry = (IOCB_t *) IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  848. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  849. (uint32_t *) &rspiocbq.iocb,
  850. sizeof (IOCB_t));
  851. irsp = &rspiocbq.iocb;
  852. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  853. pring->stats.iocb_rsp++;
  854. rsp_cmpl++;
  855. if (unlikely(irsp->ulpStatus)) {
  856. /* Rsp ring <ringno> error: IOCB */
  857. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  858. "%d:0326 Rsp Ring %d error: IOCB Data: "
  859. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  860. phba->brd_no, pring->ringno,
  861. irsp->un.ulpWord[0], irsp->un.ulpWord[1],
  862. irsp->un.ulpWord[2], irsp->un.ulpWord[3],
  863. irsp->un.ulpWord[4], irsp->un.ulpWord[5],
  864. *(((uint32_t *) irsp) + 6),
  865. *(((uint32_t *) irsp) + 7));
  866. }
  867. switch (type) {
  868. case LPFC_ABORT_IOCB:
  869. case LPFC_SOL_IOCB:
  870. /*
  871. * Idle exchange closed via ABTS from port. No iocb
  872. * resources need to be recovered.
  873. */
  874. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  875. printk(KERN_INFO "%s: IOCB cmd 0x%x processed. "
  876. "Skipping completion\n", __FUNCTION__,
  877. irsp->ulpCommand);
  878. break;
  879. }
  880. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  881. &rspiocbq);
  882. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  883. spin_unlock_irqrestore(
  884. phba->host->host_lock, iflag);
  885. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  886. &rspiocbq);
  887. spin_lock_irqsave(phba->host->host_lock,
  888. iflag);
  889. }
  890. break;
  891. default:
  892. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  893. char adaptermsg[LPFC_MAX_ADPTMSG];
  894. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  895. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  896. MAX_MSG_DATA);
  897. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  898. phba->brd_no, adaptermsg);
  899. } else {
  900. /* Unknown IOCB command */
  901. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  902. "%d:0321 Unknown IOCB command "
  903. "Data: x%x, x%x x%x x%x x%x\n",
  904. phba->brd_no, type, irsp->ulpCommand,
  905. irsp->ulpStatus, irsp->ulpIoTag,
  906. irsp->ulpContext);
  907. }
  908. break;
  909. }
  910. /*
  911. * The response IOCB has been processed. Update the ring
  912. * pointer in SLIM. If the port response put pointer has not
  913. * been updated, sync the pgp->rspPutInx and fetch the new port
  914. * response put pointer.
  915. */
  916. if (++pring->rspidx >= portRspMax)
  917. pring->rspidx = 0;
  918. to_slim = phba->MBslimaddr +
  919. (SLIMOFF + (pring->ringno * 2) + 1) * 4;
  920. writel(pring->rspidx, to_slim);
  921. if (pring->rspidx == portRspPut)
  922. portRspPut = le32_to_cpu(pgp->rspPutInx);
  923. }
  924. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  925. pring->stats.iocb_rsp_full++;
  926. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  927. writel(status, phba->CAregaddr);
  928. readl(phba->CAregaddr);
  929. }
  930. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  931. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  932. pring->stats.iocb_cmd_empty++;
  933. /* Force update of the local copy of cmdGetInx */
  934. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  935. lpfc_sli_resume_iocb(phba, pring);
  936. if ((pring->lpfc_sli_cmd_available))
  937. (pring->lpfc_sli_cmd_available) (phba, pring);
  938. }
  939. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  940. return rc;
  941. }
  942. int
  943. lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
  944. struct lpfc_sli_ring * pring, uint32_t mask)
  945. {
  946. IOCB_t *entry;
  947. IOCB_t *irsp = NULL;
  948. struct lpfc_iocbq *rspiocbp = NULL;
  949. struct lpfc_iocbq *next_iocb;
  950. struct lpfc_iocbq *cmdiocbp;
  951. struct lpfc_iocbq *saveq;
  952. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  953. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  954. uint8_t iocb_cmd_type;
  955. lpfc_iocb_type type;
  956. uint32_t status, free_saveq;
  957. uint32_t portRspPut, portRspMax;
  958. int rc = 1;
  959. unsigned long iflag;
  960. void __iomem *to_slim;
  961. spin_lock_irqsave(phba->host->host_lock, iflag);
  962. pring->stats.iocb_event++;
  963. /*
  964. * The next available response entry should never exceed the maximum
  965. * entries. If it does, treat it as an adapter hardware error.
  966. */
  967. portRspMax = pring->numRiocb;
  968. portRspPut = le32_to_cpu(pgp->rspPutInx);
  969. if (portRspPut >= portRspMax) {
  970. /*
  971. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  972. * rsp ring <portRspMax>
  973. */
  974. lpfc_printf_log(phba,
  975. KERN_ERR,
  976. LOG_SLI,
  977. "%d:0312 Ring %d handler: portRspPut %d "
  978. "is bigger then rsp ring %d\n",
  979. phba->brd_no,
  980. pring->ringno, portRspPut, portRspMax);
  981. phba->hba_state = LPFC_HBA_ERROR;
  982. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  983. phba->work_hs = HS_FFER3;
  984. lpfc_handle_eratt(phba);
  985. return 1;
  986. }
  987. rmb();
  988. lpfc_iocb_list = &phba->lpfc_iocb_list;
  989. while (pring->rspidx != portRspPut) {
  990. /*
  991. * Build a completion list and call the appropriate handler.
  992. * The process is to get the next available response iocb, get
  993. * a free iocb from the list, copy the response data into the
  994. * free iocb, insert to the continuation list, and update the
  995. * next response index to slim. This process makes response
  996. * iocb's in the ring available to DMA as fast as possible but
  997. * pays a penalty for a copy operation. Since the iocb is
  998. * only 32 bytes, this penalty is considered small relative to
  999. * the PCI reads for register values and a slim write. When
  1000. * the ulpLe field is set, the entire Command has been
  1001. * received.
  1002. */
  1003. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  1004. list_remove_head(lpfc_iocb_list, rspiocbp, struct lpfc_iocbq,
  1005. list);
  1006. if (rspiocbp == NULL) {
  1007. printk(KERN_ERR "%s: out of buffers! Failing "
  1008. "completion.\n", __FUNCTION__);
  1009. break;
  1010. }
  1011. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
  1012. irsp = &rspiocbp->iocb;
  1013. if (++pring->rspidx >= portRspMax)
  1014. pring->rspidx = 0;
  1015. to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
  1016. + 1) * 4;
  1017. writel(pring->rspidx, to_slim);
  1018. if (list_empty(&(pring->iocb_continueq))) {
  1019. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1020. } else {
  1021. list_add_tail(&rspiocbp->list,
  1022. &(pring->iocb_continueq));
  1023. }
  1024. pring->iocb_continueq_cnt++;
  1025. if (irsp->ulpLe) {
  1026. /*
  1027. * By default, the driver expects to free all resources
  1028. * associated with this iocb completion.
  1029. */
  1030. free_saveq = 1;
  1031. saveq = list_get_first(&pring->iocb_continueq,
  1032. struct lpfc_iocbq, list);
  1033. irsp = &(saveq->iocb);
  1034. list_del_init(&pring->iocb_continueq);
  1035. pring->iocb_continueq_cnt = 0;
  1036. pring->stats.iocb_rsp++;
  1037. if (irsp->ulpStatus) {
  1038. /* Rsp ring <ringno> error: IOCB */
  1039. lpfc_printf_log(phba,
  1040. KERN_WARNING,
  1041. LOG_SLI,
  1042. "%d:0328 Rsp Ring %d error: IOCB Data: "
  1043. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1044. phba->brd_no,
  1045. pring->ringno,
  1046. irsp->un.ulpWord[0],
  1047. irsp->un.ulpWord[1],
  1048. irsp->un.ulpWord[2],
  1049. irsp->un.ulpWord[3],
  1050. irsp->un.ulpWord[4],
  1051. irsp->un.ulpWord[5],
  1052. *(((uint32_t *) irsp) + 6),
  1053. *(((uint32_t *) irsp) + 7));
  1054. }
  1055. /*
  1056. * Fetch the IOCB command type and call the correct
  1057. * completion routine. Solicited and Unsolicited
  1058. * IOCBs on the ELS ring get freed back to the
  1059. * lpfc_iocb_list by the discovery kernel thread.
  1060. */
  1061. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1062. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1063. if (type == LPFC_SOL_IOCB) {
  1064. spin_unlock_irqrestore(phba->host->host_lock,
  1065. iflag);
  1066. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1067. saveq);
  1068. spin_lock_irqsave(phba->host->host_lock, iflag);
  1069. } else if (type == LPFC_UNSOL_IOCB) {
  1070. spin_unlock_irqrestore(phba->host->host_lock,
  1071. iflag);
  1072. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1073. saveq);
  1074. spin_lock_irqsave(phba->host->host_lock, iflag);
  1075. } else if (type == LPFC_ABORT_IOCB) {
  1076. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1077. ((cmdiocbp =
  1078. lpfc_sli_iocbq_lookup(phba, pring,
  1079. saveq)))) {
  1080. /* Call the specified completion
  1081. routine */
  1082. if (cmdiocbp->iocb_cmpl) {
  1083. spin_unlock_irqrestore(
  1084. phba->host->host_lock,
  1085. iflag);
  1086. (cmdiocbp->iocb_cmpl) (phba,
  1087. cmdiocbp, saveq);
  1088. spin_lock_irqsave(
  1089. phba->host->host_lock,
  1090. iflag);
  1091. } else
  1092. lpfc_sli_release_iocbq(phba,
  1093. cmdiocbp);
  1094. }
  1095. } else if (type == LPFC_UNKNOWN_IOCB) {
  1096. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1097. char adaptermsg[LPFC_MAX_ADPTMSG];
  1098. memset(adaptermsg, 0,
  1099. LPFC_MAX_ADPTMSG);
  1100. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1101. MAX_MSG_DATA);
  1102. dev_warn(&((phba->pcidev)->dev),
  1103. "lpfc%d: %s",
  1104. phba->brd_no, adaptermsg);
  1105. } else {
  1106. /* Unknown IOCB command */
  1107. lpfc_printf_log(phba,
  1108. KERN_ERR,
  1109. LOG_SLI,
  1110. "%d:0321 Unknown IOCB command "
  1111. "Data: x%x x%x x%x x%x\n",
  1112. phba->brd_no,
  1113. irsp->ulpCommand,
  1114. irsp->ulpStatus,
  1115. irsp->ulpIoTag,
  1116. irsp->ulpContext);
  1117. }
  1118. }
  1119. if (free_saveq) {
  1120. if (!list_empty(&saveq->list)) {
  1121. list_for_each_entry_safe(rspiocbp,
  1122. next_iocb,
  1123. &saveq->list,
  1124. list) {
  1125. lpfc_sli_release_iocbq(phba,
  1126. rspiocbp);
  1127. }
  1128. }
  1129. lpfc_sli_release_iocbq(phba, saveq);
  1130. }
  1131. }
  1132. /*
  1133. * If the port response put pointer has not been updated, sync
  1134. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1135. * response put pointer.
  1136. */
  1137. if (pring->rspidx == portRspPut) {
  1138. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1139. }
  1140. } /* while (pring->rspidx != portRspPut) */
  1141. if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
  1142. /* At least one response entry has been freed */
  1143. pring->stats.iocb_rsp_full++;
  1144. /* SET RxRE_RSP in Chip Att register */
  1145. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1146. writel(status, phba->CAregaddr);
  1147. readl(phba->CAregaddr); /* flush */
  1148. }
  1149. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1150. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1151. pring->stats.iocb_cmd_empty++;
  1152. /* Force update of the local copy of cmdGetInx */
  1153. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1154. lpfc_sli_resume_iocb(phba, pring);
  1155. if ((pring->lpfc_sli_cmd_available))
  1156. (pring->lpfc_sli_cmd_available) (phba, pring);
  1157. }
  1158. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1159. return rc;
  1160. }
  1161. int
  1162. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1163. {
  1164. struct lpfc_iocbq *iocb, *next_iocb;
  1165. IOCB_t *icmd = NULL, *cmd = NULL;
  1166. int errcnt;
  1167. errcnt = 0;
  1168. /* Error everything on txq and txcmplq
  1169. * First do the txq.
  1170. */
  1171. spin_lock_irq(phba->host->host_lock);
  1172. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  1173. list_del_init(&iocb->list);
  1174. if (iocb->iocb_cmpl) {
  1175. icmd = &iocb->iocb;
  1176. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1177. icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1178. spin_unlock_irq(phba->host->host_lock);
  1179. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1180. spin_lock_irq(phba->host->host_lock);
  1181. } else
  1182. lpfc_sli_release_iocbq(phba, iocb);
  1183. }
  1184. pring->txq_cnt = 0;
  1185. INIT_LIST_HEAD(&(pring->txq));
  1186. /* Next issue ABTS for everything on the txcmplq */
  1187. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
  1188. cmd = &iocb->iocb;
  1189. /*
  1190. * Imediate abort of IOCB, deque and call compl
  1191. */
  1192. list_del_init(&iocb->list);
  1193. pring->txcmplq_cnt--;
  1194. if (iocb->iocb_cmpl) {
  1195. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1196. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1197. spin_unlock_irq(phba->host->host_lock);
  1198. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1199. spin_lock_irq(phba->host->host_lock);
  1200. } else
  1201. lpfc_sli_release_iocbq(phba, iocb);
  1202. }
  1203. INIT_LIST_HEAD(&pring->txcmplq);
  1204. pring->txcmplq_cnt = 0;
  1205. spin_unlock_irq(phba->host->host_lock);
  1206. return errcnt;
  1207. }
  1208. /******************************************************************************
  1209. * lpfc_sli_send_reset
  1210. *
  1211. * Note: After returning from this function, the HBA cannot be accessed for
  1212. * 1 ms. Since we do not wish to delay in interrupt context, it is the
  1213. * responsibility of the caller to perform the mdelay(1) and flush via readl().
  1214. ******************************************************************************/
  1215. static int
  1216. lpfc_sli_send_reset(struct lpfc_hba * phba, uint16_t skip_post)
  1217. {
  1218. MAILBOX_t *swpmb;
  1219. volatile uint32_t word0;
  1220. void __iomem *to_slim;
  1221. unsigned long flags = 0;
  1222. spin_lock_irqsave(phba->host->host_lock, flags);
  1223. /* A board reset must use REAL SLIM. */
  1224. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  1225. word0 = 0;
  1226. swpmb = (MAILBOX_t *) & word0;
  1227. swpmb->mbxCommand = MBX_RESTART;
  1228. swpmb->mbxHc = 1;
  1229. to_slim = phba->MBslimaddr;
  1230. writel(*(uint32_t *) swpmb, to_slim);
  1231. readl(to_slim); /* flush */
  1232. /* Only skip post after fc_ffinit is completed */
  1233. if (skip_post) {
  1234. word0 = 1; /* This is really setting up word1 */
  1235. } else {
  1236. word0 = 0; /* This is really setting up word1 */
  1237. }
  1238. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1239. writel(*(uint32_t *) swpmb, to_slim);
  1240. readl(to_slim); /* flush */
  1241. /* Turn off parity checking and serr during the physical reset */
  1242. pci_read_config_word(phba->pcidev, PCI_COMMAND, &phba->pci_cfg_value);
  1243. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1244. (phba->pci_cfg_value &
  1245. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1246. writel(HC_INITFF, phba->HCregaddr);
  1247. phba->hba_state = LPFC_INIT_START;
  1248. spin_unlock_irqrestore(phba->host->host_lock, flags);
  1249. return 0;
  1250. }
  1251. static int
  1252. lpfc_sli_brdreset(struct lpfc_hba * phba, uint16_t skip_post)
  1253. {
  1254. struct lpfc_sli_ring *pring;
  1255. int i;
  1256. struct lpfc_dmabuf *mp, *next_mp;
  1257. unsigned long flags = 0;
  1258. lpfc_sli_send_reset(phba, skip_post);
  1259. mdelay(1);
  1260. spin_lock_irqsave(phba->host->host_lock, flags);
  1261. /* Risk the write on flush case ie no delay after the readl */
  1262. readl(phba->HCregaddr); /* flush */
  1263. /* Now toggle INITFF bit set by lpfc_sli_send_reset */
  1264. writel(0, phba->HCregaddr);
  1265. readl(phba->HCregaddr); /* flush */
  1266. /* Restore PCI cmd register */
  1267. pci_write_config_word(phba->pcidev, PCI_COMMAND, phba->pci_cfg_value);
  1268. /* perform board reset */
  1269. phba->fc_eventTag = 0;
  1270. phba->fc_myDID = 0;
  1271. phba->fc_prevDID = Mask_DID;
  1272. /* Reset HBA */
  1273. lpfc_printf_log(phba,
  1274. KERN_INFO,
  1275. LOG_SLI,
  1276. "%d:0325 Reset HBA Data: x%x x%x x%x\n",
  1277. phba->brd_no,
  1278. phba->hba_state,
  1279. phba->sli.sli_flag,
  1280. skip_post);
  1281. /* Initialize relevant SLI info */
  1282. for (i = 0; i < phba->sli.num_rings; i++) {
  1283. pring = &phba->sli.ring[i];
  1284. pring->flag = 0;
  1285. pring->rspidx = 0;
  1286. pring->next_cmdidx = 0;
  1287. pring->local_getidx = 0;
  1288. pring->cmdidx = 0;
  1289. pring->missbufcnt = 0;
  1290. }
  1291. spin_unlock_irqrestore(phba->host->host_lock, flags);
  1292. if (skip_post) {
  1293. mdelay(100);
  1294. } else {
  1295. mdelay(2000);
  1296. }
  1297. spin_lock_irqsave(phba->host->host_lock, flags);
  1298. /* Cleanup preposted buffers on the ELS ring */
  1299. pring = &phba->sli.ring[LPFC_ELS_RING];
  1300. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  1301. list_del(&mp->list);
  1302. pring->postbufq_cnt--;
  1303. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  1304. kfree(mp);
  1305. }
  1306. spin_unlock_irqrestore(phba->host->host_lock, flags);
  1307. for (i = 0; i < phba->sli.num_rings; i++)
  1308. lpfc_sli_abort_iocb_ring(phba, &phba->sli.ring[i]);
  1309. return 0;
  1310. }
  1311. static int
  1312. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1313. {
  1314. uint32_t status, i = 0;
  1315. /* Read the HBA Host Status Register */
  1316. status = readl(phba->HSregaddr);
  1317. /* Check status register to see what current state is */
  1318. i = 0;
  1319. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1320. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1321. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1322. * 4.
  1323. */
  1324. if (i++ >= 20) {
  1325. /* Adapter failed to init, timeout, status reg
  1326. <status> */
  1327. lpfc_printf_log(phba,
  1328. KERN_ERR,
  1329. LOG_INIT,
  1330. "%d:0436 Adapter failed to init, "
  1331. "timeout, status reg x%x\n",
  1332. phba->brd_no,
  1333. status);
  1334. phba->hba_state = LPFC_HBA_ERROR;
  1335. return -ETIMEDOUT;
  1336. }
  1337. /* Check to see if any errors occurred during init */
  1338. if (status & HS_FFERM) {
  1339. /* ERROR: During chipset initialization */
  1340. /* Adapter failed to init, chipset, status reg
  1341. <status> */
  1342. lpfc_printf_log(phba,
  1343. KERN_ERR,
  1344. LOG_INIT,
  1345. "%d:0437 Adapter failed to init, "
  1346. "chipset, status reg x%x\n",
  1347. phba->brd_no,
  1348. status);
  1349. phba->hba_state = LPFC_HBA_ERROR;
  1350. return -EIO;
  1351. }
  1352. if (i <= 5) {
  1353. msleep(10);
  1354. } else if (i <= 10) {
  1355. msleep(500);
  1356. } else {
  1357. msleep(2500);
  1358. }
  1359. if (i == 15) {
  1360. lpfc_sli_brdreset(phba, 0);
  1361. }
  1362. /* Read the HBA Host Status Register */
  1363. status = readl(phba->HSregaddr);
  1364. }
  1365. /* Check to see if any errors occurred during init */
  1366. if (status & HS_FFERM) {
  1367. /* ERROR: During chipset initialization */
  1368. /* Adapter failed to init, chipset, status reg <status> */
  1369. lpfc_printf_log(phba,
  1370. KERN_ERR,
  1371. LOG_INIT,
  1372. "%d:0438 Adapter failed to init, chipset, "
  1373. "status reg x%x\n",
  1374. phba->brd_no,
  1375. status);
  1376. phba->hba_state = LPFC_HBA_ERROR;
  1377. return -EIO;
  1378. }
  1379. /* Clear all interrupt enable conditions */
  1380. writel(0, phba->HCregaddr);
  1381. readl(phba->HCregaddr); /* flush */
  1382. /* setup host attn register */
  1383. writel(0xffffffff, phba->HAregaddr);
  1384. readl(phba->HAregaddr); /* flush */
  1385. return 0;
  1386. }
  1387. int
  1388. lpfc_sli_hba_setup(struct lpfc_hba * phba)
  1389. {
  1390. LPFC_MBOXQ_t *pmb;
  1391. uint32_t resetcount = 0, rc = 0, done = 0;
  1392. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1393. if (!pmb) {
  1394. phba->hba_state = LPFC_HBA_ERROR;
  1395. return -ENOMEM;
  1396. }
  1397. while (resetcount < 2 && !done) {
  1398. phba->hba_state = 0;
  1399. lpfc_sli_brdreset(phba, 0);
  1400. msleep(2500);
  1401. rc = lpfc_sli_chipset_init(phba);
  1402. if (rc)
  1403. break;
  1404. resetcount++;
  1405. /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
  1406. * means the call was successful. Any other nonzero value is a failure,
  1407. * but if ERESTART is returned, the driver may reset the HBA and try
  1408. * again.
  1409. */
  1410. rc = lpfc_config_port_prep(phba);
  1411. if (rc == -ERESTART) {
  1412. phba->hba_state = 0;
  1413. continue;
  1414. } else if (rc) {
  1415. break;
  1416. }
  1417. phba->hba_state = LPFC_INIT_MBX_CMDS;
  1418. lpfc_config_port(phba, pmb);
  1419. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  1420. if (rc == MBX_SUCCESS)
  1421. done = 1;
  1422. else {
  1423. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1424. "%d:0442 Adapter failed to init, mbxCmd x%x "
  1425. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  1426. phba->brd_no, pmb->mb.mbxCommand,
  1427. pmb->mb.mbxStatus, 0);
  1428. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  1429. }
  1430. }
  1431. if (!done)
  1432. goto lpfc_sli_hba_setup_error;
  1433. rc = lpfc_sli_ring_map(phba, pmb);
  1434. if (rc)
  1435. goto lpfc_sli_hba_setup_error;
  1436. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  1437. rc = lpfc_config_port_post(phba);
  1438. if (rc)
  1439. goto lpfc_sli_hba_setup_error;
  1440. goto lpfc_sli_hba_setup_exit;
  1441. lpfc_sli_hba_setup_error:
  1442. phba->hba_state = LPFC_HBA_ERROR;
  1443. lpfc_sli_hba_setup_exit:
  1444. mempool_free(pmb, phba->mbox_mem_pool);
  1445. return rc;
  1446. }
  1447. static void
  1448. lpfc_mbox_abort(struct lpfc_hba * phba)
  1449. {
  1450. LPFC_MBOXQ_t *pmbox;
  1451. MAILBOX_t *mb;
  1452. if (phba->sli.mbox_active) {
  1453. del_timer_sync(&phba->sli.mbox_tmo);
  1454. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  1455. pmbox = phba->sli.mbox_active;
  1456. mb = &pmbox->mb;
  1457. phba->sli.mbox_active = NULL;
  1458. if (pmbox->mbox_cmpl) {
  1459. mb->mbxStatus = MBX_NOT_FINISHED;
  1460. (pmbox->mbox_cmpl) (phba, pmbox);
  1461. }
  1462. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1463. }
  1464. /* Abort all the non active mailbox commands. */
  1465. spin_lock_irq(phba->host->host_lock);
  1466. pmbox = lpfc_mbox_get(phba);
  1467. while (pmbox) {
  1468. mb = &pmbox->mb;
  1469. if (pmbox->mbox_cmpl) {
  1470. mb->mbxStatus = MBX_NOT_FINISHED;
  1471. spin_unlock_irq(phba->host->host_lock);
  1472. (pmbox->mbox_cmpl) (phba, pmbox);
  1473. spin_lock_irq(phba->host->host_lock);
  1474. }
  1475. pmbox = lpfc_mbox_get(phba);
  1476. }
  1477. spin_unlock_irq(phba->host->host_lock);
  1478. return;
  1479. }
  1480. /*! lpfc_mbox_timeout
  1481. *
  1482. * \pre
  1483. * \post
  1484. * \param hba Pointer to per struct lpfc_hba structure
  1485. * \param l1 Pointer to the driver's mailbox queue.
  1486. * \return
  1487. * void
  1488. *
  1489. * \b Description:
  1490. *
  1491. * This routine handles mailbox timeout events at timer interrupt context.
  1492. */
  1493. void
  1494. lpfc_mbox_timeout(unsigned long ptr)
  1495. {
  1496. struct lpfc_hba *phba;
  1497. unsigned long iflag;
  1498. phba = (struct lpfc_hba *)ptr;
  1499. spin_lock_irqsave(phba->host->host_lock, iflag);
  1500. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1501. phba->work_hba_events |= WORKER_MBOX_TMO;
  1502. if (phba->work_wait)
  1503. wake_up(phba->work_wait);
  1504. }
  1505. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1506. }
  1507. void
  1508. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  1509. {
  1510. LPFC_MBOXQ_t *pmbox;
  1511. MAILBOX_t *mb;
  1512. spin_lock_irq(phba->host->host_lock);
  1513. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1514. spin_unlock_irq(phba->host->host_lock);
  1515. return;
  1516. }
  1517. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  1518. pmbox = phba->sli.mbox_active;
  1519. mb = &pmbox->mb;
  1520. /* Mbox cmd <mbxCommand> timeout */
  1521. lpfc_printf_log(phba,
  1522. KERN_ERR,
  1523. LOG_MBOX | LOG_SLI,
  1524. "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
  1525. phba->brd_no,
  1526. mb->mbxCommand,
  1527. phba->hba_state,
  1528. phba->sli.sli_flag,
  1529. phba->sli.mbox_active);
  1530. phba->sli.mbox_active = NULL;
  1531. if (pmbox->mbox_cmpl) {
  1532. mb->mbxStatus = MBX_NOT_FINISHED;
  1533. spin_unlock_irq(phba->host->host_lock);
  1534. (pmbox->mbox_cmpl) (phba, pmbox);
  1535. spin_lock_irq(phba->host->host_lock);
  1536. }
  1537. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1538. spin_unlock_irq(phba->host->host_lock);
  1539. lpfc_mbox_abort(phba);
  1540. return;
  1541. }
  1542. int
  1543. lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
  1544. {
  1545. MAILBOX_t *mb;
  1546. struct lpfc_sli *psli;
  1547. uint32_t status, evtctr;
  1548. uint32_t ha_copy;
  1549. int i;
  1550. unsigned long drvr_flag = 0;
  1551. volatile uint32_t word0, ldata;
  1552. void __iomem *to_slim;
  1553. psli = &phba->sli;
  1554. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  1555. mb = &pmbox->mb;
  1556. status = MBX_SUCCESS;
  1557. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  1558. /* Polling for a mbox command when another one is already active
  1559. * is not allowed in SLI. Also, the driver must have established
  1560. * SLI2 mode to queue and process multiple mbox commands.
  1561. */
  1562. if (flag & MBX_POLL) {
  1563. spin_unlock_irqrestore(phba->host->host_lock,
  1564. drvr_flag);
  1565. /* Mbox command <mbxCommand> cannot issue */
  1566. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1567. return (MBX_NOT_FINISHED);
  1568. }
  1569. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  1570. spin_unlock_irqrestore(phba->host->host_lock,
  1571. drvr_flag);
  1572. /* Mbox command <mbxCommand> cannot issue */
  1573. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1574. return (MBX_NOT_FINISHED);
  1575. }
  1576. /* Handle STOP IOCB processing flag. This is only meaningful
  1577. * if we are not polling for mbox completion.
  1578. */
  1579. if (flag & MBX_STOP_IOCB) {
  1580. flag &= ~MBX_STOP_IOCB;
  1581. /* Now flag each ring */
  1582. for (i = 0; i < psli->num_rings; i++) {
  1583. /* If the ring is active, flag it */
  1584. if (psli->ring[i].cmdringaddr) {
  1585. psli->ring[i].flag |=
  1586. LPFC_STOP_IOCB_MBX;
  1587. }
  1588. }
  1589. }
  1590. /* Another mailbox command is still being processed, queue this
  1591. * command to be processed later.
  1592. */
  1593. lpfc_mbox_put(phba, pmbox);
  1594. /* Mbox cmd issue - BUSY */
  1595. lpfc_printf_log(phba,
  1596. KERN_INFO,
  1597. LOG_MBOX | LOG_SLI,
  1598. "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
  1599. phba->brd_no,
  1600. mb->mbxCommand,
  1601. phba->hba_state,
  1602. psli->sli_flag,
  1603. flag);
  1604. psli->slistat.mbox_busy++;
  1605. spin_unlock_irqrestore(phba->host->host_lock,
  1606. drvr_flag);
  1607. return (MBX_BUSY);
  1608. }
  1609. /* Handle STOP IOCB processing flag. This is only meaningful
  1610. * if we are not polling for mbox completion.
  1611. */
  1612. if (flag & MBX_STOP_IOCB) {
  1613. flag &= ~MBX_STOP_IOCB;
  1614. if (flag == MBX_NOWAIT) {
  1615. /* Now flag each ring */
  1616. for (i = 0; i < psli->num_rings; i++) {
  1617. /* If the ring is active, flag it */
  1618. if (psli->ring[i].cmdringaddr) {
  1619. psli->ring[i].flag |=
  1620. LPFC_STOP_IOCB_MBX;
  1621. }
  1622. }
  1623. }
  1624. }
  1625. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1626. /* If we are not polling, we MUST be in SLI2 mode */
  1627. if (flag != MBX_POLL) {
  1628. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  1629. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1630. spin_unlock_irqrestore(phba->host->host_lock,
  1631. drvr_flag);
  1632. /* Mbox command <mbxCommand> cannot issue */
  1633. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
  1634. return (MBX_NOT_FINISHED);
  1635. }
  1636. /* timeout active mbox command */
  1637. mod_timer(&psli->mbox_tmo, jiffies + HZ * LPFC_MBOX_TMO);
  1638. }
  1639. /* Mailbox cmd <cmd> issue */
  1640. lpfc_printf_log(phba,
  1641. KERN_INFO,
  1642. LOG_MBOX | LOG_SLI,
  1643. "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
  1644. phba->brd_no,
  1645. mb->mbxCommand,
  1646. phba->hba_state,
  1647. psli->sli_flag,
  1648. flag);
  1649. psli->slistat.mbox_cmd++;
  1650. evtctr = psli->slistat.mbox_event;
  1651. /* next set own bit for the adapter and copy over command word */
  1652. mb->mbxOwner = OWN_CHIP;
  1653. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1654. /* First copy command data to host SLIM area */
  1655. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  1656. } else {
  1657. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1658. /* copy command data into host mbox for cmpl */
  1659. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  1660. MAILBOX_CMD_SIZE);
  1661. }
  1662. /* First copy mbox command data to HBA SLIM, skip past first
  1663. word */
  1664. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1665. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  1666. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  1667. /* Next copy over first word, with mbxOwner set */
  1668. ldata = *((volatile uint32_t *)mb);
  1669. to_slim = phba->MBslimaddr;
  1670. writel(ldata, to_slim);
  1671. readl(to_slim); /* flush */
  1672. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1673. /* switch over to host mailbox */
  1674. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  1675. }
  1676. }
  1677. wmb();
  1678. /* interrupt board to doit right away */
  1679. writel(CA_MBATT, phba->CAregaddr);
  1680. readl(phba->CAregaddr); /* flush */
  1681. switch (flag) {
  1682. case MBX_NOWAIT:
  1683. /* Don't wait for it to finish, just return */
  1684. psli->mbox_active = pmbox;
  1685. break;
  1686. case MBX_POLL:
  1687. i = 0;
  1688. psli->mbox_active = NULL;
  1689. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1690. /* First read mbox status word */
  1691. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  1692. word0 = le32_to_cpu(word0);
  1693. } else {
  1694. /* First read mbox status word */
  1695. word0 = readl(phba->MBslimaddr);
  1696. }
  1697. /* Read the HBA Host Attention Register */
  1698. ha_copy = readl(phba->HAregaddr);
  1699. /* Wait for command to complete */
  1700. while (((word0 & OWN_CHIP) == OWN_CHIP)
  1701. || !(ha_copy & HA_MBATT)) {
  1702. if (i++ >= 100) {
  1703. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1704. spin_unlock_irqrestore(phba->host->host_lock,
  1705. drvr_flag);
  1706. return (MBX_NOT_FINISHED);
  1707. }
  1708. /* Check if we took a mbox interrupt while we were
  1709. polling */
  1710. if (((word0 & OWN_CHIP) != OWN_CHIP)
  1711. && (evtctr != psli->slistat.mbox_event))
  1712. break;
  1713. spin_unlock_irqrestore(phba->host->host_lock,
  1714. drvr_flag);
  1715. /* Can be in interrupt context, do not sleep */
  1716. /* (or might be called with interrupts disabled) */
  1717. mdelay(i);
  1718. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  1719. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1720. /* First copy command data */
  1721. word0 = *((volatile uint32_t *)
  1722. &phba->slim2p->mbx);
  1723. word0 = le32_to_cpu(word0);
  1724. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1725. MAILBOX_t *slimmb;
  1726. volatile uint32_t slimword0;
  1727. /* Check real SLIM for any errors */
  1728. slimword0 = readl(phba->MBslimaddr);
  1729. slimmb = (MAILBOX_t *) & slimword0;
  1730. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  1731. && slimmb->mbxStatus) {
  1732. psli->sli_flag &=
  1733. ~LPFC_SLI2_ACTIVE;
  1734. word0 = slimword0;
  1735. }
  1736. }
  1737. } else {
  1738. /* First copy command data */
  1739. word0 = readl(phba->MBslimaddr);
  1740. }
  1741. /* Read the HBA Host Attention Register */
  1742. ha_copy = readl(phba->HAregaddr);
  1743. }
  1744. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1745. /* copy results back to user */
  1746. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  1747. MAILBOX_CMD_SIZE);
  1748. } else {
  1749. /* First copy command data */
  1750. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  1751. MAILBOX_CMD_SIZE);
  1752. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  1753. pmbox->context2) {
  1754. lpfc_memcpy_from_slim((void *)pmbox->context2,
  1755. phba->MBslimaddr + DMP_RSP_OFFSET,
  1756. mb->un.varDmp.word_cnt);
  1757. }
  1758. }
  1759. writel(HA_MBATT, phba->HAregaddr);
  1760. readl(phba->HAregaddr); /* flush */
  1761. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1762. status = mb->mbxStatus;
  1763. }
  1764. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  1765. return (status);
  1766. }
  1767. static int
  1768. lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  1769. struct lpfc_iocbq * piocb)
  1770. {
  1771. /* Insert the caller's iocb in the txq tail for later processing. */
  1772. list_add_tail(&piocb->list, &pring->txq);
  1773. pring->txq_cnt++;
  1774. return (0);
  1775. }
  1776. static struct lpfc_iocbq *
  1777. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  1778. struct lpfc_iocbq ** piocb)
  1779. {
  1780. struct lpfc_iocbq * nextiocb;
  1781. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  1782. if (!nextiocb) {
  1783. nextiocb = *piocb;
  1784. *piocb = NULL;
  1785. }
  1786. return nextiocb;
  1787. }
  1788. int
  1789. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  1790. struct lpfc_iocbq *piocb, uint32_t flag)
  1791. {
  1792. struct lpfc_iocbq *nextiocb;
  1793. IOCB_t *iocb;
  1794. /*
  1795. * We should never get an IOCB if we are in a < LINK_DOWN state
  1796. */
  1797. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  1798. return IOCB_ERROR;
  1799. /*
  1800. * Check to see if we are blocking IOCB processing because of a
  1801. * outstanding mbox command.
  1802. */
  1803. if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
  1804. goto iocb_busy;
  1805. if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
  1806. /*
  1807. * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
  1808. * can be issued if the link is not up.
  1809. */
  1810. switch (piocb->iocb.ulpCommand) {
  1811. case CMD_QUE_RING_BUF_CN:
  1812. case CMD_QUE_RING_BUF64_CN:
  1813. /*
  1814. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  1815. * completion, iocb_cmpl MUST be 0.
  1816. */
  1817. if (piocb->iocb_cmpl)
  1818. piocb->iocb_cmpl = NULL;
  1819. /*FALLTHROUGH*/
  1820. case CMD_CREATE_XRI_CR:
  1821. break;
  1822. default:
  1823. goto iocb_busy;
  1824. }
  1825. /*
  1826. * For FCP commands, we must be in a state where we can process link
  1827. * attention events.
  1828. */
  1829. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  1830. !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
  1831. goto iocb_busy;
  1832. /*
  1833. * Check to see if this is a high priority command.
  1834. * If so bypass tx queue processing.
  1835. */
  1836. if (unlikely((flag & SLI_IOCB_HIGH_PRIORITY) &&
  1837. (iocb = lpfc_sli_next_iocb_slot(phba, pring)))) {
  1838. lpfc_sli_submit_iocb(phba, pring, iocb, piocb);
  1839. piocb = NULL;
  1840. }
  1841. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  1842. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  1843. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  1844. if (iocb)
  1845. lpfc_sli_update_ring(phba, pring);
  1846. else
  1847. lpfc_sli_update_full_ring(phba, pring);
  1848. if (!piocb)
  1849. return IOCB_SUCCESS;
  1850. goto out_busy;
  1851. iocb_busy:
  1852. pring->stats.iocb_cmd_delay++;
  1853. out_busy:
  1854. if (!(flag & SLI_IOCB_RET_IOCB)) {
  1855. lpfc_sli_ringtx_put(phba, pring, piocb);
  1856. return IOCB_SUCCESS;
  1857. }
  1858. return IOCB_BUSY;
  1859. }
  1860. int
  1861. lpfc_sli_setup(struct lpfc_hba *phba)
  1862. {
  1863. int i, totiocb = 0;
  1864. struct lpfc_sli *psli = &phba->sli;
  1865. struct lpfc_sli_ring *pring;
  1866. psli->num_rings = MAX_CONFIGURED_RINGS;
  1867. psli->sli_flag = 0;
  1868. psli->fcp_ring = LPFC_FCP_RING;
  1869. psli->next_ring = LPFC_FCP_NEXT_RING;
  1870. psli->ip_ring = LPFC_IP_RING;
  1871. psli->iocbq_lookup = NULL;
  1872. psli->iocbq_lookup_len = 0;
  1873. psli->last_iotag = 0;
  1874. for (i = 0; i < psli->num_rings; i++) {
  1875. pring = &psli->ring[i];
  1876. switch (i) {
  1877. case LPFC_FCP_RING: /* ring 0 - FCP */
  1878. /* numCiocb and numRiocb are used in config_port */
  1879. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  1880. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  1881. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  1882. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  1883. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  1884. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  1885. pring->iotag_ctr = 0;
  1886. pring->iotag_max =
  1887. (phba->cfg_hba_queue_depth * 2);
  1888. pring->fast_iotag = pring->iotag_max;
  1889. pring->num_mask = 0;
  1890. break;
  1891. case LPFC_IP_RING: /* ring 1 - IP */
  1892. /* numCiocb and numRiocb are used in config_port */
  1893. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  1894. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  1895. pring->num_mask = 0;
  1896. break;
  1897. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  1898. /* numCiocb and numRiocb are used in config_port */
  1899. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  1900. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  1901. pring->fast_iotag = 0;
  1902. pring->iotag_ctr = 0;
  1903. pring->iotag_max = 4096;
  1904. pring->num_mask = 4;
  1905. pring->prt[0].profile = 0; /* Mask 0 */
  1906. pring->prt[0].rctl = FC_ELS_REQ;
  1907. pring->prt[0].type = FC_ELS_DATA;
  1908. pring->prt[0].lpfc_sli_rcv_unsol_event =
  1909. lpfc_els_unsol_event;
  1910. pring->prt[1].profile = 0; /* Mask 1 */
  1911. pring->prt[1].rctl = FC_ELS_RSP;
  1912. pring->prt[1].type = FC_ELS_DATA;
  1913. pring->prt[1].lpfc_sli_rcv_unsol_event =
  1914. lpfc_els_unsol_event;
  1915. pring->prt[2].profile = 0; /* Mask 2 */
  1916. /* NameServer Inquiry */
  1917. pring->prt[2].rctl = FC_UNSOL_CTL;
  1918. /* NameServer */
  1919. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  1920. pring->prt[2].lpfc_sli_rcv_unsol_event =
  1921. lpfc_ct_unsol_event;
  1922. pring->prt[3].profile = 0; /* Mask 3 */
  1923. /* NameServer response */
  1924. pring->prt[3].rctl = FC_SOL_CTL;
  1925. /* NameServer */
  1926. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  1927. pring->prt[3].lpfc_sli_rcv_unsol_event =
  1928. lpfc_ct_unsol_event;
  1929. break;
  1930. }
  1931. totiocb += (pring->numCiocb + pring->numRiocb);
  1932. }
  1933. if (totiocb > MAX_SLI2_IOCB) {
  1934. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  1935. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1936. "%d:0462 Too many cmd / rsp ring entries in "
  1937. "SLI2 SLIM Data: x%x x%x\n",
  1938. phba->brd_no, totiocb, MAX_SLI2_IOCB);
  1939. }
  1940. return 0;
  1941. }
  1942. int
  1943. lpfc_sli_queue_setup(struct lpfc_hba * phba)
  1944. {
  1945. struct lpfc_sli *psli;
  1946. struct lpfc_sli_ring *pring;
  1947. int i;
  1948. psli = &phba->sli;
  1949. spin_lock_irq(phba->host->host_lock);
  1950. INIT_LIST_HEAD(&psli->mboxq);
  1951. /* Initialize list headers for txq and txcmplq as double linked lists */
  1952. for (i = 0; i < psli->num_rings; i++) {
  1953. pring = &psli->ring[i];
  1954. pring->ringno = i;
  1955. pring->next_cmdidx = 0;
  1956. pring->local_getidx = 0;
  1957. pring->cmdidx = 0;
  1958. INIT_LIST_HEAD(&pring->txq);
  1959. INIT_LIST_HEAD(&pring->txcmplq);
  1960. INIT_LIST_HEAD(&pring->iocb_continueq);
  1961. INIT_LIST_HEAD(&pring->postbufq);
  1962. }
  1963. spin_unlock_irq(phba->host->host_lock);
  1964. return (1);
  1965. }
  1966. int
  1967. lpfc_sli_hba_down(struct lpfc_hba * phba)
  1968. {
  1969. struct lpfc_sli *psli;
  1970. struct lpfc_sli_ring *pring;
  1971. LPFC_MBOXQ_t *pmb;
  1972. struct lpfc_iocbq *iocb, *next_iocb;
  1973. IOCB_t *icmd = NULL;
  1974. int i;
  1975. unsigned long flags = 0;
  1976. psli = &phba->sli;
  1977. lpfc_hba_down_prep(phba);
  1978. spin_lock_irqsave(phba->host->host_lock, flags);
  1979. for (i = 0; i < psli->num_rings; i++) {
  1980. pring = &psli->ring[i];
  1981. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  1982. /*
  1983. * Error everything on the txq since these iocbs have not been
  1984. * given to the FW yet.
  1985. */
  1986. pring->txq_cnt = 0;
  1987. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  1988. list_del_init(&iocb->list);
  1989. if (iocb->iocb_cmpl) {
  1990. icmd = &iocb->iocb;
  1991. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1992. icmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  1993. spin_unlock_irqrestore(phba->host->host_lock,
  1994. flags);
  1995. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1996. spin_lock_irqsave(phba->host->host_lock, flags);
  1997. } else
  1998. lpfc_sli_release_iocbq(phba, iocb);
  1999. }
  2000. INIT_LIST_HEAD(&(pring->txq));
  2001. if (pring->fast_lookup) {
  2002. kfree(pring->fast_lookup);
  2003. pring->fast_lookup = NULL;
  2004. }
  2005. }
  2006. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2007. /* Return any active mbox cmds */
  2008. del_timer_sync(&psli->mbox_tmo);
  2009. spin_lock_irqsave(phba->host->host_lock, flags);
  2010. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  2011. if (psli->mbox_active) {
  2012. pmb = psli->mbox_active;
  2013. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2014. if (pmb->mbox_cmpl) {
  2015. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2016. pmb->mbox_cmpl(phba,pmb);
  2017. spin_lock_irqsave(phba->host->host_lock, flags);
  2018. }
  2019. }
  2020. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2021. psli->mbox_active = NULL;
  2022. /* Return any pending mbox cmds */
  2023. while ((pmb = lpfc_mbox_get(phba)) != NULL) {
  2024. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2025. if (pmb->mbox_cmpl) {
  2026. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2027. pmb->mbox_cmpl(phba,pmb);
  2028. spin_lock_irqsave(phba->host->host_lock, flags);
  2029. }
  2030. }
  2031. INIT_LIST_HEAD(&psli->mboxq);
  2032. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2033. /*
  2034. * Provided the hba is not in an error state, reset it. It is not
  2035. * capable of IO anymore.
  2036. */
  2037. if (phba->hba_state != LPFC_HBA_ERROR) {
  2038. phba->hba_state = LPFC_INIT_START;
  2039. lpfc_sli_brdreset(phba, 1);
  2040. }
  2041. return 1;
  2042. }
  2043. void
  2044. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2045. {
  2046. uint32_t *src = srcp;
  2047. uint32_t *dest = destp;
  2048. uint32_t ldata;
  2049. int i;
  2050. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2051. ldata = *src;
  2052. ldata = le32_to_cpu(ldata);
  2053. *dest = ldata;
  2054. src++;
  2055. dest++;
  2056. }
  2057. }
  2058. int
  2059. lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  2060. struct lpfc_dmabuf * mp)
  2061. {
  2062. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2063. later */
  2064. list_add_tail(&mp->list, &pring->postbufq);
  2065. pring->postbufq_cnt++;
  2066. return 0;
  2067. }
  2068. struct lpfc_dmabuf *
  2069. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2070. dma_addr_t phys)
  2071. {
  2072. struct lpfc_dmabuf *mp, *next_mp;
  2073. struct list_head *slp = &pring->postbufq;
  2074. /* Search postbufq, from the begining, looking for a match on phys */
  2075. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2076. if (mp->phys == phys) {
  2077. list_del_init(&mp->list);
  2078. pring->postbufq_cnt--;
  2079. return mp;
  2080. }
  2081. }
  2082. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2083. "%d:0410 Cannot find virtual addr for mapped buf on "
  2084. "ring %d Data x%llx x%p x%p x%x\n",
  2085. phba->brd_no, pring->ringno, (unsigned long long)phys,
  2086. slp->next, slp->prev, pring->postbufq_cnt);
  2087. return NULL;
  2088. }
  2089. static void
  2090. lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2091. struct lpfc_iocbq * rspiocb)
  2092. {
  2093. struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
  2094. /* Free the resources associated with the ELS_REQUEST64 IOCB the driver
  2095. * just aborted.
  2096. * In this case, context2 = cmd, context2->next = rsp, context3 = bpl
  2097. */
  2098. if (cmdiocb->context2) {
  2099. buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2;
  2100. /* Free the response IOCB before completing the abort
  2101. command. */
  2102. buf_ptr = NULL;
  2103. list_remove_head((&buf_ptr1->list), buf_ptr,
  2104. struct lpfc_dmabuf, list);
  2105. if (buf_ptr) {
  2106. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2107. kfree(buf_ptr);
  2108. }
  2109. lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
  2110. kfree(buf_ptr1);
  2111. }
  2112. if (cmdiocb->context3) {
  2113. buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3;
  2114. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2115. kfree(buf_ptr);
  2116. }
  2117. lpfc_sli_release_iocbq(phba, cmdiocb);
  2118. return;
  2119. }
  2120. int
  2121. lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba,
  2122. struct lpfc_sli_ring * pring,
  2123. struct lpfc_iocbq * cmdiocb)
  2124. {
  2125. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  2126. struct lpfc_iocbq *abtsiocbp = NULL;
  2127. IOCB_t *icmd = NULL;
  2128. IOCB_t *iabt = NULL;
  2129. /* issue ABTS for this IOCB based on iotag */
  2130. list_remove_head(lpfc_iocb_list, abtsiocbp, struct lpfc_iocbq, list);
  2131. if (abtsiocbp == NULL)
  2132. return 0;
  2133. iabt = &abtsiocbp->iocb;
  2134. icmd = &cmdiocb->iocb;
  2135. switch (icmd->ulpCommand) {
  2136. case CMD_ELS_REQUEST64_CR:
  2137. /* Even though we abort the ELS command, the firmware may access
  2138. * the BPL or other resources before it processes our
  2139. * ABORT_MXRI64. Thus we must delay reusing the cmdiocb
  2140. * resources till the actual abort request completes.
  2141. */
  2142. abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand);
  2143. abtsiocbp->context2 = cmdiocb->context2;
  2144. abtsiocbp->context3 = cmdiocb->context3;
  2145. cmdiocb->context2 = NULL;
  2146. cmdiocb->context3 = NULL;
  2147. abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl;
  2148. break;
  2149. default:
  2150. lpfc_sli_release_iocbq(phba, abtsiocbp);
  2151. return 0;
  2152. }
  2153. iabt->un.amxri.abortType = ABORT_TYPE_ABTS;
  2154. iabt->un.amxri.iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32;
  2155. iabt->ulpLe = 1;
  2156. iabt->ulpClass = CLASS3;
  2157. iabt->ulpCommand = CMD_ABORT_MXRI64_CN;
  2158. if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
  2159. lpfc_sli_release_iocbq(phba, abtsiocbp);
  2160. return 0;
  2161. }
  2162. return 1;
  2163. }
  2164. static int
  2165. lpfc_sli_validate_iocb_cmd(struct lpfc_scsi_buf *lpfc_cmd, uint16_t tgt_id,
  2166. uint64_t lun_id, struct lpfc_iocbq *iocb,
  2167. uint32_t ctx, lpfc_ctx_cmd ctx_cmd)
  2168. {
  2169. int rc = 1;
  2170. if (lpfc_cmd == NULL)
  2171. return rc;
  2172. switch (ctx_cmd) {
  2173. case LPFC_CTX_LUN:
  2174. if ((lpfc_cmd->pCmd->device->id == tgt_id) &&
  2175. (lpfc_cmd->pCmd->device->lun == lun_id))
  2176. rc = 0;
  2177. break;
  2178. case LPFC_CTX_TGT:
  2179. if (lpfc_cmd->pCmd->device->id == tgt_id)
  2180. rc = 0;
  2181. break;
  2182. case LPFC_CTX_CTX:
  2183. if (iocb->iocb.ulpContext == ctx)
  2184. rc = 0;
  2185. case LPFC_CTX_HOST:
  2186. rc = 0;
  2187. break;
  2188. default:
  2189. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  2190. __FUNCTION__, ctx_cmd);
  2191. break;
  2192. }
  2193. return rc;
  2194. }
  2195. int
  2196. lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2197. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
  2198. {
  2199. struct lpfc_iocbq *iocb, *next_iocb;
  2200. IOCB_t *cmd = NULL;
  2201. struct lpfc_scsi_buf *lpfc_cmd;
  2202. int sum = 0, ret_val = 0;
  2203. /* Next check the txcmplq */
  2204. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
  2205. cmd = &iocb->iocb;
  2206. /* Must be a FCP command */
  2207. if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
  2208. (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
  2209. (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
  2210. continue;
  2211. }
  2212. /* context1 MUST be a struct lpfc_scsi_buf */
  2213. lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
  2214. ret_val = lpfc_sli_validate_iocb_cmd(lpfc_cmd, tgt_id, lun_id,
  2215. NULL, 0, ctx_cmd);
  2216. if (ret_val != 0)
  2217. continue;
  2218. sum++;
  2219. }
  2220. return sum;
  2221. }
  2222. void
  2223. lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2224. struct lpfc_iocbq * rspiocb)
  2225. {
  2226. spin_lock_irq(phba->host->host_lock);
  2227. lpfc_sli_release_iocbq(phba, cmdiocb);
  2228. spin_unlock_irq(phba->host->host_lock);
  2229. return;
  2230. }
  2231. int
  2232. lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2233. uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
  2234. lpfc_ctx_cmd abort_cmd)
  2235. {
  2236. struct lpfc_iocbq *iocb, *next_iocb;
  2237. struct lpfc_iocbq *abtsiocb = NULL;
  2238. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  2239. IOCB_t *cmd = NULL;
  2240. struct lpfc_scsi_buf *lpfc_cmd;
  2241. int errcnt = 0, ret_val = 0;
  2242. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
  2243. cmd = &iocb->iocb;
  2244. /* Must be a FCP command */
  2245. if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
  2246. (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
  2247. (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
  2248. continue;
  2249. }
  2250. /* context1 MUST be a struct lpfc_scsi_buf */
  2251. lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
  2252. ret_val = lpfc_sli_validate_iocb_cmd(lpfc_cmd, tgt_id, lun_id,
  2253. iocb, ctx, abort_cmd);
  2254. if (ret_val != 0)
  2255. continue;
  2256. /* issue ABTS for this IOCB based on iotag */
  2257. list_remove_head(lpfc_iocb_list, abtsiocb, struct lpfc_iocbq,
  2258. list);
  2259. if (abtsiocb == NULL) {
  2260. errcnt++;
  2261. continue;
  2262. }
  2263. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  2264. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  2265. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  2266. abtsiocb->iocb.ulpLe = 1;
  2267. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  2268. if (phba->hba_state >= LPFC_LINK_UP)
  2269. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  2270. else
  2271. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  2272. /* Setup callback routine and issue the command. */
  2273. abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
  2274. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  2275. if (ret_val == IOCB_ERROR) {
  2276. lpfc_sli_release_iocbq(phba, abtsiocb);
  2277. errcnt++;
  2278. continue;
  2279. }
  2280. }
  2281. return errcnt;
  2282. }
  2283. static void
  2284. lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
  2285. struct lpfc_iocbq *cmdiocbq,
  2286. struct lpfc_iocbq *rspiocbq)
  2287. {
  2288. wait_queue_head_t *pdone_q;
  2289. unsigned long iflags;
  2290. spin_lock_irqsave(phba->host->host_lock, iflags);
  2291. cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
  2292. if (cmdiocbq->context2 && rspiocbq)
  2293. memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
  2294. &rspiocbq->iocb, sizeof(IOCB_t));
  2295. pdone_q = cmdiocbq->context_un.wait_queue;
  2296. spin_unlock_irqrestore(phba->host->host_lock, iflags);
  2297. if (pdone_q)
  2298. wake_up(pdone_q);
  2299. return;
  2300. }
  2301. /*
  2302. * Issue the caller's iocb and wait for its completion, but no longer than the
  2303. * caller's timeout. Note that iocb_flags is cleared before the
  2304. * lpfc_sli_issue_call since the wake routine sets a unique value and by
  2305. * definition this is a wait function.
  2306. */
  2307. int
  2308. lpfc_sli_issue_iocb_wait(struct lpfc_hba * phba,
  2309. struct lpfc_sli_ring * pring,
  2310. struct lpfc_iocbq * piocb,
  2311. struct lpfc_iocbq * prspiocbq,
  2312. uint32_t timeout)
  2313. {
  2314. DECLARE_WAIT_QUEUE_HEAD(done_q);
  2315. long timeleft, timeout_req = 0;
  2316. int retval = IOCB_SUCCESS;
  2317. /*
  2318. * If the caller has provided a response iocbq buffer, then context2
  2319. * is NULL or its an error.
  2320. */
  2321. if (prspiocbq) {
  2322. if (piocb->context2)
  2323. return IOCB_ERROR;
  2324. piocb->context2 = prspiocbq;
  2325. }
  2326. piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
  2327. piocb->context_un.wait_queue = &done_q;
  2328. piocb->iocb_flag &= ~LPFC_IO_WAKE;
  2329. retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
  2330. if (retval == IOCB_SUCCESS) {
  2331. timeout_req = timeout * HZ;
  2332. spin_unlock_irq(phba->host->host_lock);
  2333. timeleft = wait_event_timeout(done_q,
  2334. piocb->iocb_flag & LPFC_IO_WAKE,
  2335. timeout_req);
  2336. spin_lock_irq(phba->host->host_lock);
  2337. if (timeleft == 0) {
  2338. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  2339. "%d:0329 IOCB wait timeout error - no "
  2340. "wake response Data x%x\n",
  2341. phba->brd_no, timeout);
  2342. retval = IOCB_TIMEDOUT;
  2343. } else if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
  2344. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  2345. "%d:0330 IOCB wake NOT set, "
  2346. "Data x%x x%lx\n", phba->brd_no,
  2347. timeout, (timeleft / jiffies));
  2348. retval = IOCB_TIMEDOUT;
  2349. } else {
  2350. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  2351. "%d:0331 IOCB wake signaled\n",
  2352. phba->brd_no);
  2353. }
  2354. } else {
  2355. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  2356. "%d:0332 IOCB wait issue failed, Data x%x\n",
  2357. phba->brd_no, retval);
  2358. retval = IOCB_ERROR;
  2359. }
  2360. if (prspiocbq)
  2361. piocb->context2 = NULL;
  2362. piocb->context_un.wait_queue = NULL;
  2363. piocb->iocb_cmpl = NULL;
  2364. return retval;
  2365. }
  2366. int
  2367. lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
  2368. uint32_t timeout)
  2369. {
  2370. DECLARE_WAIT_QUEUE_HEAD(done_q);
  2371. DECLARE_WAITQUEUE(wq_entry, current);
  2372. uint32_t timeleft = 0;
  2373. int retval;
  2374. /* The caller must leave context1 empty. */
  2375. if (pmboxq->context1 != 0) {
  2376. return (MBX_NOT_FINISHED);
  2377. }
  2378. /* setup wake call as IOCB callback */
  2379. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  2380. /* setup context field to pass wait_queue pointer to wake function */
  2381. pmboxq->context1 = &done_q;
  2382. /* start to sleep before we wait, to avoid races */
  2383. set_current_state(TASK_INTERRUPTIBLE);
  2384. add_wait_queue(&done_q, &wq_entry);
  2385. /* now issue the command */
  2386. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  2387. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  2388. timeleft = schedule_timeout(timeout * HZ);
  2389. pmboxq->context1 = NULL;
  2390. /* if schedule_timeout returns 0, we timed out and were not
  2391. woken up */
  2392. if (timeleft == 0) {
  2393. retval = MBX_TIMEOUT;
  2394. } else {
  2395. retval = MBX_SUCCESS;
  2396. }
  2397. }
  2398. set_current_state(TASK_RUNNING);
  2399. remove_wait_queue(&done_q, &wq_entry);
  2400. return retval;
  2401. }
  2402. irqreturn_t
  2403. lpfc_intr_handler(int irq, void *dev_id, struct pt_regs * regs)
  2404. {
  2405. struct lpfc_hba *phba;
  2406. uint32_t ha_copy;
  2407. uint32_t work_ha_copy;
  2408. unsigned long status;
  2409. int i;
  2410. uint32_t control;
  2411. /*
  2412. * Get the driver's phba structure from the dev_id and
  2413. * assume the HBA is not interrupting.
  2414. */
  2415. phba = (struct lpfc_hba *) dev_id;
  2416. if (unlikely(!phba))
  2417. return IRQ_NONE;
  2418. phba->sli.slistat.sli_intr++;
  2419. /*
  2420. * Call the HBA to see if it is interrupting. If not, don't claim
  2421. * the interrupt
  2422. */
  2423. /* Ignore all interrupts during initialization. */
  2424. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  2425. return IRQ_NONE;
  2426. /*
  2427. * Read host attention register to determine interrupt source
  2428. * Clear Attention Sources, except Error Attention (to
  2429. * preserve status) and Link Attention
  2430. */
  2431. spin_lock(phba->host->host_lock);
  2432. ha_copy = readl(phba->HAregaddr);
  2433. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  2434. readl(phba->HAregaddr); /* flush */
  2435. spin_unlock(phba->host->host_lock);
  2436. if (unlikely(!ha_copy))
  2437. return IRQ_NONE;
  2438. work_ha_copy = ha_copy & phba->work_ha_mask;
  2439. if (unlikely(work_ha_copy)) {
  2440. if (work_ha_copy & HA_LATT) {
  2441. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  2442. /*
  2443. * Turn off Link Attention interrupts
  2444. * until CLEAR_LA done
  2445. */
  2446. spin_lock(phba->host->host_lock);
  2447. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  2448. control = readl(phba->HCregaddr);
  2449. control &= ~HC_LAINT_ENA;
  2450. writel(control, phba->HCregaddr);
  2451. readl(phba->HCregaddr); /* flush */
  2452. spin_unlock(phba->host->host_lock);
  2453. }
  2454. else
  2455. work_ha_copy &= ~HA_LATT;
  2456. }
  2457. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  2458. for (i = 0; i < phba->sli.num_rings; i++) {
  2459. if (work_ha_copy & (HA_RXATT << (4*i))) {
  2460. /*
  2461. * Turn off Slow Rings interrupts
  2462. */
  2463. spin_lock(phba->host->host_lock);
  2464. control = readl(phba->HCregaddr);
  2465. control &= ~(HC_R0INT_ENA << i);
  2466. writel(control, phba->HCregaddr);
  2467. readl(phba->HCregaddr); /* flush */
  2468. spin_unlock(phba->host->host_lock);
  2469. }
  2470. }
  2471. }
  2472. if (work_ha_copy & HA_ERATT) {
  2473. phba->hba_state = LPFC_HBA_ERROR;
  2474. /*
  2475. * There was a link/board error. Read the
  2476. * status register to retrieve the error event
  2477. * and process it.
  2478. */
  2479. phba->sli.slistat.err_attn_event++;
  2480. /* Save status info */
  2481. phba->work_hs = readl(phba->HSregaddr);
  2482. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  2483. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  2484. /* Clear Chip error bit */
  2485. writel(HA_ERATT, phba->HAregaddr);
  2486. readl(phba->HAregaddr); /* flush */
  2487. /*
  2488. * Reseting the HBA is the only reliable way
  2489. * to shutdown interrupt when there is a
  2490. * ERROR.
  2491. */
  2492. lpfc_sli_send_reset(phba, phba->hba_state);
  2493. }
  2494. spin_lock(phba->host->host_lock);
  2495. phba->work_ha |= work_ha_copy;
  2496. if (phba->work_wait)
  2497. wake_up(phba->work_wait);
  2498. spin_unlock(phba->host->host_lock);
  2499. }
  2500. ha_copy &= ~(phba->work_ha_mask);
  2501. /*
  2502. * Process all events on FCP ring. Take the optimized path for
  2503. * FCP IO. Any other IO is slow path and is handled by
  2504. * the worker thread.
  2505. */
  2506. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  2507. status >>= (4*LPFC_FCP_RING);
  2508. if (status & HA_RXATT)
  2509. lpfc_sli_handle_fast_ring_event(phba,
  2510. &phba->sli.ring[LPFC_FCP_RING],
  2511. status);
  2512. return IRQ_HANDLED;
  2513. } /* lpfc_intr_handler */