mpc85xx_rdb.c 4.8 KB

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  1. /*
  2. * MPC85xx RDB Board Setup
  3. *
  4. * Copyright 2009 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. #include <linux/stddef.h>
  12. #include <linux/kernel.h>
  13. #include <linux/pci.h>
  14. #include <linux/kdev_t.h>
  15. #include <linux/delay.h>
  16. #include <linux/seq_file.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/of_platform.h>
  19. #include <asm/system.h>
  20. #include <asm/time.h>
  21. #include <asm/machdep.h>
  22. #include <asm/pci-bridge.h>
  23. #include <mm/mmu_decl.h>
  24. #include <asm/prom.h>
  25. #include <asm/udbg.h>
  26. #include <asm/mpic.h>
  27. #include <sysdev/fsl_soc.h>
  28. #include <sysdev/fsl_pci.h>
  29. #include "smp.h"
  30. #include "mpc85xx.h"
  31. #undef DEBUG
  32. #ifdef DEBUG
  33. #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
  34. #else
  35. #define DBG(fmt, args...)
  36. #endif
  37. void __init mpc85xx_rdb_pic_init(void)
  38. {
  39. struct mpic *mpic;
  40. unsigned long root = of_get_flat_dt_root();
  41. if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
  42. mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
  43. MPIC_BIG_ENDIAN |
  44. MPIC_SINGLE_DEST_CPU,
  45. 0, 256, " OpenPIC ");
  46. } else {
  47. mpic = mpic_alloc(NULL, 0,
  48. MPIC_BIG_ENDIAN |
  49. MPIC_SINGLE_DEST_CPU,
  50. 0, 256, " OpenPIC ");
  51. }
  52. BUG_ON(mpic == NULL);
  53. mpic_init(mpic);
  54. }
  55. /*
  56. * Setup the architecture
  57. */
  58. static void __init mpc85xx_rdb_setup_arch(void)
  59. {
  60. #ifdef CONFIG_PCI
  61. struct device_node *np;
  62. #endif
  63. if (ppc_md.progress)
  64. ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
  65. #ifdef CONFIG_PCI
  66. for_each_node_by_type(np, "pci") {
  67. if (of_device_is_compatible(np, "fsl,mpc8548-pcie"))
  68. fsl_add_bridge(np, 0);
  69. }
  70. #endif
  71. mpc85xx_smp_init();
  72. printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
  73. }
  74. machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices);
  75. machine_device_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
  76. machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices);
  77. machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
  78. machine_device_initcall(p1025_rdb, mpc85xx_common_publish_devices);
  79. /*
  80. * Called very early, device-tree isn't unflattened
  81. */
  82. static int __init p2020_rdb_probe(void)
  83. {
  84. unsigned long root = of_get_flat_dt_root();
  85. if (of_flat_dt_is_compatible(root, "fsl,P2020RDB"))
  86. return 1;
  87. return 0;
  88. }
  89. static int __init p1020_rdb_probe(void)
  90. {
  91. unsigned long root = of_get_flat_dt_root();
  92. if (of_flat_dt_is_compatible(root, "fsl,P1020RDB"))
  93. return 1;
  94. return 0;
  95. }
  96. static int __init p1021_rdb_pc_probe(void)
  97. {
  98. unsigned long root = of_get_flat_dt_root();
  99. if (of_flat_dt_is_compatible(root, "fsl,P1021RDB-PC"))
  100. return 1;
  101. return 0;
  102. }
  103. static int __init p2020_rdb_pc_probe(void)
  104. {
  105. unsigned long root = of_get_flat_dt_root();
  106. if (of_flat_dt_is_compatible(root, "fsl,P2020RDB-PC"))
  107. return 1;
  108. return 0;
  109. }
  110. static int __init p1025_rdb_probe(void)
  111. {
  112. unsigned long root = of_get_flat_dt_root();
  113. return of_flat_dt_is_compatible(root, "fsl,P1025RDB");
  114. }
  115. define_machine(p2020_rdb) {
  116. .name = "P2020 RDB",
  117. .probe = p2020_rdb_probe,
  118. .setup_arch = mpc85xx_rdb_setup_arch,
  119. .init_IRQ = mpc85xx_rdb_pic_init,
  120. #ifdef CONFIG_PCI
  121. .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
  122. #endif
  123. .get_irq = mpic_get_irq,
  124. .restart = fsl_rstcr_restart,
  125. .calibrate_decr = generic_calibrate_decr,
  126. .progress = udbg_progress,
  127. };
  128. define_machine(p1020_rdb) {
  129. .name = "P1020 RDB",
  130. .probe = p1020_rdb_probe,
  131. .setup_arch = mpc85xx_rdb_setup_arch,
  132. .init_IRQ = mpc85xx_rdb_pic_init,
  133. #ifdef CONFIG_PCI
  134. .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
  135. #endif
  136. .get_irq = mpic_get_irq,
  137. .restart = fsl_rstcr_restart,
  138. .calibrate_decr = generic_calibrate_decr,
  139. .progress = udbg_progress,
  140. };
  141. define_machine(p1021_rdb_pc) {
  142. .name = "P1021 RDB-PC",
  143. .probe = p1021_rdb_pc_probe,
  144. .setup_arch = mpc85xx_rdb_setup_arch,
  145. .init_IRQ = mpc85xx_rdb_pic_init,
  146. #ifdef CONFIG_PCI
  147. .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
  148. #endif
  149. .get_irq = mpic_get_irq,
  150. .restart = fsl_rstcr_restart,
  151. .calibrate_decr = generic_calibrate_decr,
  152. .progress = udbg_progress,
  153. };
  154. define_machine(p2020_rdb_pc) {
  155. .name = "P2020RDB-PC",
  156. .probe = p2020_rdb_pc_probe,
  157. .setup_arch = mpc85xx_rdb_setup_arch,
  158. .init_IRQ = mpc85xx_rdb_pic_init,
  159. #ifdef CONFIG_PCI
  160. .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
  161. #endif
  162. .get_irq = mpic_get_irq,
  163. .restart = fsl_rstcr_restart,
  164. .calibrate_decr = generic_calibrate_decr,
  165. .progress = udbg_progress,
  166. };
  167. define_machine(p1025_rdb) {
  168. .name = "P1025 RDB",
  169. .probe = p1025_rdb_probe,
  170. .setup_arch = mpc85xx_rdb_setup_arch,
  171. .init_IRQ = mpc85xx_rdb_pic_init,
  172. #ifdef CONFIG_PCI
  173. .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
  174. #endif
  175. .get_irq = mpic_get_irq,
  176. .restart = fsl_rstcr_restart,
  177. .calibrate_decr = generic_calibrate_decr,
  178. .progress = udbg_progress,
  179. };