process.c 33 KB

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  1. /*
  2. * Derived from "arch/i386/kernel/process.c"
  3. * Copyright (C) 1995 Linus Torvalds
  4. *
  5. * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
  6. * Paul Mackerras (paulus@cs.anu.edu.au)
  7. *
  8. * PowerPC version
  9. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version
  14. * 2 of the License, or (at your option) any later version.
  15. */
  16. #include <linux/errno.h>
  17. #include <linux/sched.h>
  18. #include <linux/kernel.h>
  19. #include <linux/mm.h>
  20. #include <linux/smp.h>
  21. #include <linux/stddef.h>
  22. #include <linux/unistd.h>
  23. #include <linux/ptrace.h>
  24. #include <linux/slab.h>
  25. #include <linux/user.h>
  26. #include <linux/elf.h>
  27. #include <linux/init.h>
  28. #include <linux/prctl.h>
  29. #include <linux/init_task.h>
  30. #include <linux/module.h>
  31. #include <linux/kallsyms.h>
  32. #include <linux/mqueue.h>
  33. #include <linux/hardirq.h>
  34. #include <linux/utsname.h>
  35. #include <linux/ftrace.h>
  36. #include <linux/kernel_stat.h>
  37. #include <linux/personality.h>
  38. #include <linux/random.h>
  39. #include <linux/hw_breakpoint.h>
  40. #include <asm/pgtable.h>
  41. #include <asm/uaccess.h>
  42. #include <asm/system.h>
  43. #include <asm/io.h>
  44. #include <asm/processor.h>
  45. #include <asm/mmu.h>
  46. #include <asm/prom.h>
  47. #include <asm/machdep.h>
  48. #include <asm/time.h>
  49. #include <asm/syscalls.h>
  50. #ifdef CONFIG_PPC64
  51. #include <asm/firmware.h>
  52. #endif
  53. #include <linux/kprobes.h>
  54. #include <linux/kdebug.h>
  55. extern unsigned long _get_SP(void);
  56. #ifndef CONFIG_SMP
  57. struct task_struct *last_task_used_math = NULL;
  58. struct task_struct *last_task_used_altivec = NULL;
  59. struct task_struct *last_task_used_vsx = NULL;
  60. struct task_struct *last_task_used_spe = NULL;
  61. #endif
  62. /*
  63. * Make sure the floating-point register state in the
  64. * the thread_struct is up to date for task tsk.
  65. */
  66. void flush_fp_to_thread(struct task_struct *tsk)
  67. {
  68. if (tsk->thread.regs) {
  69. /*
  70. * We need to disable preemption here because if we didn't,
  71. * another process could get scheduled after the regs->msr
  72. * test but before we have finished saving the FP registers
  73. * to the thread_struct. That process could take over the
  74. * FPU, and then when we get scheduled again we would store
  75. * bogus values for the remaining FP registers.
  76. */
  77. preempt_disable();
  78. if (tsk->thread.regs->msr & MSR_FP) {
  79. #ifdef CONFIG_SMP
  80. /*
  81. * This should only ever be called for current or
  82. * for a stopped child process. Since we save away
  83. * the FP register state on context switch on SMP,
  84. * there is something wrong if a stopped child appears
  85. * to still have its FP state in the CPU registers.
  86. */
  87. BUG_ON(tsk != current);
  88. #endif
  89. giveup_fpu(tsk);
  90. }
  91. preempt_enable();
  92. }
  93. }
  94. void enable_kernel_fp(void)
  95. {
  96. WARN_ON(preemptible());
  97. #ifdef CONFIG_SMP
  98. if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
  99. giveup_fpu(current);
  100. else
  101. giveup_fpu(NULL); /* just enables FP for kernel */
  102. #else
  103. giveup_fpu(last_task_used_math);
  104. #endif /* CONFIG_SMP */
  105. }
  106. EXPORT_SYMBOL(enable_kernel_fp);
  107. #ifdef CONFIG_ALTIVEC
  108. void enable_kernel_altivec(void)
  109. {
  110. WARN_ON(preemptible());
  111. #ifdef CONFIG_SMP
  112. if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
  113. giveup_altivec(current);
  114. else
  115. giveup_altivec(NULL); /* just enable AltiVec for kernel - force */
  116. #else
  117. giveup_altivec(last_task_used_altivec);
  118. #endif /* CONFIG_SMP */
  119. }
  120. EXPORT_SYMBOL(enable_kernel_altivec);
  121. /*
  122. * Make sure the VMX/Altivec register state in the
  123. * the thread_struct is up to date for task tsk.
  124. */
  125. void flush_altivec_to_thread(struct task_struct *tsk)
  126. {
  127. if (tsk->thread.regs) {
  128. preempt_disable();
  129. if (tsk->thread.regs->msr & MSR_VEC) {
  130. #ifdef CONFIG_SMP
  131. BUG_ON(tsk != current);
  132. #endif
  133. giveup_altivec(tsk);
  134. }
  135. preempt_enable();
  136. }
  137. }
  138. #endif /* CONFIG_ALTIVEC */
  139. #ifdef CONFIG_VSX
  140. #if 0
  141. /* not currently used, but some crazy RAID module might want to later */
  142. void enable_kernel_vsx(void)
  143. {
  144. WARN_ON(preemptible());
  145. #ifdef CONFIG_SMP
  146. if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
  147. giveup_vsx(current);
  148. else
  149. giveup_vsx(NULL); /* just enable vsx for kernel - force */
  150. #else
  151. giveup_vsx(last_task_used_vsx);
  152. #endif /* CONFIG_SMP */
  153. }
  154. EXPORT_SYMBOL(enable_kernel_vsx);
  155. #endif
  156. void giveup_vsx(struct task_struct *tsk)
  157. {
  158. giveup_fpu(tsk);
  159. giveup_altivec(tsk);
  160. __giveup_vsx(tsk);
  161. }
  162. void flush_vsx_to_thread(struct task_struct *tsk)
  163. {
  164. if (tsk->thread.regs) {
  165. preempt_disable();
  166. if (tsk->thread.regs->msr & MSR_VSX) {
  167. #ifdef CONFIG_SMP
  168. BUG_ON(tsk != current);
  169. #endif
  170. giveup_vsx(tsk);
  171. }
  172. preempt_enable();
  173. }
  174. }
  175. #endif /* CONFIG_VSX */
  176. #ifdef CONFIG_SPE
  177. void enable_kernel_spe(void)
  178. {
  179. WARN_ON(preemptible());
  180. #ifdef CONFIG_SMP
  181. if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
  182. giveup_spe(current);
  183. else
  184. giveup_spe(NULL); /* just enable SPE for kernel - force */
  185. #else
  186. giveup_spe(last_task_used_spe);
  187. #endif /* __SMP __ */
  188. }
  189. EXPORT_SYMBOL(enable_kernel_spe);
  190. void flush_spe_to_thread(struct task_struct *tsk)
  191. {
  192. if (tsk->thread.regs) {
  193. preempt_disable();
  194. if (tsk->thread.regs->msr & MSR_SPE) {
  195. #ifdef CONFIG_SMP
  196. BUG_ON(tsk != current);
  197. #endif
  198. tsk->thread.spefscr = mfspr(SPRN_SPEFSCR);
  199. giveup_spe(tsk);
  200. }
  201. preempt_enable();
  202. }
  203. }
  204. #endif /* CONFIG_SPE */
  205. #ifndef CONFIG_SMP
  206. /*
  207. * If we are doing lazy switching of CPU state (FP, altivec or SPE),
  208. * and the current task has some state, discard it.
  209. */
  210. void discard_lazy_cpu_state(void)
  211. {
  212. preempt_disable();
  213. if (last_task_used_math == current)
  214. last_task_used_math = NULL;
  215. #ifdef CONFIG_ALTIVEC
  216. if (last_task_used_altivec == current)
  217. last_task_used_altivec = NULL;
  218. #endif /* CONFIG_ALTIVEC */
  219. #ifdef CONFIG_VSX
  220. if (last_task_used_vsx == current)
  221. last_task_used_vsx = NULL;
  222. #endif /* CONFIG_VSX */
  223. #ifdef CONFIG_SPE
  224. if (last_task_used_spe == current)
  225. last_task_used_spe = NULL;
  226. #endif
  227. preempt_enable();
  228. }
  229. #endif /* CONFIG_SMP */
  230. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  231. void do_send_trap(struct pt_regs *regs, unsigned long address,
  232. unsigned long error_code, int signal_code, int breakpt)
  233. {
  234. siginfo_t info;
  235. if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
  236. 11, SIGSEGV) == NOTIFY_STOP)
  237. return;
  238. /* Deliver the signal to userspace */
  239. info.si_signo = SIGTRAP;
  240. info.si_errno = breakpt; /* breakpoint or watchpoint id */
  241. info.si_code = signal_code;
  242. info.si_addr = (void __user *)address;
  243. force_sig_info(SIGTRAP, &info, current);
  244. }
  245. #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
  246. void do_dabr(struct pt_regs *regs, unsigned long address,
  247. unsigned long error_code)
  248. {
  249. siginfo_t info;
  250. if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
  251. 11, SIGSEGV) == NOTIFY_STOP)
  252. return;
  253. if (debugger_dabr_match(regs))
  254. return;
  255. /* Clear the DABR */
  256. set_dabr(0);
  257. /* Deliver the signal to userspace */
  258. info.si_signo = SIGTRAP;
  259. info.si_errno = 0;
  260. info.si_code = TRAP_HWBKPT;
  261. info.si_addr = (void __user *)address;
  262. force_sig_info(SIGTRAP, &info, current);
  263. }
  264. #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
  265. static DEFINE_PER_CPU(unsigned long, current_dabr);
  266. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  267. /*
  268. * Set the debug registers back to their default "safe" values.
  269. */
  270. static void set_debug_reg_defaults(struct thread_struct *thread)
  271. {
  272. thread->iac1 = thread->iac2 = 0;
  273. #if CONFIG_PPC_ADV_DEBUG_IACS > 2
  274. thread->iac3 = thread->iac4 = 0;
  275. #endif
  276. thread->dac1 = thread->dac2 = 0;
  277. #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
  278. thread->dvc1 = thread->dvc2 = 0;
  279. #endif
  280. thread->dbcr0 = 0;
  281. #ifdef CONFIG_BOOKE
  282. /*
  283. * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
  284. */
  285. thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | \
  286. DBCR1_IAC3US | DBCR1_IAC4US;
  287. /*
  288. * Force Data Address Compare User/Supervisor bits to be User-only
  289. * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
  290. */
  291. thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
  292. #else
  293. thread->dbcr1 = 0;
  294. #endif
  295. }
  296. static void prime_debug_regs(struct thread_struct *thread)
  297. {
  298. mtspr(SPRN_IAC1, thread->iac1);
  299. mtspr(SPRN_IAC2, thread->iac2);
  300. #if CONFIG_PPC_ADV_DEBUG_IACS > 2
  301. mtspr(SPRN_IAC3, thread->iac3);
  302. mtspr(SPRN_IAC4, thread->iac4);
  303. #endif
  304. mtspr(SPRN_DAC1, thread->dac1);
  305. mtspr(SPRN_DAC2, thread->dac2);
  306. #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
  307. mtspr(SPRN_DVC1, thread->dvc1);
  308. mtspr(SPRN_DVC2, thread->dvc2);
  309. #endif
  310. mtspr(SPRN_DBCR0, thread->dbcr0);
  311. mtspr(SPRN_DBCR1, thread->dbcr1);
  312. #ifdef CONFIG_BOOKE
  313. mtspr(SPRN_DBCR2, thread->dbcr2);
  314. #endif
  315. }
  316. /*
  317. * Unless neither the old or new thread are making use of the
  318. * debug registers, set the debug registers from the values
  319. * stored in the new thread.
  320. */
  321. static void switch_booke_debug_regs(struct thread_struct *new_thread)
  322. {
  323. if ((current->thread.dbcr0 & DBCR0_IDM)
  324. || (new_thread->dbcr0 & DBCR0_IDM))
  325. prime_debug_regs(new_thread);
  326. }
  327. #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
  328. #ifndef CONFIG_HAVE_HW_BREAKPOINT
  329. static void set_debug_reg_defaults(struct thread_struct *thread)
  330. {
  331. if (thread->dabr) {
  332. thread->dabr = 0;
  333. set_dabr(0);
  334. }
  335. }
  336. #endif /* !CONFIG_HAVE_HW_BREAKPOINT */
  337. #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
  338. int set_dabr(unsigned long dabr)
  339. {
  340. __get_cpu_var(current_dabr) = dabr;
  341. if (ppc_md.set_dabr)
  342. return ppc_md.set_dabr(dabr);
  343. /* XXX should we have a CPU_FTR_HAS_DABR ? */
  344. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  345. mtspr(SPRN_DAC1, dabr);
  346. #ifdef CONFIG_PPC_47x
  347. isync();
  348. #endif
  349. #elif defined(CONFIG_PPC_BOOK3S)
  350. mtspr(SPRN_DABR, dabr);
  351. #endif
  352. return 0;
  353. }
  354. #ifdef CONFIG_PPC64
  355. DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
  356. #endif
  357. struct task_struct *__switch_to(struct task_struct *prev,
  358. struct task_struct *new)
  359. {
  360. struct thread_struct *new_thread, *old_thread;
  361. unsigned long flags;
  362. struct task_struct *last;
  363. #ifdef CONFIG_PPC_BOOK3S_64
  364. struct ppc64_tlb_batch *batch;
  365. #endif
  366. #ifdef CONFIG_SMP
  367. /* avoid complexity of lazy save/restore of fpu
  368. * by just saving it every time we switch out if
  369. * this task used the fpu during the last quantum.
  370. *
  371. * If it tries to use the fpu again, it'll trap and
  372. * reload its fp regs. So we don't have to do a restore
  373. * every switch, just a save.
  374. * -- Cort
  375. */
  376. if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
  377. giveup_fpu(prev);
  378. #ifdef CONFIG_ALTIVEC
  379. /*
  380. * If the previous thread used altivec in the last quantum
  381. * (thus changing altivec regs) then save them.
  382. * We used to check the VRSAVE register but not all apps
  383. * set it, so we don't rely on it now (and in fact we need
  384. * to save & restore VSCR even if VRSAVE == 0). -- paulus
  385. *
  386. * On SMP we always save/restore altivec regs just to avoid the
  387. * complexity of changing processors.
  388. * -- Cort
  389. */
  390. if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
  391. giveup_altivec(prev);
  392. #endif /* CONFIG_ALTIVEC */
  393. #ifdef CONFIG_VSX
  394. if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
  395. /* VMX and FPU registers are already save here */
  396. __giveup_vsx(prev);
  397. #endif /* CONFIG_VSX */
  398. #ifdef CONFIG_SPE
  399. /*
  400. * If the previous thread used spe in the last quantum
  401. * (thus changing spe regs) then save them.
  402. *
  403. * On SMP we always save/restore spe regs just to avoid the
  404. * complexity of changing processors.
  405. */
  406. if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
  407. giveup_spe(prev);
  408. #endif /* CONFIG_SPE */
  409. #else /* CONFIG_SMP */
  410. #ifdef CONFIG_ALTIVEC
  411. /* Avoid the trap. On smp this this never happens since
  412. * we don't set last_task_used_altivec -- Cort
  413. */
  414. if (new->thread.regs && last_task_used_altivec == new)
  415. new->thread.regs->msr |= MSR_VEC;
  416. #endif /* CONFIG_ALTIVEC */
  417. #ifdef CONFIG_VSX
  418. if (new->thread.regs && last_task_used_vsx == new)
  419. new->thread.regs->msr |= MSR_VSX;
  420. #endif /* CONFIG_VSX */
  421. #ifdef CONFIG_SPE
  422. /* Avoid the trap. On smp this this never happens since
  423. * we don't set last_task_used_spe
  424. */
  425. if (new->thread.regs && last_task_used_spe == new)
  426. new->thread.regs->msr |= MSR_SPE;
  427. #endif /* CONFIG_SPE */
  428. #endif /* CONFIG_SMP */
  429. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  430. switch_booke_debug_regs(&new->thread);
  431. #else
  432. /*
  433. * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
  434. * schedule DABR
  435. */
  436. #ifndef CONFIG_HAVE_HW_BREAKPOINT
  437. if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
  438. set_dabr(new->thread.dabr);
  439. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  440. #endif
  441. new_thread = &new->thread;
  442. old_thread = &current->thread;
  443. #if defined(CONFIG_PPC_BOOK3E_64)
  444. /* XXX Current Book3E code doesn't deal with kernel side DBCR0,
  445. * we always hold the user values, so we set it now.
  446. *
  447. * However, we ensure the kernel MSR:DE is appropriately cleared too
  448. * to avoid spurrious single step exceptions in the kernel.
  449. *
  450. * This will have to change to merge with the ppc32 code at some point,
  451. * but I don't like much what ppc32 is doing today so there's some
  452. * thinking needed there
  453. */
  454. if ((new_thread->dbcr0 | old_thread->dbcr0) & DBCR0_IDM) {
  455. u32 dbcr0;
  456. mtmsr(mfmsr() & ~MSR_DE);
  457. isync();
  458. dbcr0 = mfspr(SPRN_DBCR0);
  459. dbcr0 = (dbcr0 & DBCR0_EDM) | new_thread->dbcr0;
  460. mtspr(SPRN_DBCR0, dbcr0);
  461. }
  462. #endif /* CONFIG_PPC64_BOOK3E */
  463. #ifdef CONFIG_PPC64
  464. /*
  465. * Collect processor utilization data per process
  466. */
  467. if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
  468. struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
  469. long unsigned start_tb, current_tb;
  470. start_tb = old_thread->start_tb;
  471. cu->current_tb = current_tb = mfspr(SPRN_PURR);
  472. old_thread->accum_tb += (current_tb - start_tb);
  473. new_thread->start_tb = current_tb;
  474. }
  475. #endif /* CONFIG_PPC64 */
  476. #ifdef CONFIG_PPC_BOOK3S_64
  477. batch = &__get_cpu_var(ppc64_tlb_batch);
  478. if (batch->active) {
  479. current_thread_info()->local_flags |= _TLF_LAZY_MMU;
  480. if (batch->index)
  481. __flush_tlb_pending(batch);
  482. batch->active = 0;
  483. }
  484. #endif /* CONFIG_PPC_BOOK3S_64 */
  485. local_irq_save(flags);
  486. account_system_vtime(current);
  487. account_process_vtime(current);
  488. /*
  489. * We can't take a PMU exception inside _switch() since there is a
  490. * window where the kernel stack SLB and the kernel stack are out
  491. * of sync. Hard disable here.
  492. */
  493. hard_irq_disable();
  494. last = _switch(old_thread, new_thread);
  495. #ifdef CONFIG_PPC_BOOK3S_64
  496. if (current_thread_info()->local_flags & _TLF_LAZY_MMU) {
  497. current_thread_info()->local_flags &= ~_TLF_LAZY_MMU;
  498. batch = &__get_cpu_var(ppc64_tlb_batch);
  499. batch->active = 1;
  500. }
  501. #endif /* CONFIG_PPC_BOOK3S_64 */
  502. local_irq_restore(flags);
  503. return last;
  504. }
  505. static int instructions_to_print = 16;
  506. static void show_instructions(struct pt_regs *regs)
  507. {
  508. int i;
  509. unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
  510. sizeof(int));
  511. printk("Instruction dump:");
  512. for (i = 0; i < instructions_to_print; i++) {
  513. int instr;
  514. if (!(i % 8))
  515. printk("\n");
  516. #if !defined(CONFIG_BOOKE)
  517. /* If executing with the IMMU off, adjust pc rather
  518. * than print XXXXXXXX.
  519. */
  520. if (!(regs->msr & MSR_IR))
  521. pc = (unsigned long)phys_to_virt(pc);
  522. #endif
  523. /* We use __get_user here *only* to avoid an OOPS on a
  524. * bad address because the pc *should* only be a
  525. * kernel address.
  526. */
  527. if (!__kernel_text_address(pc) ||
  528. __get_user(instr, (unsigned int __user *)pc)) {
  529. printk("XXXXXXXX ");
  530. } else {
  531. if (regs->nip == pc)
  532. printk("<%08x> ", instr);
  533. else
  534. printk("%08x ", instr);
  535. }
  536. pc += sizeof(int);
  537. }
  538. printk("\n");
  539. }
  540. static struct regbit {
  541. unsigned long bit;
  542. const char *name;
  543. } msr_bits[] = {
  544. {MSR_EE, "EE"},
  545. {MSR_PR, "PR"},
  546. {MSR_FP, "FP"},
  547. {MSR_VEC, "VEC"},
  548. {MSR_VSX, "VSX"},
  549. {MSR_ME, "ME"},
  550. {MSR_CE, "CE"},
  551. {MSR_DE, "DE"},
  552. {MSR_IR, "IR"},
  553. {MSR_DR, "DR"},
  554. {0, NULL}
  555. };
  556. static void printbits(unsigned long val, struct regbit *bits)
  557. {
  558. const char *sep = "";
  559. printk("<");
  560. for (; bits->bit; ++bits)
  561. if (val & bits->bit) {
  562. printk("%s%s", sep, bits->name);
  563. sep = ",";
  564. }
  565. printk(">");
  566. }
  567. #ifdef CONFIG_PPC64
  568. #define REG "%016lx"
  569. #define REGS_PER_LINE 4
  570. #define LAST_VOLATILE 13
  571. #else
  572. #define REG "%08lx"
  573. #define REGS_PER_LINE 8
  574. #define LAST_VOLATILE 12
  575. #endif
  576. void show_regs(struct pt_regs * regs)
  577. {
  578. int i, trap;
  579. printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
  580. regs->nip, regs->link, regs->ctr);
  581. printk("REGS: %p TRAP: %04lx %s (%s)\n",
  582. regs, regs->trap, print_tainted(), init_utsname()->release);
  583. printk("MSR: "REG" ", regs->msr);
  584. printbits(regs->msr, msr_bits);
  585. printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
  586. trap = TRAP(regs);
  587. if (trap == 0x300 || trap == 0x600)
  588. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  589. printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
  590. #else
  591. printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr);
  592. #endif
  593. printk("TASK = %p[%d] '%s' THREAD: %p",
  594. current, task_pid_nr(current), current->comm, task_thread_info(current));
  595. #ifdef CONFIG_SMP
  596. printk(" CPU: %d", raw_smp_processor_id());
  597. #endif /* CONFIG_SMP */
  598. for (i = 0; i < 32; i++) {
  599. if ((i % REGS_PER_LINE) == 0)
  600. printk("\nGPR%02d: ", i);
  601. printk(REG " ", regs->gpr[i]);
  602. if (i == LAST_VOLATILE && !FULL_REGS(regs))
  603. break;
  604. }
  605. printk("\n");
  606. #ifdef CONFIG_KALLSYMS
  607. /*
  608. * Lookup NIP late so we have the best change of getting the
  609. * above info out without failing
  610. */
  611. printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
  612. printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
  613. #endif
  614. show_stack(current, (unsigned long *) regs->gpr[1]);
  615. if (!user_mode(regs))
  616. show_instructions(regs);
  617. }
  618. void exit_thread(void)
  619. {
  620. discard_lazy_cpu_state();
  621. }
  622. void flush_thread(void)
  623. {
  624. discard_lazy_cpu_state();
  625. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  626. flush_ptrace_hw_breakpoint(current);
  627. #else /* CONFIG_HAVE_HW_BREAKPOINT */
  628. set_debug_reg_defaults(&current->thread);
  629. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  630. }
  631. void
  632. release_thread(struct task_struct *t)
  633. {
  634. }
  635. /*
  636. * This gets called before we allocate a new thread and copy
  637. * the current task into it.
  638. */
  639. void prepare_to_copy(struct task_struct *tsk)
  640. {
  641. flush_fp_to_thread(current);
  642. flush_altivec_to_thread(current);
  643. flush_vsx_to_thread(current);
  644. flush_spe_to_thread(current);
  645. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  646. flush_ptrace_hw_breakpoint(tsk);
  647. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  648. }
  649. /*
  650. * Copy a thread..
  651. */
  652. extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */
  653. int copy_thread(unsigned long clone_flags, unsigned long usp,
  654. unsigned long unused, struct task_struct *p,
  655. struct pt_regs *regs)
  656. {
  657. struct pt_regs *childregs, *kregs;
  658. extern void ret_from_fork(void);
  659. unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
  660. CHECK_FULL_REGS(regs);
  661. /* Copy registers */
  662. sp -= sizeof(struct pt_regs);
  663. childregs = (struct pt_regs *) sp;
  664. *childregs = *regs;
  665. if ((childregs->msr & MSR_PR) == 0) {
  666. /* for kernel thread, set `current' and stackptr in new task */
  667. childregs->gpr[1] = sp + sizeof(struct pt_regs);
  668. #ifdef CONFIG_PPC32
  669. childregs->gpr[2] = (unsigned long) p;
  670. #else
  671. clear_tsk_thread_flag(p, TIF_32BIT);
  672. #endif
  673. p->thread.regs = NULL; /* no user register state */
  674. } else {
  675. childregs->gpr[1] = usp;
  676. p->thread.regs = childregs;
  677. if (clone_flags & CLONE_SETTLS) {
  678. #ifdef CONFIG_PPC64
  679. if (!is_32bit_task())
  680. childregs->gpr[13] = childregs->gpr[6];
  681. else
  682. #endif
  683. childregs->gpr[2] = childregs->gpr[6];
  684. }
  685. }
  686. childregs->gpr[3] = 0; /* Result from fork() */
  687. sp -= STACK_FRAME_OVERHEAD;
  688. /*
  689. * The way this works is that at some point in the future
  690. * some task will call _switch to switch to the new task.
  691. * That will pop off the stack frame created below and start
  692. * the new task running at ret_from_fork. The new task will
  693. * do some house keeping and then return from the fork or clone
  694. * system call, using the stack frame created above.
  695. */
  696. sp -= sizeof(struct pt_regs);
  697. kregs = (struct pt_regs *) sp;
  698. sp -= STACK_FRAME_OVERHEAD;
  699. p->thread.ksp = sp;
  700. p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
  701. _ALIGN_UP(sizeof(struct thread_info), 16);
  702. #ifdef CONFIG_PPC_STD_MMU_64
  703. if (mmu_has_feature(MMU_FTR_SLB)) {
  704. unsigned long sp_vsid;
  705. unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
  706. if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
  707. sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
  708. << SLB_VSID_SHIFT_1T;
  709. else
  710. sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
  711. << SLB_VSID_SHIFT;
  712. sp_vsid |= SLB_VSID_KERNEL | llp;
  713. p->thread.ksp_vsid = sp_vsid;
  714. }
  715. #endif /* CONFIG_PPC_STD_MMU_64 */
  716. #ifdef CONFIG_PPC64
  717. if (cpu_has_feature(CPU_FTR_DSCR)) {
  718. if (current->thread.dscr_inherit) {
  719. p->thread.dscr_inherit = 1;
  720. p->thread.dscr = current->thread.dscr;
  721. } else if (0 != dscr_default) {
  722. p->thread.dscr_inherit = 1;
  723. p->thread.dscr = dscr_default;
  724. } else {
  725. p->thread.dscr_inherit = 0;
  726. p->thread.dscr = 0;
  727. }
  728. }
  729. #endif
  730. /*
  731. * The PPC64 ABI makes use of a TOC to contain function
  732. * pointers. The function (ret_from_except) is actually a pointer
  733. * to the TOC entry. The first entry is a pointer to the actual
  734. * function.
  735. */
  736. #ifdef CONFIG_PPC64
  737. kregs->nip = *((unsigned long *)ret_from_fork);
  738. #else
  739. kregs->nip = (unsigned long)ret_from_fork;
  740. #endif
  741. return 0;
  742. }
  743. /*
  744. * Set up a thread for executing a new program
  745. */
  746. void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
  747. {
  748. #ifdef CONFIG_PPC64
  749. unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */
  750. #endif
  751. set_fs(USER_DS);
  752. /*
  753. * If we exec out of a kernel thread then thread.regs will not be
  754. * set. Do it now.
  755. */
  756. if (!current->thread.regs) {
  757. struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
  758. current->thread.regs = regs - 1;
  759. }
  760. memset(regs->gpr, 0, sizeof(regs->gpr));
  761. regs->ctr = 0;
  762. regs->link = 0;
  763. regs->xer = 0;
  764. regs->ccr = 0;
  765. regs->gpr[1] = sp;
  766. /*
  767. * We have just cleared all the nonvolatile GPRs, so make
  768. * FULL_REGS(regs) return true. This is necessary to allow
  769. * ptrace to examine the thread immediately after exec.
  770. */
  771. regs->trap &= ~1UL;
  772. #ifdef CONFIG_PPC32
  773. regs->mq = 0;
  774. regs->nip = start;
  775. regs->msr = MSR_USER;
  776. #else
  777. if (!is_32bit_task()) {
  778. unsigned long entry, toc;
  779. /* start is a relocated pointer to the function descriptor for
  780. * the elf _start routine. The first entry in the function
  781. * descriptor is the entry address of _start and the second
  782. * entry is the TOC value we need to use.
  783. */
  784. __get_user(entry, (unsigned long __user *)start);
  785. __get_user(toc, (unsigned long __user *)start+1);
  786. /* Check whether the e_entry function descriptor entries
  787. * need to be relocated before we can use them.
  788. */
  789. if (load_addr != 0) {
  790. entry += load_addr;
  791. toc += load_addr;
  792. }
  793. regs->nip = entry;
  794. regs->gpr[2] = toc;
  795. regs->msr = MSR_USER64;
  796. } else {
  797. regs->nip = start;
  798. regs->gpr[2] = 0;
  799. regs->msr = MSR_USER32;
  800. }
  801. #endif
  802. discard_lazy_cpu_state();
  803. #ifdef CONFIG_VSX
  804. current->thread.used_vsr = 0;
  805. #endif
  806. memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
  807. current->thread.fpscr.val = 0;
  808. #ifdef CONFIG_ALTIVEC
  809. memset(current->thread.vr, 0, sizeof(current->thread.vr));
  810. memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
  811. current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
  812. current->thread.vrsave = 0;
  813. current->thread.used_vr = 0;
  814. #endif /* CONFIG_ALTIVEC */
  815. #ifdef CONFIG_SPE
  816. memset(current->thread.evr, 0, sizeof(current->thread.evr));
  817. current->thread.acc = 0;
  818. current->thread.spefscr = 0;
  819. current->thread.used_spe = 0;
  820. #endif /* CONFIG_SPE */
  821. }
  822. #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
  823. | PR_FP_EXC_RES | PR_FP_EXC_INV)
  824. int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
  825. {
  826. struct pt_regs *regs = tsk->thread.regs;
  827. /* This is a bit hairy. If we are an SPE enabled processor
  828. * (have embedded fp) we store the IEEE exception enable flags in
  829. * fpexc_mode. fpexc_mode is also used for setting FP exception
  830. * mode (asyn, precise, disabled) for 'Classic' FP. */
  831. if (val & PR_FP_EXC_SW_ENABLE) {
  832. #ifdef CONFIG_SPE
  833. if (cpu_has_feature(CPU_FTR_SPE)) {
  834. tsk->thread.fpexc_mode = val &
  835. (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
  836. return 0;
  837. } else {
  838. return -EINVAL;
  839. }
  840. #else
  841. return -EINVAL;
  842. #endif
  843. }
  844. /* on a CONFIG_SPE this does not hurt us. The bits that
  845. * __pack_fe01 use do not overlap with bits used for
  846. * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits
  847. * on CONFIG_SPE implementations are reserved so writing to
  848. * them does not change anything */
  849. if (val > PR_FP_EXC_PRECISE)
  850. return -EINVAL;
  851. tsk->thread.fpexc_mode = __pack_fe01(val);
  852. if (regs != NULL && (regs->msr & MSR_FP) != 0)
  853. regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
  854. | tsk->thread.fpexc_mode;
  855. return 0;
  856. }
  857. int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
  858. {
  859. unsigned int val;
  860. if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
  861. #ifdef CONFIG_SPE
  862. if (cpu_has_feature(CPU_FTR_SPE))
  863. val = tsk->thread.fpexc_mode;
  864. else
  865. return -EINVAL;
  866. #else
  867. return -EINVAL;
  868. #endif
  869. else
  870. val = __unpack_fe01(tsk->thread.fpexc_mode);
  871. return put_user(val, (unsigned int __user *) adr);
  872. }
  873. int set_endian(struct task_struct *tsk, unsigned int val)
  874. {
  875. struct pt_regs *regs = tsk->thread.regs;
  876. if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
  877. (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
  878. return -EINVAL;
  879. if (regs == NULL)
  880. return -EINVAL;
  881. if (val == PR_ENDIAN_BIG)
  882. regs->msr &= ~MSR_LE;
  883. else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
  884. regs->msr |= MSR_LE;
  885. else
  886. return -EINVAL;
  887. return 0;
  888. }
  889. int get_endian(struct task_struct *tsk, unsigned long adr)
  890. {
  891. struct pt_regs *regs = tsk->thread.regs;
  892. unsigned int val;
  893. if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
  894. !cpu_has_feature(CPU_FTR_REAL_LE))
  895. return -EINVAL;
  896. if (regs == NULL)
  897. return -EINVAL;
  898. if (regs->msr & MSR_LE) {
  899. if (cpu_has_feature(CPU_FTR_REAL_LE))
  900. val = PR_ENDIAN_LITTLE;
  901. else
  902. val = PR_ENDIAN_PPC_LITTLE;
  903. } else
  904. val = PR_ENDIAN_BIG;
  905. return put_user(val, (unsigned int __user *)adr);
  906. }
  907. int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
  908. {
  909. tsk->thread.align_ctl = val;
  910. return 0;
  911. }
  912. int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
  913. {
  914. return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
  915. }
  916. #define TRUNC_PTR(x) ((typeof(x))(((unsigned long)(x)) & 0xffffffff))
  917. int sys_clone(unsigned long clone_flags, unsigned long usp,
  918. int __user *parent_tidp, void __user *child_threadptr,
  919. int __user *child_tidp, int p6,
  920. struct pt_regs *regs)
  921. {
  922. CHECK_FULL_REGS(regs);
  923. if (usp == 0)
  924. usp = regs->gpr[1]; /* stack pointer for child */
  925. #ifdef CONFIG_PPC64
  926. if (is_32bit_task()) {
  927. parent_tidp = TRUNC_PTR(parent_tidp);
  928. child_tidp = TRUNC_PTR(child_tidp);
  929. }
  930. #endif
  931. return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
  932. }
  933. int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
  934. unsigned long p4, unsigned long p5, unsigned long p6,
  935. struct pt_regs *regs)
  936. {
  937. CHECK_FULL_REGS(regs);
  938. return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
  939. }
  940. int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
  941. unsigned long p4, unsigned long p5, unsigned long p6,
  942. struct pt_regs *regs)
  943. {
  944. CHECK_FULL_REGS(regs);
  945. return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1],
  946. regs, 0, NULL, NULL);
  947. }
  948. int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
  949. unsigned long a3, unsigned long a4, unsigned long a5,
  950. struct pt_regs *regs)
  951. {
  952. int error;
  953. char *filename;
  954. filename = getname((const char __user *) a0);
  955. error = PTR_ERR(filename);
  956. if (IS_ERR(filename))
  957. goto out;
  958. flush_fp_to_thread(current);
  959. flush_altivec_to_thread(current);
  960. flush_spe_to_thread(current);
  961. error = do_execve(filename,
  962. (const char __user *const __user *) a1,
  963. (const char __user *const __user *) a2, regs);
  964. putname(filename);
  965. out:
  966. return error;
  967. }
  968. static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
  969. unsigned long nbytes)
  970. {
  971. unsigned long stack_page;
  972. unsigned long cpu = task_cpu(p);
  973. /*
  974. * Avoid crashing if the stack has overflowed and corrupted
  975. * task_cpu(p), which is in the thread_info struct.
  976. */
  977. if (cpu < NR_CPUS && cpu_possible(cpu)) {
  978. stack_page = (unsigned long) hardirq_ctx[cpu];
  979. if (sp >= stack_page + sizeof(struct thread_struct)
  980. && sp <= stack_page + THREAD_SIZE - nbytes)
  981. return 1;
  982. stack_page = (unsigned long) softirq_ctx[cpu];
  983. if (sp >= stack_page + sizeof(struct thread_struct)
  984. && sp <= stack_page + THREAD_SIZE - nbytes)
  985. return 1;
  986. }
  987. return 0;
  988. }
  989. int validate_sp(unsigned long sp, struct task_struct *p,
  990. unsigned long nbytes)
  991. {
  992. unsigned long stack_page = (unsigned long)task_stack_page(p);
  993. if (sp >= stack_page + sizeof(struct thread_struct)
  994. && sp <= stack_page + THREAD_SIZE - nbytes)
  995. return 1;
  996. return valid_irq_stack(sp, p, nbytes);
  997. }
  998. EXPORT_SYMBOL(validate_sp);
  999. unsigned long get_wchan(struct task_struct *p)
  1000. {
  1001. unsigned long ip, sp;
  1002. int count = 0;
  1003. if (!p || p == current || p->state == TASK_RUNNING)
  1004. return 0;
  1005. sp = p->thread.ksp;
  1006. if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
  1007. return 0;
  1008. do {
  1009. sp = *(unsigned long *)sp;
  1010. if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
  1011. return 0;
  1012. if (count > 0) {
  1013. ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE];
  1014. if (!in_sched_functions(ip))
  1015. return ip;
  1016. }
  1017. } while (count++ < 16);
  1018. return 0;
  1019. }
  1020. static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
  1021. void show_stack(struct task_struct *tsk, unsigned long *stack)
  1022. {
  1023. unsigned long sp, ip, lr, newsp;
  1024. int count = 0;
  1025. int firstframe = 1;
  1026. #ifdef CONFIG_FUNCTION_GRAPH_TRACER
  1027. int curr_frame = current->curr_ret_stack;
  1028. extern void return_to_handler(void);
  1029. unsigned long rth = (unsigned long)return_to_handler;
  1030. unsigned long mrth = -1;
  1031. #ifdef CONFIG_PPC64
  1032. extern void mod_return_to_handler(void);
  1033. rth = *(unsigned long *)rth;
  1034. mrth = (unsigned long)mod_return_to_handler;
  1035. mrth = *(unsigned long *)mrth;
  1036. #endif
  1037. #endif
  1038. sp = (unsigned long) stack;
  1039. if (tsk == NULL)
  1040. tsk = current;
  1041. if (sp == 0) {
  1042. if (tsk == current)
  1043. asm("mr %0,1" : "=r" (sp));
  1044. else
  1045. sp = tsk->thread.ksp;
  1046. }
  1047. lr = 0;
  1048. printk("Call Trace:\n");
  1049. do {
  1050. if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
  1051. return;
  1052. stack = (unsigned long *) sp;
  1053. newsp = stack[0];
  1054. ip = stack[STACK_FRAME_LR_SAVE];
  1055. if (!firstframe || ip != lr) {
  1056. printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
  1057. #ifdef CONFIG_FUNCTION_GRAPH_TRACER
  1058. if ((ip == rth || ip == mrth) && curr_frame >= 0) {
  1059. printk(" (%pS)",
  1060. (void *)current->ret_stack[curr_frame].ret);
  1061. curr_frame--;
  1062. }
  1063. #endif
  1064. if (firstframe)
  1065. printk(" (unreliable)");
  1066. printk("\n");
  1067. }
  1068. firstframe = 0;
  1069. /*
  1070. * See if this is an exception frame.
  1071. * We look for the "regshere" marker in the current frame.
  1072. */
  1073. if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE)
  1074. && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
  1075. struct pt_regs *regs = (struct pt_regs *)
  1076. (sp + STACK_FRAME_OVERHEAD);
  1077. lr = regs->link;
  1078. printk("--- Exception: %lx at %pS\n LR = %pS\n",
  1079. regs->trap, (void *)regs->nip, (void *)lr);
  1080. firstframe = 1;
  1081. }
  1082. sp = newsp;
  1083. } while (count++ < kstack_depth_to_print);
  1084. }
  1085. void dump_stack(void)
  1086. {
  1087. show_stack(current, NULL);
  1088. }
  1089. EXPORT_SYMBOL(dump_stack);
  1090. #ifdef CONFIG_PPC64
  1091. void ppc64_runlatch_on(void)
  1092. {
  1093. unsigned long ctrl;
  1094. if (cpu_has_feature(CPU_FTR_CTRL) && !test_thread_flag(TIF_RUNLATCH)) {
  1095. HMT_medium();
  1096. ctrl = mfspr(SPRN_CTRLF);
  1097. ctrl |= CTRL_RUNLATCH;
  1098. mtspr(SPRN_CTRLT, ctrl);
  1099. set_thread_flag(TIF_RUNLATCH);
  1100. }
  1101. }
  1102. void __ppc64_runlatch_off(void)
  1103. {
  1104. unsigned long ctrl;
  1105. HMT_medium();
  1106. clear_thread_flag(TIF_RUNLATCH);
  1107. ctrl = mfspr(SPRN_CTRLF);
  1108. ctrl &= ~CTRL_RUNLATCH;
  1109. mtspr(SPRN_CTRLT, ctrl);
  1110. }
  1111. #endif
  1112. #if THREAD_SHIFT < PAGE_SHIFT
  1113. static struct kmem_cache *thread_info_cache;
  1114. struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node)
  1115. {
  1116. struct thread_info *ti;
  1117. ti = kmem_cache_alloc_node(thread_info_cache, GFP_KERNEL, node);
  1118. if (unlikely(ti == NULL))
  1119. return NULL;
  1120. #ifdef CONFIG_DEBUG_STACK_USAGE
  1121. memset(ti, 0, THREAD_SIZE);
  1122. #endif
  1123. return ti;
  1124. }
  1125. void free_thread_info(struct thread_info *ti)
  1126. {
  1127. kmem_cache_free(thread_info_cache, ti);
  1128. }
  1129. void thread_info_cache_init(void)
  1130. {
  1131. thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
  1132. THREAD_SIZE, 0, NULL);
  1133. BUG_ON(thread_info_cache == NULL);
  1134. }
  1135. #endif /* THREAD_SHIFT < PAGE_SHIFT */
  1136. unsigned long arch_align_stack(unsigned long sp)
  1137. {
  1138. if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
  1139. sp -= get_random_int() & ~PAGE_MASK;
  1140. return sp & ~0xf;
  1141. }
  1142. static inline unsigned long brk_rnd(void)
  1143. {
  1144. unsigned long rnd = 0;
  1145. /* 8MB for 32bit, 1GB for 64bit */
  1146. if (is_32bit_task())
  1147. rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
  1148. else
  1149. rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
  1150. return rnd << PAGE_SHIFT;
  1151. }
  1152. unsigned long arch_randomize_brk(struct mm_struct *mm)
  1153. {
  1154. unsigned long base = mm->brk;
  1155. unsigned long ret;
  1156. #ifdef CONFIG_PPC_STD_MMU_64
  1157. /*
  1158. * If we are using 1TB segments and we are allowed to randomise
  1159. * the heap, we can put it above 1TB so it is backed by a 1TB
  1160. * segment. Otherwise the heap will be in the bottom 1TB
  1161. * which always uses 256MB segments and this may result in a
  1162. * performance penalty.
  1163. */
  1164. if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
  1165. base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
  1166. #endif
  1167. ret = PAGE_ALIGN(base + brk_rnd());
  1168. if (ret < mm->brk)
  1169. return mm->brk;
  1170. return ret;
  1171. }
  1172. unsigned long randomize_et_dyn(unsigned long base)
  1173. {
  1174. unsigned long ret = PAGE_ALIGN(base + brk_rnd());
  1175. if (ret < base)
  1176. return base;
  1177. return ret;
  1178. }