ufshcd.c 61 KB

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  1. /*
  2. * Universal Flash Storage Host controller driver Core
  3. *
  4. * This code is based on drivers/scsi/ufs/ufshcd.c
  5. * Copyright (C) 2011-2013 Samsung India Software Operations
  6. *
  7. * Authors:
  8. * Santosh Yaraganavi <santosh.sy@samsung.com>
  9. * Vinayak Holikatti <h.vinayak@samsung.com>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. * See the COPYING file in the top-level directory or visit
  16. * <http://www.gnu.org/licenses/gpl-2.0.html>
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * This program is provided "AS IS" and "WITH ALL FAULTS" and
  24. * without warranty of any kind. You are solely responsible for
  25. * determining the appropriateness of using and distributing
  26. * the program and assume all risks associated with your exercise
  27. * of rights with respect to the program, including but not limited
  28. * to infringement of third party rights, the risks and costs of
  29. * program errors, damage to or loss of data, programs or equipment,
  30. * and unavailability or interruption of operations. Under no
  31. * circumstances will the contributor of this Program be liable for
  32. * any damages of any kind arising from your use or distribution of
  33. * this program.
  34. */
  35. #include <linux/async.h>
  36. #include "ufshcd.h"
  37. #define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
  38. UTP_TASK_REQ_COMPL |\
  39. UFSHCD_ERROR_MASK)
  40. /* UIC command timeout, unit: ms */
  41. #define UIC_CMD_TIMEOUT 500
  42. /* NOP OUT retries waiting for NOP IN response */
  43. #define NOP_OUT_RETRIES 10
  44. /* Timeout after 30 msecs if NOP OUT hangs without response */
  45. #define NOP_OUT_TIMEOUT 30 /* msecs */
  46. /* Query request retries */
  47. #define QUERY_REQ_RETRIES 10
  48. /* Query request timeout */
  49. #define QUERY_REQ_TIMEOUT 30 /* msec */
  50. /* Expose the flag value from utp_upiu_query.value */
  51. #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
  52. enum {
  53. UFSHCD_MAX_CHANNEL = 0,
  54. UFSHCD_MAX_ID = 1,
  55. UFSHCD_MAX_LUNS = 8,
  56. UFSHCD_CMD_PER_LUN = 32,
  57. UFSHCD_CAN_QUEUE = 32,
  58. };
  59. /* UFSHCD states */
  60. enum {
  61. UFSHCD_STATE_OPERATIONAL,
  62. UFSHCD_STATE_RESET,
  63. UFSHCD_STATE_ERROR,
  64. };
  65. /* Interrupt configuration options */
  66. enum {
  67. UFSHCD_INT_DISABLE,
  68. UFSHCD_INT_ENABLE,
  69. UFSHCD_INT_CLEAR,
  70. };
  71. /* Interrupt aggregation options */
  72. enum {
  73. INT_AGGR_RESET,
  74. INT_AGGR_CONFIG,
  75. };
  76. /*
  77. * ufshcd_wait_for_register - wait for register value to change
  78. * @hba - per-adapter interface
  79. * @reg - mmio register offset
  80. * @mask - mask to apply to read register value
  81. * @val - wait condition
  82. * @interval_us - polling interval in microsecs
  83. * @timeout_ms - timeout in millisecs
  84. *
  85. * Returns -ETIMEDOUT on error, zero on success
  86. */
  87. static int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
  88. u32 val, unsigned long interval_us, unsigned long timeout_ms)
  89. {
  90. int err = 0;
  91. unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
  92. /* ignore bits that we don't intend to wait on */
  93. val = val & mask;
  94. while ((ufshcd_readl(hba, reg) & mask) != val) {
  95. /* wakeup within 50us of expiry */
  96. usleep_range(interval_us, interval_us + 50);
  97. if (time_after(jiffies, timeout)) {
  98. if ((ufshcd_readl(hba, reg) & mask) != val)
  99. err = -ETIMEDOUT;
  100. break;
  101. }
  102. }
  103. return err;
  104. }
  105. /**
  106. * ufshcd_get_intr_mask - Get the interrupt bit mask
  107. * @hba - Pointer to adapter instance
  108. *
  109. * Returns interrupt bit mask per version
  110. */
  111. static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
  112. {
  113. if (hba->ufs_version == UFSHCI_VERSION_10)
  114. return INTERRUPT_MASK_ALL_VER_10;
  115. else
  116. return INTERRUPT_MASK_ALL_VER_11;
  117. }
  118. /**
  119. * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
  120. * @hba - Pointer to adapter instance
  121. *
  122. * Returns UFSHCI version supported by the controller
  123. */
  124. static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
  125. {
  126. return ufshcd_readl(hba, REG_UFS_VERSION);
  127. }
  128. /**
  129. * ufshcd_is_device_present - Check if any device connected to
  130. * the host controller
  131. * @reg_hcs - host controller status register value
  132. *
  133. * Returns 1 if device present, 0 if no device detected
  134. */
  135. static inline int ufshcd_is_device_present(u32 reg_hcs)
  136. {
  137. return (DEVICE_PRESENT & reg_hcs) ? 1 : 0;
  138. }
  139. /**
  140. * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
  141. * @lrb: pointer to local command reference block
  142. *
  143. * This function is used to get the OCS field from UTRD
  144. * Returns the OCS field in the UTRD
  145. */
  146. static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
  147. {
  148. return lrbp->utr_descriptor_ptr->header.dword_2 & MASK_OCS;
  149. }
  150. /**
  151. * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
  152. * @task_req_descp: pointer to utp_task_req_desc structure
  153. *
  154. * This function is used to get the OCS field from UTMRD
  155. * Returns the OCS field in the UTMRD
  156. */
  157. static inline int
  158. ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp)
  159. {
  160. return task_req_descp->header.dword_2 & MASK_OCS;
  161. }
  162. /**
  163. * ufshcd_get_tm_free_slot - get a free slot for task management request
  164. * @hba: per adapter instance
  165. *
  166. * Returns maximum number of task management request slots in case of
  167. * task management queue full or returns the free slot number
  168. */
  169. static inline int ufshcd_get_tm_free_slot(struct ufs_hba *hba)
  170. {
  171. return find_first_zero_bit(&hba->outstanding_tasks, hba->nutmrs);
  172. }
  173. /**
  174. * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
  175. * @hba: per adapter instance
  176. * @pos: position of the bit to be cleared
  177. */
  178. static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
  179. {
  180. ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
  181. }
  182. /**
  183. * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
  184. * @reg: Register value of host controller status
  185. *
  186. * Returns integer, 0 on Success and positive value if failed
  187. */
  188. static inline int ufshcd_get_lists_status(u32 reg)
  189. {
  190. /*
  191. * The mask 0xFF is for the following HCS register bits
  192. * Bit Description
  193. * 0 Device Present
  194. * 1 UTRLRDY
  195. * 2 UTMRLRDY
  196. * 3 UCRDY
  197. * 4 HEI
  198. * 5 DEI
  199. * 6-7 reserved
  200. */
  201. return (((reg) & (0xFF)) >> 1) ^ (0x07);
  202. }
  203. /**
  204. * ufshcd_get_uic_cmd_result - Get the UIC command result
  205. * @hba: Pointer to adapter instance
  206. *
  207. * This function gets the result of UIC command completion
  208. * Returns 0 on success, non zero value on error
  209. */
  210. static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
  211. {
  212. return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
  213. MASK_UIC_COMMAND_RESULT;
  214. }
  215. /**
  216. * ufshcd_get_req_rsp - returns the TR response transaction type
  217. * @ucd_rsp_ptr: pointer to response UPIU
  218. */
  219. static inline int
  220. ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
  221. {
  222. return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
  223. }
  224. /**
  225. * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
  226. * @ucd_rsp_ptr: pointer to response UPIU
  227. *
  228. * This function gets the response status and scsi_status from response UPIU
  229. * Returns the response result code.
  230. */
  231. static inline int
  232. ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
  233. {
  234. return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
  235. }
  236. /**
  237. * ufshcd_config_int_aggr - Configure interrupt aggregation values.
  238. * Currently there is no use case where we want to configure
  239. * interrupt aggregation dynamically. So to configure interrupt
  240. * aggregation, #define INT_AGGR_COUNTER_THRESHOLD_VALUE and
  241. * INT_AGGR_TIMEOUT_VALUE are used.
  242. * @hba: per adapter instance
  243. * @option: Interrupt aggregation option
  244. */
  245. static inline void
  246. ufshcd_config_int_aggr(struct ufs_hba *hba, int option)
  247. {
  248. switch (option) {
  249. case INT_AGGR_RESET:
  250. ufshcd_writel(hba, INT_AGGR_ENABLE |
  251. INT_AGGR_COUNTER_AND_TIMER_RESET,
  252. REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
  253. break;
  254. case INT_AGGR_CONFIG:
  255. ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
  256. INT_AGGR_COUNTER_THRESHOLD_VALUE |
  257. INT_AGGR_TIMEOUT_VALUE,
  258. REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
  259. break;
  260. }
  261. }
  262. /**
  263. * ufshcd_enable_run_stop_reg - Enable run-stop registers,
  264. * When run-stop registers are set to 1, it indicates the
  265. * host controller that it can process the requests
  266. * @hba: per adapter instance
  267. */
  268. static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
  269. {
  270. ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
  271. REG_UTP_TASK_REQ_LIST_RUN_STOP);
  272. ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
  273. REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
  274. }
  275. /**
  276. * ufshcd_hba_start - Start controller initialization sequence
  277. * @hba: per adapter instance
  278. */
  279. static inline void ufshcd_hba_start(struct ufs_hba *hba)
  280. {
  281. ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
  282. }
  283. /**
  284. * ufshcd_is_hba_active - Get controller state
  285. * @hba: per adapter instance
  286. *
  287. * Returns zero if controller is active, 1 otherwise
  288. */
  289. static inline int ufshcd_is_hba_active(struct ufs_hba *hba)
  290. {
  291. return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & 0x1) ? 0 : 1;
  292. }
  293. /**
  294. * ufshcd_send_command - Send SCSI or device management commands
  295. * @hba: per adapter instance
  296. * @task_tag: Task tag of the command
  297. */
  298. static inline
  299. void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
  300. {
  301. __set_bit(task_tag, &hba->outstanding_reqs);
  302. ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
  303. }
  304. /**
  305. * ufshcd_copy_sense_data - Copy sense data in case of check condition
  306. * @lrb - pointer to local reference block
  307. */
  308. static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
  309. {
  310. int len;
  311. if (lrbp->sense_buffer) {
  312. len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
  313. memcpy(lrbp->sense_buffer,
  314. lrbp->ucd_rsp_ptr->sr.sense_data,
  315. min_t(int, len, SCSI_SENSE_BUFFERSIZE));
  316. }
  317. }
  318. /**
  319. * ufshcd_query_to_cpu() - formats the buffer to native cpu endian
  320. * @response: upiu query response to convert
  321. */
  322. static inline void ufshcd_query_to_cpu(struct utp_upiu_query *response)
  323. {
  324. response->length = be16_to_cpu(response->length);
  325. response->value = be32_to_cpu(response->value);
  326. }
  327. /**
  328. * ufshcd_query_to_be() - formats the buffer to big endian
  329. * @request: upiu query request to convert
  330. */
  331. static inline void ufshcd_query_to_be(struct utp_upiu_query *request)
  332. {
  333. request->length = cpu_to_be16(request->length);
  334. request->value = cpu_to_be32(request->value);
  335. }
  336. /**
  337. * ufshcd_copy_query_response() - Copy the Query Response and the data
  338. * descriptor
  339. * @hba: per adapter instance
  340. * @lrb - pointer to local reference block
  341. */
  342. static
  343. void ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
  344. {
  345. struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
  346. /* Get the UPIU response */
  347. query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
  348. UPIU_RSP_CODE_OFFSET;
  349. memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
  350. ufshcd_query_to_cpu(&query_res->upiu_res);
  351. /* Get the descriptor */
  352. if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
  353. u8 *descp = (u8 *)&lrbp->ucd_rsp_ptr +
  354. GENERAL_UPIU_REQUEST_SIZE;
  355. u16 len;
  356. /* data segment length */
  357. len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
  358. MASK_QUERY_DATA_SEG_LEN;
  359. memcpy(hba->dev_cmd.query.descriptor, descp,
  360. min_t(u16, len, QUERY_DESC_MAX_SIZE));
  361. }
  362. }
  363. /**
  364. * ufshcd_hba_capabilities - Read controller capabilities
  365. * @hba: per adapter instance
  366. */
  367. static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
  368. {
  369. hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
  370. /* nutrs and nutmrs are 0 based values */
  371. hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
  372. hba->nutmrs =
  373. ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
  374. }
  375. /**
  376. * ufshcd_ready_for_uic_cmd - Check if controller is ready
  377. * to accept UIC commands
  378. * @hba: per adapter instance
  379. * Return true on success, else false
  380. */
  381. static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
  382. {
  383. if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
  384. return true;
  385. else
  386. return false;
  387. }
  388. /**
  389. * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
  390. * @hba: per adapter instance
  391. * @uic_cmd: UIC command
  392. *
  393. * Mutex must be held.
  394. */
  395. static inline void
  396. ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
  397. {
  398. WARN_ON(hba->active_uic_cmd);
  399. hba->active_uic_cmd = uic_cmd;
  400. /* Write Args */
  401. ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
  402. ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
  403. ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
  404. /* Write UIC Cmd */
  405. ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
  406. REG_UIC_COMMAND);
  407. }
  408. /**
  409. * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
  410. * @hba: per adapter instance
  411. * @uic_command: UIC command
  412. *
  413. * Must be called with mutex held.
  414. * Returns 0 only if success.
  415. */
  416. static int
  417. ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
  418. {
  419. int ret;
  420. unsigned long flags;
  421. if (wait_for_completion_timeout(&uic_cmd->done,
  422. msecs_to_jiffies(UIC_CMD_TIMEOUT)))
  423. ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
  424. else
  425. ret = -ETIMEDOUT;
  426. spin_lock_irqsave(hba->host->host_lock, flags);
  427. hba->active_uic_cmd = NULL;
  428. spin_unlock_irqrestore(hba->host->host_lock, flags);
  429. return ret;
  430. }
  431. /**
  432. * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
  433. * @hba: per adapter instance
  434. * @uic_cmd: UIC command
  435. *
  436. * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
  437. * with mutex held.
  438. * Returns 0 only if success.
  439. */
  440. static int
  441. __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
  442. {
  443. int ret;
  444. unsigned long flags;
  445. if (!ufshcd_ready_for_uic_cmd(hba)) {
  446. dev_err(hba->dev,
  447. "Controller not ready to accept UIC commands\n");
  448. return -EIO;
  449. }
  450. init_completion(&uic_cmd->done);
  451. spin_lock_irqsave(hba->host->host_lock, flags);
  452. ufshcd_dispatch_uic_cmd(hba, uic_cmd);
  453. spin_unlock_irqrestore(hba->host->host_lock, flags);
  454. ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
  455. return ret;
  456. }
  457. /**
  458. * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
  459. * @hba: per adapter instance
  460. * @uic_cmd: UIC command
  461. *
  462. * Returns 0 only if success.
  463. */
  464. static int
  465. ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
  466. {
  467. int ret;
  468. mutex_lock(&hba->uic_cmd_mutex);
  469. ret = __ufshcd_send_uic_cmd(hba, uic_cmd);
  470. mutex_unlock(&hba->uic_cmd_mutex);
  471. return ret;
  472. }
  473. /**
  474. * ufshcd_map_sg - Map scatter-gather list to prdt
  475. * @lrbp - pointer to local reference block
  476. *
  477. * Returns 0 in case of success, non-zero value in case of failure
  478. */
  479. static int ufshcd_map_sg(struct ufshcd_lrb *lrbp)
  480. {
  481. struct ufshcd_sg_entry *prd_table;
  482. struct scatterlist *sg;
  483. struct scsi_cmnd *cmd;
  484. int sg_segments;
  485. int i;
  486. cmd = lrbp->cmd;
  487. sg_segments = scsi_dma_map(cmd);
  488. if (sg_segments < 0)
  489. return sg_segments;
  490. if (sg_segments) {
  491. lrbp->utr_descriptor_ptr->prd_table_length =
  492. cpu_to_le16((u16) (sg_segments));
  493. prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
  494. scsi_for_each_sg(cmd, sg, sg_segments, i) {
  495. prd_table[i].size =
  496. cpu_to_le32(((u32) sg_dma_len(sg))-1);
  497. prd_table[i].base_addr =
  498. cpu_to_le32(lower_32_bits(sg->dma_address));
  499. prd_table[i].upper_addr =
  500. cpu_to_le32(upper_32_bits(sg->dma_address));
  501. }
  502. } else {
  503. lrbp->utr_descriptor_ptr->prd_table_length = 0;
  504. }
  505. return 0;
  506. }
  507. /**
  508. * ufshcd_enable_intr - enable interrupts
  509. * @hba: per adapter instance
  510. * @intrs: interrupt bits
  511. */
  512. static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
  513. {
  514. u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
  515. if (hba->ufs_version == UFSHCI_VERSION_10) {
  516. u32 rw;
  517. rw = set & INTERRUPT_MASK_RW_VER_10;
  518. set = rw | ((set ^ intrs) & intrs);
  519. } else {
  520. set |= intrs;
  521. }
  522. ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
  523. }
  524. /**
  525. * ufshcd_disable_intr - disable interrupts
  526. * @hba: per adapter instance
  527. * @intrs: interrupt bits
  528. */
  529. static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
  530. {
  531. u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
  532. if (hba->ufs_version == UFSHCI_VERSION_10) {
  533. u32 rw;
  534. rw = (set & INTERRUPT_MASK_RW_VER_10) &
  535. ~(intrs & INTERRUPT_MASK_RW_VER_10);
  536. set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
  537. } else {
  538. set &= ~intrs;
  539. }
  540. ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
  541. }
  542. /**
  543. * ufshcd_prepare_req_desc_hdr() - Fills the requests header
  544. * descriptor according to request
  545. * @lrbp: pointer to local reference block
  546. * @upiu_flags: flags required in the header
  547. * @cmd_dir: requests data direction
  548. */
  549. static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
  550. u32 *upiu_flags, enum dma_data_direction cmd_dir)
  551. {
  552. struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
  553. u32 data_direction;
  554. u32 dword_0;
  555. if (cmd_dir == DMA_FROM_DEVICE) {
  556. data_direction = UTP_DEVICE_TO_HOST;
  557. *upiu_flags = UPIU_CMD_FLAGS_READ;
  558. } else if (cmd_dir == DMA_TO_DEVICE) {
  559. data_direction = UTP_HOST_TO_DEVICE;
  560. *upiu_flags = UPIU_CMD_FLAGS_WRITE;
  561. } else {
  562. data_direction = UTP_NO_DATA_TRANSFER;
  563. *upiu_flags = UPIU_CMD_FLAGS_NONE;
  564. }
  565. dword_0 = data_direction | (lrbp->command_type
  566. << UPIU_COMMAND_TYPE_OFFSET);
  567. if (lrbp->intr_cmd)
  568. dword_0 |= UTP_REQ_DESC_INT_CMD;
  569. /* Transfer request descriptor header fields */
  570. req_desc->header.dword_0 = cpu_to_le32(dword_0);
  571. /*
  572. * assigning invalid value for command status. Controller
  573. * updates OCS on command completion, with the command
  574. * status
  575. */
  576. req_desc->header.dword_2 =
  577. cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
  578. }
  579. /**
  580. * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
  581. * for scsi commands
  582. * @lrbp - local reference block pointer
  583. * @upiu_flags - flags
  584. */
  585. static
  586. void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
  587. {
  588. struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
  589. /* command descriptor fields */
  590. ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
  591. UPIU_TRANSACTION_COMMAND, upiu_flags,
  592. lrbp->lun, lrbp->task_tag);
  593. ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
  594. UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
  595. /* Total EHS length and Data segment length will be zero */
  596. ucd_req_ptr->header.dword_2 = 0;
  597. ucd_req_ptr->sc.exp_data_transfer_len =
  598. cpu_to_be32(lrbp->cmd->sdb.length);
  599. memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd,
  600. (min_t(unsigned short, lrbp->cmd->cmd_len, MAX_CDB_SIZE)));
  601. }
  602. /**
  603. * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
  604. * for query requsts
  605. * @hba: UFS hba
  606. * @lrbp: local reference block pointer
  607. * @upiu_flags: flags
  608. */
  609. static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
  610. struct ufshcd_lrb *lrbp, u32 upiu_flags)
  611. {
  612. struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
  613. struct ufs_query *query = &hba->dev_cmd.query;
  614. u16 len = query->request.upiu_req.length;
  615. u8 *descp = (u8 *)lrbp->ucd_req_ptr + GENERAL_UPIU_REQUEST_SIZE;
  616. /* Query request header */
  617. ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
  618. UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
  619. lrbp->lun, lrbp->task_tag);
  620. ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
  621. 0, query->request.query_func, 0, 0);
  622. /* Data segment length */
  623. ucd_req_ptr->header.dword_2 = UPIU_HEADER_DWORD(
  624. 0, 0, len >> 8, (u8)len);
  625. /* Copy the Query Request buffer as is */
  626. memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
  627. QUERY_OSF_SIZE);
  628. ufshcd_query_to_be(&ucd_req_ptr->qr);
  629. /* Copy the Descriptor */
  630. if ((len > 0) && (query->request.upiu_req.opcode ==
  631. UPIU_QUERY_OPCODE_WRITE_DESC)) {
  632. memcpy(descp, query->descriptor,
  633. min_t(u16, len, QUERY_DESC_MAX_SIZE));
  634. }
  635. }
  636. static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
  637. {
  638. struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
  639. memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
  640. /* command descriptor fields */
  641. ucd_req_ptr->header.dword_0 =
  642. UPIU_HEADER_DWORD(
  643. UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
  644. }
  645. /**
  646. * ufshcd_compose_upiu - form UFS Protocol Information Unit(UPIU)
  647. * @hba - per adapter instance
  648. * @lrb - pointer to local reference block
  649. */
  650. static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
  651. {
  652. u32 upiu_flags;
  653. int ret = 0;
  654. switch (lrbp->command_type) {
  655. case UTP_CMD_TYPE_SCSI:
  656. if (likely(lrbp->cmd)) {
  657. ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
  658. lrbp->cmd->sc_data_direction);
  659. ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
  660. } else {
  661. ret = -EINVAL;
  662. }
  663. break;
  664. case UTP_CMD_TYPE_DEV_MANAGE:
  665. ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
  666. if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
  667. ufshcd_prepare_utp_query_req_upiu(
  668. hba, lrbp, upiu_flags);
  669. else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
  670. ufshcd_prepare_utp_nop_upiu(lrbp);
  671. else
  672. ret = -EINVAL;
  673. break;
  674. case UTP_CMD_TYPE_UFS:
  675. /* For UFS native command implementation */
  676. ret = -ENOTSUPP;
  677. dev_err(hba->dev, "%s: UFS native command are not supported\n",
  678. __func__);
  679. break;
  680. default:
  681. ret = -ENOTSUPP;
  682. dev_err(hba->dev, "%s: unknown command type: 0x%x\n",
  683. __func__, lrbp->command_type);
  684. break;
  685. } /* end of switch */
  686. return ret;
  687. }
  688. /**
  689. * ufshcd_queuecommand - main entry point for SCSI requests
  690. * @cmd: command from SCSI Midlayer
  691. * @done: call back function
  692. *
  693. * Returns 0 for success, non-zero in case of failure
  694. */
  695. static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
  696. {
  697. struct ufshcd_lrb *lrbp;
  698. struct ufs_hba *hba;
  699. unsigned long flags;
  700. int tag;
  701. int err = 0;
  702. hba = shost_priv(host);
  703. tag = cmd->request->tag;
  704. if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
  705. err = SCSI_MLQUEUE_HOST_BUSY;
  706. goto out;
  707. }
  708. /* acquire the tag to make sure device cmds don't use it */
  709. if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
  710. /*
  711. * Dev manage command in progress, requeue the command.
  712. * Requeuing the command helps in cases where the request *may*
  713. * find different tag instead of waiting for dev manage command
  714. * completion.
  715. */
  716. err = SCSI_MLQUEUE_HOST_BUSY;
  717. goto out;
  718. }
  719. lrbp = &hba->lrb[tag];
  720. WARN_ON(lrbp->cmd);
  721. lrbp->cmd = cmd;
  722. lrbp->sense_bufflen = SCSI_SENSE_BUFFERSIZE;
  723. lrbp->sense_buffer = cmd->sense_buffer;
  724. lrbp->task_tag = tag;
  725. lrbp->lun = cmd->device->lun;
  726. lrbp->intr_cmd = false;
  727. lrbp->command_type = UTP_CMD_TYPE_SCSI;
  728. /* form UPIU before issuing the command */
  729. ufshcd_compose_upiu(hba, lrbp);
  730. err = ufshcd_map_sg(lrbp);
  731. if (err) {
  732. lrbp->cmd = NULL;
  733. clear_bit_unlock(tag, &hba->lrb_in_use);
  734. goto out;
  735. }
  736. /* issue command to the controller */
  737. spin_lock_irqsave(hba->host->host_lock, flags);
  738. ufshcd_send_command(hba, tag);
  739. spin_unlock_irqrestore(hba->host->host_lock, flags);
  740. out:
  741. return err;
  742. }
  743. static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
  744. struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
  745. {
  746. lrbp->cmd = NULL;
  747. lrbp->sense_bufflen = 0;
  748. lrbp->sense_buffer = NULL;
  749. lrbp->task_tag = tag;
  750. lrbp->lun = 0; /* device management cmd is not specific to any LUN */
  751. lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
  752. lrbp->intr_cmd = true; /* No interrupt aggregation */
  753. hba->dev_cmd.type = cmd_type;
  754. return ufshcd_compose_upiu(hba, lrbp);
  755. }
  756. static int
  757. ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
  758. {
  759. int err = 0;
  760. unsigned long flags;
  761. u32 mask = 1 << tag;
  762. /* clear outstanding transaction before retry */
  763. spin_lock_irqsave(hba->host->host_lock, flags);
  764. ufshcd_utrl_clear(hba, tag);
  765. spin_unlock_irqrestore(hba->host->host_lock, flags);
  766. /*
  767. * wait for for h/w to clear corresponding bit in door-bell.
  768. * max. wait is 1 sec.
  769. */
  770. err = ufshcd_wait_for_register(hba,
  771. REG_UTP_TRANSFER_REQ_DOOR_BELL,
  772. mask, ~mask, 1000, 1000);
  773. return err;
  774. }
  775. /**
  776. * ufshcd_dev_cmd_completion() - handles device management command responses
  777. * @hba: per adapter instance
  778. * @lrbp: pointer to local reference block
  779. */
  780. static int
  781. ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
  782. {
  783. int resp;
  784. int err = 0;
  785. resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
  786. switch (resp) {
  787. case UPIU_TRANSACTION_NOP_IN:
  788. if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
  789. err = -EINVAL;
  790. dev_err(hba->dev, "%s: unexpected response %x\n",
  791. __func__, resp);
  792. }
  793. break;
  794. case UPIU_TRANSACTION_QUERY_RSP:
  795. ufshcd_copy_query_response(hba, lrbp);
  796. break;
  797. case UPIU_TRANSACTION_REJECT_UPIU:
  798. /* TODO: handle Reject UPIU Response */
  799. err = -EPERM;
  800. dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
  801. __func__);
  802. break;
  803. default:
  804. err = -EINVAL;
  805. dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
  806. __func__, resp);
  807. break;
  808. }
  809. return err;
  810. }
  811. static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
  812. struct ufshcd_lrb *lrbp, int max_timeout)
  813. {
  814. int err = 0;
  815. unsigned long time_left;
  816. unsigned long flags;
  817. time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
  818. msecs_to_jiffies(max_timeout));
  819. spin_lock_irqsave(hba->host->host_lock, flags);
  820. hba->dev_cmd.complete = NULL;
  821. if (likely(time_left)) {
  822. err = ufshcd_get_tr_ocs(lrbp);
  823. if (!err)
  824. err = ufshcd_dev_cmd_completion(hba, lrbp);
  825. }
  826. spin_unlock_irqrestore(hba->host->host_lock, flags);
  827. if (!time_left) {
  828. err = -ETIMEDOUT;
  829. if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
  830. /* sucessfully cleared the command, retry if needed */
  831. err = -EAGAIN;
  832. }
  833. return err;
  834. }
  835. /**
  836. * ufshcd_get_dev_cmd_tag - Get device management command tag
  837. * @hba: per-adapter instance
  838. * @tag: pointer to variable with available slot value
  839. *
  840. * Get a free slot and lock it until device management command
  841. * completes.
  842. *
  843. * Returns false if free slot is unavailable for locking, else
  844. * return true with tag value in @tag.
  845. */
  846. static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
  847. {
  848. int tag;
  849. bool ret = false;
  850. unsigned long tmp;
  851. if (!tag_out)
  852. goto out;
  853. do {
  854. tmp = ~hba->lrb_in_use;
  855. tag = find_last_bit(&tmp, hba->nutrs);
  856. if (tag >= hba->nutrs)
  857. goto out;
  858. } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
  859. *tag_out = tag;
  860. ret = true;
  861. out:
  862. return ret;
  863. }
  864. static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
  865. {
  866. clear_bit_unlock(tag, &hba->lrb_in_use);
  867. }
  868. /**
  869. * ufshcd_exec_dev_cmd - API for sending device management requests
  870. * @hba - UFS hba
  871. * @cmd_type - specifies the type (NOP, Query...)
  872. * @timeout - time in seconds
  873. *
  874. * NOTE: Since there is only one available tag for device management commands,
  875. * it is expected you hold the hba->dev_cmd.lock mutex.
  876. */
  877. static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
  878. enum dev_cmd_type cmd_type, int timeout)
  879. {
  880. struct ufshcd_lrb *lrbp;
  881. int err;
  882. int tag;
  883. struct completion wait;
  884. unsigned long flags;
  885. /*
  886. * Get free slot, sleep if slots are unavailable.
  887. * Even though we use wait_event() which sleeps indefinitely,
  888. * the maximum wait time is bounded by SCSI request timeout.
  889. */
  890. wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
  891. init_completion(&wait);
  892. lrbp = &hba->lrb[tag];
  893. WARN_ON(lrbp->cmd);
  894. err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
  895. if (unlikely(err))
  896. goto out_put_tag;
  897. hba->dev_cmd.complete = &wait;
  898. spin_lock_irqsave(hba->host->host_lock, flags);
  899. ufshcd_send_command(hba, tag);
  900. spin_unlock_irqrestore(hba->host->host_lock, flags);
  901. err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
  902. out_put_tag:
  903. ufshcd_put_dev_cmd_tag(hba, tag);
  904. wake_up(&hba->dev_cmd.tag_wq);
  905. return err;
  906. }
  907. /**
  908. * ufshcd_query_flag() - API function for sending flag query requests
  909. * hba: per-adapter instance
  910. * query_opcode: flag query to perform
  911. * idn: flag idn to access
  912. * flag_res: the flag value after the query request completes
  913. *
  914. * Returns 0 for success, non-zero in case of failure
  915. */
  916. static int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
  917. enum flag_idn idn, bool *flag_res)
  918. {
  919. struct ufs_query_req *request;
  920. struct ufs_query_res *response;
  921. int err;
  922. BUG_ON(!hba);
  923. mutex_lock(&hba->dev_cmd.lock);
  924. request = &hba->dev_cmd.query.request;
  925. response = &hba->dev_cmd.query.response;
  926. memset(request, 0, sizeof(struct ufs_query_req));
  927. memset(response, 0, sizeof(struct ufs_query_res));
  928. switch (opcode) {
  929. case UPIU_QUERY_OPCODE_SET_FLAG:
  930. case UPIU_QUERY_OPCODE_CLEAR_FLAG:
  931. case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
  932. request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
  933. break;
  934. case UPIU_QUERY_OPCODE_READ_FLAG:
  935. request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
  936. if (!flag_res) {
  937. /* No dummy reads */
  938. dev_err(hba->dev, "%s: Invalid argument for read request\n",
  939. __func__);
  940. err = -EINVAL;
  941. goto out_unlock;
  942. }
  943. break;
  944. default:
  945. dev_err(hba->dev,
  946. "%s: Expected query flag opcode but got = %d\n",
  947. __func__, opcode);
  948. err = -EINVAL;
  949. goto out_unlock;
  950. }
  951. request->upiu_req.opcode = opcode;
  952. request->upiu_req.idn = idn;
  953. /* Send query request */
  954. err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY,
  955. QUERY_REQ_TIMEOUT);
  956. if (err) {
  957. dev_err(hba->dev,
  958. "%s: Sending flag query for idn %d failed, err = %d\n",
  959. __func__, idn, err);
  960. goto out_unlock;
  961. }
  962. if (flag_res)
  963. *flag_res = (response->upiu_res.value &
  964. MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
  965. out_unlock:
  966. mutex_unlock(&hba->dev_cmd.lock);
  967. return err;
  968. }
  969. /**
  970. * ufshcd_memory_alloc - allocate memory for host memory space data structures
  971. * @hba: per adapter instance
  972. *
  973. * 1. Allocate DMA memory for Command Descriptor array
  974. * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
  975. * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
  976. * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
  977. * (UTMRDL)
  978. * 4. Allocate memory for local reference block(lrb).
  979. *
  980. * Returns 0 for success, non-zero in case of failure
  981. */
  982. static int ufshcd_memory_alloc(struct ufs_hba *hba)
  983. {
  984. size_t utmrdl_size, utrdl_size, ucdl_size;
  985. /* Allocate memory for UTP command descriptors */
  986. ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
  987. hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
  988. ucdl_size,
  989. &hba->ucdl_dma_addr,
  990. GFP_KERNEL);
  991. /*
  992. * UFSHCI requires UTP command descriptor to be 128 byte aligned.
  993. * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
  994. * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
  995. * be aligned to 128 bytes as well
  996. */
  997. if (!hba->ucdl_base_addr ||
  998. WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
  999. dev_err(hba->dev,
  1000. "Command Descriptor Memory allocation failed\n");
  1001. goto out;
  1002. }
  1003. /*
  1004. * Allocate memory for UTP Transfer descriptors
  1005. * UFSHCI requires 1024 byte alignment of UTRD
  1006. */
  1007. utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
  1008. hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
  1009. utrdl_size,
  1010. &hba->utrdl_dma_addr,
  1011. GFP_KERNEL);
  1012. if (!hba->utrdl_base_addr ||
  1013. WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
  1014. dev_err(hba->dev,
  1015. "Transfer Descriptor Memory allocation failed\n");
  1016. goto out;
  1017. }
  1018. /*
  1019. * Allocate memory for UTP Task Management descriptors
  1020. * UFSHCI requires 1024 byte alignment of UTMRD
  1021. */
  1022. utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
  1023. hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
  1024. utmrdl_size,
  1025. &hba->utmrdl_dma_addr,
  1026. GFP_KERNEL);
  1027. if (!hba->utmrdl_base_addr ||
  1028. WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
  1029. dev_err(hba->dev,
  1030. "Task Management Descriptor Memory allocation failed\n");
  1031. goto out;
  1032. }
  1033. /* Allocate memory for local reference block */
  1034. hba->lrb = devm_kzalloc(hba->dev,
  1035. hba->nutrs * sizeof(struct ufshcd_lrb),
  1036. GFP_KERNEL);
  1037. if (!hba->lrb) {
  1038. dev_err(hba->dev, "LRB Memory allocation failed\n");
  1039. goto out;
  1040. }
  1041. return 0;
  1042. out:
  1043. return -ENOMEM;
  1044. }
  1045. /**
  1046. * ufshcd_host_memory_configure - configure local reference block with
  1047. * memory offsets
  1048. * @hba: per adapter instance
  1049. *
  1050. * Configure Host memory space
  1051. * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
  1052. * address.
  1053. * 2. Update each UTRD with Response UPIU offset, Response UPIU length
  1054. * and PRDT offset.
  1055. * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
  1056. * into local reference block.
  1057. */
  1058. static void ufshcd_host_memory_configure(struct ufs_hba *hba)
  1059. {
  1060. struct utp_transfer_cmd_desc *cmd_descp;
  1061. struct utp_transfer_req_desc *utrdlp;
  1062. dma_addr_t cmd_desc_dma_addr;
  1063. dma_addr_t cmd_desc_element_addr;
  1064. u16 response_offset;
  1065. u16 prdt_offset;
  1066. int cmd_desc_size;
  1067. int i;
  1068. utrdlp = hba->utrdl_base_addr;
  1069. cmd_descp = hba->ucdl_base_addr;
  1070. response_offset =
  1071. offsetof(struct utp_transfer_cmd_desc, response_upiu);
  1072. prdt_offset =
  1073. offsetof(struct utp_transfer_cmd_desc, prd_table);
  1074. cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
  1075. cmd_desc_dma_addr = hba->ucdl_dma_addr;
  1076. for (i = 0; i < hba->nutrs; i++) {
  1077. /* Configure UTRD with command descriptor base address */
  1078. cmd_desc_element_addr =
  1079. (cmd_desc_dma_addr + (cmd_desc_size * i));
  1080. utrdlp[i].command_desc_base_addr_lo =
  1081. cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
  1082. utrdlp[i].command_desc_base_addr_hi =
  1083. cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
  1084. /* Response upiu and prdt offset should be in double words */
  1085. utrdlp[i].response_upiu_offset =
  1086. cpu_to_le16((response_offset >> 2));
  1087. utrdlp[i].prd_table_offset =
  1088. cpu_to_le16((prdt_offset >> 2));
  1089. utrdlp[i].response_upiu_length =
  1090. cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
  1091. hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
  1092. hba->lrb[i].ucd_req_ptr =
  1093. (struct utp_upiu_req *)(cmd_descp + i);
  1094. hba->lrb[i].ucd_rsp_ptr =
  1095. (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
  1096. hba->lrb[i].ucd_prdt_ptr =
  1097. (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
  1098. }
  1099. }
  1100. /**
  1101. * ufshcd_dme_link_startup - Notify Unipro to perform link startup
  1102. * @hba: per adapter instance
  1103. *
  1104. * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
  1105. * in order to initialize the Unipro link startup procedure.
  1106. * Once the Unipro links are up, the device connected to the controller
  1107. * is detected.
  1108. *
  1109. * Returns 0 on success, non-zero value on failure
  1110. */
  1111. static int ufshcd_dme_link_startup(struct ufs_hba *hba)
  1112. {
  1113. struct uic_command uic_cmd = {0};
  1114. int ret;
  1115. uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
  1116. ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
  1117. if (ret)
  1118. dev_err(hba->dev,
  1119. "dme-link-startup: error code %d\n", ret);
  1120. return ret;
  1121. }
  1122. /**
  1123. * ufshcd_complete_dev_init() - checks device readiness
  1124. * hba: per-adapter instance
  1125. *
  1126. * Set fDeviceInit flag and poll until device toggles it.
  1127. */
  1128. static int ufshcd_complete_dev_init(struct ufs_hba *hba)
  1129. {
  1130. int i, retries, err = 0;
  1131. bool flag_res = 1;
  1132. for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
  1133. /* Set the fDeviceInit flag */
  1134. err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_SET_FLAG,
  1135. QUERY_FLAG_IDN_FDEVICEINIT, NULL);
  1136. if (!err || err == -ETIMEDOUT)
  1137. break;
  1138. dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
  1139. }
  1140. if (err) {
  1141. dev_err(hba->dev,
  1142. "%s setting fDeviceInit flag failed with error %d\n",
  1143. __func__, err);
  1144. goto out;
  1145. }
  1146. /* poll for max. 100 iterations for fDeviceInit flag to clear */
  1147. for (i = 0; i < 100 && !err && flag_res; i++) {
  1148. for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
  1149. err = ufshcd_query_flag(hba,
  1150. UPIU_QUERY_OPCODE_READ_FLAG,
  1151. QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
  1152. if (!err || err == -ETIMEDOUT)
  1153. break;
  1154. dev_dbg(hba->dev, "%s: error %d retrying\n", __func__,
  1155. err);
  1156. }
  1157. }
  1158. if (err)
  1159. dev_err(hba->dev,
  1160. "%s reading fDeviceInit flag failed with error %d\n",
  1161. __func__, err);
  1162. else if (flag_res)
  1163. dev_err(hba->dev,
  1164. "%s fDeviceInit was not cleared by the device\n",
  1165. __func__);
  1166. out:
  1167. return err;
  1168. }
  1169. /**
  1170. * ufshcd_make_hba_operational - Make UFS controller operational
  1171. * @hba: per adapter instance
  1172. *
  1173. * To bring UFS host controller to operational state,
  1174. * 1. Check if device is present
  1175. * 2. Enable required interrupts
  1176. * 3. Configure interrupt aggregation
  1177. * 4. Program UTRL and UTMRL base addres
  1178. * 5. Configure run-stop-registers
  1179. *
  1180. * Returns 0 on success, non-zero value on failure
  1181. */
  1182. static int ufshcd_make_hba_operational(struct ufs_hba *hba)
  1183. {
  1184. int err = 0;
  1185. u32 reg;
  1186. /* check if device present */
  1187. reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
  1188. if (!ufshcd_is_device_present(reg)) {
  1189. dev_err(hba->dev, "cc: Device not present\n");
  1190. err = -ENXIO;
  1191. goto out;
  1192. }
  1193. /* Enable required interrupts */
  1194. ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
  1195. /* Configure interrupt aggregation */
  1196. ufshcd_config_int_aggr(hba, INT_AGGR_CONFIG);
  1197. /* Configure UTRL and UTMRL base address registers */
  1198. ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
  1199. REG_UTP_TRANSFER_REQ_LIST_BASE_L);
  1200. ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
  1201. REG_UTP_TRANSFER_REQ_LIST_BASE_H);
  1202. ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
  1203. REG_UTP_TASK_REQ_LIST_BASE_L);
  1204. ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
  1205. REG_UTP_TASK_REQ_LIST_BASE_H);
  1206. /*
  1207. * UCRDY, UTMRLDY and UTRLRDY bits must be 1
  1208. * DEI, HEI bits must be 0
  1209. */
  1210. if (!(ufshcd_get_lists_status(reg))) {
  1211. ufshcd_enable_run_stop_reg(hba);
  1212. } else {
  1213. dev_err(hba->dev,
  1214. "Host controller not ready to process requests");
  1215. err = -EIO;
  1216. goto out;
  1217. }
  1218. if (hba->ufshcd_state == UFSHCD_STATE_RESET)
  1219. scsi_unblock_requests(hba->host);
  1220. hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
  1221. out:
  1222. return err;
  1223. }
  1224. /**
  1225. * ufshcd_hba_enable - initialize the controller
  1226. * @hba: per adapter instance
  1227. *
  1228. * The controller resets itself and controller firmware initialization
  1229. * sequence kicks off. When controller is ready it will set
  1230. * the Host Controller Enable bit to 1.
  1231. *
  1232. * Returns 0 on success, non-zero value on failure
  1233. */
  1234. static int ufshcd_hba_enable(struct ufs_hba *hba)
  1235. {
  1236. int retry;
  1237. /*
  1238. * msleep of 1 and 5 used in this function might result in msleep(20),
  1239. * but it was necessary to send the UFS FPGA to reset mode during
  1240. * development and testing of this driver. msleep can be changed to
  1241. * mdelay and retry count can be reduced based on the controller.
  1242. */
  1243. if (!ufshcd_is_hba_active(hba)) {
  1244. /* change controller state to "reset state" */
  1245. ufshcd_hba_stop(hba);
  1246. /*
  1247. * This delay is based on the testing done with UFS host
  1248. * controller FPGA. The delay can be changed based on the
  1249. * host controller used.
  1250. */
  1251. msleep(5);
  1252. }
  1253. /* start controller initialization sequence */
  1254. ufshcd_hba_start(hba);
  1255. /*
  1256. * To initialize a UFS host controller HCE bit must be set to 1.
  1257. * During initialization the HCE bit value changes from 1->0->1.
  1258. * When the host controller completes initialization sequence
  1259. * it sets the value of HCE bit to 1. The same HCE bit is read back
  1260. * to check if the controller has completed initialization sequence.
  1261. * So without this delay the value HCE = 1, set in the previous
  1262. * instruction might be read back.
  1263. * This delay can be changed based on the controller.
  1264. */
  1265. msleep(1);
  1266. /* wait for the host controller to complete initialization */
  1267. retry = 10;
  1268. while (ufshcd_is_hba_active(hba)) {
  1269. if (retry) {
  1270. retry--;
  1271. } else {
  1272. dev_err(hba->dev,
  1273. "Controller enable failed\n");
  1274. return -EIO;
  1275. }
  1276. msleep(5);
  1277. }
  1278. return 0;
  1279. }
  1280. /**
  1281. * ufshcd_link_startup - Initialize unipro link startup
  1282. * @hba: per adapter instance
  1283. *
  1284. * Returns 0 for success, non-zero in case of failure
  1285. */
  1286. static int ufshcd_link_startup(struct ufs_hba *hba)
  1287. {
  1288. int ret;
  1289. /* enable UIC related interrupts */
  1290. ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
  1291. ret = ufshcd_dme_link_startup(hba);
  1292. if (ret)
  1293. goto out;
  1294. ret = ufshcd_make_hba_operational(hba);
  1295. out:
  1296. if (ret)
  1297. dev_err(hba->dev, "link startup failed %d\n", ret);
  1298. return ret;
  1299. }
  1300. /**
  1301. * ufshcd_verify_dev_init() - Verify device initialization
  1302. * @hba: per-adapter instance
  1303. *
  1304. * Send NOP OUT UPIU and wait for NOP IN response to check whether the
  1305. * device Transport Protocol (UTP) layer is ready after a reset.
  1306. * If the UTP layer at the device side is not initialized, it may
  1307. * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
  1308. * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
  1309. */
  1310. static int ufshcd_verify_dev_init(struct ufs_hba *hba)
  1311. {
  1312. int err = 0;
  1313. int retries;
  1314. mutex_lock(&hba->dev_cmd.lock);
  1315. for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
  1316. err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
  1317. NOP_OUT_TIMEOUT);
  1318. if (!err || err == -ETIMEDOUT)
  1319. break;
  1320. dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
  1321. }
  1322. mutex_unlock(&hba->dev_cmd.lock);
  1323. if (err)
  1324. dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
  1325. return err;
  1326. }
  1327. /**
  1328. * ufshcd_do_reset - reset the host controller
  1329. * @hba: per adapter instance
  1330. *
  1331. * Returns SUCCESS/FAILED
  1332. */
  1333. static int ufshcd_do_reset(struct ufs_hba *hba)
  1334. {
  1335. struct ufshcd_lrb *lrbp;
  1336. unsigned long flags;
  1337. int tag;
  1338. /* block commands from midlayer */
  1339. scsi_block_requests(hba->host);
  1340. spin_lock_irqsave(hba->host->host_lock, flags);
  1341. hba->ufshcd_state = UFSHCD_STATE_RESET;
  1342. /* send controller to reset state */
  1343. ufshcd_hba_stop(hba);
  1344. spin_unlock_irqrestore(hba->host->host_lock, flags);
  1345. /* abort outstanding commands */
  1346. for (tag = 0; tag < hba->nutrs; tag++) {
  1347. if (test_bit(tag, &hba->outstanding_reqs)) {
  1348. lrbp = &hba->lrb[tag];
  1349. if (lrbp->cmd) {
  1350. scsi_dma_unmap(lrbp->cmd);
  1351. lrbp->cmd->result = DID_RESET << 16;
  1352. lrbp->cmd->scsi_done(lrbp->cmd);
  1353. lrbp->cmd = NULL;
  1354. clear_bit_unlock(tag, &hba->lrb_in_use);
  1355. }
  1356. }
  1357. }
  1358. /* complete device management command */
  1359. if (hba->dev_cmd.complete)
  1360. complete(hba->dev_cmd.complete);
  1361. /* clear outstanding request/task bit maps */
  1362. hba->outstanding_reqs = 0;
  1363. hba->outstanding_tasks = 0;
  1364. /* Host controller enable */
  1365. if (ufshcd_hba_enable(hba)) {
  1366. dev_err(hba->dev,
  1367. "Reset: Controller initialization failed\n");
  1368. return FAILED;
  1369. }
  1370. if (ufshcd_link_startup(hba)) {
  1371. dev_err(hba->dev,
  1372. "Reset: Link start-up failed\n");
  1373. return FAILED;
  1374. }
  1375. return SUCCESS;
  1376. }
  1377. /**
  1378. * ufshcd_slave_alloc - handle initial SCSI device configurations
  1379. * @sdev: pointer to SCSI device
  1380. *
  1381. * Returns success
  1382. */
  1383. static int ufshcd_slave_alloc(struct scsi_device *sdev)
  1384. {
  1385. struct ufs_hba *hba;
  1386. hba = shost_priv(sdev->host);
  1387. sdev->tagged_supported = 1;
  1388. /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
  1389. sdev->use_10_for_ms = 1;
  1390. scsi_set_tag_type(sdev, MSG_SIMPLE_TAG);
  1391. /*
  1392. * Inform SCSI Midlayer that the LUN queue depth is same as the
  1393. * controller queue depth. If a LUN queue depth is less than the
  1394. * controller queue depth and if the LUN reports
  1395. * SAM_STAT_TASK_SET_FULL, the LUN queue depth will be adjusted
  1396. * with scsi_adjust_queue_depth.
  1397. */
  1398. scsi_activate_tcq(sdev, hba->nutrs);
  1399. return 0;
  1400. }
  1401. /**
  1402. * ufshcd_slave_destroy - remove SCSI device configurations
  1403. * @sdev: pointer to SCSI device
  1404. */
  1405. static void ufshcd_slave_destroy(struct scsi_device *sdev)
  1406. {
  1407. struct ufs_hba *hba;
  1408. hba = shost_priv(sdev->host);
  1409. scsi_deactivate_tcq(sdev, hba->nutrs);
  1410. }
  1411. /**
  1412. * ufshcd_task_req_compl - handle task management request completion
  1413. * @hba: per adapter instance
  1414. * @index: index of the completed request
  1415. *
  1416. * Returns SUCCESS/FAILED
  1417. */
  1418. static int ufshcd_task_req_compl(struct ufs_hba *hba, u32 index)
  1419. {
  1420. struct utp_task_req_desc *task_req_descp;
  1421. struct utp_upiu_task_rsp *task_rsp_upiup;
  1422. unsigned long flags;
  1423. int ocs_value;
  1424. int task_result;
  1425. spin_lock_irqsave(hba->host->host_lock, flags);
  1426. /* Clear completed tasks from outstanding_tasks */
  1427. __clear_bit(index, &hba->outstanding_tasks);
  1428. task_req_descp = hba->utmrdl_base_addr;
  1429. ocs_value = ufshcd_get_tmr_ocs(&task_req_descp[index]);
  1430. if (ocs_value == OCS_SUCCESS) {
  1431. task_rsp_upiup = (struct utp_upiu_task_rsp *)
  1432. task_req_descp[index].task_rsp_upiu;
  1433. task_result = be32_to_cpu(task_rsp_upiup->header.dword_1);
  1434. task_result = ((task_result & MASK_TASK_RESPONSE) >> 8);
  1435. if (task_result != UPIU_TASK_MANAGEMENT_FUNC_COMPL &&
  1436. task_result != UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED)
  1437. task_result = FAILED;
  1438. else
  1439. task_result = SUCCESS;
  1440. } else {
  1441. task_result = FAILED;
  1442. dev_err(hba->dev,
  1443. "trc: Invalid ocs = %x\n", ocs_value);
  1444. }
  1445. spin_unlock_irqrestore(hba->host->host_lock, flags);
  1446. return task_result;
  1447. }
  1448. /**
  1449. * ufshcd_adjust_lun_qdepth - Update LUN queue depth if device responds with
  1450. * SAM_STAT_TASK_SET_FULL SCSI command status.
  1451. * @cmd: pointer to SCSI command
  1452. */
  1453. static void ufshcd_adjust_lun_qdepth(struct scsi_cmnd *cmd)
  1454. {
  1455. struct ufs_hba *hba;
  1456. int i;
  1457. int lun_qdepth = 0;
  1458. hba = shost_priv(cmd->device->host);
  1459. /*
  1460. * LUN queue depth can be obtained by counting outstanding commands
  1461. * on the LUN.
  1462. */
  1463. for (i = 0; i < hba->nutrs; i++) {
  1464. if (test_bit(i, &hba->outstanding_reqs)) {
  1465. /*
  1466. * Check if the outstanding command belongs
  1467. * to the LUN which reported SAM_STAT_TASK_SET_FULL.
  1468. */
  1469. if (cmd->device->lun == hba->lrb[i].lun)
  1470. lun_qdepth++;
  1471. }
  1472. }
  1473. /*
  1474. * LUN queue depth will be total outstanding commands, except the
  1475. * command for which the LUN reported SAM_STAT_TASK_SET_FULL.
  1476. */
  1477. scsi_adjust_queue_depth(cmd->device, MSG_SIMPLE_TAG, lun_qdepth - 1);
  1478. }
  1479. /**
  1480. * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
  1481. * @lrb: pointer to local reference block of completed command
  1482. * @scsi_status: SCSI command status
  1483. *
  1484. * Returns value base on SCSI command status
  1485. */
  1486. static inline int
  1487. ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
  1488. {
  1489. int result = 0;
  1490. switch (scsi_status) {
  1491. case SAM_STAT_GOOD:
  1492. result |= DID_OK << 16 |
  1493. COMMAND_COMPLETE << 8 |
  1494. SAM_STAT_GOOD;
  1495. break;
  1496. case SAM_STAT_CHECK_CONDITION:
  1497. result |= DID_OK << 16 |
  1498. COMMAND_COMPLETE << 8 |
  1499. SAM_STAT_CHECK_CONDITION;
  1500. ufshcd_copy_sense_data(lrbp);
  1501. break;
  1502. case SAM_STAT_BUSY:
  1503. result |= SAM_STAT_BUSY;
  1504. break;
  1505. case SAM_STAT_TASK_SET_FULL:
  1506. /*
  1507. * If a LUN reports SAM_STAT_TASK_SET_FULL, then the LUN queue
  1508. * depth needs to be adjusted to the exact number of
  1509. * outstanding commands the LUN can handle at any given time.
  1510. */
  1511. ufshcd_adjust_lun_qdepth(lrbp->cmd);
  1512. result |= SAM_STAT_TASK_SET_FULL;
  1513. break;
  1514. case SAM_STAT_TASK_ABORTED:
  1515. result |= SAM_STAT_TASK_ABORTED;
  1516. break;
  1517. default:
  1518. result |= DID_ERROR << 16;
  1519. break;
  1520. } /* end of switch */
  1521. return result;
  1522. }
  1523. /**
  1524. * ufshcd_transfer_rsp_status - Get overall status of the response
  1525. * @hba: per adapter instance
  1526. * @lrb: pointer to local reference block of completed command
  1527. *
  1528. * Returns result of the command to notify SCSI midlayer
  1529. */
  1530. static inline int
  1531. ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
  1532. {
  1533. int result = 0;
  1534. int scsi_status;
  1535. int ocs;
  1536. /* overall command status of utrd */
  1537. ocs = ufshcd_get_tr_ocs(lrbp);
  1538. switch (ocs) {
  1539. case OCS_SUCCESS:
  1540. result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
  1541. switch (result) {
  1542. case UPIU_TRANSACTION_RESPONSE:
  1543. /*
  1544. * get the response UPIU result to extract
  1545. * the SCSI command status
  1546. */
  1547. result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
  1548. /*
  1549. * get the result based on SCSI status response
  1550. * to notify the SCSI midlayer of the command status
  1551. */
  1552. scsi_status = result & MASK_SCSI_STATUS;
  1553. result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
  1554. break;
  1555. case UPIU_TRANSACTION_REJECT_UPIU:
  1556. /* TODO: handle Reject UPIU Response */
  1557. result = DID_ERROR << 16;
  1558. dev_err(hba->dev,
  1559. "Reject UPIU not fully implemented\n");
  1560. break;
  1561. default:
  1562. result = DID_ERROR << 16;
  1563. dev_err(hba->dev,
  1564. "Unexpected request response code = %x\n",
  1565. result);
  1566. break;
  1567. }
  1568. break;
  1569. case OCS_ABORTED:
  1570. result |= DID_ABORT << 16;
  1571. break;
  1572. case OCS_INVALID_CMD_TABLE_ATTR:
  1573. case OCS_INVALID_PRDT_ATTR:
  1574. case OCS_MISMATCH_DATA_BUF_SIZE:
  1575. case OCS_MISMATCH_RESP_UPIU_SIZE:
  1576. case OCS_PEER_COMM_FAILURE:
  1577. case OCS_FATAL_ERROR:
  1578. default:
  1579. result |= DID_ERROR << 16;
  1580. dev_err(hba->dev,
  1581. "OCS error from controller = %x\n", ocs);
  1582. break;
  1583. } /* end of switch */
  1584. return result;
  1585. }
  1586. /**
  1587. * ufshcd_uic_cmd_compl - handle completion of uic command
  1588. * @hba: per adapter instance
  1589. */
  1590. static void ufshcd_uic_cmd_compl(struct ufs_hba *hba)
  1591. {
  1592. if (hba->active_uic_cmd) {
  1593. hba->active_uic_cmd->argument2 |=
  1594. ufshcd_get_uic_cmd_result(hba);
  1595. complete(&hba->active_uic_cmd->done);
  1596. }
  1597. }
  1598. /**
  1599. * ufshcd_transfer_req_compl - handle SCSI and query command completion
  1600. * @hba: per adapter instance
  1601. */
  1602. static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
  1603. {
  1604. struct ufshcd_lrb *lrbp;
  1605. struct scsi_cmnd *cmd;
  1606. unsigned long completed_reqs;
  1607. u32 tr_doorbell;
  1608. int result;
  1609. int index;
  1610. bool int_aggr_reset = false;
  1611. tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
  1612. completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
  1613. for (index = 0; index < hba->nutrs; index++) {
  1614. if (test_bit(index, &completed_reqs)) {
  1615. lrbp = &hba->lrb[index];
  1616. cmd = lrbp->cmd;
  1617. /*
  1618. * Don't skip resetting interrupt aggregation counters
  1619. * if a regular command is present.
  1620. */
  1621. int_aggr_reset |= !lrbp->intr_cmd;
  1622. if (cmd) {
  1623. result = ufshcd_transfer_rsp_status(hba, lrbp);
  1624. scsi_dma_unmap(cmd);
  1625. cmd->result = result;
  1626. /* Mark completed command as NULL in LRB */
  1627. lrbp->cmd = NULL;
  1628. clear_bit_unlock(index, &hba->lrb_in_use);
  1629. /* Do not touch lrbp after scsi done */
  1630. cmd->scsi_done(cmd);
  1631. } else if (lrbp->command_type ==
  1632. UTP_CMD_TYPE_DEV_MANAGE) {
  1633. if (hba->dev_cmd.complete)
  1634. complete(hba->dev_cmd.complete);
  1635. }
  1636. } /* end of if */
  1637. } /* end of for */
  1638. /* clear corresponding bits of completed commands */
  1639. hba->outstanding_reqs ^= completed_reqs;
  1640. /* we might have free'd some tags above */
  1641. wake_up(&hba->dev_cmd.tag_wq);
  1642. /* Reset interrupt aggregation counters */
  1643. if (int_aggr_reset)
  1644. ufshcd_config_int_aggr(hba, INT_AGGR_RESET);
  1645. }
  1646. /**
  1647. * ufshcd_fatal_err_handler - handle fatal errors
  1648. * @hba: per adapter instance
  1649. */
  1650. static void ufshcd_fatal_err_handler(struct work_struct *work)
  1651. {
  1652. struct ufs_hba *hba;
  1653. hba = container_of(work, struct ufs_hba, feh_workq);
  1654. /* check if reset is already in progress */
  1655. if (hba->ufshcd_state != UFSHCD_STATE_RESET)
  1656. ufshcd_do_reset(hba);
  1657. }
  1658. /**
  1659. * ufshcd_err_handler - Check for fatal errors
  1660. * @work: pointer to a work queue structure
  1661. */
  1662. static void ufshcd_err_handler(struct ufs_hba *hba)
  1663. {
  1664. u32 reg;
  1665. if (hba->errors & INT_FATAL_ERRORS)
  1666. goto fatal_eh;
  1667. if (hba->errors & UIC_ERROR) {
  1668. reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
  1669. if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
  1670. goto fatal_eh;
  1671. }
  1672. return;
  1673. fatal_eh:
  1674. hba->ufshcd_state = UFSHCD_STATE_ERROR;
  1675. schedule_work(&hba->feh_workq);
  1676. }
  1677. /**
  1678. * ufshcd_tmc_handler - handle task management function completion
  1679. * @hba: per adapter instance
  1680. */
  1681. static void ufshcd_tmc_handler(struct ufs_hba *hba)
  1682. {
  1683. u32 tm_doorbell;
  1684. tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
  1685. hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
  1686. wake_up_interruptible(&hba->ufshcd_tm_wait_queue);
  1687. }
  1688. /**
  1689. * ufshcd_sl_intr - Interrupt service routine
  1690. * @hba: per adapter instance
  1691. * @intr_status: contains interrupts generated by the controller
  1692. */
  1693. static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
  1694. {
  1695. hba->errors = UFSHCD_ERROR_MASK & intr_status;
  1696. if (hba->errors)
  1697. ufshcd_err_handler(hba);
  1698. if (intr_status & UIC_COMMAND_COMPL)
  1699. ufshcd_uic_cmd_compl(hba);
  1700. if (intr_status & UTP_TASK_REQ_COMPL)
  1701. ufshcd_tmc_handler(hba);
  1702. if (intr_status & UTP_TRANSFER_REQ_COMPL)
  1703. ufshcd_transfer_req_compl(hba);
  1704. }
  1705. /**
  1706. * ufshcd_intr - Main interrupt service routine
  1707. * @irq: irq number
  1708. * @__hba: pointer to adapter instance
  1709. *
  1710. * Returns IRQ_HANDLED - If interrupt is valid
  1711. * IRQ_NONE - If invalid interrupt
  1712. */
  1713. static irqreturn_t ufshcd_intr(int irq, void *__hba)
  1714. {
  1715. u32 intr_status;
  1716. irqreturn_t retval = IRQ_NONE;
  1717. struct ufs_hba *hba = __hba;
  1718. spin_lock(hba->host->host_lock);
  1719. intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
  1720. if (intr_status) {
  1721. ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
  1722. ufshcd_sl_intr(hba, intr_status);
  1723. retval = IRQ_HANDLED;
  1724. }
  1725. spin_unlock(hba->host->host_lock);
  1726. return retval;
  1727. }
  1728. /**
  1729. * ufshcd_issue_tm_cmd - issues task management commands to controller
  1730. * @hba: per adapter instance
  1731. * @lrbp: pointer to local reference block
  1732. *
  1733. * Returns SUCCESS/FAILED
  1734. */
  1735. static int
  1736. ufshcd_issue_tm_cmd(struct ufs_hba *hba,
  1737. struct ufshcd_lrb *lrbp,
  1738. u8 tm_function)
  1739. {
  1740. struct utp_task_req_desc *task_req_descp;
  1741. struct utp_upiu_task_req *task_req_upiup;
  1742. struct Scsi_Host *host;
  1743. unsigned long flags;
  1744. int free_slot = 0;
  1745. int err;
  1746. host = hba->host;
  1747. spin_lock_irqsave(host->host_lock, flags);
  1748. /* If task management queue is full */
  1749. free_slot = ufshcd_get_tm_free_slot(hba);
  1750. if (free_slot >= hba->nutmrs) {
  1751. spin_unlock_irqrestore(host->host_lock, flags);
  1752. dev_err(hba->dev, "Task management queue full\n");
  1753. err = FAILED;
  1754. goto out;
  1755. }
  1756. task_req_descp = hba->utmrdl_base_addr;
  1757. task_req_descp += free_slot;
  1758. /* Configure task request descriptor */
  1759. task_req_descp->header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
  1760. task_req_descp->header.dword_2 =
  1761. cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
  1762. /* Configure task request UPIU */
  1763. task_req_upiup =
  1764. (struct utp_upiu_task_req *) task_req_descp->task_req_upiu;
  1765. task_req_upiup->header.dword_0 =
  1766. UPIU_HEADER_DWORD(UPIU_TRANSACTION_TASK_REQ, 0,
  1767. lrbp->lun, lrbp->task_tag);
  1768. task_req_upiup->header.dword_1 =
  1769. UPIU_HEADER_DWORD(0, tm_function, 0, 0);
  1770. task_req_upiup->input_param1 = lrbp->lun;
  1771. task_req_upiup->input_param1 =
  1772. cpu_to_be32(task_req_upiup->input_param1);
  1773. task_req_upiup->input_param2 = lrbp->task_tag;
  1774. task_req_upiup->input_param2 =
  1775. cpu_to_be32(task_req_upiup->input_param2);
  1776. /* send command to the controller */
  1777. __set_bit(free_slot, &hba->outstanding_tasks);
  1778. ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
  1779. spin_unlock_irqrestore(host->host_lock, flags);
  1780. /* wait until the task management command is completed */
  1781. err =
  1782. wait_event_interruptible_timeout(hba->ufshcd_tm_wait_queue,
  1783. (test_bit(free_slot,
  1784. &hba->tm_condition) != 0),
  1785. 60 * HZ);
  1786. if (!err) {
  1787. dev_err(hba->dev,
  1788. "Task management command timed-out\n");
  1789. err = FAILED;
  1790. goto out;
  1791. }
  1792. clear_bit(free_slot, &hba->tm_condition);
  1793. err = ufshcd_task_req_compl(hba, free_slot);
  1794. out:
  1795. return err;
  1796. }
  1797. /**
  1798. * ufshcd_device_reset - reset device and abort all the pending commands
  1799. * @cmd: SCSI command pointer
  1800. *
  1801. * Returns SUCCESS/FAILED
  1802. */
  1803. static int ufshcd_device_reset(struct scsi_cmnd *cmd)
  1804. {
  1805. struct Scsi_Host *host;
  1806. struct ufs_hba *hba;
  1807. unsigned int tag;
  1808. u32 pos;
  1809. int err;
  1810. host = cmd->device->host;
  1811. hba = shost_priv(host);
  1812. tag = cmd->request->tag;
  1813. err = ufshcd_issue_tm_cmd(hba, &hba->lrb[tag], UFS_LOGICAL_RESET);
  1814. if (err == FAILED)
  1815. goto out;
  1816. for (pos = 0; pos < hba->nutrs; pos++) {
  1817. if (test_bit(pos, &hba->outstanding_reqs) &&
  1818. (hba->lrb[tag].lun == hba->lrb[pos].lun)) {
  1819. /* clear the respective UTRLCLR register bit */
  1820. ufshcd_utrl_clear(hba, pos);
  1821. clear_bit(pos, &hba->outstanding_reqs);
  1822. if (hba->lrb[pos].cmd) {
  1823. scsi_dma_unmap(hba->lrb[pos].cmd);
  1824. hba->lrb[pos].cmd->result =
  1825. DID_ABORT << 16;
  1826. hba->lrb[pos].cmd->scsi_done(cmd);
  1827. hba->lrb[pos].cmd = NULL;
  1828. clear_bit_unlock(pos, &hba->lrb_in_use);
  1829. wake_up(&hba->dev_cmd.tag_wq);
  1830. }
  1831. }
  1832. } /* end of for */
  1833. out:
  1834. return err;
  1835. }
  1836. /**
  1837. * ufshcd_host_reset - Main reset function registered with scsi layer
  1838. * @cmd: SCSI command pointer
  1839. *
  1840. * Returns SUCCESS/FAILED
  1841. */
  1842. static int ufshcd_host_reset(struct scsi_cmnd *cmd)
  1843. {
  1844. struct ufs_hba *hba;
  1845. hba = shost_priv(cmd->device->host);
  1846. if (hba->ufshcd_state == UFSHCD_STATE_RESET)
  1847. return SUCCESS;
  1848. return ufshcd_do_reset(hba);
  1849. }
  1850. /**
  1851. * ufshcd_abort - abort a specific command
  1852. * @cmd: SCSI command pointer
  1853. *
  1854. * Returns SUCCESS/FAILED
  1855. */
  1856. static int ufshcd_abort(struct scsi_cmnd *cmd)
  1857. {
  1858. struct Scsi_Host *host;
  1859. struct ufs_hba *hba;
  1860. unsigned long flags;
  1861. unsigned int tag;
  1862. int err;
  1863. host = cmd->device->host;
  1864. hba = shost_priv(host);
  1865. tag = cmd->request->tag;
  1866. spin_lock_irqsave(host->host_lock, flags);
  1867. /* check if command is still pending */
  1868. if (!(test_bit(tag, &hba->outstanding_reqs))) {
  1869. err = FAILED;
  1870. spin_unlock_irqrestore(host->host_lock, flags);
  1871. goto out;
  1872. }
  1873. spin_unlock_irqrestore(host->host_lock, flags);
  1874. err = ufshcd_issue_tm_cmd(hba, &hba->lrb[tag], UFS_ABORT_TASK);
  1875. if (err == FAILED)
  1876. goto out;
  1877. scsi_dma_unmap(cmd);
  1878. spin_lock_irqsave(host->host_lock, flags);
  1879. /* clear the respective UTRLCLR register bit */
  1880. ufshcd_utrl_clear(hba, tag);
  1881. __clear_bit(tag, &hba->outstanding_reqs);
  1882. hba->lrb[tag].cmd = NULL;
  1883. spin_unlock_irqrestore(host->host_lock, flags);
  1884. clear_bit_unlock(tag, &hba->lrb_in_use);
  1885. wake_up(&hba->dev_cmd.tag_wq);
  1886. out:
  1887. return err;
  1888. }
  1889. /**
  1890. * ufshcd_async_scan - asynchronous execution for link startup
  1891. * @data: data pointer to pass to this function
  1892. * @cookie: cookie data
  1893. */
  1894. static void ufshcd_async_scan(void *data, async_cookie_t cookie)
  1895. {
  1896. struct ufs_hba *hba = (struct ufs_hba *)data;
  1897. int ret;
  1898. ret = ufshcd_link_startup(hba);
  1899. if (ret)
  1900. goto out;
  1901. ret = ufshcd_verify_dev_init(hba);
  1902. if (ret)
  1903. goto out;
  1904. ret = ufshcd_complete_dev_init(hba);
  1905. if (ret)
  1906. goto out;
  1907. scsi_scan_host(hba->host);
  1908. out:
  1909. return;
  1910. }
  1911. static struct scsi_host_template ufshcd_driver_template = {
  1912. .module = THIS_MODULE,
  1913. .name = UFSHCD,
  1914. .proc_name = UFSHCD,
  1915. .queuecommand = ufshcd_queuecommand,
  1916. .slave_alloc = ufshcd_slave_alloc,
  1917. .slave_destroy = ufshcd_slave_destroy,
  1918. .eh_abort_handler = ufshcd_abort,
  1919. .eh_device_reset_handler = ufshcd_device_reset,
  1920. .eh_host_reset_handler = ufshcd_host_reset,
  1921. .this_id = -1,
  1922. .sg_tablesize = SG_ALL,
  1923. .cmd_per_lun = UFSHCD_CMD_PER_LUN,
  1924. .can_queue = UFSHCD_CAN_QUEUE,
  1925. };
  1926. /**
  1927. * ufshcd_suspend - suspend power management function
  1928. * @hba: per adapter instance
  1929. * @state: power state
  1930. *
  1931. * Returns -ENOSYS
  1932. */
  1933. int ufshcd_suspend(struct ufs_hba *hba, pm_message_t state)
  1934. {
  1935. /*
  1936. * TODO:
  1937. * 1. Block SCSI requests from SCSI midlayer
  1938. * 2. Change the internal driver state to non operational
  1939. * 3. Set UTRLRSR and UTMRLRSR bits to zero
  1940. * 4. Wait until outstanding commands are completed
  1941. * 5. Set HCE to zero to send the UFS host controller to reset state
  1942. */
  1943. return -ENOSYS;
  1944. }
  1945. EXPORT_SYMBOL_GPL(ufshcd_suspend);
  1946. /**
  1947. * ufshcd_resume - resume power management function
  1948. * @hba: per adapter instance
  1949. *
  1950. * Returns -ENOSYS
  1951. */
  1952. int ufshcd_resume(struct ufs_hba *hba)
  1953. {
  1954. /*
  1955. * TODO:
  1956. * 1. Set HCE to 1, to start the UFS host controller
  1957. * initialization process
  1958. * 2. Set UTRLRSR and UTMRLRSR bits to 1
  1959. * 3. Change the internal driver state to operational
  1960. * 4. Unblock SCSI requests from SCSI midlayer
  1961. */
  1962. return -ENOSYS;
  1963. }
  1964. EXPORT_SYMBOL_GPL(ufshcd_resume);
  1965. /**
  1966. * ufshcd_remove - de-allocate SCSI host and host memory space
  1967. * data structure memory
  1968. * @hba - per adapter instance
  1969. */
  1970. void ufshcd_remove(struct ufs_hba *hba)
  1971. {
  1972. /* disable interrupts */
  1973. ufshcd_disable_intr(hba, hba->intr_mask);
  1974. ufshcd_hba_stop(hba);
  1975. scsi_remove_host(hba->host);
  1976. scsi_host_put(hba->host);
  1977. }
  1978. EXPORT_SYMBOL_GPL(ufshcd_remove);
  1979. /**
  1980. * ufshcd_init - Driver initialization routine
  1981. * @dev: pointer to device handle
  1982. * @hba_handle: driver private handle
  1983. * @mmio_base: base register address
  1984. * @irq: Interrupt line of device
  1985. * Returns 0 on success, non-zero value on failure
  1986. */
  1987. int ufshcd_init(struct device *dev, struct ufs_hba **hba_handle,
  1988. void __iomem *mmio_base, unsigned int irq)
  1989. {
  1990. struct Scsi_Host *host;
  1991. struct ufs_hba *hba;
  1992. int err;
  1993. if (!dev) {
  1994. dev_err(dev,
  1995. "Invalid memory reference for dev is NULL\n");
  1996. err = -ENODEV;
  1997. goto out_error;
  1998. }
  1999. if (!mmio_base) {
  2000. dev_err(dev,
  2001. "Invalid memory reference for mmio_base is NULL\n");
  2002. err = -ENODEV;
  2003. goto out_error;
  2004. }
  2005. host = scsi_host_alloc(&ufshcd_driver_template,
  2006. sizeof(struct ufs_hba));
  2007. if (!host) {
  2008. dev_err(dev, "scsi_host_alloc failed\n");
  2009. err = -ENOMEM;
  2010. goto out_error;
  2011. }
  2012. hba = shost_priv(host);
  2013. hba->host = host;
  2014. hba->dev = dev;
  2015. hba->mmio_base = mmio_base;
  2016. hba->irq = irq;
  2017. /* Read capabilities registers */
  2018. ufshcd_hba_capabilities(hba);
  2019. /* Get UFS version supported by the controller */
  2020. hba->ufs_version = ufshcd_get_ufs_version(hba);
  2021. /* Get Interrupt bit mask per version */
  2022. hba->intr_mask = ufshcd_get_intr_mask(hba);
  2023. /* Allocate memory for host memory space */
  2024. err = ufshcd_memory_alloc(hba);
  2025. if (err) {
  2026. dev_err(hba->dev, "Memory allocation failed\n");
  2027. goto out_disable;
  2028. }
  2029. /* Configure LRB */
  2030. ufshcd_host_memory_configure(hba);
  2031. host->can_queue = hba->nutrs;
  2032. host->cmd_per_lun = hba->nutrs;
  2033. host->max_id = UFSHCD_MAX_ID;
  2034. host->max_lun = UFSHCD_MAX_LUNS;
  2035. host->max_channel = UFSHCD_MAX_CHANNEL;
  2036. host->unique_id = host->host_no;
  2037. host->max_cmd_len = MAX_CDB_SIZE;
  2038. /* Initailize wait queue for task management */
  2039. init_waitqueue_head(&hba->ufshcd_tm_wait_queue);
  2040. /* Initialize work queues */
  2041. INIT_WORK(&hba->feh_workq, ufshcd_fatal_err_handler);
  2042. /* Initialize UIC command mutex */
  2043. mutex_init(&hba->uic_cmd_mutex);
  2044. /* Initialize mutex for device management commands */
  2045. mutex_init(&hba->dev_cmd.lock);
  2046. /* Initialize device management tag acquire wait queue */
  2047. init_waitqueue_head(&hba->dev_cmd.tag_wq);
  2048. /* IRQ registration */
  2049. err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
  2050. if (err) {
  2051. dev_err(hba->dev, "request irq failed\n");
  2052. goto out_disable;
  2053. }
  2054. /* Enable SCSI tag mapping */
  2055. err = scsi_init_shared_tag_map(host, host->can_queue);
  2056. if (err) {
  2057. dev_err(hba->dev, "init shared queue failed\n");
  2058. goto out_disable;
  2059. }
  2060. err = scsi_add_host(host, hba->dev);
  2061. if (err) {
  2062. dev_err(hba->dev, "scsi_add_host failed\n");
  2063. goto out_disable;
  2064. }
  2065. /* Host controller enable */
  2066. err = ufshcd_hba_enable(hba);
  2067. if (err) {
  2068. dev_err(hba->dev, "Host controller enable failed\n");
  2069. goto out_remove_scsi_host;
  2070. }
  2071. *hba_handle = hba;
  2072. async_schedule(ufshcd_async_scan, hba);
  2073. return 0;
  2074. out_remove_scsi_host:
  2075. scsi_remove_host(hba->host);
  2076. out_disable:
  2077. scsi_host_put(host);
  2078. out_error:
  2079. return err;
  2080. }
  2081. EXPORT_SYMBOL_GPL(ufshcd_init);
  2082. MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
  2083. MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
  2084. MODULE_DESCRIPTION("Generic UFS host controller driver Core");
  2085. MODULE_LICENSE("GPL");
  2086. MODULE_VERSION(UFSHCD_DRIVER_VERSION);