setup-r8a7779.c 15 KB

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  1. /*
  2. * r8a7779 processor support
  3. *
  4. * Copyright (C) 2011, 2013 Renesas Solutions Corp.
  5. * Copyright (C) 2011 Magnus Damm
  6. * Copyright (C) 2013 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/of_platform.h>
  26. #include <linux/platform_data/gpio-rcar.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/delay.h>
  29. #include <linux/input.h>
  30. #include <linux/io.h>
  31. #include <linux/serial_sci.h>
  32. #include <linux/sh_timer.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/usb/otg.h>
  35. #include <linux/usb/hcd.h>
  36. #include <linux/usb/ehci_pdriver.h>
  37. #include <linux/usb/ohci_pdriver.h>
  38. #include <linux/pm_runtime.h>
  39. #include <mach/irqs.h>
  40. #include <mach/r8a7779.h>
  41. #include <mach/common.h>
  42. #include <asm/mach-types.h>
  43. #include <asm/mach/arch.h>
  44. #include <asm/mach/time.h>
  45. #include <asm/mach/map.h>
  46. #include <asm/hardware/cache-l2x0.h>
  47. static struct map_desc r8a7779_io_desc[] __initdata = {
  48. /* 2M entity map for 0xf0000000 (MPCORE) */
  49. {
  50. .virtual = 0xf0000000,
  51. .pfn = __phys_to_pfn(0xf0000000),
  52. .length = SZ_2M,
  53. .type = MT_DEVICE_NONSHARED
  54. },
  55. /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
  56. {
  57. .virtual = 0xfe000000,
  58. .pfn = __phys_to_pfn(0xfe000000),
  59. .length = SZ_16M,
  60. .type = MT_DEVICE_NONSHARED
  61. },
  62. };
  63. void __init r8a7779_map_io(void)
  64. {
  65. iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
  66. }
  67. static struct resource r8a7779_pfc_resources[] = {
  68. DEFINE_RES_MEM(0xfffc0000, 0x023c),
  69. };
  70. static struct platform_device r8a7779_pfc_device = {
  71. .name = "pfc-r8a7779",
  72. .id = -1,
  73. .resource = r8a7779_pfc_resources,
  74. .num_resources = ARRAY_SIZE(r8a7779_pfc_resources),
  75. };
  76. #define R8A7779_GPIO(idx, npins) \
  77. static struct resource r8a7779_gpio##idx##_resources[] = { \
  78. DEFINE_RES_MEM(0xffc40000 + (0x1000 * (idx)), 0x002c), \
  79. DEFINE_RES_IRQ(gic_iid(0xad + (idx))), \
  80. }; \
  81. \
  82. static struct gpio_rcar_config r8a7779_gpio##idx##_platform_data = { \
  83. .gpio_base = 32 * (idx), \
  84. .irq_base = 0, \
  85. .number_of_pins = npins, \
  86. .pctl_name = "pfc-r8a7779", \
  87. }; \
  88. \
  89. static struct platform_device r8a7779_gpio##idx##_device = { \
  90. .name = "gpio_rcar", \
  91. .id = idx, \
  92. .resource = r8a7779_gpio##idx##_resources, \
  93. .num_resources = ARRAY_SIZE(r8a7779_gpio##idx##_resources), \
  94. .dev = { \
  95. .platform_data = &r8a7779_gpio##idx##_platform_data, \
  96. }, \
  97. }
  98. R8A7779_GPIO(0, 32);
  99. R8A7779_GPIO(1, 32);
  100. R8A7779_GPIO(2, 32);
  101. R8A7779_GPIO(3, 32);
  102. R8A7779_GPIO(4, 32);
  103. R8A7779_GPIO(5, 32);
  104. R8A7779_GPIO(6, 9);
  105. static struct platform_device *r8a7779_pinctrl_devices[] __initdata = {
  106. &r8a7779_pfc_device,
  107. &r8a7779_gpio0_device,
  108. &r8a7779_gpio1_device,
  109. &r8a7779_gpio2_device,
  110. &r8a7779_gpio3_device,
  111. &r8a7779_gpio4_device,
  112. &r8a7779_gpio5_device,
  113. &r8a7779_gpio6_device,
  114. };
  115. void __init r8a7779_pinmux_init(void)
  116. {
  117. platform_add_devices(r8a7779_pinctrl_devices,
  118. ARRAY_SIZE(r8a7779_pinctrl_devices));
  119. }
  120. static struct plat_sci_port scif0_platform_data = {
  121. .mapbase = 0xffe40000,
  122. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  123. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  124. .scbrr_algo_id = SCBRR_ALGO_2,
  125. .type = PORT_SCIF,
  126. .irqs = SCIx_IRQ_MUXED(gic_iid(0x78)),
  127. };
  128. static struct platform_device scif0_device = {
  129. .name = "sh-sci",
  130. .id = 0,
  131. .dev = {
  132. .platform_data = &scif0_platform_data,
  133. },
  134. };
  135. static struct plat_sci_port scif1_platform_data = {
  136. .mapbase = 0xffe41000,
  137. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  138. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  139. .scbrr_algo_id = SCBRR_ALGO_2,
  140. .type = PORT_SCIF,
  141. .irqs = SCIx_IRQ_MUXED(gic_iid(0x79)),
  142. };
  143. static struct platform_device scif1_device = {
  144. .name = "sh-sci",
  145. .id = 1,
  146. .dev = {
  147. .platform_data = &scif1_platform_data,
  148. },
  149. };
  150. static struct plat_sci_port scif2_platform_data = {
  151. .mapbase = 0xffe42000,
  152. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  153. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  154. .scbrr_algo_id = SCBRR_ALGO_2,
  155. .type = PORT_SCIF,
  156. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7a)),
  157. };
  158. static struct platform_device scif2_device = {
  159. .name = "sh-sci",
  160. .id = 2,
  161. .dev = {
  162. .platform_data = &scif2_platform_data,
  163. },
  164. };
  165. static struct plat_sci_port scif3_platform_data = {
  166. .mapbase = 0xffe43000,
  167. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  168. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  169. .scbrr_algo_id = SCBRR_ALGO_2,
  170. .type = PORT_SCIF,
  171. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7b)),
  172. };
  173. static struct platform_device scif3_device = {
  174. .name = "sh-sci",
  175. .id = 3,
  176. .dev = {
  177. .platform_data = &scif3_platform_data,
  178. },
  179. };
  180. static struct plat_sci_port scif4_platform_data = {
  181. .mapbase = 0xffe44000,
  182. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  183. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  184. .scbrr_algo_id = SCBRR_ALGO_2,
  185. .type = PORT_SCIF,
  186. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7c)),
  187. };
  188. static struct platform_device scif4_device = {
  189. .name = "sh-sci",
  190. .id = 4,
  191. .dev = {
  192. .platform_data = &scif4_platform_data,
  193. },
  194. };
  195. static struct plat_sci_port scif5_platform_data = {
  196. .mapbase = 0xffe45000,
  197. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  198. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  199. .scbrr_algo_id = SCBRR_ALGO_2,
  200. .type = PORT_SCIF,
  201. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7d)),
  202. };
  203. static struct platform_device scif5_device = {
  204. .name = "sh-sci",
  205. .id = 5,
  206. .dev = {
  207. .platform_data = &scif5_platform_data,
  208. },
  209. };
  210. /* TMU */
  211. static struct sh_timer_config tmu00_platform_data = {
  212. .name = "TMU00",
  213. .channel_offset = 0x4,
  214. .timer_bit = 0,
  215. .clockevent_rating = 200,
  216. };
  217. static struct resource tmu00_resources[] = {
  218. [0] = {
  219. .name = "TMU00",
  220. .start = 0xffd80008,
  221. .end = 0xffd80013,
  222. .flags = IORESOURCE_MEM,
  223. },
  224. [1] = {
  225. .start = gic_iid(0x40),
  226. .flags = IORESOURCE_IRQ,
  227. },
  228. };
  229. static struct platform_device tmu00_device = {
  230. .name = "sh_tmu",
  231. .id = 0,
  232. .dev = {
  233. .platform_data = &tmu00_platform_data,
  234. },
  235. .resource = tmu00_resources,
  236. .num_resources = ARRAY_SIZE(tmu00_resources),
  237. };
  238. static struct sh_timer_config tmu01_platform_data = {
  239. .name = "TMU01",
  240. .channel_offset = 0x10,
  241. .timer_bit = 1,
  242. .clocksource_rating = 200,
  243. };
  244. static struct resource tmu01_resources[] = {
  245. [0] = {
  246. .name = "TMU01",
  247. .start = 0xffd80014,
  248. .end = 0xffd8001f,
  249. .flags = IORESOURCE_MEM,
  250. },
  251. [1] = {
  252. .start = gic_iid(0x41),
  253. .flags = IORESOURCE_IRQ,
  254. },
  255. };
  256. static struct platform_device tmu01_device = {
  257. .name = "sh_tmu",
  258. .id = 1,
  259. .dev = {
  260. .platform_data = &tmu01_platform_data,
  261. },
  262. .resource = tmu01_resources,
  263. .num_resources = ARRAY_SIZE(tmu01_resources),
  264. };
  265. /* I2C */
  266. static struct resource rcar_i2c0_res[] = {
  267. {
  268. .start = 0xffc70000,
  269. .end = 0xffc70fff,
  270. .flags = IORESOURCE_MEM,
  271. }, {
  272. .start = gic_iid(0x6f),
  273. .flags = IORESOURCE_IRQ,
  274. },
  275. };
  276. static struct platform_device i2c0_device = {
  277. .name = "i2c-rcar",
  278. .id = 0,
  279. .resource = rcar_i2c0_res,
  280. .num_resources = ARRAY_SIZE(rcar_i2c0_res),
  281. };
  282. static struct resource rcar_i2c1_res[] = {
  283. {
  284. .start = 0xffc71000,
  285. .end = 0xffc71fff,
  286. .flags = IORESOURCE_MEM,
  287. }, {
  288. .start = gic_iid(0x72),
  289. .flags = IORESOURCE_IRQ,
  290. },
  291. };
  292. static struct platform_device i2c1_device = {
  293. .name = "i2c-rcar",
  294. .id = 1,
  295. .resource = rcar_i2c1_res,
  296. .num_resources = ARRAY_SIZE(rcar_i2c1_res),
  297. };
  298. static struct resource rcar_i2c2_res[] = {
  299. {
  300. .start = 0xffc72000,
  301. .end = 0xffc72fff,
  302. .flags = IORESOURCE_MEM,
  303. }, {
  304. .start = gic_iid(0x70),
  305. .flags = IORESOURCE_IRQ,
  306. },
  307. };
  308. static struct platform_device i2c2_device = {
  309. .name = "i2c-rcar",
  310. .id = 2,
  311. .resource = rcar_i2c2_res,
  312. .num_resources = ARRAY_SIZE(rcar_i2c2_res),
  313. };
  314. static struct resource rcar_i2c3_res[] = {
  315. {
  316. .start = 0xffc73000,
  317. .end = 0xffc73fff,
  318. .flags = IORESOURCE_MEM,
  319. }, {
  320. .start = gic_iid(0x71),
  321. .flags = IORESOURCE_IRQ,
  322. },
  323. };
  324. static struct platform_device i2c3_device = {
  325. .name = "i2c-rcar",
  326. .id = 3,
  327. .resource = rcar_i2c3_res,
  328. .num_resources = ARRAY_SIZE(rcar_i2c3_res),
  329. };
  330. static struct resource sata_resources[] = {
  331. [0] = {
  332. .name = "rcar-sata",
  333. .start = 0xfc600000,
  334. .end = 0xfc601fff,
  335. .flags = IORESOURCE_MEM,
  336. },
  337. [1] = {
  338. .start = gic_iid(0x84),
  339. .flags = IORESOURCE_IRQ,
  340. },
  341. };
  342. static struct platform_device sata_device = {
  343. .name = "sata_rcar",
  344. .id = -1,
  345. .resource = sata_resources,
  346. .num_resources = ARRAY_SIZE(sata_resources),
  347. .dev = {
  348. .dma_mask = &sata_device.dev.coherent_dma_mask,
  349. .coherent_dma_mask = DMA_BIT_MASK(32),
  350. },
  351. };
  352. /* USB */
  353. static struct usb_phy *phy;
  354. static int usb_power_on(struct platform_device *pdev)
  355. {
  356. if (IS_ERR(phy))
  357. return PTR_ERR(phy);
  358. pm_runtime_enable(&pdev->dev);
  359. pm_runtime_get_sync(&pdev->dev);
  360. usb_phy_init(phy);
  361. return 0;
  362. }
  363. static void usb_power_off(struct platform_device *pdev)
  364. {
  365. if (IS_ERR(phy))
  366. return;
  367. usb_phy_shutdown(phy);
  368. pm_runtime_put_sync(&pdev->dev);
  369. pm_runtime_disable(&pdev->dev);
  370. }
  371. static int ehci_init_internal_buffer(struct usb_hcd *hcd)
  372. {
  373. /*
  374. * Below are recommended values from the datasheet;
  375. * see [USB :: Setting of EHCI Internal Buffer].
  376. */
  377. /* EHCI IP internal buffer setting */
  378. iowrite32(0x00ff0040, hcd->regs + 0x0094);
  379. /* EHCI IP internal buffer enable */
  380. iowrite32(0x00000001, hcd->regs + 0x009C);
  381. return 0;
  382. }
  383. static struct usb_ehci_pdata ehcix_pdata = {
  384. .power_on = usb_power_on,
  385. .power_off = usb_power_off,
  386. .power_suspend = usb_power_off,
  387. .pre_setup = ehci_init_internal_buffer,
  388. };
  389. static struct resource ehci0_resources[] = {
  390. [0] = {
  391. .start = 0xffe70000,
  392. .end = 0xffe70400 - 1,
  393. .flags = IORESOURCE_MEM,
  394. },
  395. [1] = {
  396. .start = gic_iid(0x4c),
  397. .flags = IORESOURCE_IRQ,
  398. },
  399. };
  400. static struct platform_device ehci0_device = {
  401. .name = "ehci-platform",
  402. .id = 0,
  403. .dev = {
  404. .dma_mask = &ehci0_device.dev.coherent_dma_mask,
  405. .coherent_dma_mask = 0xffffffff,
  406. .platform_data = &ehcix_pdata,
  407. },
  408. .num_resources = ARRAY_SIZE(ehci0_resources),
  409. .resource = ehci0_resources,
  410. };
  411. static struct resource ehci1_resources[] = {
  412. [0] = {
  413. .start = 0xfff70000,
  414. .end = 0xfff70400 - 1,
  415. .flags = IORESOURCE_MEM,
  416. },
  417. [1] = {
  418. .start = gic_iid(0x4d),
  419. .flags = IORESOURCE_IRQ,
  420. },
  421. };
  422. static struct platform_device ehci1_device = {
  423. .name = "ehci-platform",
  424. .id = 1,
  425. .dev = {
  426. .dma_mask = &ehci1_device.dev.coherent_dma_mask,
  427. .coherent_dma_mask = 0xffffffff,
  428. .platform_data = &ehcix_pdata,
  429. },
  430. .num_resources = ARRAY_SIZE(ehci1_resources),
  431. .resource = ehci1_resources,
  432. };
  433. static struct usb_ohci_pdata ohcix_pdata = {
  434. .power_on = usb_power_on,
  435. .power_off = usb_power_off,
  436. .power_suspend = usb_power_off,
  437. };
  438. static struct resource ohci0_resources[] = {
  439. [0] = {
  440. .start = 0xffe70400,
  441. .end = 0xffe70800 - 1,
  442. .flags = IORESOURCE_MEM,
  443. },
  444. [1] = {
  445. .start = gic_iid(0x4c),
  446. .flags = IORESOURCE_IRQ,
  447. },
  448. };
  449. static struct platform_device ohci0_device = {
  450. .name = "ohci-platform",
  451. .id = 0,
  452. .dev = {
  453. .dma_mask = &ohci0_device.dev.coherent_dma_mask,
  454. .coherent_dma_mask = 0xffffffff,
  455. .platform_data = &ohcix_pdata,
  456. },
  457. .num_resources = ARRAY_SIZE(ohci0_resources),
  458. .resource = ohci0_resources,
  459. };
  460. static struct resource ohci1_resources[] = {
  461. [0] = {
  462. .start = 0xfff70400,
  463. .end = 0xfff70800 - 1,
  464. .flags = IORESOURCE_MEM,
  465. },
  466. [1] = {
  467. .start = gic_iid(0x4d),
  468. .flags = IORESOURCE_IRQ,
  469. },
  470. };
  471. static struct platform_device ohci1_device = {
  472. .name = "ohci-platform",
  473. .id = 1,
  474. .dev = {
  475. .dma_mask = &ohci1_device.dev.coherent_dma_mask,
  476. .coherent_dma_mask = 0xffffffff,
  477. .platform_data = &ohcix_pdata,
  478. },
  479. .num_resources = ARRAY_SIZE(ohci1_resources),
  480. .resource = ohci1_resources,
  481. };
  482. /* Ether */
  483. static struct resource ether_resources[] = {
  484. {
  485. .start = 0xfde00000,
  486. .end = 0xfde003ff,
  487. .flags = IORESOURCE_MEM,
  488. }, {
  489. .start = gic_iid(0xb4),
  490. .flags = IORESOURCE_IRQ,
  491. },
  492. };
  493. static struct platform_device *r8a7779_devices_dt[] __initdata = {
  494. &scif0_device,
  495. &scif1_device,
  496. &scif2_device,
  497. &scif3_device,
  498. &scif4_device,
  499. &scif5_device,
  500. &tmu00_device,
  501. &tmu01_device,
  502. };
  503. static struct platform_device *r8a7779_standard_devices[] __initdata = {
  504. &i2c0_device,
  505. &i2c1_device,
  506. &i2c2_device,
  507. &i2c3_device,
  508. &sata_device,
  509. };
  510. void __init r8a7779_add_standard_devices(void)
  511. {
  512. #ifdef CONFIG_CACHE_L2X0
  513. /* Early BRESP enable, Shared attribute override enable, 64K*16way */
  514. l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff);
  515. #endif
  516. r8a7779_pm_init();
  517. r8a7779_init_pm_domains();
  518. platform_add_devices(r8a7779_devices_dt,
  519. ARRAY_SIZE(r8a7779_devices_dt));
  520. platform_add_devices(r8a7779_standard_devices,
  521. ARRAY_SIZE(r8a7779_standard_devices));
  522. }
  523. void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
  524. {
  525. platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
  526. ether_resources,
  527. ARRAY_SIZE(ether_resources),
  528. pdata, sizeof(*pdata));
  529. }
  530. /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
  531. void __init __weak r8a7779_register_twd(void) { }
  532. void __init r8a7779_earlytimer_init(void)
  533. {
  534. r8a7779_clock_init();
  535. shmobile_earlytimer_init();
  536. r8a7779_register_twd();
  537. }
  538. void __init r8a7779_add_early_devices(void)
  539. {
  540. early_platform_add_devices(r8a7779_devices_dt,
  541. ARRAY_SIZE(r8a7779_devices_dt));
  542. /* Early serial console setup is not included here due to
  543. * memory map collisions. The SCIF serial ports in r8a7779
  544. * are difficult to entity map 1:1 due to collision with the
  545. * virtual memory range used by the coherent DMA code on ARM.
  546. *
  547. * Anyone wanting to debug early can remove UPF_IOREMAP from
  548. * the sh-sci serial console platform data, adjust mapbase
  549. * to a static M:N virt:phys mapping that needs to be added to
  550. * the mappings passed with iotable_init() above.
  551. *
  552. * Then add a call to shmobile_setup_console() from this function.
  553. *
  554. * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
  555. * command line in case of the marzen board.
  556. */
  557. }
  558. static struct platform_device *r8a7779_late_devices[] __initdata = {
  559. &ehci0_device,
  560. &ehci1_device,
  561. &ohci0_device,
  562. &ohci1_device,
  563. };
  564. void __init r8a7779_init_late(void)
  565. {
  566. /* get USB PHY */
  567. phy = usb_get_phy(USB_PHY_TYPE_USB2);
  568. shmobile_init_late();
  569. platform_add_devices(r8a7779_late_devices,
  570. ARRAY_SIZE(r8a7779_late_devices));
  571. }
  572. #ifdef CONFIG_USE_OF
  573. void __init r8a7779_init_delay(void)
  574. {
  575. shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
  576. }
  577. void __init r8a7779_add_standard_devices_dt(void)
  578. {
  579. /* clocks are setup late during boot in the case of DT */
  580. r8a7779_clock_init();
  581. platform_add_devices(r8a7779_devices_dt,
  582. ARRAY_SIZE(r8a7779_devices_dt));
  583. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  584. }
  585. static const char *r8a7779_compat_dt[] __initdata = {
  586. "renesas,r8a7779",
  587. NULL,
  588. };
  589. DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
  590. .map_io = r8a7779_map_io,
  591. .init_early = r8a7779_init_delay,
  592. .nr_irqs = NR_IRQS_LEGACY,
  593. .init_irq = r8a7779_init_irq_dt,
  594. .init_machine = r8a7779_add_standard_devices_dt,
  595. .init_late = r8a7779_init_late,
  596. .dt_compat = r8a7779_compat_dt,
  597. MACHINE_END
  598. #endif /* CONFIG_USE_OF */