am33xx.dtsi 15 KB

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  1. /*
  2. * Device Tree Source for AM33XX SoC
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. #include <dt-bindings/gpio/gpio.h>
  11. #include <dt-bindings/pinctrl/am33xx.h>
  12. #include "skeleton.dtsi"
  13. / {
  14. compatible = "ti,am33xx";
  15. interrupt-parent = <&intc>;
  16. aliases {
  17. serial0 = &uart0;
  18. serial1 = &uart1;
  19. serial2 = &uart2;
  20. serial3 = &uart3;
  21. serial4 = &uart4;
  22. serial5 = &uart5;
  23. d_can0 = &dcan0;
  24. d_can1 = &dcan1;
  25. usb0 = &usb0;
  26. usb1 = &usb1;
  27. phy0 = &usb0_phy;
  28. phy1 = &usb1_phy;
  29. };
  30. cpus {
  31. #address-cells = <1>;
  32. #size-cells = <0>;
  33. cpu@0 {
  34. compatible = "arm,cortex-a8";
  35. device_type = "cpu";
  36. reg = <0>;
  37. /*
  38. * To consider voltage drop between PMIC and SoC,
  39. * tolerance value is reduced to 2% from 4% and
  40. * voltage value is increased as a precaution.
  41. */
  42. operating-points = <
  43. /* kHz uV */
  44. 720000 1285000
  45. 600000 1225000
  46. 500000 1125000
  47. 275000 1125000
  48. >;
  49. voltage-tolerance = <2>; /* 2 percentage */
  50. clock-latency = <300000>; /* From omap-cpufreq driver */
  51. };
  52. };
  53. pmu {
  54. compatible = "arm,cortex-a8-pmu";
  55. interrupts = <3>;
  56. };
  57. /*
  58. * The soc node represents the soc top level view. It is uses for IPs
  59. * that are not memory mapped in the MPU view or for the MPU itself.
  60. */
  61. soc {
  62. compatible = "ti,omap-infra";
  63. mpu {
  64. compatible = "ti,omap3-mpu";
  65. ti,hwmods = "mpu";
  66. };
  67. };
  68. am33xx_pinmux: pinmux@44e10800 {
  69. compatible = "pinctrl-single";
  70. reg = <0x44e10800 0x0238>;
  71. #address-cells = <1>;
  72. #size-cells = <0>;
  73. pinctrl-single,register-width = <32>;
  74. pinctrl-single,function-mask = <0x7f>;
  75. };
  76. /*
  77. * XXX: Use a flat representation of the AM33XX interconnect.
  78. * The real AM33XX interconnect network is quite complex.Since
  79. * that will not bring real advantage to represent that in DT
  80. * for the moment, just use a fake OCP bus entry to represent
  81. * the whole bus hierarchy.
  82. */
  83. ocp {
  84. compatible = "simple-bus";
  85. #address-cells = <1>;
  86. #size-cells = <1>;
  87. ranges;
  88. ti,hwmods = "l3_main";
  89. intc: interrupt-controller@48200000 {
  90. compatible = "ti,omap2-intc";
  91. interrupt-controller;
  92. #interrupt-cells = <1>;
  93. ti,intc-size = <128>;
  94. reg = <0x48200000 0x1000>;
  95. };
  96. gpio0: gpio@44e07000 {
  97. compatible = "ti,omap4-gpio";
  98. ti,hwmods = "gpio1";
  99. gpio-controller;
  100. #gpio-cells = <2>;
  101. interrupt-controller;
  102. #interrupt-cells = <1>;
  103. reg = <0x44e07000 0x1000>;
  104. interrupts = <96>;
  105. };
  106. gpio1: gpio@4804c000 {
  107. compatible = "ti,omap4-gpio";
  108. ti,hwmods = "gpio2";
  109. gpio-controller;
  110. #gpio-cells = <2>;
  111. interrupt-controller;
  112. #interrupt-cells = <1>;
  113. reg = <0x4804c000 0x1000>;
  114. interrupts = <98>;
  115. };
  116. gpio2: gpio@481ac000 {
  117. compatible = "ti,omap4-gpio";
  118. ti,hwmods = "gpio3";
  119. gpio-controller;
  120. #gpio-cells = <2>;
  121. interrupt-controller;
  122. #interrupt-cells = <1>;
  123. reg = <0x481ac000 0x1000>;
  124. interrupts = <32>;
  125. };
  126. gpio3: gpio@481ae000 {
  127. compatible = "ti,omap4-gpio";
  128. ti,hwmods = "gpio4";
  129. gpio-controller;
  130. #gpio-cells = <2>;
  131. interrupt-controller;
  132. #interrupt-cells = <1>;
  133. reg = <0x481ae000 0x1000>;
  134. interrupts = <62>;
  135. };
  136. uart0: serial@44e09000 {
  137. compatible = "ti,omap3-uart";
  138. ti,hwmods = "uart1";
  139. clock-frequency = <48000000>;
  140. reg = <0x44e09000 0x2000>;
  141. interrupts = <72>;
  142. status = "disabled";
  143. };
  144. uart1: serial@48022000 {
  145. compatible = "ti,omap3-uart";
  146. ti,hwmods = "uart2";
  147. clock-frequency = <48000000>;
  148. reg = <0x48022000 0x2000>;
  149. interrupts = <73>;
  150. status = "disabled";
  151. };
  152. uart2: serial@48024000 {
  153. compatible = "ti,omap3-uart";
  154. ti,hwmods = "uart3";
  155. clock-frequency = <48000000>;
  156. reg = <0x48024000 0x2000>;
  157. interrupts = <74>;
  158. status = "disabled";
  159. };
  160. uart3: serial@481a6000 {
  161. compatible = "ti,omap3-uart";
  162. ti,hwmods = "uart4";
  163. clock-frequency = <48000000>;
  164. reg = <0x481a6000 0x2000>;
  165. interrupts = <44>;
  166. status = "disabled";
  167. };
  168. uart4: serial@481a8000 {
  169. compatible = "ti,omap3-uart";
  170. ti,hwmods = "uart5";
  171. clock-frequency = <48000000>;
  172. reg = <0x481a8000 0x2000>;
  173. interrupts = <45>;
  174. status = "disabled";
  175. };
  176. uart5: serial@481aa000 {
  177. compatible = "ti,omap3-uart";
  178. ti,hwmods = "uart6";
  179. clock-frequency = <48000000>;
  180. reg = <0x481aa000 0x2000>;
  181. interrupts = <46>;
  182. status = "disabled";
  183. };
  184. i2c0: i2c@44e0b000 {
  185. compatible = "ti,omap4-i2c";
  186. #address-cells = <1>;
  187. #size-cells = <0>;
  188. ti,hwmods = "i2c1";
  189. reg = <0x44e0b000 0x1000>;
  190. interrupts = <70>;
  191. status = "disabled";
  192. };
  193. i2c1: i2c@4802a000 {
  194. compatible = "ti,omap4-i2c";
  195. #address-cells = <1>;
  196. #size-cells = <0>;
  197. ti,hwmods = "i2c2";
  198. reg = <0x4802a000 0x1000>;
  199. interrupts = <71>;
  200. status = "disabled";
  201. };
  202. i2c2: i2c@4819c000 {
  203. compatible = "ti,omap4-i2c";
  204. #address-cells = <1>;
  205. #size-cells = <0>;
  206. ti,hwmods = "i2c3";
  207. reg = <0x4819c000 0x1000>;
  208. interrupts = <30>;
  209. status = "disabled";
  210. };
  211. wdt2: wdt@44e35000 {
  212. compatible = "ti,omap3-wdt";
  213. ti,hwmods = "wd_timer2";
  214. reg = <0x44e35000 0x1000>;
  215. interrupts = <91>;
  216. };
  217. dcan0: d_can@481cc000 {
  218. compatible = "bosch,d_can";
  219. ti,hwmods = "d_can0";
  220. reg = <0x481cc000 0x2000
  221. 0x44e10644 0x4>;
  222. interrupts = <52>;
  223. status = "disabled";
  224. };
  225. dcan1: d_can@481d0000 {
  226. compatible = "bosch,d_can";
  227. ti,hwmods = "d_can1";
  228. reg = <0x481d0000 0x2000
  229. 0x44e10644 0x4>;
  230. interrupts = <55>;
  231. status = "disabled";
  232. };
  233. timer1: timer@44e31000 {
  234. compatible = "ti,am335x-timer-1ms";
  235. reg = <0x44e31000 0x400>;
  236. interrupts = <67>;
  237. ti,hwmods = "timer1";
  238. ti,timer-alwon;
  239. };
  240. timer2: timer@48040000 {
  241. compatible = "ti,am335x-timer";
  242. reg = <0x48040000 0x400>;
  243. interrupts = <68>;
  244. ti,hwmods = "timer2";
  245. };
  246. timer3: timer@48042000 {
  247. compatible = "ti,am335x-timer";
  248. reg = <0x48042000 0x400>;
  249. interrupts = <69>;
  250. ti,hwmods = "timer3";
  251. };
  252. timer4: timer@48044000 {
  253. compatible = "ti,am335x-timer";
  254. reg = <0x48044000 0x400>;
  255. interrupts = <92>;
  256. ti,hwmods = "timer4";
  257. ti,timer-pwm;
  258. };
  259. timer5: timer@48046000 {
  260. compatible = "ti,am335x-timer";
  261. reg = <0x48046000 0x400>;
  262. interrupts = <93>;
  263. ti,hwmods = "timer5";
  264. ti,timer-pwm;
  265. };
  266. timer6: timer@48048000 {
  267. compatible = "ti,am335x-timer";
  268. reg = <0x48048000 0x400>;
  269. interrupts = <94>;
  270. ti,hwmods = "timer6";
  271. ti,timer-pwm;
  272. };
  273. timer7: timer@4804a000 {
  274. compatible = "ti,am335x-timer";
  275. reg = <0x4804a000 0x400>;
  276. interrupts = <95>;
  277. ti,hwmods = "timer7";
  278. ti,timer-pwm;
  279. };
  280. rtc@44e3e000 {
  281. compatible = "ti,da830-rtc";
  282. reg = <0x44e3e000 0x1000>;
  283. interrupts = <75
  284. 76>;
  285. ti,hwmods = "rtc";
  286. };
  287. spi0: spi@48030000 {
  288. compatible = "ti,omap4-mcspi";
  289. #address-cells = <1>;
  290. #size-cells = <0>;
  291. reg = <0x48030000 0x400>;
  292. interrupts = <65>;
  293. ti,spi-num-cs = <2>;
  294. ti,hwmods = "spi0";
  295. status = "disabled";
  296. };
  297. spi1: spi@481a0000 {
  298. compatible = "ti,omap4-mcspi";
  299. #address-cells = <1>;
  300. #size-cells = <0>;
  301. reg = <0x481a0000 0x400>;
  302. interrupts = <125>;
  303. ti,spi-num-cs = <2>;
  304. ti,hwmods = "spi1";
  305. status = "disabled";
  306. };
  307. usb: usb@47400000 {
  308. compatible = "ti,am33xx-usb";
  309. reg = <0x47400000 0x1000>;
  310. ranges;
  311. #address-cells = <1>;
  312. #size-cells = <1>;
  313. ti,hwmods = "usb_otg_hs";
  314. status = "disabled";
  315. ctrl_mod: control@44e10000 {
  316. compatible = "ti,am335x-usb-ctrl-module";
  317. reg = <0x44e10620 0x10
  318. 0x44e10648 0x4>;
  319. reg-names = "phy_ctrl", "wakeup";
  320. status = "disabled";
  321. };
  322. usb0_phy: usb-phy@47401300 {
  323. compatible = "ti,am335x-usb-phy";
  324. reg = <0x47401300 0x100>;
  325. reg-names = "phy";
  326. status = "disabled";
  327. ti,ctrl_mod = <&ctrl_mod>;
  328. };
  329. usb0: usb@47401000 {
  330. compatible = "ti,musb-am33xx";
  331. status = "disabled";
  332. reg = <0x47401400 0x400
  333. 0x47401000 0x200>;
  334. reg-names = "mc", "control";
  335. interrupts = <18>;
  336. interrupt-names = "mc";
  337. dr_mode = "otg";
  338. mentor,multipoint = <1>;
  339. mentor,num-eps = <16>;
  340. mentor,ram-bits = <12>;
  341. mentor,power = <500>;
  342. phys = <&usb0_phy>;
  343. dmas = <&cppi41dma 0 0 &cppi41dma 1 0
  344. &cppi41dma 2 0 &cppi41dma 3 0
  345. &cppi41dma 4 0 &cppi41dma 5 0
  346. &cppi41dma 6 0 &cppi41dma 7 0
  347. &cppi41dma 8 0 &cppi41dma 9 0
  348. &cppi41dma 10 0 &cppi41dma 11 0
  349. &cppi41dma 12 0 &cppi41dma 13 0
  350. &cppi41dma 14 0 &cppi41dma 0 1
  351. &cppi41dma 1 1 &cppi41dma 2 1
  352. &cppi41dma 3 1 &cppi41dma 4 1
  353. &cppi41dma 5 1 &cppi41dma 6 1
  354. &cppi41dma 7 1 &cppi41dma 8 1
  355. &cppi41dma 9 1 &cppi41dma 10 1
  356. &cppi41dma 11 1 &cppi41dma 12 1
  357. &cppi41dma 13 1 &cppi41dma 14 1>;
  358. dma-names =
  359. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  360. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  361. "rx14", "rx15",
  362. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  363. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  364. "tx14", "tx15";
  365. };
  366. usb1_phy: usb-phy@47401b00 {
  367. compatible = "ti,am335x-usb-phy";
  368. reg = <0x47401b00 0x100>;
  369. reg-names = "phy";
  370. status = "disabled";
  371. ti,ctrl_mod = <&ctrl_mod>;
  372. };
  373. usb1: usb@47401800 {
  374. compatible = "ti,musb-am33xx";
  375. status = "disabled";
  376. reg = <0x47401c00 0x400
  377. 0x47401800 0x200>;
  378. reg-names = "mc", "control";
  379. interrupts = <19>;
  380. interrupt-names = "mc";
  381. dr_mode = "otg";
  382. mentor,multipoint = <1>;
  383. mentor,num-eps = <16>;
  384. mentor,ram-bits = <12>;
  385. mentor,power = <500>;
  386. phys = <&usb1_phy>;
  387. dmas = <&cppi41dma 15 0 &cppi41dma 16 0
  388. &cppi41dma 17 0 &cppi41dma 18 0
  389. &cppi41dma 19 0 &cppi41dma 20 0
  390. &cppi41dma 21 0 &cppi41dma 22 0
  391. &cppi41dma 23 0 &cppi41dma 24 0
  392. &cppi41dma 25 0 &cppi41dma 26 0
  393. &cppi41dma 27 0 &cppi41dma 28 0
  394. &cppi41dma 29 0 &cppi41dma 15 1
  395. &cppi41dma 16 1 &cppi41dma 17 1
  396. &cppi41dma 18 1 &cppi41dma 19 1
  397. &cppi41dma 20 1 &cppi41dma 21 1
  398. &cppi41dma 22 1 &cppi41dma 23 1
  399. &cppi41dma 24 1 &cppi41dma 25 1
  400. &cppi41dma 26 1 &cppi41dma 27 1
  401. &cppi41dma 28 1 &cppi41dma 29 1>;
  402. dma-names =
  403. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  404. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  405. "rx14", "rx15",
  406. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  407. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  408. "tx14", "tx15";
  409. };
  410. cppi41dma: dma-controller@07402000 {
  411. compatible = "ti,am3359-cppi41";
  412. reg = <0x47400000 0x1000
  413. 0x47402000 0x1000
  414. 0x47403000 0x1000
  415. 0x47404000 0x4000>;
  416. reg-names = "glue", "controller", "scheduler", "queuemgr";
  417. interrupts = <17>;
  418. interrupt-names = "glue";
  419. #dma-cells = <2>;
  420. #dma-channels = <30>;
  421. #dma-requests = <256>;
  422. status = "disabled";
  423. };
  424. };
  425. epwmss0: epwmss@48300000 {
  426. compatible = "ti,am33xx-pwmss";
  427. reg = <0x48300000 0x10>;
  428. ti,hwmods = "epwmss0";
  429. #address-cells = <1>;
  430. #size-cells = <1>;
  431. status = "disabled";
  432. ranges = <0x48300100 0x48300100 0x80 /* ECAP */
  433. 0x48300180 0x48300180 0x80 /* EQEP */
  434. 0x48300200 0x48300200 0x80>; /* EHRPWM */
  435. ecap0: ecap@48300100 {
  436. compatible = "ti,am33xx-ecap";
  437. #pwm-cells = <3>;
  438. reg = <0x48300100 0x80>;
  439. ti,hwmods = "ecap0";
  440. status = "disabled";
  441. };
  442. ehrpwm0: ehrpwm@48300200 {
  443. compatible = "ti,am33xx-ehrpwm";
  444. #pwm-cells = <3>;
  445. reg = <0x48300200 0x80>;
  446. ti,hwmods = "ehrpwm0";
  447. status = "disabled";
  448. };
  449. };
  450. epwmss1: epwmss@48302000 {
  451. compatible = "ti,am33xx-pwmss";
  452. reg = <0x48302000 0x10>;
  453. ti,hwmods = "epwmss1";
  454. #address-cells = <1>;
  455. #size-cells = <1>;
  456. status = "disabled";
  457. ranges = <0x48302100 0x48302100 0x80 /* ECAP */
  458. 0x48302180 0x48302180 0x80 /* EQEP */
  459. 0x48302200 0x48302200 0x80>; /* EHRPWM */
  460. ecap1: ecap@48302100 {
  461. compatible = "ti,am33xx-ecap";
  462. #pwm-cells = <3>;
  463. reg = <0x48302100 0x80>;
  464. ti,hwmods = "ecap1";
  465. status = "disabled";
  466. };
  467. ehrpwm1: ehrpwm@48302200 {
  468. compatible = "ti,am33xx-ehrpwm";
  469. #pwm-cells = <3>;
  470. reg = <0x48302200 0x80>;
  471. ti,hwmods = "ehrpwm1";
  472. status = "disabled";
  473. };
  474. };
  475. epwmss2: epwmss@48304000 {
  476. compatible = "ti,am33xx-pwmss";
  477. reg = <0x48304000 0x10>;
  478. ti,hwmods = "epwmss2";
  479. #address-cells = <1>;
  480. #size-cells = <1>;
  481. status = "disabled";
  482. ranges = <0x48304100 0x48304100 0x80 /* ECAP */
  483. 0x48304180 0x48304180 0x80 /* EQEP */
  484. 0x48304200 0x48304200 0x80>; /* EHRPWM */
  485. ecap2: ecap@48304100 {
  486. compatible = "ti,am33xx-ecap";
  487. #pwm-cells = <3>;
  488. reg = <0x48304100 0x80>;
  489. ti,hwmods = "ecap2";
  490. status = "disabled";
  491. };
  492. ehrpwm2: ehrpwm@48304200 {
  493. compatible = "ti,am33xx-ehrpwm";
  494. #pwm-cells = <3>;
  495. reg = <0x48304200 0x80>;
  496. ti,hwmods = "ehrpwm2";
  497. status = "disabled";
  498. };
  499. };
  500. mac: ethernet@4a100000 {
  501. compatible = "ti,cpsw";
  502. ti,hwmods = "cpgmac0";
  503. cpdma_channels = <8>;
  504. ale_entries = <1024>;
  505. bd_ram_size = <0x2000>;
  506. no_bd_ram = <0>;
  507. rx_descs = <64>;
  508. mac_control = <0x20>;
  509. slaves = <2>;
  510. active_slave = <0>;
  511. cpts_clock_mult = <0x80000000>;
  512. cpts_clock_shift = <29>;
  513. reg = <0x4a100000 0x800
  514. 0x4a101200 0x100>;
  515. #address-cells = <1>;
  516. #size-cells = <1>;
  517. interrupt-parent = <&intc>;
  518. /*
  519. * c0_rx_thresh_pend
  520. * c0_rx_pend
  521. * c0_tx_pend
  522. * c0_misc_pend
  523. */
  524. interrupts = <40 41 42 43>;
  525. ranges;
  526. davinci_mdio: mdio@4a101000 {
  527. compatible = "ti,davinci_mdio";
  528. #address-cells = <1>;
  529. #size-cells = <0>;
  530. ti,hwmods = "davinci_mdio";
  531. bus_freq = <1000000>;
  532. reg = <0x4a101000 0x100>;
  533. };
  534. cpsw_emac0: slave@4a100200 {
  535. /* Filled in by U-Boot */
  536. mac-address = [ 00 00 00 00 00 00 ];
  537. };
  538. cpsw_emac1: slave@4a100300 {
  539. /* Filled in by U-Boot */
  540. mac-address = [ 00 00 00 00 00 00 ];
  541. };
  542. };
  543. ocmcram: ocmcram@40300000 {
  544. compatible = "ti,am3352-ocmcram";
  545. reg = <0x40300000 0x10000>;
  546. ti,hwmods = "ocmcram";
  547. };
  548. wkup_m3: wkup_m3@44d00000 {
  549. compatible = "ti,am3353-wkup-m3";
  550. reg = <0x44d00000 0x4000 /* M3 UMEM */
  551. 0x44d80000 0x2000>; /* M3 DMEM */
  552. ti,hwmods = "wkup_m3";
  553. };
  554. elm: elm@48080000 {
  555. compatible = "ti,am3352-elm";
  556. reg = <0x48080000 0x2000>;
  557. interrupts = <4>;
  558. ti,hwmods = "elm";
  559. status = "disabled";
  560. };
  561. tscadc: tscadc@44e0d000 {
  562. compatible = "ti,am3359-tscadc";
  563. reg = <0x44e0d000 0x1000>;
  564. interrupt-parent = <&intc>;
  565. interrupts = <16>;
  566. ti,hwmods = "adc_tsc";
  567. status = "disabled";
  568. tsc {
  569. compatible = "ti,am3359-tsc";
  570. };
  571. am335x_adc: adc {
  572. #io-channel-cells = <1>;
  573. compatible = "ti,am3359-adc";
  574. };
  575. };
  576. gpmc: gpmc@50000000 {
  577. compatible = "ti,am3352-gpmc";
  578. ti,hwmods = "gpmc";
  579. reg = <0x50000000 0x2000>;
  580. interrupts = <100>;
  581. gpmc,num-cs = <7>;
  582. gpmc,num-waitpins = <2>;
  583. #address-cells = <2>;
  584. #size-cells = <1>;
  585. status = "disabled";
  586. };
  587. };
  588. };