ice1724.c 76 KB

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  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <linux/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/pci.h>
  29. #include <linux/slab.h>
  30. #include <linux/moduleparam.h>
  31. #include <linux/mutex.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/rawmidi.h>
  35. #include <sound/initval.h>
  36. #include <sound/asoundef.h>
  37. #include "ice1712.h"
  38. #include "envy24ht.h"
  39. /* lowlevel routines */
  40. #include "amp.h"
  41. #include "revo.h"
  42. #include "aureon.h"
  43. #include "vt1720_mobo.h"
  44. #include "pontis.h"
  45. #include "prodigy192.h"
  46. #include "prodigy_hifi.h"
  47. #include "juli.h"
  48. #include "maya44.h"
  49. #include "phase.h"
  50. #include "wtm.h"
  51. #include "se.h"
  52. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  53. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  54. MODULE_LICENSE("GPL");
  55. MODULE_SUPPORTED_DEVICE("{"
  56. REVO_DEVICE_DESC
  57. AMP_AUDIO2000_DEVICE_DESC
  58. AUREON_DEVICE_DESC
  59. VT1720_MOBO_DEVICE_DESC
  60. PONTIS_DEVICE_DESC
  61. PRODIGY192_DEVICE_DESC
  62. PRODIGY_HIFI_DEVICE_DESC
  63. JULI_DEVICE_DESC
  64. MAYA44_DEVICE_DESC
  65. PHASE_DEVICE_DESC
  66. WTM_DEVICE_DESC
  67. SE_DEVICE_DESC
  68. "{VIA,VT1720},"
  69. "{VIA,VT1724},"
  70. "{ICEnsemble,Generic ICE1724},"
  71. "{ICEnsemble,Generic Envy24HT}"
  72. "{ICEnsemble,Generic Envy24PT}}");
  73. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  74. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  75. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  76. static char *model[SNDRV_CARDS];
  77. module_param_array(index, int, NULL, 0444);
  78. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  79. module_param_array(id, charp, NULL, 0444);
  80. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  81. module_param_array(enable, bool, NULL, 0444);
  82. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  83. module_param_array(model, charp, NULL, 0444);
  84. MODULE_PARM_DESC(model, "Use the given board model.");
  85. /* Both VT1720 and VT1724 have the same PCI IDs */
  86. static const struct pci_device_id snd_vt1724_ids[] = {
  87. { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 },
  88. { 0, }
  89. };
  90. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  91. static int PRO_RATE_LOCKED;
  92. static int PRO_RATE_RESET = 1;
  93. static unsigned int PRO_RATE_DEFAULT = 44100;
  94. /*
  95. * Basic I/O
  96. */
  97. /*
  98. * default rates, default clock routines
  99. */
  100. /* check whether the clock mode is spdif-in */
  101. static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
  102. {
  103. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  104. }
  105. /*
  106. * locking rate makes sense only for internal clock mode
  107. */
  108. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  109. {
  110. return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED;
  111. }
  112. /*
  113. * ac97 section
  114. */
  115. static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
  116. {
  117. unsigned char old_cmd;
  118. int tm;
  119. for (tm = 0; tm < 0x10000; tm++) {
  120. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  121. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  122. continue;
  123. if (!(old_cmd & VT1724_AC97_READY))
  124. continue;
  125. return old_cmd;
  126. }
  127. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  128. return old_cmd;
  129. }
  130. static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
  131. {
  132. int tm;
  133. for (tm = 0; tm < 0x10000; tm++)
  134. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  135. return 0;
  136. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  137. return -EIO;
  138. }
  139. static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
  140. unsigned short reg,
  141. unsigned short val)
  142. {
  143. struct snd_ice1712 *ice = ac97->private_data;
  144. unsigned char old_cmd;
  145. old_cmd = snd_vt1724_ac97_ready(ice);
  146. old_cmd &= ~VT1724_AC97_ID_MASK;
  147. old_cmd |= ac97->num;
  148. outb(reg, ICEMT1724(ice, AC97_INDEX));
  149. outw(val, ICEMT1724(ice, AC97_DATA));
  150. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  151. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  152. }
  153. static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  154. {
  155. struct snd_ice1712 *ice = ac97->private_data;
  156. unsigned char old_cmd;
  157. old_cmd = snd_vt1724_ac97_ready(ice);
  158. old_cmd &= ~VT1724_AC97_ID_MASK;
  159. old_cmd |= ac97->num;
  160. outb(reg, ICEMT1724(ice, AC97_INDEX));
  161. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  162. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  163. return ~0;
  164. return inw(ICEMT1724(ice, AC97_DATA));
  165. }
  166. /*
  167. * GPIO operations
  168. */
  169. /* set gpio direction 0 = read, 1 = write */
  170. static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  171. {
  172. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  173. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  174. }
  175. /* get gpio direction 0 = read, 1 = write */
  176. static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice)
  177. {
  178. return inl(ICEREG1724(ice, GPIO_DIRECTION));
  179. }
  180. /* set the gpio mask (0 = writable) */
  181. static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  182. {
  183. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  184. if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  185. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  186. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  187. }
  188. static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice)
  189. {
  190. unsigned int mask;
  191. if (!ice->vt1720)
  192. mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22));
  193. else
  194. mask = 0;
  195. mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK));
  196. return mask;
  197. }
  198. static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
  199. {
  200. outw(data, ICEREG1724(ice, GPIO_DATA));
  201. if (!ice->vt1720)
  202. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  203. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  204. }
  205. static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
  206. {
  207. unsigned int data;
  208. if (!ice->vt1720)
  209. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  210. else
  211. data = 0;
  212. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  213. return data;
  214. }
  215. /*
  216. * MIDI
  217. */
  218. static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
  219. {
  220. unsigned int count;
  221. for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
  222. inb(ICEREG1724(ice, MPU_DATA));
  223. }
  224. static inline struct snd_rawmidi_substream *
  225. get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
  226. {
  227. return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
  228. struct snd_rawmidi_substream, list);
  229. }
  230. static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable);
  231. static void vt1724_midi_write(struct snd_ice1712 *ice)
  232. {
  233. struct snd_rawmidi_substream *s;
  234. int count, i;
  235. u8 buffer[32];
  236. s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
  237. count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
  238. if (count > 0) {
  239. count = snd_rawmidi_transmit(s, buffer, count);
  240. for (i = 0; i < count; ++i)
  241. outb(buffer[i], ICEREG1724(ice, MPU_DATA));
  242. }
  243. /* mask irq when all bytes have been transmitted.
  244. * enabled again in output_trigger when the new data comes in.
  245. */
  246. enable_midi_irq(ice, VT1724_IRQ_MPU_TX,
  247. !snd_rawmidi_transmit_empty(s));
  248. }
  249. static void vt1724_midi_read(struct snd_ice1712 *ice)
  250. {
  251. struct snd_rawmidi_substream *s;
  252. int count, i;
  253. u8 buffer[32];
  254. s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
  255. count = inb(ICEREG1724(ice, MPU_RXFIFO));
  256. if (count > 0) {
  257. count = min(count, 32);
  258. for (i = 0; i < count; ++i)
  259. buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
  260. snd_rawmidi_receive(s, buffer, count);
  261. }
  262. }
  263. /* call with ice->reg_lock */
  264. static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable)
  265. {
  266. u8 mask = inb(ICEREG1724(ice, IRQMASK));
  267. if (enable)
  268. mask &= ~flag;
  269. else
  270. mask |= flag;
  271. outb(mask, ICEREG1724(ice, IRQMASK));
  272. }
  273. static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
  274. u8 flag, int enable)
  275. {
  276. struct snd_ice1712 *ice = substream->rmidi->private_data;
  277. spin_lock_irq(&ice->reg_lock);
  278. enable_midi_irq(ice, flag, enable);
  279. spin_unlock_irq(&ice->reg_lock);
  280. }
  281. static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
  282. {
  283. return 0;
  284. }
  285. static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
  286. {
  287. return 0;
  288. }
  289. static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
  290. {
  291. struct snd_ice1712 *ice = s->rmidi->private_data;
  292. unsigned long flags;
  293. spin_lock_irqsave(&ice->reg_lock, flags);
  294. if (up) {
  295. ice->midi_output = 1;
  296. vt1724_midi_write(ice);
  297. } else {
  298. ice->midi_output = 0;
  299. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  300. }
  301. spin_unlock_irqrestore(&ice->reg_lock, flags);
  302. }
  303. static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
  304. {
  305. struct snd_ice1712 *ice = s->rmidi->private_data;
  306. unsigned long timeout;
  307. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
  308. /* 32 bytes should be transmitted in less than about 12 ms */
  309. timeout = jiffies + msecs_to_jiffies(15);
  310. do {
  311. if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
  312. break;
  313. schedule_timeout_uninterruptible(1);
  314. } while (time_after(timeout, jiffies));
  315. }
  316. static struct snd_rawmidi_ops vt1724_midi_output_ops = {
  317. .open = vt1724_midi_output_open,
  318. .close = vt1724_midi_output_close,
  319. .trigger = vt1724_midi_output_trigger,
  320. .drain = vt1724_midi_output_drain,
  321. };
  322. static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
  323. {
  324. vt1724_midi_clear_rx(s->rmidi->private_data);
  325. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
  326. return 0;
  327. }
  328. static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
  329. {
  330. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
  331. return 0;
  332. }
  333. static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
  334. {
  335. struct snd_ice1712 *ice = s->rmidi->private_data;
  336. unsigned long flags;
  337. spin_lock_irqsave(&ice->reg_lock, flags);
  338. if (up) {
  339. ice->midi_input = 1;
  340. vt1724_midi_read(ice);
  341. } else {
  342. ice->midi_input = 0;
  343. }
  344. spin_unlock_irqrestore(&ice->reg_lock, flags);
  345. }
  346. static struct snd_rawmidi_ops vt1724_midi_input_ops = {
  347. .open = vt1724_midi_input_open,
  348. .close = vt1724_midi_input_close,
  349. .trigger = vt1724_midi_input_trigger,
  350. };
  351. /*
  352. * Interrupt handler
  353. */
  354. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
  355. {
  356. struct snd_ice1712 *ice = dev_id;
  357. unsigned char status;
  358. unsigned char status_mask =
  359. VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
  360. int handled = 0;
  361. int timeout = 0;
  362. while (1) {
  363. status = inb(ICEREG1724(ice, IRQSTAT));
  364. status &= status_mask;
  365. if (status == 0)
  366. break;
  367. spin_lock(&ice->reg_lock);
  368. if (++timeout > 10) {
  369. status = inb(ICEREG1724(ice, IRQSTAT));
  370. printk(KERN_ERR "ice1724: Too long irq loop, "
  371. "status = 0x%x\n", status);
  372. if (status & VT1724_IRQ_MPU_TX) {
  373. printk(KERN_ERR "ice1724: Disabling MPU_TX\n");
  374. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  375. }
  376. spin_unlock(&ice->reg_lock);
  377. break;
  378. }
  379. handled = 1;
  380. if (status & VT1724_IRQ_MPU_TX) {
  381. if (ice->midi_output)
  382. vt1724_midi_write(ice);
  383. else
  384. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  385. /* Due to mysterical reasons, MPU_TX is always
  386. * generated (and can't be cleared) when a PCM
  387. * playback is going. So let's ignore at the
  388. * next loop.
  389. */
  390. status_mask &= ~VT1724_IRQ_MPU_TX;
  391. }
  392. if (status & VT1724_IRQ_MPU_RX) {
  393. if (ice->midi_input)
  394. vt1724_midi_read(ice);
  395. else
  396. vt1724_midi_clear_rx(ice);
  397. }
  398. /* ack MPU irq */
  399. outb(status, ICEREG1724(ice, IRQSTAT));
  400. spin_unlock(&ice->reg_lock);
  401. if (status & VT1724_IRQ_MTPCM) {
  402. /*
  403. * Multi-track PCM
  404. * PCM assignment are:
  405. * Playback DMA0 (M/C) = playback_pro_substream
  406. * Playback DMA1 = playback_con_substream_ds[0]
  407. * Playback DMA2 = playback_con_substream_ds[1]
  408. * Playback DMA3 = playback_con_substream_ds[2]
  409. * Playback DMA4 (SPDIF) = playback_con_substream
  410. * Record DMA0 = capture_pro_substream
  411. * Record DMA1 = capture_con_substream
  412. */
  413. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  414. if (mtstat & VT1724_MULTI_PDMA0) {
  415. if (ice->playback_pro_substream)
  416. snd_pcm_period_elapsed(ice->playback_pro_substream);
  417. }
  418. if (mtstat & VT1724_MULTI_RDMA0) {
  419. if (ice->capture_pro_substream)
  420. snd_pcm_period_elapsed(ice->capture_pro_substream);
  421. }
  422. if (mtstat & VT1724_MULTI_PDMA1) {
  423. if (ice->playback_con_substream_ds[0])
  424. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  425. }
  426. if (mtstat & VT1724_MULTI_PDMA2) {
  427. if (ice->playback_con_substream_ds[1])
  428. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  429. }
  430. if (mtstat & VT1724_MULTI_PDMA3) {
  431. if (ice->playback_con_substream_ds[2])
  432. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  433. }
  434. if (mtstat & VT1724_MULTI_PDMA4) {
  435. if (ice->playback_con_substream)
  436. snd_pcm_period_elapsed(ice->playback_con_substream);
  437. }
  438. if (mtstat & VT1724_MULTI_RDMA1) {
  439. if (ice->capture_con_substream)
  440. snd_pcm_period_elapsed(ice->capture_con_substream);
  441. }
  442. /* ack anyway to avoid freeze */
  443. outb(mtstat, ICEMT1724(ice, IRQ));
  444. /* ought to really handle this properly */
  445. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  446. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  447. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  448. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  449. /* If I don't do this, I get machine lockup due to continual interrupts */
  450. }
  451. }
  452. }
  453. return IRQ_RETVAL(handled);
  454. }
  455. /*
  456. * PCM code - professional part (multitrack)
  457. */
  458. static unsigned int rates[] = {
  459. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  460. 32000, 44100, 48000, 64000, 88200, 96000,
  461. 176400, 192000,
  462. };
  463. static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
  464. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  465. .list = rates,
  466. .mask = 0,
  467. };
  468. static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
  469. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  470. .list = rates,
  471. .mask = 0,
  472. };
  473. static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
  474. .count = ARRAY_SIZE(rates),
  475. .list = rates,
  476. .mask = 0,
  477. };
  478. struct vt1724_pcm_reg {
  479. unsigned int addr; /* ADDR register offset */
  480. unsigned int size; /* SIZE register offset */
  481. unsigned int count; /* COUNT register offset */
  482. unsigned int start; /* start & pause bit */
  483. };
  484. static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  485. {
  486. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  487. unsigned char what;
  488. unsigned char old;
  489. struct snd_pcm_substream *s;
  490. what = 0;
  491. snd_pcm_group_for_each_entry(s, substream) {
  492. if (snd_pcm_substream_chip(s) == ice) {
  493. const struct vt1724_pcm_reg *reg;
  494. reg = s->runtime->private_data;
  495. what |= reg->start;
  496. snd_pcm_trigger_done(s, substream);
  497. }
  498. }
  499. switch (cmd) {
  500. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  501. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  502. spin_lock(&ice->reg_lock);
  503. old = inb(ICEMT1724(ice, DMA_PAUSE));
  504. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  505. old |= what;
  506. else
  507. old &= ~what;
  508. outb(old, ICEMT1724(ice, DMA_PAUSE));
  509. spin_unlock(&ice->reg_lock);
  510. break;
  511. case SNDRV_PCM_TRIGGER_START:
  512. case SNDRV_PCM_TRIGGER_STOP:
  513. case SNDRV_PCM_TRIGGER_SUSPEND:
  514. spin_lock(&ice->reg_lock);
  515. old = inb(ICEMT1724(ice, DMA_CONTROL));
  516. if (cmd == SNDRV_PCM_TRIGGER_START)
  517. old |= what;
  518. else
  519. old &= ~what;
  520. outb(old, ICEMT1724(ice, DMA_CONTROL));
  521. spin_unlock(&ice->reg_lock);
  522. break;
  523. case SNDRV_PCM_TRIGGER_RESUME:
  524. /* apps will have to restart stream */
  525. break;
  526. default:
  527. return -EINVAL;
  528. }
  529. return 0;
  530. }
  531. /*
  532. */
  533. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  534. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  535. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  536. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  537. static const unsigned int stdclock_rate_list[16] = {
  538. 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
  539. 22050, 11025, 88200, 176400, 0, 192000, 64000
  540. };
  541. static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
  542. {
  543. unsigned int rate;
  544. rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
  545. return rate;
  546. }
  547. static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
  548. {
  549. int i;
  550. for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
  551. if (stdclock_rate_list[i] == rate) {
  552. outb(i, ICEMT1724(ice, RATE));
  553. return;
  554. }
  555. }
  556. }
  557. static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
  558. unsigned int rate)
  559. {
  560. unsigned char val, old;
  561. /* check MT02 */
  562. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  563. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  564. if (rate > 96000)
  565. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  566. else
  567. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  568. if (val != old) {
  569. outb(val, ICEMT1724(ice, I2S_FORMAT));
  570. /* master clock changed */
  571. return 1;
  572. }
  573. }
  574. /* no change in master clock */
  575. return 0;
  576. }
  577. static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
  578. int force)
  579. {
  580. unsigned long flags;
  581. unsigned char mclk_change;
  582. unsigned int i, old_rate;
  583. if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
  584. return -EINVAL;
  585. spin_lock_irqsave(&ice->reg_lock, flags);
  586. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  587. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  588. /* running? we cannot change the rate now... */
  589. spin_unlock_irqrestore(&ice->reg_lock, flags);
  590. return -EBUSY;
  591. }
  592. if (!force && is_pro_rate_locked(ice)) {
  593. /* comparing required and current rate - makes sense for
  594. * internal clock only */
  595. spin_unlock_irqrestore(&ice->reg_lock, flags);
  596. return (rate == ice->cur_rate) ? 0 : -EBUSY;
  597. }
  598. if (force || !ice->is_spdif_master(ice)) {
  599. /* force means the rate was switched by ucontrol, otherwise
  600. * setting clock rate for internal clock mode */
  601. old_rate = ice->get_rate(ice);
  602. if (force || (old_rate != rate))
  603. ice->set_rate(ice, rate);
  604. else if (rate == ice->cur_rate) {
  605. spin_unlock_irqrestore(&ice->reg_lock, flags);
  606. return 0;
  607. }
  608. }
  609. ice->cur_rate = rate;
  610. /* setting master clock */
  611. mclk_change = ice->set_mclk(ice, rate);
  612. spin_unlock_irqrestore(&ice->reg_lock, flags);
  613. if (mclk_change && ice->gpio.i2s_mclk_changed)
  614. ice->gpio.i2s_mclk_changed(ice);
  615. if (ice->gpio.set_pro_rate)
  616. ice->gpio.set_pro_rate(ice, rate);
  617. /* set up codecs */
  618. for (i = 0; i < ice->akm_codecs; i++) {
  619. if (ice->akm[i].ops.set_rate_val)
  620. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  621. }
  622. if (ice->spdif.ops.setup_rate)
  623. ice->spdif.ops.setup_rate(ice, rate);
  624. return 0;
  625. }
  626. static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
  627. struct snd_pcm_hw_params *hw_params)
  628. {
  629. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  630. int i, chs, err;
  631. chs = params_channels(hw_params);
  632. mutex_lock(&ice->open_mutex);
  633. /* mark surround channels */
  634. if (substream == ice->playback_pro_substream) {
  635. /* PDMA0 can be multi-channel up to 8 */
  636. chs = chs / 2 - 1;
  637. for (i = 0; i < chs; i++) {
  638. if (ice->pcm_reserved[i] &&
  639. ice->pcm_reserved[i] != substream) {
  640. mutex_unlock(&ice->open_mutex);
  641. return -EBUSY;
  642. }
  643. ice->pcm_reserved[i] = substream;
  644. }
  645. for (; i < 3; i++) {
  646. if (ice->pcm_reserved[i] == substream)
  647. ice->pcm_reserved[i] = NULL;
  648. }
  649. } else {
  650. for (i = 0; i < 3; i++) {
  651. /* check individual playback stream */
  652. if (ice->playback_con_substream_ds[i] == substream) {
  653. if (ice->pcm_reserved[i] &&
  654. ice->pcm_reserved[i] != substream) {
  655. mutex_unlock(&ice->open_mutex);
  656. return -EBUSY;
  657. }
  658. ice->pcm_reserved[i] = substream;
  659. break;
  660. }
  661. }
  662. }
  663. mutex_unlock(&ice->open_mutex);
  664. err = snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  665. if (err < 0)
  666. return err;
  667. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  668. }
  669. static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
  670. {
  671. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  672. int i;
  673. mutex_lock(&ice->open_mutex);
  674. /* unmark surround channels */
  675. for (i = 0; i < 3; i++)
  676. if (ice->pcm_reserved[i] == substream)
  677. ice->pcm_reserved[i] = NULL;
  678. mutex_unlock(&ice->open_mutex);
  679. return snd_pcm_lib_free_pages(substream);
  680. }
  681. static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
  682. {
  683. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  684. unsigned char val;
  685. unsigned int size;
  686. spin_lock_irq(&ice->reg_lock);
  687. val = (8 - substream->runtime->channels) >> 1;
  688. outb(val, ICEMT1724(ice, BURST));
  689. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  690. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  691. /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
  692. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  693. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  694. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  695. /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
  696. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  697. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  698. spin_unlock_irq(&ice->reg_lock);
  699. /*
  700. printk(KERN_DEBUG "pro prepare: ch = %d, addr = 0x%x, "
  701. "buffer = 0x%x, period = 0x%x\n",
  702. substream->runtime->channels,
  703. (unsigned int)substream->runtime->dma_addr,
  704. snd_pcm_lib_buffer_bytes(substream),
  705. snd_pcm_lib_period_bytes(substream));
  706. */
  707. return 0;
  708. }
  709. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
  710. {
  711. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  712. size_t ptr;
  713. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  714. return 0;
  715. #if 0 /* read PLAYBACK_ADDR */
  716. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  717. if (ptr < substream->runtime->dma_addr) {
  718. snd_printd("ice1724: invalid negative ptr\n");
  719. return 0;
  720. }
  721. ptr -= substream->runtime->dma_addr;
  722. ptr = bytes_to_frames(substream->runtime, ptr);
  723. if (ptr >= substream->runtime->buffer_size) {
  724. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  725. (int)ptr, (int)substream->runtime->period_size);
  726. return 0;
  727. }
  728. #else /* read PLAYBACK_SIZE */
  729. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  730. ptr = (ptr + 1) << 2;
  731. ptr = bytes_to_frames(substream->runtime, ptr);
  732. if (!ptr)
  733. ;
  734. else if (ptr <= substream->runtime->buffer_size)
  735. ptr = substream->runtime->buffer_size - ptr;
  736. else {
  737. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  738. (int)ptr, (int)substream->runtime->buffer_size);
  739. ptr = 0;
  740. }
  741. #endif
  742. return ptr;
  743. }
  744. static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
  745. {
  746. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  747. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  748. spin_lock_irq(&ice->reg_lock);
  749. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  750. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
  751. ice->profi_port + reg->size);
  752. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
  753. ice->profi_port + reg->count);
  754. spin_unlock_irq(&ice->reg_lock);
  755. return 0;
  756. }
  757. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
  758. {
  759. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  760. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  761. size_t ptr;
  762. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  763. return 0;
  764. #if 0 /* use ADDR register */
  765. ptr = inl(ice->profi_port + reg->addr);
  766. ptr -= substream->runtime->dma_addr;
  767. return bytes_to_frames(substream->runtime, ptr);
  768. #else /* use SIZE register */
  769. ptr = inw(ice->profi_port + reg->size);
  770. ptr = (ptr + 1) << 2;
  771. ptr = bytes_to_frames(substream->runtime, ptr);
  772. if (!ptr)
  773. ;
  774. else if (ptr <= substream->runtime->buffer_size)
  775. ptr = substream->runtime->buffer_size - ptr;
  776. else {
  777. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  778. (int)ptr, (int)substream->runtime->buffer_size);
  779. ptr = 0;
  780. }
  781. return ptr;
  782. #endif
  783. }
  784. static const struct vt1724_pcm_reg vt1724_pdma0_reg = {
  785. .addr = VT1724_MT_PLAYBACK_ADDR,
  786. .size = VT1724_MT_PLAYBACK_SIZE,
  787. .count = VT1724_MT_PLAYBACK_COUNT,
  788. .start = VT1724_PDMA0_START,
  789. };
  790. static const struct vt1724_pcm_reg vt1724_pdma4_reg = {
  791. .addr = VT1724_MT_PDMA4_ADDR,
  792. .size = VT1724_MT_PDMA4_SIZE,
  793. .count = VT1724_MT_PDMA4_COUNT,
  794. .start = VT1724_PDMA4_START,
  795. };
  796. static const struct vt1724_pcm_reg vt1724_rdma0_reg = {
  797. .addr = VT1724_MT_CAPTURE_ADDR,
  798. .size = VT1724_MT_CAPTURE_SIZE,
  799. .count = VT1724_MT_CAPTURE_COUNT,
  800. .start = VT1724_RDMA0_START,
  801. };
  802. static const struct vt1724_pcm_reg vt1724_rdma1_reg = {
  803. .addr = VT1724_MT_RDMA1_ADDR,
  804. .size = VT1724_MT_RDMA1_SIZE,
  805. .count = VT1724_MT_RDMA1_COUNT,
  806. .start = VT1724_RDMA1_START,
  807. };
  808. #define vt1724_playback_pro_reg vt1724_pdma0_reg
  809. #define vt1724_playback_spdif_reg vt1724_pdma4_reg
  810. #define vt1724_capture_pro_reg vt1724_rdma0_reg
  811. #define vt1724_capture_spdif_reg vt1724_rdma1_reg
  812. static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
  813. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  814. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  815. SNDRV_PCM_INFO_MMAP_VALID |
  816. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  817. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  818. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  819. .rate_min = 8000,
  820. .rate_max = 192000,
  821. .channels_min = 2,
  822. .channels_max = 8,
  823. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  824. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  825. .period_bytes_max = (1UL << 21),
  826. .periods_min = 2,
  827. .periods_max = 1024,
  828. };
  829. static const struct snd_pcm_hardware snd_vt1724_spdif = {
  830. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  831. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  832. SNDRV_PCM_INFO_MMAP_VALID |
  833. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  834. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  835. .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
  836. SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
  837. SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
  838. SNDRV_PCM_RATE_192000),
  839. .rate_min = 32000,
  840. .rate_max = 192000,
  841. .channels_min = 2,
  842. .channels_max = 2,
  843. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  844. .period_bytes_min = 2 * 4 * 2,
  845. .period_bytes_max = (1UL << 18),
  846. .periods_min = 2,
  847. .periods_max = 1024,
  848. };
  849. static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
  850. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  851. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  852. SNDRV_PCM_INFO_MMAP_VALID |
  853. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  854. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  855. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  856. .rate_min = 8000,
  857. .rate_max = 192000,
  858. .channels_min = 2,
  859. .channels_max = 2,
  860. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  861. .period_bytes_min = 2 * 4 * 2,
  862. .period_bytes_max = (1UL << 18),
  863. .periods_min = 2,
  864. .periods_max = 1024,
  865. };
  866. /*
  867. * set rate constraints
  868. */
  869. static void set_std_hw_rates(struct snd_ice1712 *ice)
  870. {
  871. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  872. /* I2S */
  873. /* VT1720 doesn't support more than 96kHz */
  874. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  875. ice->hw_rates = &hw_constraints_rates_192;
  876. else
  877. ice->hw_rates = &hw_constraints_rates_96;
  878. } else {
  879. /* ACLINK */
  880. ice->hw_rates = &hw_constraints_rates_48;
  881. }
  882. }
  883. static int set_rate_constraints(struct snd_ice1712 *ice,
  884. struct snd_pcm_substream *substream)
  885. {
  886. struct snd_pcm_runtime *runtime = substream->runtime;
  887. runtime->hw.rate_min = ice->hw_rates->list[0];
  888. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  889. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  890. return snd_pcm_hw_constraint_list(runtime, 0,
  891. SNDRV_PCM_HW_PARAM_RATE,
  892. ice->hw_rates);
  893. }
  894. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  895. * actually used
  896. */
  897. #define VT1724_BUFFER_ALIGN 0x20
  898. static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
  899. {
  900. struct snd_pcm_runtime *runtime = substream->runtime;
  901. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  902. int chs, num_indeps;
  903. runtime->private_data = (void *)&vt1724_playback_pro_reg;
  904. ice->playback_pro_substream = substream;
  905. runtime->hw = snd_vt1724_playback_pro;
  906. snd_pcm_set_sync(substream);
  907. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  908. set_rate_constraints(ice, substream);
  909. mutex_lock(&ice->open_mutex);
  910. /* calculate the currently available channels */
  911. num_indeps = ice->num_total_dacs / 2 - 1;
  912. for (chs = 0; chs < num_indeps; chs++) {
  913. if (ice->pcm_reserved[chs])
  914. break;
  915. }
  916. chs = (chs + 1) * 2;
  917. runtime->hw.channels_max = chs;
  918. if (chs > 2) /* channels must be even */
  919. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  920. mutex_unlock(&ice->open_mutex);
  921. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  922. VT1724_BUFFER_ALIGN);
  923. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  924. VT1724_BUFFER_ALIGN);
  925. return 0;
  926. }
  927. static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
  928. {
  929. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  930. struct snd_pcm_runtime *runtime = substream->runtime;
  931. runtime->private_data = (void *)&vt1724_capture_pro_reg;
  932. ice->capture_pro_substream = substream;
  933. runtime->hw = snd_vt1724_2ch_stereo;
  934. snd_pcm_set_sync(substream);
  935. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  936. set_rate_constraints(ice, substream);
  937. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  938. VT1724_BUFFER_ALIGN);
  939. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  940. VT1724_BUFFER_ALIGN);
  941. return 0;
  942. }
  943. static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
  944. {
  945. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  946. if (PRO_RATE_RESET)
  947. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  948. ice->playback_pro_substream = NULL;
  949. return 0;
  950. }
  951. static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
  952. {
  953. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  954. if (PRO_RATE_RESET)
  955. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  956. ice->capture_pro_substream = NULL;
  957. return 0;
  958. }
  959. static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
  960. .open = snd_vt1724_playback_pro_open,
  961. .close = snd_vt1724_playback_pro_close,
  962. .ioctl = snd_pcm_lib_ioctl,
  963. .hw_params = snd_vt1724_pcm_hw_params,
  964. .hw_free = snd_vt1724_pcm_hw_free,
  965. .prepare = snd_vt1724_playback_pro_prepare,
  966. .trigger = snd_vt1724_pcm_trigger,
  967. .pointer = snd_vt1724_playback_pro_pointer,
  968. };
  969. static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
  970. .open = snd_vt1724_capture_pro_open,
  971. .close = snd_vt1724_capture_pro_close,
  972. .ioctl = snd_pcm_lib_ioctl,
  973. .hw_params = snd_vt1724_pcm_hw_params,
  974. .hw_free = snd_vt1724_pcm_hw_free,
  975. .prepare = snd_vt1724_pcm_prepare,
  976. .trigger = snd_vt1724_pcm_trigger,
  977. .pointer = snd_vt1724_pcm_pointer,
  978. };
  979. static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
  980. {
  981. struct snd_pcm *pcm;
  982. int err;
  983. err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
  984. if (err < 0)
  985. return err;
  986. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  987. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
  988. pcm->private_data = ice;
  989. pcm->info_flags = 0;
  990. strcpy(pcm->name, "ICE1724");
  991. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  992. snd_dma_pci_data(ice->pci),
  993. 256*1024, 256*1024);
  994. ice->pcm_pro = pcm;
  995. return 0;
  996. }
  997. /*
  998. * SPDIF PCM
  999. */
  1000. /* update spdif control bits; call with reg_lock */
  1001. static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
  1002. {
  1003. unsigned char cbit, disabled;
  1004. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  1005. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  1006. if (cbit != disabled)
  1007. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  1008. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  1009. if (cbit != disabled)
  1010. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  1011. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  1012. }
  1013. /* update SPDIF control bits according to the given rate */
  1014. static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
  1015. {
  1016. unsigned int val, nval;
  1017. unsigned long flags;
  1018. spin_lock_irqsave(&ice->reg_lock, flags);
  1019. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1020. nval &= ~(7 << 12);
  1021. switch (rate) {
  1022. case 44100: break;
  1023. case 48000: nval |= 2 << 12; break;
  1024. case 32000: nval |= 3 << 12; break;
  1025. case 88200: nval |= 4 << 12; break;
  1026. case 96000: nval |= 5 << 12; break;
  1027. case 192000: nval |= 6 << 12; break;
  1028. case 176400: nval |= 7 << 12; break;
  1029. }
  1030. if (val != nval)
  1031. update_spdif_bits(ice, nval);
  1032. spin_unlock_irqrestore(&ice->reg_lock, flags);
  1033. }
  1034. static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
  1035. {
  1036. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1037. if (!ice->force_pdma4)
  1038. update_spdif_rate(ice, substream->runtime->rate);
  1039. return snd_vt1724_pcm_prepare(substream);
  1040. }
  1041. static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
  1042. {
  1043. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1044. struct snd_pcm_runtime *runtime = substream->runtime;
  1045. runtime->private_data = (void *)&vt1724_playback_spdif_reg;
  1046. ice->playback_con_substream = substream;
  1047. if (ice->force_pdma4) {
  1048. runtime->hw = snd_vt1724_2ch_stereo;
  1049. set_rate_constraints(ice, substream);
  1050. } else
  1051. runtime->hw = snd_vt1724_spdif;
  1052. snd_pcm_set_sync(substream);
  1053. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1054. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  1055. VT1724_BUFFER_ALIGN);
  1056. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  1057. VT1724_BUFFER_ALIGN);
  1058. if (ice->spdif.ops.open)
  1059. ice->spdif.ops.open(ice, substream);
  1060. return 0;
  1061. }
  1062. static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
  1063. {
  1064. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1065. if (PRO_RATE_RESET)
  1066. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1067. ice->playback_con_substream = NULL;
  1068. if (ice->spdif.ops.close)
  1069. ice->spdif.ops.close(ice, substream);
  1070. return 0;
  1071. }
  1072. static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
  1073. {
  1074. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1075. struct snd_pcm_runtime *runtime = substream->runtime;
  1076. runtime->private_data = (void *)&vt1724_capture_spdif_reg;
  1077. ice->capture_con_substream = substream;
  1078. if (ice->force_rdma1) {
  1079. runtime->hw = snd_vt1724_2ch_stereo;
  1080. set_rate_constraints(ice, substream);
  1081. } else
  1082. runtime->hw = snd_vt1724_spdif;
  1083. snd_pcm_set_sync(substream);
  1084. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1085. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  1086. VT1724_BUFFER_ALIGN);
  1087. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  1088. VT1724_BUFFER_ALIGN);
  1089. if (ice->spdif.ops.open)
  1090. ice->spdif.ops.open(ice, substream);
  1091. return 0;
  1092. }
  1093. static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
  1094. {
  1095. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1096. if (PRO_RATE_RESET)
  1097. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1098. ice->capture_con_substream = NULL;
  1099. if (ice->spdif.ops.close)
  1100. ice->spdif.ops.close(ice, substream);
  1101. return 0;
  1102. }
  1103. static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
  1104. .open = snd_vt1724_playback_spdif_open,
  1105. .close = snd_vt1724_playback_spdif_close,
  1106. .ioctl = snd_pcm_lib_ioctl,
  1107. .hw_params = snd_vt1724_pcm_hw_params,
  1108. .hw_free = snd_vt1724_pcm_hw_free,
  1109. .prepare = snd_vt1724_playback_spdif_prepare,
  1110. .trigger = snd_vt1724_pcm_trigger,
  1111. .pointer = snd_vt1724_pcm_pointer,
  1112. };
  1113. static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
  1114. .open = snd_vt1724_capture_spdif_open,
  1115. .close = snd_vt1724_capture_spdif_close,
  1116. .ioctl = snd_pcm_lib_ioctl,
  1117. .hw_params = snd_vt1724_pcm_hw_params,
  1118. .hw_free = snd_vt1724_pcm_hw_free,
  1119. .prepare = snd_vt1724_pcm_prepare,
  1120. .trigger = snd_vt1724_pcm_trigger,
  1121. .pointer = snd_vt1724_pcm_pointer,
  1122. };
  1123. static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
  1124. {
  1125. char *name;
  1126. struct snd_pcm *pcm;
  1127. int play, capt;
  1128. int err;
  1129. if (ice->force_pdma4 ||
  1130. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  1131. play = 1;
  1132. ice->has_spdif = 1;
  1133. } else
  1134. play = 0;
  1135. if (ice->force_rdma1 ||
  1136. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  1137. capt = 1;
  1138. ice->has_spdif = 1;
  1139. } else
  1140. capt = 0;
  1141. if (!play && !capt)
  1142. return 0; /* no spdif device */
  1143. if (ice->force_pdma4 || ice->force_rdma1)
  1144. name = "ICE1724 Secondary";
  1145. else
  1146. name = "ICE1724 IEC958";
  1147. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  1148. if (err < 0)
  1149. return err;
  1150. if (play)
  1151. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1152. &snd_vt1724_playback_spdif_ops);
  1153. if (capt)
  1154. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  1155. &snd_vt1724_capture_spdif_ops);
  1156. pcm->private_data = ice;
  1157. pcm->info_flags = 0;
  1158. strcpy(pcm->name, name);
  1159. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1160. snd_dma_pci_data(ice->pci),
  1161. 64*1024, 64*1024);
  1162. ice->pcm = pcm;
  1163. return 0;
  1164. }
  1165. /*
  1166. * independent surround PCMs
  1167. */
  1168. static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  1169. {
  1170. .addr = VT1724_MT_PDMA1_ADDR,
  1171. .size = VT1724_MT_PDMA1_SIZE,
  1172. .count = VT1724_MT_PDMA1_COUNT,
  1173. .start = VT1724_PDMA1_START,
  1174. },
  1175. {
  1176. .addr = VT1724_MT_PDMA2_ADDR,
  1177. .size = VT1724_MT_PDMA2_SIZE,
  1178. .count = VT1724_MT_PDMA2_COUNT,
  1179. .start = VT1724_PDMA2_START,
  1180. },
  1181. {
  1182. .addr = VT1724_MT_PDMA3_ADDR,
  1183. .size = VT1724_MT_PDMA3_SIZE,
  1184. .count = VT1724_MT_PDMA3_COUNT,
  1185. .start = VT1724_PDMA3_START,
  1186. },
  1187. };
  1188. static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
  1189. {
  1190. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1191. unsigned char val;
  1192. spin_lock_irq(&ice->reg_lock);
  1193. val = 3 - substream->number;
  1194. if (inb(ICEMT1724(ice, BURST)) < val)
  1195. outb(val, ICEMT1724(ice, BURST));
  1196. spin_unlock_irq(&ice->reg_lock);
  1197. return snd_vt1724_pcm_prepare(substream);
  1198. }
  1199. static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
  1200. {
  1201. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1202. struct snd_pcm_runtime *runtime = substream->runtime;
  1203. mutex_lock(&ice->open_mutex);
  1204. /* already used by PDMA0? */
  1205. if (ice->pcm_reserved[substream->number]) {
  1206. mutex_unlock(&ice->open_mutex);
  1207. return -EBUSY; /* FIXME: should handle blocking mode properly */
  1208. }
  1209. mutex_unlock(&ice->open_mutex);
  1210. runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
  1211. ice->playback_con_substream_ds[substream->number] = substream;
  1212. runtime->hw = snd_vt1724_2ch_stereo;
  1213. snd_pcm_set_sync(substream);
  1214. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1215. set_rate_constraints(ice, substream);
  1216. return 0;
  1217. }
  1218. static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
  1219. {
  1220. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1221. if (PRO_RATE_RESET)
  1222. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1223. ice->playback_con_substream_ds[substream->number] = NULL;
  1224. ice->pcm_reserved[substream->number] = NULL;
  1225. return 0;
  1226. }
  1227. static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
  1228. .open = snd_vt1724_playback_indep_open,
  1229. .close = snd_vt1724_playback_indep_close,
  1230. .ioctl = snd_pcm_lib_ioctl,
  1231. .hw_params = snd_vt1724_pcm_hw_params,
  1232. .hw_free = snd_vt1724_pcm_hw_free,
  1233. .prepare = snd_vt1724_playback_indep_prepare,
  1234. .trigger = snd_vt1724_pcm_trigger,
  1235. .pointer = snd_vt1724_pcm_pointer,
  1236. };
  1237. static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
  1238. {
  1239. struct snd_pcm *pcm;
  1240. int play;
  1241. int err;
  1242. play = ice->num_total_dacs / 2 - 1;
  1243. if (play <= 0)
  1244. return 0;
  1245. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1246. if (err < 0)
  1247. return err;
  1248. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1249. &snd_vt1724_playback_indep_ops);
  1250. pcm->private_data = ice;
  1251. pcm->info_flags = 0;
  1252. strcpy(pcm->name, "ICE1724 Surround PCM");
  1253. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1254. snd_dma_pci_data(ice->pci),
  1255. 64*1024, 64*1024);
  1256. ice->pcm_ds = pcm;
  1257. return 0;
  1258. }
  1259. /*
  1260. * Mixer section
  1261. */
  1262. static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
  1263. {
  1264. int err;
  1265. if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1266. struct snd_ac97_bus *pbus;
  1267. struct snd_ac97_template ac97;
  1268. static struct snd_ac97_bus_ops ops = {
  1269. .write = snd_vt1724_ac97_write,
  1270. .read = snd_vt1724_ac97_read,
  1271. };
  1272. /* cold reset */
  1273. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1274. mdelay(5); /* FIXME */
  1275. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1276. err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
  1277. if (err < 0)
  1278. return err;
  1279. memset(&ac97, 0, sizeof(ac97));
  1280. ac97.private_data = ice;
  1281. err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
  1282. if (err < 0)
  1283. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1284. else
  1285. return 0;
  1286. }
  1287. /* I2S mixer only */
  1288. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1289. return 0;
  1290. }
  1291. /*
  1292. *
  1293. */
  1294. static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
  1295. {
  1296. return (unsigned int)ice->eeprom.data[idx] | \
  1297. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1298. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1299. }
  1300. static void snd_vt1724_proc_read(struct snd_info_entry *entry,
  1301. struct snd_info_buffer *buffer)
  1302. {
  1303. struct snd_ice1712 *ice = entry->private_data;
  1304. unsigned int idx;
  1305. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1306. snd_iprintf(buffer, "EEPROM:\n");
  1307. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1308. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1309. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1310. snd_iprintf(buffer, " System Config : 0x%x\n",
  1311. ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1312. snd_iprintf(buffer, " ACLink : 0x%x\n",
  1313. ice->eeprom.data[ICE_EEP2_ACLINK]);
  1314. snd_iprintf(buffer, " I2S : 0x%x\n",
  1315. ice->eeprom.data[ICE_EEP2_I2S]);
  1316. snd_iprintf(buffer, " S/PDIF : 0x%x\n",
  1317. ice->eeprom.data[ICE_EEP2_SPDIF]);
  1318. snd_iprintf(buffer, " GPIO direction : 0x%x\n",
  1319. ice->eeprom.gpiodir);
  1320. snd_iprintf(buffer, " GPIO mask : 0x%x\n",
  1321. ice->eeprom.gpiomask);
  1322. snd_iprintf(buffer, " GPIO state : 0x%x\n",
  1323. ice->eeprom.gpiostate);
  1324. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1325. snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
  1326. idx, ice->eeprom.data[idx]);
  1327. snd_iprintf(buffer, "\nRegisters:\n");
  1328. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
  1329. (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1330. for (idx = 0x0; idx < 0x20 ; idx++)
  1331. snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
  1332. idx, inb(ice->port+idx));
  1333. for (idx = 0x0; idx < 0x30 ; idx++)
  1334. snd_iprintf(buffer, " MT%02x : 0x%02x\n",
  1335. idx, inb(ice->profi_port+idx));
  1336. }
  1337. static void __devinit snd_vt1724_proc_init(struct snd_ice1712 *ice)
  1338. {
  1339. struct snd_info_entry *entry;
  1340. if (!snd_card_proc_new(ice->card, "ice1724", &entry))
  1341. snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
  1342. }
  1343. /*
  1344. *
  1345. */
  1346. static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
  1347. struct snd_ctl_elem_info *uinfo)
  1348. {
  1349. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1350. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1351. return 0;
  1352. }
  1353. static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
  1354. struct snd_ctl_elem_value *ucontrol)
  1355. {
  1356. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1357. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1358. return 0;
  1359. }
  1360. static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
  1361. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1362. .name = "ICE1724 EEPROM",
  1363. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1364. .info = snd_vt1724_eeprom_info,
  1365. .get = snd_vt1724_eeprom_get
  1366. };
  1367. /*
  1368. */
  1369. static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
  1370. struct snd_ctl_elem_info *uinfo)
  1371. {
  1372. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1373. uinfo->count = 1;
  1374. return 0;
  1375. }
  1376. static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
  1377. {
  1378. unsigned int val, rbits;
  1379. val = diga->status[0] & 0x03; /* professional, non-audio */
  1380. if (val & 0x01) {
  1381. /* professional */
  1382. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
  1383. IEC958_AES0_PRO_EMPHASIS_5015)
  1384. val |= 1U << 3;
  1385. rbits = (diga->status[4] >> 3) & 0x0f;
  1386. if (rbits) {
  1387. switch (rbits) {
  1388. case 2: val |= 5 << 12; break; /* 96k */
  1389. case 3: val |= 6 << 12; break; /* 192k */
  1390. case 10: val |= 4 << 12; break; /* 88.2k */
  1391. case 11: val |= 7 << 12; break; /* 176.4k */
  1392. }
  1393. } else {
  1394. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1395. case IEC958_AES0_PRO_FS_44100:
  1396. break;
  1397. case IEC958_AES0_PRO_FS_32000:
  1398. val |= 3U << 12;
  1399. break;
  1400. default:
  1401. val |= 2U << 12;
  1402. break;
  1403. }
  1404. }
  1405. } else {
  1406. /* consumer */
  1407. val |= diga->status[1] & 0x04; /* copyright */
  1408. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
  1409. IEC958_AES0_CON_EMPHASIS_5015)
  1410. val |= 1U << 3;
  1411. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1412. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1413. }
  1414. return val;
  1415. }
  1416. static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
  1417. {
  1418. memset(diga->status, 0, sizeof(diga->status));
  1419. diga->status[0] = val & 0x03; /* professional, non-audio */
  1420. if (val & 0x01) {
  1421. /* professional */
  1422. if (val & (1U << 3))
  1423. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1424. switch ((val >> 12) & 0x7) {
  1425. case 0:
  1426. break;
  1427. case 2:
  1428. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1429. break;
  1430. default:
  1431. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1432. break;
  1433. }
  1434. } else {
  1435. /* consumer */
  1436. diga->status[0] |= val & (1U << 2); /* copyright */
  1437. if (val & (1U << 3))
  1438. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1439. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1440. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1441. }
  1442. }
  1443. static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
  1444. struct snd_ctl_elem_value *ucontrol)
  1445. {
  1446. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1447. unsigned int val;
  1448. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1449. decode_spdif_bits(&ucontrol->value.iec958, val);
  1450. return 0;
  1451. }
  1452. static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
  1453. struct snd_ctl_elem_value *ucontrol)
  1454. {
  1455. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1456. unsigned int val, old;
  1457. val = encode_spdif_bits(&ucontrol->value.iec958);
  1458. spin_lock_irq(&ice->reg_lock);
  1459. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1460. if (val != old)
  1461. update_spdif_bits(ice, val);
  1462. spin_unlock_irq(&ice->reg_lock);
  1463. return val != old;
  1464. }
  1465. static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
  1466. {
  1467. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1468. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
  1469. .info = snd_vt1724_spdif_info,
  1470. .get = snd_vt1724_spdif_default_get,
  1471. .put = snd_vt1724_spdif_default_put
  1472. };
  1473. static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1474. struct snd_ctl_elem_value *ucontrol)
  1475. {
  1476. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1477. IEC958_AES0_PROFESSIONAL |
  1478. IEC958_AES0_CON_NOT_COPYRIGHT |
  1479. IEC958_AES0_CON_EMPHASIS;
  1480. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1481. IEC958_AES1_CON_CATEGORY;
  1482. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1483. return 0;
  1484. }
  1485. static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1486. struct snd_ctl_elem_value *ucontrol)
  1487. {
  1488. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1489. IEC958_AES0_PROFESSIONAL |
  1490. IEC958_AES0_PRO_FS |
  1491. IEC958_AES0_PRO_EMPHASIS;
  1492. return 0;
  1493. }
  1494. static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
  1495. {
  1496. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1497. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1498. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
  1499. .info = snd_vt1724_spdif_info,
  1500. .get = snd_vt1724_spdif_maskc_get,
  1501. };
  1502. static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
  1503. {
  1504. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1505. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1506. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
  1507. .info = snd_vt1724_spdif_info,
  1508. .get = snd_vt1724_spdif_maskp_get,
  1509. };
  1510. #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
  1511. static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
  1512. struct snd_ctl_elem_value *ucontrol)
  1513. {
  1514. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1515. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
  1516. VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1517. return 0;
  1518. }
  1519. static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
  1520. struct snd_ctl_elem_value *ucontrol)
  1521. {
  1522. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1523. unsigned char old, val;
  1524. spin_lock_irq(&ice->reg_lock);
  1525. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1526. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1527. if (ucontrol->value.integer.value[0])
  1528. val |= VT1724_CFG_SPDIF_OUT_EN;
  1529. if (old != val)
  1530. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1531. spin_unlock_irq(&ice->reg_lock);
  1532. return old != val;
  1533. }
  1534. static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
  1535. {
  1536. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1537. /* FIXME: the following conflict with IEC958 Playback Route */
  1538. /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */
  1539. .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
  1540. .info = snd_vt1724_spdif_sw_info,
  1541. .get = snd_vt1724_spdif_sw_get,
  1542. .put = snd_vt1724_spdif_sw_put
  1543. };
  1544. #if 0 /* NOT USED YET */
  1545. /*
  1546. * GPIO access from extern
  1547. */
  1548. #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
  1549. int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
  1550. struct snd_ctl_elem_value *ucontrol)
  1551. {
  1552. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1553. int shift = kcontrol->private_value & 0xff;
  1554. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1555. snd_ice1712_save_gpio_status(ice);
  1556. ucontrol->value.integer.value[0] =
  1557. (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1558. snd_ice1712_restore_gpio_status(ice);
  1559. return 0;
  1560. }
  1561. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1562. struct snd_ctl_elem_value *ucontrol)
  1563. {
  1564. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1565. int shift = kcontrol->private_value & 0xff;
  1566. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1567. unsigned int val, nval;
  1568. if (kcontrol->private_value & (1 << 31))
  1569. return -EPERM;
  1570. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1571. snd_ice1712_save_gpio_status(ice);
  1572. val = snd_ice1712_gpio_read(ice);
  1573. nval |= val & ~(1 << shift);
  1574. if (val != nval)
  1575. snd_ice1712_gpio_write(ice, nval);
  1576. snd_ice1712_restore_gpio_status(ice);
  1577. return val != nval;
  1578. }
  1579. #endif /* NOT USED YET */
  1580. /*
  1581. * rate
  1582. */
  1583. static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1584. struct snd_ctl_elem_info *uinfo)
  1585. {
  1586. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1587. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1588. uinfo->count = 1;
  1589. uinfo->value.enumerated.items = ice->hw_rates->count + 1;
  1590. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1591. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1592. if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1)
  1593. strcpy(uinfo->value.enumerated.name, "IEC958 Input");
  1594. else
  1595. sprintf(uinfo->value.enumerated.name, "%d",
  1596. ice->hw_rates->list[uinfo->value.enumerated.item]);
  1597. return 0;
  1598. }
  1599. static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1600. struct snd_ctl_elem_value *ucontrol)
  1601. {
  1602. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1603. unsigned int i, rate;
  1604. spin_lock_irq(&ice->reg_lock);
  1605. if (ice->is_spdif_master(ice)) {
  1606. ucontrol->value.enumerated.item[0] = ice->hw_rates->count;
  1607. } else {
  1608. rate = ice->get_rate(ice);
  1609. ucontrol->value.enumerated.item[0] = 0;
  1610. for (i = 0; i < ice->hw_rates->count; i++) {
  1611. if (ice->hw_rates->list[i] == rate) {
  1612. ucontrol->value.enumerated.item[0] = i;
  1613. break;
  1614. }
  1615. }
  1616. }
  1617. spin_unlock_irq(&ice->reg_lock);
  1618. return 0;
  1619. }
  1620. /* setting clock to external - SPDIF */
  1621. static void stdclock_set_spdif_clock(struct snd_ice1712 *ice)
  1622. {
  1623. unsigned char oval;
  1624. unsigned char i2s_oval;
  1625. oval = inb(ICEMT1724(ice, RATE));
  1626. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1627. /* setting 256fs */
  1628. i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
  1629. outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
  1630. }
  1631. static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1632. struct snd_ctl_elem_value *ucontrol)
  1633. {
  1634. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1635. unsigned int old_rate, new_rate;
  1636. unsigned int item = ucontrol->value.enumerated.item[0];
  1637. unsigned int spdif = ice->hw_rates->count;
  1638. if (item > spdif)
  1639. return -EINVAL;
  1640. spin_lock_irq(&ice->reg_lock);
  1641. if (ice->is_spdif_master(ice))
  1642. old_rate = 0;
  1643. else
  1644. old_rate = ice->get_rate(ice);
  1645. if (item == spdif) {
  1646. /* switching to external clock via SPDIF */
  1647. ice->set_spdif_clock(ice);
  1648. new_rate = 0;
  1649. } else {
  1650. /* internal on-card clock */
  1651. new_rate = ice->hw_rates->list[item];
  1652. ice->pro_rate_default = new_rate;
  1653. spin_unlock_irq(&ice->reg_lock);
  1654. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
  1655. spin_lock_irq(&ice->reg_lock);
  1656. }
  1657. spin_unlock_irq(&ice->reg_lock);
  1658. /* the first reset to the SPDIF master mode? */
  1659. if (old_rate != new_rate && !new_rate) {
  1660. /* notify akm chips as well */
  1661. unsigned int i;
  1662. if (ice->gpio.set_pro_rate)
  1663. ice->gpio.set_pro_rate(ice, 0);
  1664. for (i = 0; i < ice->akm_codecs; i++) {
  1665. if (ice->akm[i].ops.set_rate_val)
  1666. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1667. }
  1668. }
  1669. return old_rate != new_rate;
  1670. }
  1671. static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
  1672. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1673. .name = "Multi Track Internal Clock",
  1674. .info = snd_vt1724_pro_internal_clock_info,
  1675. .get = snd_vt1724_pro_internal_clock_get,
  1676. .put = snd_vt1724_pro_internal_clock_put
  1677. };
  1678. #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
  1679. static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1680. struct snd_ctl_elem_value *ucontrol)
  1681. {
  1682. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1683. return 0;
  1684. }
  1685. static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1686. struct snd_ctl_elem_value *ucontrol)
  1687. {
  1688. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1689. int change = 0, nval;
  1690. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1691. spin_lock_irq(&ice->reg_lock);
  1692. change = PRO_RATE_LOCKED != nval;
  1693. PRO_RATE_LOCKED = nval;
  1694. spin_unlock_irq(&ice->reg_lock);
  1695. return change;
  1696. }
  1697. static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
  1698. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1699. .name = "Multi Track Rate Locking",
  1700. .info = snd_vt1724_pro_rate_locking_info,
  1701. .get = snd_vt1724_pro_rate_locking_get,
  1702. .put = snd_vt1724_pro_rate_locking_put
  1703. };
  1704. #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
  1705. static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1706. struct snd_ctl_elem_value *ucontrol)
  1707. {
  1708. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1709. return 0;
  1710. }
  1711. static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1712. struct snd_ctl_elem_value *ucontrol)
  1713. {
  1714. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1715. int change = 0, nval;
  1716. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1717. spin_lock_irq(&ice->reg_lock);
  1718. change = PRO_RATE_RESET != nval;
  1719. PRO_RATE_RESET = nval;
  1720. spin_unlock_irq(&ice->reg_lock);
  1721. return change;
  1722. }
  1723. static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
  1724. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1725. .name = "Multi Track Rate Reset",
  1726. .info = snd_vt1724_pro_rate_reset_info,
  1727. .get = snd_vt1724_pro_rate_reset_get,
  1728. .put = snd_vt1724_pro_rate_reset_put
  1729. };
  1730. /*
  1731. * routing
  1732. */
  1733. static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
  1734. struct snd_ctl_elem_info *uinfo)
  1735. {
  1736. static char *texts[] = {
  1737. "PCM Out", /* 0 */
  1738. "H/W In 0", "H/W In 1", /* 1-2 */
  1739. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1740. };
  1741. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1742. uinfo->count = 1;
  1743. uinfo->value.enumerated.items = 5;
  1744. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1745. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1746. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1747. return 0;
  1748. }
  1749. static inline int analog_route_shift(int idx)
  1750. {
  1751. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1752. }
  1753. static inline int digital_route_shift(int idx)
  1754. {
  1755. return idx * 3;
  1756. }
  1757. int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift)
  1758. {
  1759. unsigned long val;
  1760. unsigned char eitem;
  1761. static const unsigned char xlate[8] = {
  1762. 0, 255, 1, 2, 255, 255, 3, 4,
  1763. };
  1764. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1765. val >>= shift;
  1766. val &= 7; /* we now have 3 bits per output */
  1767. eitem = xlate[val];
  1768. if (eitem == 255) {
  1769. snd_BUG();
  1770. return 0;
  1771. }
  1772. return eitem;
  1773. }
  1774. int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val,
  1775. int shift)
  1776. {
  1777. unsigned int old_val, nval;
  1778. int change;
  1779. static const unsigned char xroute[8] = {
  1780. 0, /* PCM */
  1781. 2, /* PSDIN0 Left */
  1782. 3, /* PSDIN0 Right */
  1783. 6, /* SPDIN Left */
  1784. 7, /* SPDIN Right */
  1785. };
  1786. nval = xroute[val % 5];
  1787. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1788. val &= ~(0x07 << shift);
  1789. val |= nval << shift;
  1790. change = val != old_val;
  1791. if (change)
  1792. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1793. return change;
  1794. }
  1795. static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1796. struct snd_ctl_elem_value *ucontrol)
  1797. {
  1798. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1799. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1800. ucontrol->value.enumerated.item[0] =
  1801. snd_ice1724_get_route_val(ice, analog_route_shift(idx));
  1802. return 0;
  1803. }
  1804. static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1805. struct snd_ctl_elem_value *ucontrol)
  1806. {
  1807. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1808. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1809. return snd_ice1724_put_route_val(ice,
  1810. ucontrol->value.enumerated.item[0],
  1811. analog_route_shift(idx));
  1812. }
  1813. static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1814. struct snd_ctl_elem_value *ucontrol)
  1815. {
  1816. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1817. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1818. ucontrol->value.enumerated.item[0] =
  1819. snd_ice1724_get_route_val(ice, digital_route_shift(idx));
  1820. return 0;
  1821. }
  1822. static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1823. struct snd_ctl_elem_value *ucontrol)
  1824. {
  1825. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1826. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1827. return snd_ice1724_put_route_val(ice,
  1828. ucontrol->value.enumerated.item[0],
  1829. digital_route_shift(idx));
  1830. }
  1831. static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata =
  1832. {
  1833. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1834. .name = "H/W Playback Route",
  1835. .info = snd_vt1724_pro_route_info,
  1836. .get = snd_vt1724_pro_route_analog_get,
  1837. .put = snd_vt1724_pro_route_analog_put,
  1838. };
  1839. static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1840. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1841. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
  1842. .info = snd_vt1724_pro_route_info,
  1843. .get = snd_vt1724_pro_route_spdif_get,
  1844. .put = snd_vt1724_pro_route_spdif_put,
  1845. .count = 2,
  1846. };
  1847. static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
  1848. struct snd_ctl_elem_info *uinfo)
  1849. {
  1850. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1851. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1852. uinfo->value.integer.min = 0;
  1853. uinfo->value.integer.max = 255;
  1854. return 0;
  1855. }
  1856. static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
  1857. struct snd_ctl_elem_value *ucontrol)
  1858. {
  1859. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1860. int idx;
  1861. spin_lock_irq(&ice->reg_lock);
  1862. for (idx = 0; idx < 22; idx++) {
  1863. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1864. ucontrol->value.integer.value[idx] =
  1865. inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1866. }
  1867. spin_unlock_irq(&ice->reg_lock);
  1868. return 0;
  1869. }
  1870. static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
  1871. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1872. .name = "Multi Track Peak",
  1873. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1874. .info = snd_vt1724_pro_peak_info,
  1875. .get = snd_vt1724_pro_peak_get
  1876. };
  1877. /*
  1878. *
  1879. */
  1880. static struct snd_ice1712_card_info no_matched __devinitdata;
  1881. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1882. snd_vt1724_revo_cards,
  1883. snd_vt1724_amp_cards,
  1884. snd_vt1724_aureon_cards,
  1885. snd_vt1720_mobo_cards,
  1886. snd_vt1720_pontis_cards,
  1887. snd_vt1724_prodigy_hifi_cards,
  1888. snd_vt1724_prodigy192_cards,
  1889. snd_vt1724_juli_cards,
  1890. snd_vt1724_maya44_cards,
  1891. snd_vt1724_phase_cards,
  1892. snd_vt1724_wtm_cards,
  1893. snd_vt1724_se_cards,
  1894. NULL,
  1895. };
  1896. /*
  1897. */
  1898. static void wait_i2c_busy(struct snd_ice1712 *ice)
  1899. {
  1900. int t = 0x10000;
  1901. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1902. ;
  1903. if (t == -1)
  1904. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1905. }
  1906. unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
  1907. unsigned char dev, unsigned char addr)
  1908. {
  1909. unsigned char val;
  1910. mutex_lock(&ice->i2c_mutex);
  1911. wait_i2c_busy(ice);
  1912. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1913. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1914. wait_i2c_busy(ice);
  1915. val = inb(ICEREG1724(ice, I2C_DATA));
  1916. mutex_unlock(&ice->i2c_mutex);
  1917. /*
  1918. printk(KERN_DEBUG "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
  1919. */
  1920. return val;
  1921. }
  1922. void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
  1923. unsigned char dev, unsigned char addr, unsigned char data)
  1924. {
  1925. mutex_lock(&ice->i2c_mutex);
  1926. wait_i2c_busy(ice);
  1927. /*
  1928. printk(KERN_DEBUG "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
  1929. */
  1930. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1931. outb(data, ICEREG1724(ice, I2C_DATA));
  1932. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1933. wait_i2c_busy(ice);
  1934. mutex_unlock(&ice->i2c_mutex);
  1935. }
  1936. static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
  1937. const char *modelname)
  1938. {
  1939. const int dev = 0xa0; /* EEPROM device address */
  1940. unsigned int i, size;
  1941. struct snd_ice1712_card_info * const *tbl, *c;
  1942. if (!modelname || !*modelname) {
  1943. ice->eeprom.subvendor = 0;
  1944. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  1945. ice->eeprom.subvendor =
  1946. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  1947. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  1948. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  1949. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  1950. if (ice->eeprom.subvendor == 0 ||
  1951. ice->eeprom.subvendor == (unsigned int)-1) {
  1952. /* invalid subvendor from EEPROM, try the PCI
  1953. * subststem ID instead
  1954. */
  1955. u16 vendor, device;
  1956. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
  1957. &vendor);
  1958. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  1959. ice->eeprom.subvendor =
  1960. ((unsigned int)swab16(vendor) << 16) | swab16(device);
  1961. if (ice->eeprom.subvendor == 0 ||
  1962. ice->eeprom.subvendor == (unsigned int)-1) {
  1963. printk(KERN_ERR "ice1724: No valid ID is found\n");
  1964. return -ENXIO;
  1965. }
  1966. }
  1967. }
  1968. for (tbl = card_tables; *tbl; tbl++) {
  1969. for (c = *tbl; c->subvendor; c++) {
  1970. if (modelname && c->model &&
  1971. !strcmp(modelname, c->model)) {
  1972. printk(KERN_INFO "ice1724: Using board model %s\n",
  1973. c->name);
  1974. ice->eeprom.subvendor = c->subvendor;
  1975. } else if (c->subvendor != ice->eeprom.subvendor)
  1976. continue;
  1977. if (!c->eeprom_size || !c->eeprom_data)
  1978. goto found;
  1979. /* if the EEPROM is given by the driver, use it */
  1980. snd_printdd("using the defined eeprom..\n");
  1981. ice->eeprom.version = 2;
  1982. ice->eeprom.size = c->eeprom_size + 6;
  1983. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  1984. goto read_skipped;
  1985. }
  1986. }
  1987. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
  1988. ice->eeprom.subvendor);
  1989. found:
  1990. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  1991. if (ice->eeprom.size < 6)
  1992. ice->eeprom.size = 32;
  1993. else if (ice->eeprom.size > 32) {
  1994. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
  1995. ice->eeprom.size);
  1996. return -EIO;
  1997. }
  1998. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  1999. if (ice->eeprom.version != 2)
  2000. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
  2001. ice->eeprom.version);
  2002. size = ice->eeprom.size - 6;
  2003. for (i = 0; i < size; i++)
  2004. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  2005. read_skipped:
  2006. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  2007. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  2008. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  2009. return 0;
  2010. }
  2011. static void snd_vt1724_chip_reset(struct snd_ice1712 *ice)
  2012. {
  2013. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  2014. inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
  2015. msleep(10);
  2016. outb(0, ICEREG1724(ice, CONTROL));
  2017. inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
  2018. msleep(10);
  2019. }
  2020. static int snd_vt1724_chip_init(struct snd_ice1712 *ice)
  2021. {
  2022. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  2023. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  2024. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  2025. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  2026. ice->gpio.write_mask = ice->eeprom.gpiomask;
  2027. ice->gpio.direction = ice->eeprom.gpiodir;
  2028. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  2029. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  2030. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  2031. outb(0, ICEREG1724(ice, POWERDOWN));
  2032. /* MPU_RX and TX irq masks are cleared later dynamically */
  2033. outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
  2034. /* don't handle FIFO overrun/underruns (just yet),
  2035. * since they cause machine lockups
  2036. */
  2037. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  2038. return 0;
  2039. }
  2040. static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
  2041. {
  2042. int err;
  2043. struct snd_kcontrol *kctl;
  2044. if (snd_BUG_ON(!ice->pcm))
  2045. return -EIO;
  2046. if (!ice->own_routing) {
  2047. err = snd_ctl_add(ice->card,
  2048. snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  2049. if (err < 0)
  2050. return err;
  2051. }
  2052. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  2053. if (err < 0)
  2054. return err;
  2055. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  2056. if (err < 0)
  2057. return err;
  2058. kctl->id.device = ice->pcm->device;
  2059. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  2060. if (err < 0)
  2061. return err;
  2062. kctl->id.device = ice->pcm->device;
  2063. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  2064. if (err < 0)
  2065. return err;
  2066. kctl->id.device = ice->pcm->device;
  2067. #if 0 /* use default only */
  2068. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  2069. if (err < 0)
  2070. return err;
  2071. kctl->id.device = ice->pcm->device;
  2072. ice->spdif.stream_ctl = kctl;
  2073. #endif
  2074. return 0;
  2075. }
  2076. static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
  2077. {
  2078. int err;
  2079. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  2080. if (err < 0)
  2081. return err;
  2082. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  2083. if (err < 0)
  2084. return err;
  2085. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  2086. if (err < 0)
  2087. return err;
  2088. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  2089. if (err < 0)
  2090. return err;
  2091. if (!ice->own_routing && ice->num_total_dacs > 0) {
  2092. struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
  2093. tmp.count = ice->num_total_dacs;
  2094. if (ice->vt1720 && tmp.count > 2)
  2095. tmp.count = 2;
  2096. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  2097. if (err < 0)
  2098. return err;
  2099. }
  2100. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  2101. if (err < 0)
  2102. return err;
  2103. return 0;
  2104. }
  2105. static int snd_vt1724_free(struct snd_ice1712 *ice)
  2106. {
  2107. if (!ice->port)
  2108. goto __hw_end;
  2109. /* mask all interrupts */
  2110. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  2111. outb(0xff, ICEREG1724(ice, IRQMASK));
  2112. /* --- */
  2113. __hw_end:
  2114. if (ice->irq >= 0)
  2115. free_irq(ice->irq, ice);
  2116. pci_release_regions(ice->pci);
  2117. snd_ice1712_akm4xxx_free(ice);
  2118. pci_disable_device(ice->pci);
  2119. kfree(ice->spec);
  2120. kfree(ice);
  2121. return 0;
  2122. }
  2123. static int snd_vt1724_dev_free(struct snd_device *device)
  2124. {
  2125. struct snd_ice1712 *ice = device->device_data;
  2126. return snd_vt1724_free(ice);
  2127. }
  2128. static int __devinit snd_vt1724_create(struct snd_card *card,
  2129. struct pci_dev *pci,
  2130. const char *modelname,
  2131. struct snd_ice1712 **r_ice1712)
  2132. {
  2133. struct snd_ice1712 *ice;
  2134. int err;
  2135. static struct snd_device_ops ops = {
  2136. .dev_free = snd_vt1724_dev_free,
  2137. };
  2138. *r_ice1712 = NULL;
  2139. /* enable PCI device */
  2140. err = pci_enable_device(pci);
  2141. if (err < 0)
  2142. return err;
  2143. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  2144. if (ice == NULL) {
  2145. pci_disable_device(pci);
  2146. return -ENOMEM;
  2147. }
  2148. ice->vt1724 = 1;
  2149. spin_lock_init(&ice->reg_lock);
  2150. mutex_init(&ice->gpio_mutex);
  2151. mutex_init(&ice->open_mutex);
  2152. mutex_init(&ice->i2c_mutex);
  2153. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  2154. ice->gpio.get_mask = snd_vt1724_get_gpio_mask;
  2155. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  2156. ice->gpio.get_dir = snd_vt1724_get_gpio_dir;
  2157. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  2158. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  2159. ice->card = card;
  2160. ice->pci = pci;
  2161. ice->irq = -1;
  2162. pci_set_master(pci);
  2163. snd_vt1724_proc_init(ice);
  2164. synchronize_irq(pci->irq);
  2165. card->private_data = ice;
  2166. err = pci_request_regions(pci, "ICE1724");
  2167. if (err < 0) {
  2168. kfree(ice);
  2169. pci_disable_device(pci);
  2170. return err;
  2171. }
  2172. ice->port = pci_resource_start(pci, 0);
  2173. ice->profi_port = pci_resource_start(pci, 1);
  2174. if (request_irq(pci->irq, snd_vt1724_interrupt,
  2175. IRQF_SHARED, "ICE1724", ice)) {
  2176. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2177. snd_vt1724_free(ice);
  2178. return -EIO;
  2179. }
  2180. ice->irq = pci->irq;
  2181. snd_vt1724_chip_reset(ice);
  2182. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  2183. snd_vt1724_free(ice);
  2184. return -EIO;
  2185. }
  2186. if (snd_vt1724_chip_init(ice) < 0) {
  2187. snd_vt1724_free(ice);
  2188. return -EIO;
  2189. }
  2190. err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
  2191. if (err < 0) {
  2192. snd_vt1724_free(ice);
  2193. return err;
  2194. }
  2195. snd_card_set_dev(card, &pci->dev);
  2196. *r_ice1712 = ice;
  2197. return 0;
  2198. }
  2199. /*
  2200. *
  2201. * Registration
  2202. *
  2203. */
  2204. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  2205. const struct pci_device_id *pci_id)
  2206. {
  2207. static int dev;
  2208. struct snd_card *card;
  2209. struct snd_ice1712 *ice;
  2210. int pcm_dev = 0, err;
  2211. struct snd_ice1712_card_info * const *tbl, *c;
  2212. if (dev >= SNDRV_CARDS)
  2213. return -ENODEV;
  2214. if (!enable[dev]) {
  2215. dev++;
  2216. return -ENOENT;
  2217. }
  2218. err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
  2219. if (err < 0)
  2220. return err;
  2221. strcpy(card->driver, "ICE1724");
  2222. strcpy(card->shortname, "ICEnsemble ICE1724");
  2223. err = snd_vt1724_create(card, pci, model[dev], &ice);
  2224. if (err < 0) {
  2225. snd_card_free(card);
  2226. return err;
  2227. }
  2228. for (tbl = card_tables; *tbl; tbl++) {
  2229. for (c = *tbl; c->subvendor; c++) {
  2230. if (c->subvendor == ice->eeprom.subvendor) {
  2231. strcpy(card->shortname, c->name);
  2232. if (c->driver) /* specific driver? */
  2233. strcpy(card->driver, c->driver);
  2234. if (c->chip_init) {
  2235. err = c->chip_init(ice);
  2236. if (err < 0) {
  2237. snd_card_free(card);
  2238. return err;
  2239. }
  2240. }
  2241. goto __found;
  2242. }
  2243. }
  2244. }
  2245. c = &no_matched;
  2246. __found:
  2247. /*
  2248. * VT1724 has separate DMAs for the analog and the SPDIF streams while
  2249. * ICE1712 has only one for both (mixed up).
  2250. *
  2251. * Confusingly the analog PCM is named "professional" here because it
  2252. * was called so in ice1712 driver, and vt1724 driver is derived from
  2253. * ice1712 driver.
  2254. */
  2255. ice->pro_rate_default = PRO_RATE_DEFAULT;
  2256. if (!ice->is_spdif_master)
  2257. ice->is_spdif_master = stdclock_is_spdif_master;
  2258. if (!ice->get_rate)
  2259. ice->get_rate = stdclock_get_rate;
  2260. if (!ice->set_rate)
  2261. ice->set_rate = stdclock_set_rate;
  2262. if (!ice->set_mclk)
  2263. ice->set_mclk = stdclock_set_mclk;
  2264. if (!ice->set_spdif_clock)
  2265. ice->set_spdif_clock = stdclock_set_spdif_clock;
  2266. if (!ice->hw_rates)
  2267. set_std_hw_rates(ice);
  2268. err = snd_vt1724_pcm_profi(ice, pcm_dev++);
  2269. if (err < 0) {
  2270. snd_card_free(card);
  2271. return err;
  2272. }
  2273. err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
  2274. if (err < 0) {
  2275. snd_card_free(card);
  2276. return err;
  2277. }
  2278. err = snd_vt1724_pcm_indep(ice, pcm_dev++);
  2279. if (err < 0) {
  2280. snd_card_free(card);
  2281. return err;
  2282. }
  2283. err = snd_vt1724_ac97_mixer(ice);
  2284. if (err < 0) {
  2285. snd_card_free(card);
  2286. return err;
  2287. }
  2288. err = snd_vt1724_build_controls(ice);
  2289. if (err < 0) {
  2290. snd_card_free(card);
  2291. return err;
  2292. }
  2293. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  2294. err = snd_vt1724_spdif_build_controls(ice);
  2295. if (err < 0) {
  2296. snd_card_free(card);
  2297. return err;
  2298. }
  2299. }
  2300. if (c->build_controls) {
  2301. err = c->build_controls(ice);
  2302. if (err < 0) {
  2303. snd_card_free(card);
  2304. return err;
  2305. }
  2306. }
  2307. if (!c->no_mpu401) {
  2308. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  2309. struct snd_rawmidi *rmidi;
  2310. err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
  2311. if (err < 0) {
  2312. snd_card_free(card);
  2313. return err;
  2314. }
  2315. ice->rmidi[0] = rmidi;
  2316. rmidi->private_data = ice;
  2317. strcpy(rmidi->name, "ICE1724 MIDI");
  2318. rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
  2319. SNDRV_RAWMIDI_INFO_INPUT |
  2320. SNDRV_RAWMIDI_INFO_DUPLEX;
  2321. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
  2322. &vt1724_midi_output_ops);
  2323. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
  2324. &vt1724_midi_input_ops);
  2325. /* set watermarks */
  2326. outb(VT1724_MPU_RX_FIFO | 0x1,
  2327. ICEREG1724(ice, MPU_FIFO_WM));
  2328. outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
  2329. /* set UART mode */
  2330. outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
  2331. }
  2332. }
  2333. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2334. card->shortname, ice->port, ice->irq);
  2335. err = snd_card_register(card);
  2336. if (err < 0) {
  2337. snd_card_free(card);
  2338. return err;
  2339. }
  2340. pci_set_drvdata(pci, card);
  2341. dev++;
  2342. return 0;
  2343. }
  2344. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2345. {
  2346. snd_card_free(pci_get_drvdata(pci));
  2347. pci_set_drvdata(pci, NULL);
  2348. }
  2349. #ifdef CONFIG_PM
  2350. static int snd_vt1724_suspend(struct pci_dev *pci, pm_message_t state)
  2351. {
  2352. struct snd_card *card = pci_get_drvdata(pci);
  2353. struct snd_ice1712 *ice = card->private_data;
  2354. if (!ice->pm_suspend_enabled)
  2355. return 0;
  2356. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  2357. snd_pcm_suspend_all(ice->pcm);
  2358. snd_pcm_suspend_all(ice->pcm_pro);
  2359. snd_pcm_suspend_all(ice->pcm_ds);
  2360. snd_ac97_suspend(ice->ac97);
  2361. spin_lock_irq(&ice->reg_lock);
  2362. ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice);
  2363. ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL));
  2364. ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG));
  2365. ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  2366. spin_unlock_irq(&ice->reg_lock);
  2367. if (ice->pm_suspend)
  2368. ice->pm_suspend(ice);
  2369. pci_disable_device(pci);
  2370. pci_save_state(pci);
  2371. pci_set_power_state(pci, pci_choose_state(pci, state));
  2372. return 0;
  2373. }
  2374. static int snd_vt1724_resume(struct pci_dev *pci)
  2375. {
  2376. struct snd_card *card = pci_get_drvdata(pci);
  2377. struct snd_ice1712 *ice = card->private_data;
  2378. if (!ice->pm_suspend_enabled)
  2379. return 0;
  2380. pci_set_power_state(pci, PCI_D0);
  2381. pci_restore_state(pci);
  2382. if (pci_enable_device(pci) < 0) {
  2383. snd_card_disconnect(card);
  2384. return -EIO;
  2385. }
  2386. pci_set_master(pci);
  2387. snd_vt1724_chip_reset(ice);
  2388. if (snd_vt1724_chip_init(ice) < 0) {
  2389. snd_card_disconnect(card);
  2390. return -EIO;
  2391. }
  2392. if (ice->pm_resume)
  2393. ice->pm_resume(ice);
  2394. if (ice->pm_saved_is_spdif_master) {
  2395. /* switching to external clock via SPDIF */
  2396. ice->set_spdif_clock(ice);
  2397. } else {
  2398. /* internal on-card clock */
  2399. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
  2400. }
  2401. update_spdif_bits(ice, ice->pm_saved_spdif_ctrl);
  2402. outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG));
  2403. outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK));
  2404. if (ice->ac97)
  2405. snd_ac97_resume(ice->ac97);
  2406. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  2407. return 0;
  2408. }
  2409. #endif
  2410. static struct pci_driver driver = {
  2411. .name = "ICE1724",
  2412. .id_table = snd_vt1724_ids,
  2413. .probe = snd_vt1724_probe,
  2414. .remove = __devexit_p(snd_vt1724_remove),
  2415. #ifdef CONFIG_PM
  2416. .suspend = snd_vt1724_suspend,
  2417. .resume = snd_vt1724_resume,
  2418. #endif
  2419. };
  2420. static int __init alsa_card_ice1724_init(void)
  2421. {
  2422. return pci_register_driver(&driver);
  2423. }
  2424. static void __exit alsa_card_ice1724_exit(void)
  2425. {
  2426. pci_unregister_driver(&driver);
  2427. }
  2428. module_init(alsa_card_ice1724_init)
  2429. module_exit(alsa_card_ice1724_exit)