oxygen.c 23 KB

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  1. /*
  2. * C-Media CMI8788 driver for C-Media's reference design and similar models
  3. *
  4. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. *
  7. * This driver is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License, version 2.
  9. *
  10. * This driver is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this driver; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. /*
  20. * CMI8788:
  21. *
  22. * SPI 0 -> 1st AK4396 (front)
  23. * SPI 1 -> 2nd AK4396 (surround)
  24. * SPI 2 -> 3rd AK4396 (center/LFE)
  25. * SPI 3 -> WM8785
  26. * SPI 4 -> 4th AK4396 (back)
  27. *
  28. * GPIO 0 -> DFS0 of AK5385
  29. * GPIO 1 -> DFS1 of AK5385
  30. *
  31. * X-Meridian models:
  32. * GPIO 4 -> enable extension S/PDIF input
  33. * GPIO 6 -> enable on-board S/PDIF input
  34. *
  35. * Claro models:
  36. * GPIO 6 -> S/PDIF from optical (0) or coaxial (1) input
  37. * GPIO 8 -> enable headphone amplifier
  38. *
  39. * CM9780:
  40. *
  41. * LINE_OUT -> input of ADC
  42. *
  43. * AUX_IN <- aux
  44. * CD_IN <- CD
  45. * MIC_IN <- mic
  46. *
  47. * GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
  48. */
  49. #include <linux/delay.h>
  50. #include <linux/mutex.h>
  51. #include <linux/pci.h>
  52. #include <linux/module.h>
  53. #include <sound/ac97_codec.h>
  54. #include <sound/control.h>
  55. #include <sound/core.h>
  56. #include <sound/info.h>
  57. #include <sound/initval.h>
  58. #include <sound/pcm.h>
  59. #include <sound/pcm_params.h>
  60. #include <sound/tlv.h>
  61. #include "oxygen.h"
  62. #include "xonar_dg.h"
  63. #include "ak4396.h"
  64. #include "wm8785.h"
  65. MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
  66. MODULE_DESCRIPTION("C-Media CMI8788 driver");
  67. MODULE_LICENSE("GPL v2");
  68. MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8786}"
  69. ",{C-Media,CMI8787}"
  70. ",{C-Media,CMI8788}}");
  71. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  72. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  73. static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  74. module_param_array(index, int, NULL, 0444);
  75. MODULE_PARM_DESC(index, "card index");
  76. module_param_array(id, charp, NULL, 0444);
  77. MODULE_PARM_DESC(id, "ID string");
  78. module_param_array(enable, bool, NULL, 0444);
  79. MODULE_PARM_DESC(enable, "enable card");
  80. enum {
  81. MODEL_CMEDIA_REF,
  82. MODEL_MERIDIAN,
  83. MODEL_MERIDIAN_2G,
  84. MODEL_CLARO,
  85. MODEL_CLARO_HALO,
  86. MODEL_FANTASIA,
  87. MODEL_SERENADE,
  88. MODEL_2CH_OUTPUT,
  89. MODEL_HG2PCI,
  90. MODEL_XONAR_DG,
  91. };
  92. static DEFINE_PCI_DEVICE_TABLE(oxygen_ids) = {
  93. /* C-Media's reference design */
  94. { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
  95. { OXYGEN_PCI_SUBID(0x10b0, 0x0217), .driver_data = MODEL_CMEDIA_REF },
  96. { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
  97. { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
  98. { OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
  99. { OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
  100. { OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
  101. { OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
  102. { OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
  103. /* Asus Xonar DG */
  104. { OXYGEN_PCI_SUBID(0x1043, 0x8467), .driver_data = MODEL_XONAR_DG },
  105. /* PCI 2.0 HD Audio */
  106. { OXYGEN_PCI_SUBID(0x13f6, 0x8782), .driver_data = MODEL_2CH_OUTPUT },
  107. /* Kuroutoshikou CMI8787-HG2PCI */
  108. { OXYGEN_PCI_SUBID(0x13f6, 0xffff), .driver_data = MODEL_HG2PCI },
  109. /* TempoTec HiFier Fantasia */
  110. { OXYGEN_PCI_SUBID(0x14c3, 0x1710), .driver_data = MODEL_FANTASIA },
  111. /* TempoTec HiFier Serenade */
  112. { OXYGEN_PCI_SUBID(0x14c3, 0x1711), .driver_data = MODEL_SERENADE },
  113. /* AuzenTech X-Meridian */
  114. { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
  115. /* AuzenTech X-Meridian 2G */
  116. { OXYGEN_PCI_SUBID(0x5431, 0x017a), .driver_data = MODEL_MERIDIAN_2G },
  117. /* HT-Omega Claro */
  118. { OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
  119. /* HT-Omega Claro halo */
  120. { OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
  121. { }
  122. };
  123. MODULE_DEVICE_TABLE(pci, oxygen_ids);
  124. #define GPIO_AK5385_DFS_MASK 0x0003
  125. #define GPIO_AK5385_DFS_NORMAL 0x0000
  126. #define GPIO_AK5385_DFS_DOUBLE 0x0001
  127. #define GPIO_AK5385_DFS_QUAD 0x0002
  128. #define GPIO_MERIDIAN_DIG_MASK 0x0050
  129. #define GPIO_MERIDIAN_DIG_EXT 0x0010
  130. #define GPIO_MERIDIAN_DIG_BOARD 0x0040
  131. #define GPIO_CLARO_DIG_COAX 0x0040
  132. #define GPIO_CLARO_HP 0x0100
  133. struct generic_data {
  134. unsigned int dacs;
  135. u8 ak4396_regs[4][5];
  136. u16 wm8785_regs[3];
  137. };
  138. static void ak4396_write(struct oxygen *chip, unsigned int codec,
  139. u8 reg, u8 value)
  140. {
  141. /* maps ALSA channel pair number to SPI output */
  142. static const u8 codec_spi_map[4] = {
  143. 0, 1, 2, 4
  144. };
  145. struct generic_data *data = chip->model_data;
  146. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  147. OXYGEN_SPI_DATA_LENGTH_2 |
  148. OXYGEN_SPI_CLOCK_160 |
  149. (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
  150. OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
  151. AK4396_WRITE | (reg << 8) | value);
  152. data->ak4396_regs[codec][reg] = value;
  153. }
  154. static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
  155. u8 reg, u8 value)
  156. {
  157. struct generic_data *data = chip->model_data;
  158. if (value != data->ak4396_regs[codec][reg])
  159. ak4396_write(chip, codec, reg, value);
  160. }
  161. static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
  162. {
  163. struct generic_data *data = chip->model_data;
  164. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  165. OXYGEN_SPI_DATA_LENGTH_2 |
  166. OXYGEN_SPI_CLOCK_160 |
  167. (3 << OXYGEN_SPI_CODEC_SHIFT) |
  168. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  169. (reg << 9) | value);
  170. if (reg < ARRAY_SIZE(data->wm8785_regs))
  171. data->wm8785_regs[reg] = value;
  172. }
  173. static void ak4396_registers_init(struct oxygen *chip)
  174. {
  175. struct generic_data *data = chip->model_data;
  176. unsigned int i;
  177. for (i = 0; i < data->dacs; ++i) {
  178. ak4396_write(chip, i, AK4396_CONTROL_1,
  179. AK4396_DIF_24_MSB | AK4396_RSTN);
  180. ak4396_write(chip, i, AK4396_CONTROL_2,
  181. data->ak4396_regs[0][AK4396_CONTROL_2]);
  182. ak4396_write(chip, i, AK4396_CONTROL_3,
  183. AK4396_PCM);
  184. ak4396_write(chip, i, AK4396_LCH_ATT,
  185. chip->dac_volume[i * 2]);
  186. ak4396_write(chip, i, AK4396_RCH_ATT,
  187. chip->dac_volume[i * 2 + 1]);
  188. }
  189. }
  190. static void ak4396_init(struct oxygen *chip)
  191. {
  192. struct generic_data *data = chip->model_data;
  193. data->dacs = chip->model.dac_channels_pcm / 2;
  194. data->ak4396_regs[0][AK4396_CONTROL_2] =
  195. AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
  196. ak4396_registers_init(chip);
  197. snd_component_add(chip->card, "AK4396");
  198. }
  199. static void ak5385_init(struct oxygen *chip)
  200. {
  201. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
  202. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
  203. snd_component_add(chip->card, "AK5385");
  204. }
  205. static void wm8785_registers_init(struct oxygen *chip)
  206. {
  207. struct generic_data *data = chip->model_data;
  208. wm8785_write(chip, WM8785_R7, 0);
  209. wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
  210. wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
  211. }
  212. static void wm8785_init(struct oxygen *chip)
  213. {
  214. struct generic_data *data = chip->model_data;
  215. data->wm8785_regs[0] =
  216. WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
  217. data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
  218. wm8785_registers_init(chip);
  219. snd_component_add(chip->card, "WM8785");
  220. }
  221. static void generic_init(struct oxygen *chip)
  222. {
  223. ak4396_init(chip);
  224. wm8785_init(chip);
  225. }
  226. static void meridian_init(struct oxygen *chip)
  227. {
  228. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
  229. GPIO_MERIDIAN_DIG_MASK);
  230. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  231. GPIO_MERIDIAN_DIG_BOARD, GPIO_MERIDIAN_DIG_MASK);
  232. ak4396_init(chip);
  233. ak5385_init(chip);
  234. }
  235. static void claro_enable_hp(struct oxygen *chip)
  236. {
  237. msleep(300);
  238. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
  239. oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
  240. }
  241. static void claro_init(struct oxygen *chip)
  242. {
  243. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
  244. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
  245. ak4396_init(chip);
  246. wm8785_init(chip);
  247. claro_enable_hp(chip);
  248. }
  249. static void claro_halo_init(struct oxygen *chip)
  250. {
  251. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
  252. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
  253. ak4396_init(chip);
  254. ak5385_init(chip);
  255. claro_enable_hp(chip);
  256. }
  257. static void fantasia_init(struct oxygen *chip)
  258. {
  259. ak4396_init(chip);
  260. snd_component_add(chip->card, "CS5340");
  261. }
  262. static void stereo_output_init(struct oxygen *chip)
  263. {
  264. ak4396_init(chip);
  265. }
  266. static void generic_cleanup(struct oxygen *chip)
  267. {
  268. }
  269. static void claro_disable_hp(struct oxygen *chip)
  270. {
  271. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
  272. }
  273. static void claro_cleanup(struct oxygen *chip)
  274. {
  275. claro_disable_hp(chip);
  276. }
  277. static void claro_suspend(struct oxygen *chip)
  278. {
  279. claro_disable_hp(chip);
  280. }
  281. static void generic_resume(struct oxygen *chip)
  282. {
  283. ak4396_registers_init(chip);
  284. wm8785_registers_init(chip);
  285. }
  286. static void meridian_resume(struct oxygen *chip)
  287. {
  288. ak4396_registers_init(chip);
  289. }
  290. static void claro_resume(struct oxygen *chip)
  291. {
  292. ak4396_registers_init(chip);
  293. claro_enable_hp(chip);
  294. }
  295. static void stereo_resume(struct oxygen *chip)
  296. {
  297. ak4396_registers_init(chip);
  298. }
  299. static void set_ak4396_params(struct oxygen *chip,
  300. struct snd_pcm_hw_params *params)
  301. {
  302. struct generic_data *data = chip->model_data;
  303. unsigned int i;
  304. u8 value;
  305. value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
  306. if (params_rate(params) <= 54000)
  307. value |= AK4396_DFS_NORMAL;
  308. else if (params_rate(params) <= 108000)
  309. value |= AK4396_DFS_DOUBLE;
  310. else
  311. value |= AK4396_DFS_QUAD;
  312. msleep(1); /* wait for the new MCLK to become stable */
  313. if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
  314. for (i = 0; i < data->dacs; ++i) {
  315. ak4396_write(chip, i, AK4396_CONTROL_1,
  316. AK4396_DIF_24_MSB);
  317. ak4396_write(chip, i, AK4396_CONTROL_2, value);
  318. ak4396_write(chip, i, AK4396_CONTROL_1,
  319. AK4396_DIF_24_MSB | AK4396_RSTN);
  320. }
  321. }
  322. }
  323. static void update_ak4396_volume(struct oxygen *chip)
  324. {
  325. struct generic_data *data = chip->model_data;
  326. unsigned int i;
  327. for (i = 0; i < data->dacs; ++i) {
  328. ak4396_write_cached(chip, i, AK4396_LCH_ATT,
  329. chip->dac_volume[i * 2]);
  330. ak4396_write_cached(chip, i, AK4396_RCH_ATT,
  331. chip->dac_volume[i * 2 + 1]);
  332. }
  333. }
  334. static void update_ak4396_mute(struct oxygen *chip)
  335. {
  336. struct generic_data *data = chip->model_data;
  337. unsigned int i;
  338. u8 value;
  339. value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
  340. if (chip->dac_mute)
  341. value |= AK4396_SMUTE;
  342. for (i = 0; i < data->dacs; ++i)
  343. ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
  344. }
  345. static void set_wm8785_params(struct oxygen *chip,
  346. struct snd_pcm_hw_params *params)
  347. {
  348. struct generic_data *data = chip->model_data;
  349. unsigned int value;
  350. value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
  351. if (params_rate(params) <= 48000)
  352. value |= WM8785_OSR_SINGLE;
  353. else if (params_rate(params) <= 96000)
  354. value |= WM8785_OSR_DOUBLE;
  355. else
  356. value |= WM8785_OSR_QUAD;
  357. if (value != data->wm8785_regs[0]) {
  358. wm8785_write(chip, WM8785_R7, 0);
  359. wm8785_write(chip, WM8785_R0, value);
  360. wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
  361. }
  362. }
  363. static void set_ak5385_params(struct oxygen *chip,
  364. struct snd_pcm_hw_params *params)
  365. {
  366. unsigned int value;
  367. if (params_rate(params) <= 54000)
  368. value = GPIO_AK5385_DFS_NORMAL;
  369. else if (params_rate(params) <= 108000)
  370. value = GPIO_AK5385_DFS_DOUBLE;
  371. else
  372. value = GPIO_AK5385_DFS_QUAD;
  373. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  374. value, GPIO_AK5385_DFS_MASK);
  375. }
  376. static void set_no_params(struct oxygen *chip, struct snd_pcm_hw_params *params)
  377. {
  378. }
  379. static int rolloff_info(struct snd_kcontrol *ctl,
  380. struct snd_ctl_elem_info *info)
  381. {
  382. static const char *const names[2] = {
  383. "Sharp Roll-off", "Slow Roll-off"
  384. };
  385. return snd_ctl_enum_info(info, 1, 2, names);
  386. }
  387. static int rolloff_get(struct snd_kcontrol *ctl,
  388. struct snd_ctl_elem_value *value)
  389. {
  390. struct oxygen *chip = ctl->private_data;
  391. struct generic_data *data = chip->model_data;
  392. value->value.enumerated.item[0] =
  393. (data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
  394. return 0;
  395. }
  396. static int rolloff_put(struct snd_kcontrol *ctl,
  397. struct snd_ctl_elem_value *value)
  398. {
  399. struct oxygen *chip = ctl->private_data;
  400. struct generic_data *data = chip->model_data;
  401. unsigned int i;
  402. int changed;
  403. u8 reg;
  404. mutex_lock(&chip->mutex);
  405. reg = data->ak4396_regs[0][AK4396_CONTROL_2];
  406. if (value->value.enumerated.item[0])
  407. reg |= AK4396_SLOW;
  408. else
  409. reg &= ~AK4396_SLOW;
  410. changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
  411. if (changed) {
  412. for (i = 0; i < data->dacs; ++i)
  413. ak4396_write(chip, i, AK4396_CONTROL_2, reg);
  414. }
  415. mutex_unlock(&chip->mutex);
  416. return changed;
  417. }
  418. static const struct snd_kcontrol_new rolloff_control = {
  419. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  420. .name = "DAC Filter Playback Enum",
  421. .info = rolloff_info,
  422. .get = rolloff_get,
  423. .put = rolloff_put,
  424. };
  425. static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
  426. {
  427. static const char *const names[2] = {
  428. "None", "High-pass Filter"
  429. };
  430. return snd_ctl_enum_info(info, 1, 2, names);
  431. }
  432. static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  433. {
  434. struct oxygen *chip = ctl->private_data;
  435. struct generic_data *data = chip->model_data;
  436. value->value.enumerated.item[0] =
  437. (data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
  438. return 0;
  439. }
  440. static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  441. {
  442. struct oxygen *chip = ctl->private_data;
  443. struct generic_data *data = chip->model_data;
  444. unsigned int reg;
  445. int changed;
  446. mutex_lock(&chip->mutex);
  447. reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
  448. if (value->value.enumerated.item[0])
  449. reg |= WM8785_HPFR | WM8785_HPFL;
  450. changed = reg != data->wm8785_regs[WM8785_R2];
  451. if (changed)
  452. wm8785_write(chip, WM8785_R2, reg);
  453. mutex_unlock(&chip->mutex);
  454. return changed;
  455. }
  456. static const struct snd_kcontrol_new hpf_control = {
  457. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  458. .name = "ADC Filter Capture Enum",
  459. .info = hpf_info,
  460. .get = hpf_get,
  461. .put = hpf_put,
  462. };
  463. static int meridian_dig_source_info(struct snd_kcontrol *ctl,
  464. struct snd_ctl_elem_info *info)
  465. {
  466. static const char *const names[2] = { "On-board", "Extension" };
  467. return snd_ctl_enum_info(info, 1, 2, names);
  468. }
  469. static int claro_dig_source_info(struct snd_kcontrol *ctl,
  470. struct snd_ctl_elem_info *info)
  471. {
  472. static const char *const names[2] = { "Optical", "Coaxial" };
  473. return snd_ctl_enum_info(info, 1, 2, names);
  474. }
  475. static int meridian_dig_source_get(struct snd_kcontrol *ctl,
  476. struct snd_ctl_elem_value *value)
  477. {
  478. struct oxygen *chip = ctl->private_data;
  479. value->value.enumerated.item[0] =
  480. !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
  481. GPIO_MERIDIAN_DIG_EXT);
  482. return 0;
  483. }
  484. static int claro_dig_source_get(struct snd_kcontrol *ctl,
  485. struct snd_ctl_elem_value *value)
  486. {
  487. struct oxygen *chip = ctl->private_data;
  488. value->value.enumerated.item[0] =
  489. !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
  490. GPIO_CLARO_DIG_COAX);
  491. return 0;
  492. }
  493. static int meridian_dig_source_put(struct snd_kcontrol *ctl,
  494. struct snd_ctl_elem_value *value)
  495. {
  496. struct oxygen *chip = ctl->private_data;
  497. u16 old_reg, new_reg;
  498. int changed;
  499. mutex_lock(&chip->mutex);
  500. old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
  501. new_reg = old_reg & ~GPIO_MERIDIAN_DIG_MASK;
  502. if (value->value.enumerated.item[0] == 0)
  503. new_reg |= GPIO_MERIDIAN_DIG_BOARD;
  504. else
  505. new_reg |= GPIO_MERIDIAN_DIG_EXT;
  506. changed = new_reg != old_reg;
  507. if (changed)
  508. oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
  509. mutex_unlock(&chip->mutex);
  510. return changed;
  511. }
  512. static int claro_dig_source_put(struct snd_kcontrol *ctl,
  513. struct snd_ctl_elem_value *value)
  514. {
  515. struct oxygen *chip = ctl->private_data;
  516. u16 old_reg, new_reg;
  517. int changed;
  518. mutex_lock(&chip->mutex);
  519. old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
  520. new_reg = old_reg & ~GPIO_CLARO_DIG_COAX;
  521. if (value->value.enumerated.item[0])
  522. new_reg |= GPIO_CLARO_DIG_COAX;
  523. changed = new_reg != old_reg;
  524. if (changed)
  525. oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
  526. mutex_unlock(&chip->mutex);
  527. return changed;
  528. }
  529. static const struct snd_kcontrol_new meridian_dig_source_control = {
  530. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  531. .name = "IEC958 Source Capture Enum",
  532. .info = meridian_dig_source_info,
  533. .get = meridian_dig_source_get,
  534. .put = meridian_dig_source_put,
  535. };
  536. static const struct snd_kcontrol_new claro_dig_source_control = {
  537. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  538. .name = "IEC958 Source Capture Enum",
  539. .info = claro_dig_source_info,
  540. .get = claro_dig_source_get,
  541. .put = claro_dig_source_put,
  542. };
  543. static int generic_mixer_init(struct oxygen *chip)
  544. {
  545. return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
  546. }
  547. static int generic_wm8785_mixer_init(struct oxygen *chip)
  548. {
  549. int err;
  550. err = generic_mixer_init(chip);
  551. if (err < 0)
  552. return err;
  553. err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
  554. if (err < 0)
  555. return err;
  556. return 0;
  557. }
  558. static int meridian_mixer_init(struct oxygen *chip)
  559. {
  560. int err;
  561. err = generic_mixer_init(chip);
  562. if (err < 0)
  563. return err;
  564. err = snd_ctl_add(chip->card,
  565. snd_ctl_new1(&meridian_dig_source_control, chip));
  566. if (err < 0)
  567. return err;
  568. return 0;
  569. }
  570. static int claro_mixer_init(struct oxygen *chip)
  571. {
  572. int err;
  573. err = generic_wm8785_mixer_init(chip);
  574. if (err < 0)
  575. return err;
  576. err = snd_ctl_add(chip->card,
  577. snd_ctl_new1(&claro_dig_source_control, chip));
  578. if (err < 0)
  579. return err;
  580. return 0;
  581. }
  582. static int claro_halo_mixer_init(struct oxygen *chip)
  583. {
  584. int err;
  585. err = generic_mixer_init(chip);
  586. if (err < 0)
  587. return err;
  588. err = snd_ctl_add(chip->card,
  589. snd_ctl_new1(&claro_dig_source_control, chip));
  590. if (err < 0)
  591. return err;
  592. return 0;
  593. }
  594. static void dump_ak4396_registers(struct oxygen *chip,
  595. struct snd_info_buffer *buffer)
  596. {
  597. struct generic_data *data = chip->model_data;
  598. unsigned int dac, i;
  599. for (dac = 0; dac < data->dacs; ++dac) {
  600. snd_iprintf(buffer, "\nAK4396 %u:", dac + 1);
  601. for (i = 0; i < 5; ++i)
  602. snd_iprintf(buffer, " %02x", data->ak4396_regs[dac][i]);
  603. }
  604. snd_iprintf(buffer, "\n");
  605. }
  606. static void dump_wm8785_registers(struct oxygen *chip,
  607. struct snd_info_buffer *buffer)
  608. {
  609. struct generic_data *data = chip->model_data;
  610. unsigned int i;
  611. snd_iprintf(buffer, "\nWM8785:");
  612. for (i = 0; i < 3; ++i)
  613. snd_iprintf(buffer, " %03x", data->wm8785_regs[i]);
  614. snd_iprintf(buffer, "\n");
  615. }
  616. static void dump_oxygen_registers(struct oxygen *chip,
  617. struct snd_info_buffer *buffer)
  618. {
  619. dump_ak4396_registers(chip, buffer);
  620. dump_wm8785_registers(chip, buffer);
  621. }
  622. static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
  623. static const struct oxygen_model model_generic = {
  624. .shortname = "C-Media CMI8788",
  625. .longname = "C-Media Oxygen HD Audio",
  626. .chip = "CMI8788",
  627. .init = generic_init,
  628. .mixer_init = generic_wm8785_mixer_init,
  629. .cleanup = generic_cleanup,
  630. .resume = generic_resume,
  631. .set_dac_params = set_ak4396_params,
  632. .set_adc_params = set_wm8785_params,
  633. .update_dac_volume = update_ak4396_volume,
  634. .update_dac_mute = update_ak4396_mute,
  635. .dump_registers = dump_oxygen_registers,
  636. .dac_tlv = ak4396_db_scale,
  637. .model_data_size = sizeof(struct generic_data),
  638. .device_config = PLAYBACK_0_TO_I2S |
  639. PLAYBACK_1_TO_SPDIF |
  640. PLAYBACK_2_TO_AC97_1 |
  641. CAPTURE_0_FROM_I2S_1 |
  642. CAPTURE_1_FROM_SPDIF |
  643. CAPTURE_2_FROM_AC97_1 |
  644. AC97_CD_INPUT,
  645. .dac_channels_pcm = 8,
  646. .dac_channels_mixer = 8,
  647. .dac_volume_min = 0,
  648. .dac_volume_max = 255,
  649. .function_flags = OXYGEN_FUNCTION_SPI |
  650. OXYGEN_FUNCTION_ENABLE_SPI_4_5,
  651. .dac_mclks = OXYGEN_MCLKS(256, 128, 128),
  652. .adc_mclks = OXYGEN_MCLKS(256, 256, 128),
  653. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  654. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  655. };
  656. static int __devinit get_oxygen_model(struct oxygen *chip,
  657. const struct pci_device_id *id)
  658. {
  659. static const char *const names[] = {
  660. [MODEL_MERIDIAN] = "AuzenTech X-Meridian",
  661. [MODEL_MERIDIAN_2G] = "AuzenTech X-Meridian 2G",
  662. [MODEL_CLARO] = "HT-Omega Claro",
  663. [MODEL_CLARO_HALO] = "HT-Omega Claro halo",
  664. [MODEL_FANTASIA] = "TempoTec HiFier Fantasia",
  665. [MODEL_SERENADE] = "TempoTec HiFier Serenade",
  666. [MODEL_HG2PCI] = "CMI8787-HG2PCI",
  667. };
  668. chip->model = model_generic;
  669. switch (id->driver_data) {
  670. case MODEL_MERIDIAN:
  671. case MODEL_MERIDIAN_2G:
  672. chip->model.init = meridian_init;
  673. chip->model.mixer_init = meridian_mixer_init;
  674. chip->model.resume = meridian_resume;
  675. chip->model.set_adc_params = set_ak5385_params;
  676. chip->model.dump_registers = dump_ak4396_registers;
  677. chip->model.device_config = PLAYBACK_0_TO_I2S |
  678. PLAYBACK_1_TO_SPDIF |
  679. CAPTURE_0_FROM_I2S_2 |
  680. CAPTURE_1_FROM_SPDIF;
  681. if (id->driver_data == MODEL_MERIDIAN)
  682. chip->model.device_config |= AC97_CD_INPUT;
  683. break;
  684. case MODEL_CLARO:
  685. chip->model.init = claro_init;
  686. chip->model.mixer_init = claro_mixer_init;
  687. chip->model.cleanup = claro_cleanup;
  688. chip->model.suspend = claro_suspend;
  689. chip->model.resume = claro_resume;
  690. break;
  691. case MODEL_CLARO_HALO:
  692. chip->model.init = claro_halo_init;
  693. chip->model.mixer_init = claro_halo_mixer_init;
  694. chip->model.cleanup = claro_cleanup;
  695. chip->model.suspend = claro_suspend;
  696. chip->model.resume = claro_resume;
  697. chip->model.set_adc_params = set_ak5385_params;
  698. chip->model.dump_registers = dump_ak4396_registers;
  699. chip->model.device_config = PLAYBACK_0_TO_I2S |
  700. PLAYBACK_1_TO_SPDIF |
  701. CAPTURE_0_FROM_I2S_2 |
  702. CAPTURE_1_FROM_SPDIF;
  703. break;
  704. case MODEL_FANTASIA:
  705. case MODEL_SERENADE:
  706. case MODEL_2CH_OUTPUT:
  707. case MODEL_HG2PCI:
  708. chip->model.shortname = "C-Media CMI8787";
  709. chip->model.chip = "CMI8787";
  710. if (id->driver_data == MODEL_FANTASIA)
  711. chip->model.init = fantasia_init;
  712. else
  713. chip->model.init = stereo_output_init;
  714. chip->model.resume = stereo_resume;
  715. chip->model.mixer_init = generic_mixer_init;
  716. chip->model.set_adc_params = set_no_params;
  717. chip->model.dump_registers = dump_ak4396_registers;
  718. chip->model.device_config = PLAYBACK_0_TO_I2S |
  719. PLAYBACK_1_TO_SPDIF;
  720. if (id->driver_data == MODEL_FANTASIA) {
  721. chip->model.device_config |= CAPTURE_0_FROM_I2S_1;
  722. chip->model.adc_mclks = OXYGEN_MCLKS(256, 128, 128);
  723. }
  724. chip->model.dac_channels_pcm = 2;
  725. chip->model.dac_channels_mixer = 2;
  726. break;
  727. case MODEL_XONAR_DG:
  728. chip->model = model_xonar_dg;
  729. break;
  730. }
  731. if (id->driver_data == MODEL_MERIDIAN ||
  732. id->driver_data == MODEL_MERIDIAN_2G ||
  733. id->driver_data == MODEL_CLARO_HALO) {
  734. chip->model.misc_flags = OXYGEN_MISC_MIDI;
  735. chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
  736. }
  737. if (id->driver_data < ARRAY_SIZE(names) && names[id->driver_data])
  738. chip->model.shortname = names[id->driver_data];
  739. return 0;
  740. }
  741. static int __devinit generic_oxygen_probe(struct pci_dev *pci,
  742. const struct pci_device_id *pci_id)
  743. {
  744. static int dev;
  745. int err;
  746. if (dev >= SNDRV_CARDS)
  747. return -ENODEV;
  748. if (!enable[dev]) {
  749. ++dev;
  750. return -ENOENT;
  751. }
  752. err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
  753. oxygen_ids, get_oxygen_model);
  754. if (err >= 0)
  755. ++dev;
  756. return err;
  757. }
  758. static struct pci_driver oxygen_driver = {
  759. .name = KBUILD_MODNAME,
  760. .id_table = oxygen_ids,
  761. .probe = generic_oxygen_probe,
  762. .remove = __devexit_p(oxygen_pci_remove),
  763. #ifdef CONFIG_PM
  764. .suspend = oxygen_pci_suspend,
  765. .resume = oxygen_pci_resume,
  766. #endif
  767. };
  768. static int __init alsa_card_oxygen_init(void)
  769. {
  770. return pci_register_driver(&oxygen_driver);
  771. }
  772. static void __exit alsa_card_oxygen_exit(void)
  773. {
  774. pci_unregister_driver(&oxygen_driver);
  775. }
  776. module_init(alsa_card_oxygen_init)
  777. module_exit(alsa_card_oxygen_exit)